Product Sample & Technical Tools & Support & Folder Buy Documents Software Community CSD17552Q3A SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 CSD17552Q3A 30 V N-Channel NexFET™ Power MOSFETs 1 Features ProductSummary • Ultra-LowQ andQ 1• LowThermaglResistgadnce TA=25°C TYPICALVALUE UNIT VDS Drain-to-SourceVoltage 30 V • AvalancheRated Qg GateChargeTotal(4.5V) 9.0 nC • PbFree Qgd GateChargeGate-to-Drain 2.3 nC • RoHSCompliant VGS=4.5V 6.5 mΩ RDS(on) Drain-to-SourceOnResistance • HalogenFree VGS=10V 5.5 mΩ • SON3.3mm×3.3mmPlasticPackage VGS(th) ThresholdVoltage 1.5 V 2 Applications OrderingInformation(1) DEVICE QTY MEDIA PACKAGE SHIP • Point-of-LoadSynchronousBuckinNetworking, CSD17552Q3A 2500 13-InchReel SON Telecom,andComputingSystems 3.3mm×3.3mm Tapeand CSD17552Q3AT 250 7-InchReel PlasticPackage Reel • OptimizedforControlFETApplications (1) For all available packages, see the orderable addendum at 3 Description theendofthedatasheet. This 30 V, 5.5 mΩ, 3.3 mm × 3.3 mm SON AbsoluteMaximumRatings NexFET™ power MOSFET is designed to minimize lossesinpowerconversionapplications. TA=25°Cunlessotherwisestated VALUE UNIT VDS Drain-to-SourceVoltage 30 V TopView VGS Gate-to-SourceVoltage ±20 V ContinuousDrainCurrent,TC=25°C 60 A S 1 8 D ID ContinuousDrainCurrent,SiliconLimited 74 A ContinuousDrainCurrent,TA=25°C(1) 15 A S 2 7 D IDM PulsedDrainCurrent,TA=25°C(2) 84 A PD PowerDissipation(1) 2.6 W S 3 6 D TJ, OperatingJunctionTemperature, –55to150 °C Tstg StorageTemperature D G 4 5 D EAS AIDv=ala3n0cAh,eLE=ne0r.g1ym,sHin,gRleGp=u2ls5eΩ 45 mJ P0093-01 (1) Typical R = 48°C/W on a 1 inch2 (6.45 cm2), θJA SPACE 2oz.(0.071mmthick)Cupadona0.06inch(1.52mm)thick FR4PCB. SPACE (2) Pulseduration≤300μs,dutycycle≤2% R vsV GateCharge DS(on) GS 18 10 ) TC = 25°C Id = 11A ID = 11A We (m 1146 TC = 125ºC Id = 11A ge (V) 8 VDS =15V stanc 12 Volta si e 6 e Re 10 ourc n-Stat 68 e-to-S 4 O at - ()DSon 24 V - GGS 2 R 0 0 0 2 4 6 8 10 12 0 5 10 15 20 VGS - Gate-to- Source Voltage (V) G001 Qg - Gate Charge (nC) G001 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

CSD17552Q3A SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 www.ti.com Table of Contents 1 Features.................................................................. 1 6.1 CommunityResources..............................................7 2 Applications........................................................... 1 6.2 Trademarks...............................................................7 3 Description............................................................. 1 6.3 ElectrostaticDischargeCaution................................7 6.4 Glossary....................................................................7 4 RevisionHistory..................................................... 2 7 Mechanical,Packaging,andOrderable 5 Specifications......................................................... 3 Information............................................................. 8 5.1 ElectricalCharacteristics...........................................3 7.1 Q3APackageDimensions........................................8 5.2 ThermalInformation..................................................3 7.2 Q3ARecommendedPCBPattern............................9 5.3 TypicalMOSFETCharacteristics..............................4 7.3 Q3ARecommendedStencilPattern.........................9 6 DeviceandDocumentationSupport.................... 7 7.4 Q3ATapeandReelInformation.............................10 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionA(June2014)toRevisionB Page • EnhancedDescriptiontext..................................................................................................................................................... 1 • AddedCommunityResourcessection................................................................................................................................... 7 • Updatedpackagedrawing...................................................................................................................................................... 8 • UpdatedPCBdrawing............................................................................................................................................................ 9 • UpdatedStencilPatterndrawing............................................................................................................................................ 9 ChangesfromOriginal(September2012)toRevisionA Page • Changed"Pb-Freeterminalplating"featuretostate"PbFree" ............................................................................................ 1 • Updatedpackagedimensions................................................................................................................................................ 8 2 SubmitDocumentationFeedback Copyright©2012–2016,TexasInstrumentsIncorporated ProductFolderLinks:CSD17552Q3A

CSD17552Q3A www.ti.com SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 5 Specifications 5.1 Electrical Characteristics (T =25°Cunlessotherwisestated) A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT STATICCHARACTERISTICS BV Drain-to-sourcevoltage V =0V,I =250μA 30 V DSS GS D I Drain-to-sourceleakagecurrent V =0V,V =24V 1 μA DSS GS DS I Gate-to-sourceleakagecurrent V =0V,V =20V 100 nA GSS DS GS V Gate-to-sourcethresholdvoltage V =V ,I =250μA 1.1 1.5 1.9 V GS(th) DS GS D V =4.5V,I =11A 6.5 8.1 mΩ GS D R Drain-to-sourceonresistance DS(on) V =10V,I =11A 5.5 6.0 mΩ GS D g Transconductance V =15V,I =11A 106 S fs DS D DYNAMICCHARACTERISTICS C Inputcapacitance 1580 2050 pF iss C Outputcapacitance V =0V,V =15V,ƒ=1MHz 385 500 pF oss GS DS C Reversetransfercapacitance 28 36 pF rss R Seriesgateresistance .9 1.8 Ω G Q Gatechargetotal(4.5V) 9 12 nC g Q Gatechargegatetodrain 2.3 nC gd V =15V,I =11A DS D Q Gatechargegatetosource 3.6 nC gs Q GatechargeatV 1.8 nC g(th) th Q Outputcharge V =15V,V =0V 11 nC oss DS GS t Turnondelaytime 7.2 ns d(on) tr Risetime VDS=15V,VGS=4.5V, 7.4 ns td(off) Turnoffdelaytime IDS=11A,RG=2Ω 11.0 ns t Falltime 3.4 ns f DIODECHARACTERISTICS V Diodeforwardvoltage I =11A,V =0V 0.8 1 V SD SD GS Qrr Reverserecoverycharge VDS=13.5V,IF=11A, 17 nC t Reverserecoverytime di/dt=300A/μs 15 ns rr 5.2 Thermal Information (T =25°Cunlessotherwisestated) A THERMALMETRIC MIN TYP MAX UNIT R Junction-to-casethermalresistance(1) 2.3 °C/W θJC R Junction-to-ambientthermalresistance(1)(2) 60 °C/W θJA (1) R isdeterminedwiththedevicemountedona1inch2(6.45cm2),2oz.(0.071mmthick)Cupadona1.5inches×1.5inches θJC (3.81cm×3.81cm),0.06inch(1.52mm)thickFR4PCB.R isspecifiedbydesign,whereasR isdeterminedbytheuser’sboard θJC θJA design. (2) DevicemountedonFR4materialwith1inch2(6.45cm2),2oz.(0.071mmthick)Cu. Copyright©2012–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:CSD17552Q3A

CSD17552Q3A SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 www.ti.com GATE Source GATE Source MaxR =60°C/W MaxR =146°C/W θJA θJA whenmountedon whenmountedona 1inch2(6.45cm2)of minimumpadareaof2 2oz.(0.071mmthick) oz.(0.071mmthick) Cu. Cu. DRAIN DRAIN M0161-01 M0161-02 5.3 Typical MOSFET Characteristics (T =25°Cunlessotherwisestated) A Figure1. TransientThermalImpedance 4 SubmitDocumentationFeedback Copyright©2012–2016,TexasInstrumentsIncorporated ProductFolderLinks:CSD17552Q3A

CSD17552Q3A www.ti.com SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 Typical MOSFET Characteristics (continued) (T =25°Cunlessotherwisestated) A 100 60 VDS = 5V A) A) nt ( 80 nt ( e e Curr Curr 40 e 60 e c c ur ur o o S S o- 40 o- n-t n-t 20 ai ai Dr Dr - DS 20 VVGGSS ==160.5VV - DS TTCC == 12255°C°C I VGS =4.5V I TC = −55°C 0 0 0 0.5 1 1.5 0 1 2 3 4 5 VDS - Drain-to-Source Voltage (V) G001 VGS - Gate-to-Source Voltage (V) G001 Figure2.SaturationCharacteristics Figure3.TransferCharacteristics 10 10000 ID = 11A Ciss = Cgd + Cgs e-to-Source Voltage (V) 468 VDS =15V Capacitance (pF) 1100000 CCorssss == CCdgsd + Cgd at − G C - S 2 G V 0 10 0 5 10 15 20 0 10 20 30 Qg - Gate Charge (nC) G001 VDS - Drain-to-Source Voltage (V) G001 Figure4.GateCharge Figure5.Capacitance 2.5 18 V) ID = 250uA Wm) 16 TTCC == 2152°5CºC IIdd == 1111AA e ( 2 e ( 14 hold Voltag 1.5 e Resistanc 1102 es at 8 hr 1 St V - T()GSth 0.5 - On-()DSon 246 R 0 0 −75 −25 25 75 125 175 0 2 4 6 8 10 12 TC - Case Temperature (ºC) G001 VGS - Gate-to- Source Voltage (V) G001 Figure6.ThresholdVoltagevsTemperature Figure7.On-StateResistancevsGate-to-SourceVoltage Copyright©2012–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:CSD17552Q3A

CSD17552Q3A SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 www.ti.com Typical MOSFET Characteristics (continued) (T =25°Cunlessotherwisestated) A 2.4 100 VGS = 4.5V ID =11A TC = 25°C stance 2.1 VGS = 10V ent (A) 10 TC = 125°C Resi 1.8 Curr 1 State 1.5 Drain 0.1 alized On- 01..92 Source-to- 0.01 orm 0.6 − D 0.001 N S I 0.3 0.0001 −75 −25 25 75 125 175 0 0.2 0.4 0.6 0.8 1 TC - Case Temperature (ºC) G001 VSD − Source-to-Drain Voltage (V) G001 Figure8.NormalizedOn-StateResistancevsTemperature Figure9.TypicalDiodeForwardVoltage 5000 80 1ms 100ms DC TC = 25ºC nt (A)1000 10ms 1s nt (A) TC = 125ºC e e urr 100 urr C C e e c h ur 10 nc 10 o a ain-to-S 1 ak Aval Dr Pe - DS 0.1 Single Pulse - AV I Typical RthetaJA =146ºC/W(min Cu) I 0.01 1 0.01 0.1 1 10 50 0.01 0.1 1 VDS - Drain-to-Source Voltage (V) G001 TAV - Time in Avalanche (mS) G001 Figure10.MaximumSafeOperatingArea Figure11.SinglePulseUnclampedInductiveSwitching 140.0 Silicon limited nt (A)120.0 Package limited e urr100.0 C e c 80.0 ur o S o- 60.0 n- t ai 40.0 Dr - S20.0 D I 0.0 −50 −25 0 25 50 75 100 125 150 175 TC - Case Temperature (ºC) G001 Figure12. MaximumDrainCurrentvsTemperature 6 SubmitDocumentationFeedback Copyright©2012–2016,TexasInstrumentsIncorporated ProductFolderLinks:CSD17552Q3A

CSD17552Q3A www.ti.com SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 6 Device and Documentation Support 6.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 6.2 Trademarks NexFET,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 6.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 6.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. Copyright©2012–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:CSD17552Q3A

CSD17552Q3A SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 7.1 Q3A Package Dimensions B 3.1 A 2.9 PIN 1 INDEX AREA 3.25 3.05 2X 0.15 MAX 2X (0.2) 3.5 TYP 3.1 C 0.9 MAX SEATING PLANE 0.05 (0.2) 0.00 1.74–0.1 0.52 4X 0.32 0.565–0.1 (0.15) TYP EXPOSED THERMAL PAD NOTE 3 4 5 9 2X 1.95 2.45–0.1 0.65 TYP 8 1 4X 00..5255 8X 00..3255 0.1 C B A 4X 1.45 2X 0.05 C NOTE 4 4222499/A 12/2015 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning andtolerancingperASMEY14.5M. 2. Thisdrawingissubjecttochangewithoutnotice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. 4. Metalizedfeaturesaresupplieroptionsandmaynotbeonthepackage. 5. Alldimensionsdonotincludemoldflashorprotrusions. 8 SubmitDocumentationFeedback Copyright©2012–2016,TexasInstrumentsIncorporated ProductFolderLinks:CSD17552Q3A

CSD17552Q3A www.ti.com SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 7.2 Q3A Recommended PCB Pattern (1.775) 0.05 MIN PKG (0.635) ALL SIDES TYP (0.56) 4X (0.6) 4X (0.3) 1 4X (0.3) 8 (R0.05) (0.975) TYP TYP 9 SYMM (2.45) 3X (0.65) 3X (0.65) 4 5 (R0.05) TYP SOLDER MASK OPENING (0.207) (0.245) ( 0.2) VIA TYP METAL UNDER (0.905) SOLDER MASK (1.55) TYP LAND PATTERN EXAMPLE 1. Thispackageisdesignedtobesolderedtoathermalpadontheboard.Formoreinformation,see QFN/SON PCBAttachment applicationreport,SLUA271. 2. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommendedvialocationsareshown. For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCBLayoutTechniques. 7.3 Q3A Recommended Stencil Pattern (0.905) PKG 8X (0.6) (0.208) SOLDER MASK EDGE 1 8X (0.3) 8 (0.663) SYMM 9 (1.325) 6X (0.65) 4X 1.125 5 4 (R0.05) TYP 4X 0.705 METAL TYP (3.1) 1. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 mayhavealternatedesignrecommendations. Copyright©2012–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:CSD17552Q3A

CSD17552Q3A SLPS387B–SEPTEMBER2012–REVISEDJANUARY2016 www.ti.com 7.4 Q3A Tape and Reel Information 0 1 0. ± 5 4.00 ±0.10 (See Note 1) 2.00 ±0.05 7 1. 8.00 ±0.10 Ø 1.50 +0.10 –0.00 00 31 0.0. +– 0 0 2. 1 5 0 50 ±0. 3.60 5. 0 3 3.60 1. M0144-01 Notes: 1.10-sprockethole-pitchcumulativetolerance±0.2 2.Cambernottoexceed1mmin100mm,non-cumulativeover250mm 3.Material:blackstatic-dissipativepolystyrene 4.Alldimensionsareinmm,unlessotherwisespecified. 5.Thickness:0.30±0.05mm 6.MSL1260°C(IRandconvection)PbF-reflowcompatible 10 SubmitDocumentationFeedback Copyright©2012–2016,TexasInstrumentsIncorporated ProductFolderLinks:CSD17552Q3A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) CSD17552Q3A ACTIVE VSONP DNH 8 2500 Green (RoHS SN Level-1-260C-UNLIM -55 to 150 17552 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

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