Product Sample & Technical Tools & Support & Folder Buy Documents Software Community CSD17313Q2Q1 SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 CSD17313Q2Q1 30-V N-Channel NexFET™ Power MOSFET 1 Features ProductSummary • QualifiedforAutomotiveApplications 1• Optimizedfor5-VGateDrive TA=25°C TYPICALVALUE UNIT VDS Drain-to-SourceVoltage 30 V • Ultra-LowQ andQ g gd Qg GateChargeTotal(4.5V) 2.1 nC • LowThermalResistance Qgd GateChargeGate-to-Drain 0.4 nC • Pb-Free VGS=3V 31 mΩ Drain-to-SourceOn • RoHSCompliant RDS(on) Resistance VGS=4.5V 26 mΩ • Halogen-Free VGS=8V 24 mΩ • SON2-mm×2-mmPlasticPackage VGS(th) ThresholdVoltage 1.3 V OrderingInformation(1) 2 Applications PARTNUMBER QTY MEDIA PACKAGE SHIP • DC-DCConverters • BatteryandLoadManagementApplications CSD17313Q2Q1 3000 13R-eIneclh SON2-mm×2-mm Taanpde PlasticPackage CSD17313Q2Q1T 250 7-InchReel Reel 3 Description (1) For all available packages, see the orderable addendum at theendofthedatasheet. This 30-V, 24-mΩ, 2-mm x 2-mm SON NexFET™ power MOSFET is designed to minimize losses in AbsoluteMaximumRatings power conversion applications and is optimized for 5- V gate drive applications. The 2-mm × 2-mm SON TA=25°C VALUE UNIT offers excellent thermal performance for the size of VDS Drain-to-SourceVoltage 30 V thepackage. VGS Gate-to-SourceVoltage +10/–8 V ContinuousDrainCurrent(package 5 TopView limited) ID ContinuousDrainCurrent(silicon 19 A limited),TC=25°C D 1 6 D ContinuousDrainCurrent(1) 7.3 D IDM PulsedDrainCurrent,TA=25°C(2) 57 A PowerDissipation(1) 2.4 D 2 5 D PD W PowerDissipation,TC=25°C 17 TJ, OperatingJunctionand –55to150 °C TSTG StorageTemperatureRange G 3 S 4 S AvalancheEnergy,SinglePulse, EAS ID=19A,L=0.1mH,RG=25Ω 18 mJ P0108-01 (1) Typical R = 53°C/W on a 1-inch2, 2-oz. Cu pad on a θJA 0.06-inchthickFR4PCB. Addedtextforspacing (2) MaxR =7.4°C/W,pulseduration≤100μs,dutycycle≤1%. θJC OnStateResistancevsGatetoSourceVoltage GateCharge 80 8 TC = 25°C, ID = 4 A ID = 4 A :e Resistance (m) 45670000 TC = 125°C, ID = 4 A ource Voltage (V) 4567 VDS = 15 V n-Stat 30 e-to-S 3 O at - S(on) 20 - GGS 2 RD 10 V 1 0 0 0 1 2 3 4 5 6 7 8 9 10 0 0.5 1 1.5 2 2.5 3 3.5 4 VGS - Gate-to-Source Voltage (V) D007 Qg - Gate Charge (nC) D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

CSD17313Q2Q1 SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 6.1 CommunityResources..............................................7 2 Applications........................................................... 1 6.2 Trademarks...............................................................7 3 Description............................................................. 1 6.3 ElectrostaticDischargeCaution................................7 6.4 Glossary....................................................................7 4 RevisionHistory..................................................... 2 7 Mechanical,Packaging,andOrderable 5 Specifications......................................................... 3 Information............................................................. 8 5.1 ElectricalCharacteristics...........................................3 7.1 Q2PackageDimensions..........................................8 5.2 ThermalInformation..................................................3 7.2 RecommendedPCBPattern.....................................9 5.3 TypicalMOSFETCharacteristics..............................4 7.3 RecommendedStencilPattern.................................9 6 DeviceandDocumentationSupport.................... 7 7.4 Q2TapeandReelInformation................................10 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionC(March2013)toRevisionD Page • Enhanceddescription ............................................................................................................................................................ 1 • Added7-inchreeltoOrderingInformationtable ................................................................................................................... 1 • UpdatedContinuousDrainCurrent ....................................................................................................................................... 1 • Updatedpulsedcurrentconditions ........................................................................................................................................ 1 • UpdatedFigure1toshowR curves .................................................................................................................................. 4 θJC • AddedV =4.5VlineinFigure8 ........................................................................................................................................ 6 GS • UpdatedtheSOAinFigure10 .............................................................................................................................................. 6 • AddedDeviceandDocumentationsection. .......................................................................................................................... 9 ChangesfromRevisionB(January2013)toRevisionC Page • ChangedFigure10,MaximumSafeOperatingArea............................................................................................................. 6 ChangesfromRevisionA(November2012)toRevisionB Page • ChangedtheRecommendedPCBPattern............................................................................................................................. 9 • AddedtheRecommendedStencilPattern............................................................................................................................. 9 ChangesfromOriginal(October2012)toRevisionA Page • ChangedthedevicenumberFrom:CSD17313Q2-Q1To:CSD17313Q2Q1........................................................................ 1 2 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated

CSD17313Q2Q1 www.ti.com SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 5 Specifications 5.1 Electrical Characteristics T =25°C(unlessotherwisenoted) A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT STATICCHARACTERISTICS BV Drain-to-sourcevoltage V =0V,I =250μA 30 V DSS GS D I Drain-to-sourceleakage V =0V,V =24V 1 μA DSS GS DS I Gate-to-sourceleakage V =0V,V =+10/-8V 100 nA GSS DS GS V Gate-to-sourcethresholdvoltage V =V ,I =250μA 0.9 1.3 1.8 V GS(th) DS GS D V =3V,I =4A 31 42 mΩ GS D R Drain-to-sourceonresistance V =4.5V,I =4A 26 32 mΩ DS(on) GS D V =8V,I =4A 24 30 mΩ GS D g Transconductance V =15V,I =4A 16 S fs DS D DYNAMICCHARACTERISTICS C Inputcapacitance 260 340 pF iss V =0V,V =15V, C Outputcapacitance GS DS 140 180 pF oss ƒ=1MHz C Reversetransfercapacitance 13 17 pF rss R Seriesgateresistance 1.3 2.6 Ω G Q Gatechargetotal(4.5V) 2.1 2.7 nC g Qgd Gatecharge–gate-to-drain VDS=15V, 0.4 nC Qgs Gatecharge–gate-to-source ID=4A 0.7 nC Q GatechargeatVth 0.3 nC g(th) Q Outputcharge V =13.5V,V =0V 3.8 nC oss DS GS t Turnondelaytime 2.8 ns d(on) tr Risetime VDS=15V,VGS=4.5V, 3.9 ns td(off) Turnoffdelaytime ID=4A,RG=2Ω 4.2 ns t Falltime 1.3 ns f DIODECHARACTERISTICS V Diodeforwardvoltage I =4A,V =0V 0.85 1 V SD SD GS Qrr Reverserecoverycharge VDD=13.5V,IF=4A, 6.4 nC t Reverserecoverytime di/dt=300A/μs 12.9 ns rr 5.2 Thermal Information T =25°C(unlessotherwisenoted) A THERMALMETRIC MIN TYP MAX UNIT R Thermalresistancejunction-to-case(1) 7.4 °C/W θJC R Thermalresistancejunction-to-ambient(1)(2) 67 °C/W θJA (1) R isdeterminedwiththedevicemountedona1-inch2(6.45-cm2),2-oz.(0.071=mmthick)Cupadona1.5-inch×1.5-inch(3.81-cm× θJC 3.81-cm),0.06-inch(1.52-mm)thickFR4PCB.R isspecifiedbydesign,whereasR isdeterminedbytheuser’sboarddesign. θJC θJA (2) DevicemountedonFR4materialwith1-inch2(6.45-cm2),2-oz.(0.071-mmthick)Cu. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3

CSD17313Q2Q1 SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 www.ti.com MaxR =67°C/W MaxR =228°C/W θJA θJA whenmountedon whenmountedona 1inch2(6.45cm2)of2 minimumpadareaof2 oz.(0.071mmthick) oz.(0.071mmthick) Cu. Cu. G1 D1 S1 G1 S1 D1 M0179-01 M0180-01 5.3 Typical MOSFET Characteristics T =25°C(unlessotherwisenoted) A Figure1. TransientThermalImpedance 4 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated

CSD17313Q2Q1 www.ti.com SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 Typical MOSFET Characteristics (continued) T =25°C(unlessotherwisenoted) A 10 10 nt (A) 89 nt (A) 89 TTTCCC === 12-52555°C°C°C e e urr 7 urr 7 C C e 6 e 6 c c our 5 our 5 S S o- 4 o- 4 n-t n-t ai 3 ai 3 Dr Dr - DS 2 VGS = 3.0 V - DS 2 I 1 VGS = 4.5 V I 1 VGS = 8.0 V 0 0 0 0.1 0.2 0.3 0.4 0.5 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 VDS - Drain-to-Source Voltage (V) D002 VGS - Gate-to-Source Voltage (V) D003 Figure2.SaturationCharacteristics Figure3.TransferCharacteristics 8 2000 Ciss = Cgd + Cgs e (V) 7 1000 CCorssss == CCgdds + Cgd g 6 e Volta 5 ce (pF) c n - Gate-to-SourS 234 C - Capacita 100 G V 1 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 0 5 10 15 20 25 30 Qg - Gate Charge (nC) D004 VDS - Drain-to-Source Voltage (V) D005 I =4A V =15V D DS Figure4.GateCharge Figure5.Capacitance 1.6 80 TC = 25°C, ID = 4 A 1.5 :) 70 TC = 125°C, ID = 4 A Voltage (V) 11..34 sistance (m 5600 hold 1.2 e Re 40 Thres 1.1 n-Stat 30 V - GS(th) 1 - OS(on) 20 0.9 RD 10 0.8 0 -75 -50 -25 0 25 50 75 100 125 150 175 0 1 2 3 4 5 6 7 8 9 10 TC - Case Temperature (°C) D006 VGS - Gate-to-Source Voltage (V) D007 I =250µA I =4A D D Figure6.ThresholdVoltagevsTemperature Figure7.On-StateResistancevsGate-to-SourceVoltage Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5

CSD17313Q2Q1 SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 www.ti.com Typical MOSFET Characteristics (continued) T =25°C(unlessotherwisenoted) A 1.8 10 VGS = 4.5 V TC = 25°C stance 1.6 VGS = 8 V ent (A) 1 TC = 125°C esi 1.4 urr R C e n 0.1 at ai St 1.2 Dr n- o- alized O 1 Source-t 0.01 orm 0.8 - D 0.001 N IS 0.6 0.0001 -75 -50 -25 0 25 50 75 100 125 150 175 0 0.2 0.4 0.6 0.8 1 TC - Case Temperature (°C) D008 VSD - Source-to-Drain Voltage (V) D009 I =4A D Figure8.NormalizedOn-StateResistancevsTemperature Figure9.TypicalDiodeForwardVoltage 1000 100 TC = 25qC A) A) TC = 125qC nt ( 100 nt ( e e urr urr C C e e c h o-Sour 10 valanc 10 ain-t ak A Dr 1 Pe I - DS D10C ms 11000 µ µss I - AV 1 ms 0.1 1 0.1 1 10 100 0.01 0.1 1 VDS - Drain-to-Source Voltage (V) D010 TAV - Time in Avalanche (ms) D011 SinglePulse,MaxR =7.4°C/W θJC Figure10.MaximumSafeOperatingArea Figure11.SinglePulseUnclampedInductiveSwitching 6 A) 5 nt ( e urr 4 C e c our 3 S o- n-t 2 ai Dr - S 1 D I 0 -50 -25 0 25 50 75 100 125 150 175 TC - Case Temperature (°C) D012 Figure12. MaximumDrainCurrentvsTemperature 6 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated

CSD17313Q2Q1 www.ti.com SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 6 Device and Documentation Support 6.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 6.2 Trademarks NexFET,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 6.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 6.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7

CSD17313Q2Q1 SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 www.ti.com 7 Mechanical, Packaging, and Orderable Information 7.1 Q2 Package Dimensions D2 D K2 K1 K3 K 6 5 4 4 5 6 2 3 E E 7 E 8 1 E 4 K 1 2 3 3 2 1 Pin 1 Dot b e Pin 1 ID Top View L D1 Bottom View C Pinout A1 A Source 4, 7 Gate 3 Drain 1, 2, 5, 6, 8 Front View M0175-02 MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A 0.700 0.750 0.800 0.028 0.030 0.032 A1 0.000 0.050 0.000 0.002 b 0.250 0.300 0.350 0.010 0.012 0.014 C 0.203TYP 0.008TYP D 2.000TYP 0.080TYP D1 0.900 0.950 1.000 0.036 0.038 0.040 D2 0.300TYP 0.012TYP E 2.000TYP 0.080TYP E1 0.900 1.000 1.100 0.036 0.040 0.044 E2 0.280TYP 0.0112TYP E3 0.470TYP 0.0188TYP e 0.650BSC 0.026TYP K 0.280TYP 0.0112TYP K1 0.350TYP 0.014TYP K2 0.200TYP 0.008TYP K3 0.200TYP 0.008TYP K4 0.470TYP 0.0188TYP L 0.200 0.25 0.300 0.008 0.010 0.012 8 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated

CSD17313Q2Q1 www.ti.com SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 7.2 Recommended PCB Pattern For recommended circuit layout for PCB designs, see application note Reducing Ringing through PCB Layout Techniques,(SLPA005). 7.3 Recommended Stencil Pattern Note: Alldimensionsareinmm,unlessotherwisespecified. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9

CSD17313Q2Q1 SLPS427D–OCTOBER2012–REVISEDSEPTEMBER2015 www.ti.com 7.4 Q2 Tape and Reel Information 4.00 ±0.10 2.00 ±0.05 Ø 1.50 ±0.10 0.300.10 0.10 10° Max +– ± 0 5 0 7 8. 1. 5 0 0. ± 5 50 0.0 3. 0 ± 4.00 ±0.10 Ø 1.00 ±0.25 3 2. 1.00 ±0.05 0.254 ±0.02 10° Max 2.30 ±0.05 M0168-01 Notes: 1.Measuredfromcenterlineofsprocketholetocenterlineofpocket 2.Cumulativetoleranceof10sprocketholesis±0.20 3.Othermaterialavailable 4.TypicalSRofformtapeMax108OHM/SQ 5.Alldimensionsareinmm,unlessotherwisespecified. 10 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated

PACKAGE OPTION ADDENDUM www.ti.com 21-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) CSD17313Q2Q1 NRND WSON DQK 6 3000 Green (RoHS SN Level-1-260C-UNLIM -55 to 150 733Q & no Sb/Br) CSD17313Q2Q1T NRND WSON DQK 6 250 Green (RoHS SN Level-1-260C-UNLIM 0 to 0 733Q & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 21-Feb-2020 Addendum-Page 2

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