a 23 ns and 65 ns Low Voltage Comparators CMP401/CMP402 FEATURES FUNCTIONAL BLOCK DIAGRAM 23 ns or 65 ns Propagation Delay Single-Supply Operation VANALOG+ = VDIGITAL = Compatible with 3V and 5V Logic 0V OR 5V 3V OR 5V Separate Input and Output Sections Low Power IN+ Wide Input Range: –5V to +3.9 V OUTPUT IN– APPLICATIONS Battery-Operated Instrumentation VANALOG– = Line Receivers +0V OR –5V Level Translators NOTE: (VANALOG+) – (VANALOG–) 3V Read Channel Detection GENERAL DESCRIPTION 2v The CMP401 and CMP402 are 23 ns and 65 ns quad comp- 50mV arators with separate input and output supplies. Separate supplies 100 enable the input stage to be operated from +3 V to as high as ±6V. 90 The output can be supplied with either 3V or 5V as determined by the interface logic or available supplies. Independent input and output supplies combined with fast propagation make the CMP401 and CMP402 excellent choices for interfacing to portable instrumentation. 10 The CMP401 and CMP402 are specified over the extended indus- 0% trial (–40°C to +125°C) temperature range. Both are available in 10nS narrow 16-lead SOIC surface-mount packages and 16-lead TSSOP. CMP401: 20 MHz Noninverting Switching, V = ±100 mV IN REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Fax: 781/326-8703 © Analog Devices, Inc., 2002

CMP401/CMP402–SPECIFICATIONS ELECTRICAL SPECIFICATIONS (@ V+ = V+ = 5.0V, V = 0.1V, –40(cid:1)C ≤ T ≤ +125(cid:1)C, unless otherwise noted.) ANA DIG CM A Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage1 V T = 25°C 3 mV OS A V 4 mV OS Hysteresis 2 mV Input Bias Current I T = 25°C 3 µA B A I 4 µA B Input Offset Current I ±3 µA OS Input Common-Mode Voltage Range V 0 4.0 V CM Common-Mode Rejection CMRR 0.1 V ≤ V ≤ 3.9 V 60 dB CM Large-Signal Voltage Gain A R = 10 kΩ 10 V/mV VO L Offset Voltage Drift ∆V /∆T 1 µV/°C OS OUTPUT CHARACTERISTICS Output High Voltage V I = –3.2 mA 4.6 V OH OH Output Low Voltage V I = 3.2 mA 0.2 V OL OL POWER SUPPLY Power Supply Rejection Ratio PSRR V+ and V+ 2.7 V to 6 V 60 dB ANA DIG Analog Supply Current – CMP401 I T = 25°C 6.5 mA ANA A Digital Supply Current – CMP401 I V = 0 V, R = ∞, T = 25°C 2.0 mA DIG O L A Analog Supply Current – CMP401 I 8.0 mA ANA Digital Supply Current – CMP401 I V = 0 V, R = ∞ 2.25 mA DIG O L Analog Supply Current – CMP402 I T = 25°C 1.4 mA ANA A Digital Supply Current – CMP402 I V = 0 V, R = ∞, T = 25°C 2.0 mA DIG O L A Analog Supply Current – CMP402 I 1.75 mA ANA Digital Supply Current – CMP402 I V = 0 V, R = ∞ 2.25 mA DIG O L DYNAMIC PERFORMANCE Propagation Delay – CMP401 t 100 mV Step with 20 mV OD P T = 25°C 17 23 ns A t 100 mV Step with 5 mV OD P T = 25°C 33 ns A t 100 mV Step with 20 mV OD 30 ns P Propagation Delay – CMP402 t 100 mV Step with 20 mV OD P T = 25°C 54 65 ns A t 100 mV Step with 5 mV OD P T = 25°C 60 ns A t 100 mV Step with 20 mV OD 75 ns P ELECTRICAL SPECIFICATIONS (@ V = V = 3.0V, V = 0.1V, T = 25(cid:1)C, unless otherwise noted.) ANA DIG CM A Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage1 V 4.5 mV OS Input Common-Mode Voltage Range V 0 2.0 V CM Input Differential Voltage Range V ±2.0 V DIFF Common-Mode Rejection CMRR 0.1 V ≤ V ≤ 1.9 V 60 dB CM OUTPUT CHARACTERISTICS Output High Voltage V I = –3.2 mA 2.6 V OH OH Output Low Voltage V I = 3.2 mA 0.25 V OL OL POWER SUPPLY Power Supply Rejection Ratio PSRR V+ and V+ 2.7V to 6 V 60 dB ANA DIG Analog Supply Current – CMP401 I 6 mA ANA Digital Supply Current – CMP401 I V = 0 V, R = ∞ 1 mA DIG O L Analog Supply Current – CMP402 I 1.2 mA ANA Digital Supply Current – CMP402 I V = 0 V, R = ∞ 1 mA DIG O L DYNAMIC PERFORMANCE Propagation Delay – CMP401 t 100 mV Step with 20 mV OD 32 ns P Propagation Delay – CMP402 t 100 mV Step with 20 mV OD 70 ns P –2– REV. B

CMP401/CMP402 ELECTRICAL SPECIFICATIONS (@ V± = ±5 V, V = 5.0 V, T = 25(cid:1)C, unless otherwise noted.) ANA DIG A Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage1 V V = 0 V 3 mV OS CM Input Common-Mode Voltage Range V –5.0 +4.0 V CM Input Differential Voltage Range V ±8.0 V DIFF Common-Mode Rejection CMRR –4.9 V ≤ V ≤ 3.9 V 60 dB CM Offset Voltage Drift ∆V /∆T 1 5 µV/°C OS POWER SUPPLY Power Supply Rejection Ratio PSRR V± ±3 V to ±6 V 60 dB ANA Analog Supply Current – CMP401 I 6.5 mA ANA Digital Supply Current – CMP401 I V = 0 V, R = ∞ 2.0 mA DIG O L Analog Supply Current – CMP402 I 2.0 mA ANA Digital Supply Current – CMP402 I V = 0 V, R = ∞ 2.0 mA DIG O L DYNAMIC PERFORMANCE Propagation Delay – CMP401 t 100 mV Step with 20 mV OD 23 ns P Propagation Delay – CMP402 t 100 mV Step with 20 mV OD 65 ns P NOTES 1Offset voltage is defined as (V + V )/2. OS+ OS– Specifications subject to change without notice. REV. B –3–

CMP401/CMP402 ABSOLUTE MAXIMUM RATINGS1 Total Analog Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 16 V Digital Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Analog Positive Supply—Digital Positive Supply . . . . –200 mV Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±9 V Output Short-Circuit Duration to GND . . . . . . . . . Indefinite Storage Temperature Range S, RU Package . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Operating Temperature Range CMP401G, CMP402G . . . . . . . . . . . . . . –40°C to +125°C V+ ANA V+ DIG Junction Temperature Range S, RU Package . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C Package Type (cid:2) 3 (cid:2) Units JA JC 16-Lead SOIC (S) 113 37 °C/W +IN –IN OUT 16-Lead TSSOP (RU) 180 37 °C/W NOTES 1Absolute Maximum Ratings apply to packaged parts, unless otherwise noted. 2The analog input voltage is equal to ±7 V or the analog supply voltage, whichever is less. 3(cid:1)JA is specified for the worst-case conditions, i.e., (cid:1)JA is specified for device soldered V– ANA DIG GND in circuit board for SOIC and TSSOP packages. Figure 1.Simplified Schematic PIN CONFIGURATIONS 16-Lead Narrow-SOIC 16-Lead (S-Suffix) TSSOP (RU-Suffix) OUT B 1 16 OUT C 1 16 OUT A 2 15 OUT D OUT B OUT C OUT A OUT D V+ DIG 3 14 DIG GND V+ DIG CMP401/ DIG GND CMP401/ V+ ANA 402 V– ANA V+ ANA 4 402 13 V– ANA –IN A –IN D –IN A 5 (NToOt Pto V SIcEaWle) 12 –IN D +–IINN AB (NToOt Pto V SIcEaWle) –+IINN CD +IN B +IN C +IN A 6 11 +IN D 8 9 –IN B 7 10 –IN C +IN B 8 9 +IN C CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily WARNING! accumulate on the human body and test equipment and can discharge without detection. Although the CMP401/CMP402 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ESD SENSITIVE DEVICE Revision History Location Page Location Page Data Sheet changed from REV. A to REV. B. Data Sheet changed from REV. 0 to REV. A. Changed SO-16 to 16-Lead SOIC . . . . . . . . . . . . .Throughout Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . .1 Moved Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to ABSOLUTLE MAXIMUM RATINGS. . . . . . . . . .4 Moved Outline Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Edits to PACKAGE TYPE. . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Updated Outline Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . 4 Changes to Ordering Guide . . . . . . . . . .. . . . . . . . . . . . . . . . 8 Deleted DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . 4 Edits to CMP401/CMP402 PIN CONFIRGURATIONS. . 4 –4– REV. B

Typical Performance Characteristics–CMP401/CMP402 40 110 40 +VAN = +VDIG = 5V +VAN = +VDIG = 5V +VAN = +VDIG = 5V PROPAGATION DELAY – ns2113235050055 –+PPDDEELL–ARTAVAYYS A =N 2 5=50 (cid:1)0(cid:3)CV, TCOL =– 51V5pF PROPAGATION DELAY – ns96543870000000 +PD–EPLDAYELAY–TRVAS A =N 25 =50 (cid:1)(cid:3)0CV, TCOL =– 51V5pF PROPAGATION DELAY – ns3322150505 –RVSA N 5+=–0P P(cid:3)0DDVE, E TLCLAOLAY Y=– 51V5pF 0 20 10 0 10 20 30 40 50 0 10 20 30 40 50 –50 –25 0 25 50 75 100 125 OVERDRIVE – mV OVERDRIVE – mV TEMPERATURE – (cid:1)C TPC 1. CMP401 Propagation Delay TPC 2. CMP402 Propagation Delay TPC 3. CMP401 Propagation Delay vs. Overdrive vs. Overdrive vs. Temperature – 5 mV OD 90 30 60 +VAN = +VDIG = 5V 80 –VAN = 0V TO –5V 25 50 +PDELAY ns RS 50(cid:3), CL = 15pF ns ns – – – Y 70 Y 20 Y 40 ELA +PDELAY ELA +PDELAY ELA –PDELAY D D D N 60 N 15 N 30 O O O TI TI –PDELAY TI A A A AG50 –PDELAY AG10 AG20 PROP40 PROP 5 +–RVVSAA NN 5 ==0 (cid:3)0+VV, DTCIOLG =–= 5 1+V55pVF PROP10 +–RVVSAA NN 5 ==0 (cid:3)0+VV, DTCIOLG =–= 5 15V5VpF 30 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE – (cid:1)C TEMPERATURE – (cid:1)C TEMPERATURE – (cid:1)C TPC 4. CMP402 Propagation Delay TPC 5. CMP401 Propagation Delay TPC 6. CMP402 Propagation Delay vs. Temperature – 5 mV OD vs. Temperature – 20mV OD vs. Temperature – 20 mV OD 90 120 80 80 +VAN = +VDIG = +V +VAN = +VDIG = 5V +VAN = +VDIG OPAGATION DELAY – ns432765000000 –TVA A=+N P2 =D5 E(cid:1)0CLVA TYO ––5PVDELAY OPAGATION DELAY – ns186400000 –TVA A=N 2 =5 (cid:1)0CV TO+ –P5DVELAY –PDELAY OPAGATION DELAY – ns 743265000000 –P–TRDVAS+E A P=LN D A25 E=Y50L (cid:1)(cid:3)0ACVY, C TLO = – 155VpF PR10 PR 20 PR 10 0 0 0 10 100 1k 10k 100k 10 100 1k 10k 100k 0 2 3 4 5 6 SOURCE RESISTANCE – (cid:3) SOURCE RESISTANCE – (cid:3) POSITIVE SUPPLY VOLTAGE – V TPC 7. CMP401 Propagation Delay TPC 8. CMP402 Propagation Delay TPC 9. CMP401 Propagation Delay vs. vs. Source Resistance – 20 mV OD vs. Source Resistance – 20 mV OD Supply Voltage – 20 mV OD REV. B –5–

CMP401/CMP402 110 50 90 100 +–VVAANN == 0+VV D TIGO –5V 45 80 PROPAGATION DELAY – ns 765498000000 –PDELAY TRAS + =P 25D50E(cid:1)(cid:3)LCA, YCL = 15pF PROPAGATION DELAY – ns 321321400055505 +PDELAY +–R–VVPSAA D=NNE 5 L==0A (cid:3)0Y+VV, TD TAIGO = =– 2555VV(cid:1)C PROPAGATION DELAY – ns43217560000000 +PDELAY+–R–VVSPAA DNN E5 ==L0 A (cid:3)0+YVV, TD TAIGO = =– 2555VV(cid:1)C 30 0 0 1 2 3 4 5 6 0 100 200 300 400 500 0 100 200 300 400 500 POSITIVE SUPPLY VOLTAGE – V CAPACITIVE LOAD – pF CAPACITIVE LOAD – pF TPC 10. CMP402 Propagation Delay TPC 11. CMP401 Propagation Delay TPC 12. CMP402 Propagation Delay vs. Supply Voltage – 20 mV OD vs. Capacitive Load vs. Capacitive Load 1200 80 1000 V/µs1800000 +–TRVVAS AA =NN 25 ==50 (cid:1)(cid:3)0+CVV, DC TILGO– =S – L15E5VpWF LAY – ns 765000 +–TRVVAS AA =NN 25 ==50 (cid:1)(cid:3)0+CVV, DC TILGO = – 155VpF WING – mV 100 TA = 25(cid:1)C – RAIL WRATE – 600 +SLEW ATION DE 4300 +PDELAY UTPUT S 10 + RAIL SLE 400 OPAG 20 –PDELAY LTA O 1 R E 200 P D 10 0 0 0.1 1 2 3 4 5 6 1 2 3 4 5 6 1 10 100 1000 10000 100000 POSITIVE SUPPLY VOLTAGE – V SUPPLY VOLTAGE – V LOAD CURRENT – µA TPC 13. CMP401/CMP402 Slew Rate TPC 14. CMP401 Propagation Delay TPC 15. CMP401/CMP402 Delta Out- vs. Positive Supply Voltage vs. Supply Voltage put Swing from Power Supplies vs. Load Current 2.5 2.0 2.0 A A E – mV 2.0 ENT – m1.6 5V ENT – m1.6 5V G R R A R R T1.5 U1.2 U1.2 L C C T VO PLY PLY SE 1 UP0.8 UP0.8 F S S OF C C PUT 0.5 AL D0.4 AL D0.4 IN GIT 3V GIT 3V DI DI 0 0.0 0.0 –75 –50 –25 0 25 50 75 100 125 150 –75 –50 –25 0 25 50 75 100 125 150 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE – (cid:1)C TEMPERATURE – (cid:1)C TEMPERATURE – (cid:1)C TPC 16. CMP401/CMP402 Input TPC 17. CMP401 Digital Supply TPC 18. CMP402 Digital Supply Offset Voltage vs. Temperature Current vs. Temperature Current vs. Temperature –6– REV. B

Typical Performance Characteristics–CMP401/CMP402 1.6 1.6 7.0 mA –40(cid:1)C mA –40(cid:1)C mA RRENT – 1.2 +25(cid:1)C RRENT – 1.2 +25(cid:1)C RRENT – 56..00 +55VV UPPLY CU 0.8 +125(cid:1)C UPPLY CU 0.8 +125(cid:1)C UPPLY CU4.0 +3V AL S 0.4 AL S 0.4 OG S T T L3.0 DIGI DIGI ANA 0.0 0.0 2.0 1 2 3 4 5 1 2 3 4 5 –75 –50 –25 0 25 50 75 100 125 150 DIGITAL SUPPLY VOLTAGE – V DIGITAL SUPPLY VOLTAGE – V TEMPERATURE – (cid:1)C TPC 19. CMP401 Digital Supply TPC 20. CMP402 Digital Supply TPC 21. CMP401 Analog Supply Current vs. Digital Supply Voltage Current vs. Digital Supply Voltage Current vs. Temperature 1.4 7.0 1.4 mA 5V mA mA +125(cid:1)C – 1.2 +5V – 6.0 – 1.2 NT +3V NT +125(cid:1)C NT RE RE RE +25(cid:1)C R1.0 R5.0 R1.0 Y CU Y CU +25(cid:1)C Y CU –40(cid:1)C L L L PP0.8 PP4.0 –40(cid:1)C PP0.8 U U U S S S G G G O O O L0.6 L3.0 L0.6 A A A N N N A A A 0.4 2.0 0.4 –75 –50 –25 0 25 50 75 100 125 150 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 TEMPERATURE – (cid:1)C ANALOG SUPPLY VOLTAGE – V ANALOG SUPPLY VOLTAGE – V TPC 22. CMP402 Analog Supply TPC 23. CMP401 Analog Supply TPC 24. CMP402 Analog Supply Current vs. Temperature Current vs. Analog Supply Voltage Current vs. Analog Supply Voltage REV. B –7–

Data Sheet CMP401/CMP402 OUTLINE DIMENSIONS 10.00 (0.3937) 9.80 (0.3858) 4.00 (0.1575) 16 9 6.20 (0.2441) 3.80 (0.1496) 1 8 5.80 (0.2283) 1.27 (0.0500) 0.50 (0.0197) BSC 45° 1.75 (0.0689) 0.25 (0.0098) 0.25 (0.0098) 1.35 (0.0531) 8° 0.10 (0.0039) 0° COPLANARITY SEATING 0.10 0.51 (0.0201) PLANE 0.25 (0.0098) 1.27 (0.0500) 0.31 (0.0122) 0.17 (0.0067) 0.40 (0.0157) COMPLIANTTO JEDEC STANDARDS MS-012-AC C(RINOEFNPETARRREOENNLCLTEIHN EOGSN EDLSIYM)AEANNRDSEI AORRNOESU NANORDEET DAIN-PO MPFRIFLO LMPIIMRLELIATIMTEEER TFSEO; RIRN ECUQHSU EDI VIINMA LEDENENSSTIIOGSN NFS.OR 060606-A Figure 1. 16-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-16) S-Suffix Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 16 9 4.50 6.40 4.40 BSC 4.30 1 8 PIN 1 1.20 MAX 0.15 0.20 0.05 0.09 0.75 0.30 8° 0.60 0.65 0.19 SEATING 0° 0.45 BSC PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 2. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option CMP401GRUZ-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16 CMP401GSZ –40°C to +125°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 CMP401GSZ-REEL –40°C to +125°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 CMP402GRUZ-REEL –40°C to +125°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16 CMP402GSZ –40°C to +125°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 CMP402GSZ-REEL –40°C to +125°C 16-Lead Standard Small Outline Package [SOIC_N] R-16 1 Z = RoHS Compliant Part. ©2002–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00267-0-3/16(B) Rev. B | Page 8 of 8

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: CMP402GS CMP401GRUZ-REEL CMP401GSZ CMP401GS CMP402GSZ CMP401GSZ-REEL CMP402GRUZ- REEL CMP402GSZ-REEL