SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F–APRIL2003–REVISEDAPRIL2007 FEATURES • ControlledBaseline DGG, DGV, OR DL PACKAGE – OneAssembly/TestSite,OneFabrication (TOP VIEW) Site • ExtendedTemperaturePerformanceofupto 1OE 1 48 2OE –40(cid:176) Cto85(cid:176) C,–40(cid:176) Cto125(cid:176) Cand–55(cid:176) Cto 1Y1 2 47 1A1 125(cid:176) C 1Y2 3 46 1A2 • EnhancedDiminishingManufacturingSources GND 4 45 GND 1Y3 5 44 1A3 (DMS)Support 1Y4 6 43 1A4 • EnhancedProduct-ChangeNotification V 7 42 V • QualificationPedigree (1) CC CC 2Y1 8 41 2A1 • MemberoftheTexasInstrumentsWidebus™ 2Y2 9 40 2A2 Family GND 10 39 GND • State-of-the-ArtAdvancedBiCMOS 2Y3 11 38 2A3 Technology(ABT)Designfor3.3-VOperation 2Y4 12 37 2A4 andLowStatic-PowerDissipation 3Y1 13 36 3A1 • SupportsMixed-ModeSignalOperation(5-V 3Y2 14 35 3A2 InputandOutputVoltagesWith3.3-VV ) GND 15 34 GND CC • SupportsUnregulatedBatteryOperation 3Y3 16 33 3A3 3Y4 17 32 3A4 Downto2.7V V 18 31 V • TypicalV (OutputGroundBounce)<0.8V CC CC OLP 4Y1 19 30 4A1 atV =3.3V,T =25(cid:176) C CC A 4Y2 20 29 4A2 • I andPower-Up3-StateSupportHot off GND 21 28 GND Insertion 4Y3 22 27 4A3 • BusHoldonDataInputsEliminatestheNeed 4Y4 23 26 4A4 forExternalPullup/PulldownResistors 4OE 24 25 3OE • Latch-UpPerformanceExceeds500mAPer JESD17 • ESDProtectionExceedsJESD22 – 2000-VHuman-BodyModel(A114-A) – 200-VMachineModel(A115-A) (1) ComponentqualificationinaccordancewithJEDECand industrystandardstoensurereliableoperationoveran extendedtemperaturerange.Thisincludes,butisnotlimited to,HighlyAcceleratedStressTest(HAST)orbiased85/85, temperaturecycle,autoclaveorunbiasedHAST, electromigration,bondintermetalliclife,andmoldcompound life.Suchqualificationtestingshouldnotbeviewedas justifyinguseofthiscomponentbeyondspecified performanceandenvironmentallimits. DESCRIPTION/ORDERING INFORMATION The SN74LVTH16244A is a 16-bit buffer and line driver designed for low-voltage (3.3 V) V operation, but with CC the capability to provide a TTL interface to a 5-V system environment. This device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides true outputs and symmetrical active-low output-enable(OE)inputs. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistorswiththebus-holdcircuitryisnotrecommended. Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. WidebusisatrademarkofTexasInstruments. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2003–2007,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F–APRIL2003–REVISEDAPRIL2007 When V is between 0 V and 1.5 V, the device is in the high-impedance state during power up or power down. CC However, to ensure the high-impedance state above 1.5 V, OE should be tied to V through a pullup resistor; CC theminimumvalueoftheresistorisdeterminedbythecurrent-sinkingcapabilityofthedriver. This device is fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry off off disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, whichpreventsdriverconflict. abc GQL OR ZQL PACKAGE TERMINALASSIGNMENTS(1) (TOP VIEW) (56-BallGQL/ZQLPackage) 1 2 3 4 5 6 1 2 3 4 5 6 A A 1OE NC NC NC NC 2OE B B 1Y2 1Y1 GND GND 1A1 1A2 C C 1Y4 1Y3 V V 1A3 1A4 D CC CC E D 2Y2 2Y1 GND GND 2A1 2A2 F E 2Y4 2Y3 2A3 2A4 G F 3Y1 3Y2 3A2 3A1 H J G 3Y3 3Y4 GND GND 3A4 3A3 K H 4Y1 4Y2 V V 4A2 4A1 CC CC J 4Y3 4Y4 GND GND 4A4 4A3 K 4OE NC NC NC NC 3OE abc abc (1) NC-Nointernalconnection abc ORDERINGINFORMATION(1) T PACKAGE(2) ORDERABLEPARTNUMBER TOP-SIDEMARKING A SSOP–DL Tapeandreel CLVTH16244AQDLREP LH16244AEP –40(cid:176) Cto125(cid:176) C TSSOP–DGG Tapeandreel CLVTH16244AQDGGREP LH16244AEP TVSOP–DGV Tapeandreel CLVTH16244AIDGVREP LL244AEP –40(cid:176) Cto85(cid:176) C VFBGA–GQL CLVTH162244AIGQLREP Tapeandreel LL244AEP VFBGA–ZQL(Pb-free) CLVTH16244AIZQLREP –55(cid:176) Cto125(cid:176) C TSSOP–DGG Tapeandreel CLVTH16244AMDGGREP H16244AMEP (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailableat www.ti.com/sc/package. 2 SubmitDocumentationFeedback

SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F–APRIL2003–REVISEDAPRIL2007 FUNCTIONTABLE (each4-bitbuffer) INPUTS OUTPUT OE A Y L H H L L L H X Z LOGICDIAGRAM(POSITIVELOGIC) 1 25 1OE 3OE 47 2 36 13 1A1 1Y1 3A1 3Y1 46 3 35 14 1A2 1Y2 3A2 3Y2 44 5 33 16 1A3 1Y3 3A3 3Y3 43 6 32 17 1A4 1Y4 3A4 3Y4 48 24 2OE 4OE 41 8 30 19 2A1 2Y1 4A1 4Y1 40 9 29 20 2A2 2Y2 4A2 4Y2 38 11 27 22 2A3 2Y3 4A3 4Y3 37 12 26 23 2A4 2Y4 4A4 4Y4 Pin numbers shown are for the DGG, DGV, and DL packages. SubmitDocumentationFeedback 3

SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F–APRIL2003–REVISEDAPRIL2007 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 4.6 V CC V Inputvoltagerange(2) –0.5 7 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 7 V O V Voltagerangeappliedtoanyoutputinthehighstate(2) –0.5 V +0.5 V O CC SN74LVTH16244AQ 96 I Currentintoanyoutputinthelowstate mA O SN74LVTH16244AI 128 SN74LVTH16244AQ 48 I Currentintoanyoutputinthehighstate(3) mA O SN74LVTH16244AI 64 I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O DGGpackage 70 DGVpackage 58 q Packagethermalimpedance(4) (cid:176) C/W JA DLpackage 63 GQL/ZQLpackage 42 T Storagetemperaturerange –65 150 (cid:176) C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputclamp-currentratingsareobserved. (3) ThiscurrentflowsonlywhentheoutputisinthehighstateandV >V . O CC (4) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. Recommended Operating Conditions(1) MIN MAX UNIT V Supplyvoltage 2.7 3.6 V CC V High-levelinputvoltage 2 V IH V Low-levelinputvoltage 0.8 V IL V Inputvoltage 5.5 V I SN74LVTH16244AQ –24 I High-leveloutputcurrent SN74LVTH16244AI –32 mA OH SN74LVTH16244AM –24 SN74LVTH16244AQ 24 I Low-leveloutputcurrent SN74LVTH16244AI 64 mA OL SN74LVTH16244AM 24 D t/D v Inputtransitionriseorfallrate Outputsenabled 10 ns/V D t/D V Power-upramprate 200 m s/V CC SN74LVTH16244AQ –40 125 T Operatingfree-airtemperature SN74LVTH16244AI –40 85 (cid:176) C A SN74LVTH16244AM –55 125 (1) AllunusedcontrolinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.SeetheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 4 SubmitDocumentationFeedback

SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F–APRIL2003–REVISEDAPRIL2007 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V MIN TYP(1) MAX UNIT CC V I =–18mA 2.7V –1.2 V IK I I =–100m A 2.7Vto3.6V V –0.2 OH CC I =–8mA 2.7V 2.4 OH 'LVTH16244AQ 2 I =–24mA 'LVTH16244AI OH V V OH 'LVTH16244AM 2 3V 'LVTH16244AQ I =–32mA 'LVTH16244AI 2 OH 'LVTH16244AM I =100m A 0.2 OL 2.7V I =24mA 0.5 OL I =16mA 0.4 OL 'LVTH16244AQ V I =32mA 'LVTH16244AI 0.5 V OL OL 'LVTH16244AM 3V 'LVTH16244AQ I =64mA 'LVTH16244AI 0.55 OL 'LVTH16244AM 'LVTH16244AQ 50 V =5.5V 'LVTH16244AI 0Vor3.6V 10 I 'LVTH16244AM 50 II Control V =V orGND – 1 m A inputs I CC 3.6V Data VI=VCC 1 inputs V =0V –5 I 'LVTH16244AQ I V orV =0Vto4.5V 'LVTH16244AI 0V – 100 m A off I O 'LVTH16244AM V =0.8V 75 I 3V V =2V –75 I I Data 'LVTH16244AQ m A I(hold) inputs 500 V =0Vto3.6V 'LVTH16244AI 3.6V(2) I –750 'LVTH16244AM I V =3V 3.6V 5 m A OZH O I V =0.5V 3.6V –5 m A OZL O I V =0.5Vto3V,OE=Don'tcare 0Vto1.5V – 100 m A OZPU O I V =0.5Vto3V,OE=Don'tcare 1.5Vto0V – 100 m A OZPD O Outputshigh 0.19 I =0, I O Outputslow 3.6V 5 mA CC V =V orGND I CC Outputsdisabled 0.19 D I (3) OneinputatVCC–0.6V, 3Vto3.6V 0.2 0.2 mA CC OtherinputsatV orGND CC C V =3Vor0V 4 pF i I (1) AlltypicalvaluesareatV =3.3V,T =25(cid:176) C. CC A (2) Thisisthebus-holdmaximumdynamiccurrent.Itistheminimumoverdrivecurrentrequiredtoswitchtheinputfromonestateto another. (3) ThisistheincreaseinsupplycurrentforeachinputthatisatthespecifiedTTLvoltagelevel,ratherthanV orGND. CC SubmitDocumentationFeedback 5

SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F–APRIL2003–REVISEDAPRIL2007 Electrical Characteristics (continued) overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V MIN TYP(1) MAX UNIT CC C V =3Vor0V 9 pF o O Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,C =50pF(unlessotherwisenoted)(seeFigure1) L SN74LVTH16244AQ/M SN74LVTH16244AI FROM TO V =3.3V V =3.3V PARAMETER (INPUT) (OUTPUT) C–C0.3V VCC=2.7V C–C0.3V VCC=2.7V UNIT MIN MAX MIN MAX MIN TYP MAX MIN MAX t 1.1 4.4 4.6 1.2 2.5 3.2 3.7 PLH A Y ns t 1.1 3.6 3.9 1.2 2 3.2 3.7 PHL t 1.1 4.6 5.4 1.2 2.6 4 5 PZH OE Y ns t 1.1 5.4 6.2 1.2 2.7 4 5 PZL t 1.6 5.7 6.2 2.2 3.3 4.5 5 PHZ OE Y ns t 1.2 5 4.7 2 3.1 4.2 4.4 PLZ t 0.5 ns sk(o) 6 SubmitDocumentationFeedback

SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F–APRIL2003–REVISEDAPRIL2007 PARAMETER MEASUREMENT INFORMATION 6 V From Output 500 W S1 Open TEST S1 Under Test GND tPLH/tPHL Open (seCeL N= o5t0e pAF) 500 W ttPPHLZZ//ttPPZZLH G6N VD LOAD CIRCUIT 2.7 V Timing Input 1.5 V 0 V tw tsu th 2.7 V 2.7 V Input 1.5 V 1.5 V Data Input 1.5 V 1.5 V 0 V 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PULSE DURATION SETUP AND HOLD TIMES 2.7 V 2.7 V Input 1.5 V 1.5 V Output 1.5 V 1.5 V Control 0 V 0 V tPLH tPHL Output tPZL tPLZ VOH Waveform 1 3 V Output 1.5 V 1.5 V S1 at 6 V 1.5 V VOL + 0.3 V VOL (see Note B) VOL tPHL tPLH tPZH tPHZ Output VOH Waveform 2 VOH Output 1.5 V 1.5 V S1 at GND 1.5 V VOH − 0.3 V VOL (see Note B) ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W , tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure1.LoadCircuitandVoltageWaveforms SubmitDocumentationFeedback 7

PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 8W244AMDGGREPG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -55 to 125 H16244AMEP & no Sb/Br) CLVTH16244AIDGVREP ACTIVE TVSOP DGV 48 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 LL244AEP & no Sb/Br) CLVTH16244AMDGGREP ACTIVE TSSOP DGG 48 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -55 to 125 H16244AMEP & no Sb/Br) CLVTH16244AQDGGREP ACTIVE TSSOP DGG 48 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 LH16244AEP & no Sb/Br) CLVTH16244AQDLREP ACTIVE SSOP DL 48 1000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 LH16244AEP & no Sb/Br) V62/04601-01XE ACTIVE SSOP DL 48 1000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 LH16244AEP & no Sb/Br) V62/04601-01YE ACTIVE TSSOP DGG 48 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 LH16244AEP & no Sb/Br) V62/04601-02ZE ACTIVE TVSOP DGV 48 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 LL244AEP & no Sb/Br) V62/04601-03YE ACTIVE TSSOP DGG 48 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -55 to 125 H16244AMEP & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVTH16244A-EP : •Catalog: SN74LVTH16244A •Military: SN54LVTH16244A NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) CLVTH16244AIDGVREP TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 CLVTH16244AMDGGREP TSSOP DGG 48 2000 330.0 24.4 8.6 13.0 1.8 12.0 24.0 Q1 CLVTH16244AQDGGREP TSSOP DGG 48 2000 330.0 24.4 8.6 13.0 1.8 12.0 24.0 Q1 CLVTH16244AQDLREP SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) CLVTH16244AIDGVREP TVSOP DGV 48 2000 367.0 367.0 38.0 CLVTH16244AMDGGREP TSSOP DGG 48 2000 367.0 367.0 45.0 CLVTH16244AQDGGREP TSSOP DGG 48 2000 367.0 367.0 45.0 CLVTH16244AQDLREP SSOP DL 48 1000 367.0 367.0 55.0 PackMaterials-Page2

MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,50 0,08 M 0,17 48 25 6,20 8,30 6,00 7,90 0,15 NOM Gage Plane 0,25 1 24 0°–8° A 0,75 0,50 Seating Plane 0,15 1,20 MAX 0,10 0,05 PINS ** 48 56 64 DIM A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 4040078/F 12/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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