Data Sheet C ® CLC1002 omlinear Ultra-Low Noise Amplifier C o FEATURES General Description m l n 0.6 nV/√Hz input voltage noise in The COMLINEAR CLC1002(single) is a high-performance, voltage feed- e n 1mV maximum input offset voltage a back amplifier with ultra-low input voltage noise, 0.6nV/√Hz. The CLC1002 r n 965MHz gain bandwidth product C provides 965MHz gain bandwidth product and 170V/μs slew rate making it n Minimum stable gain of 5 L well suited for high-speed data acquisition systems requiring high levels of C n 170V/μs slew rate 1 sensitivity and signal integrity. This COMLINEAR high-performance amplifier 0 n 130mA output current 0 n -40°C to +125°C operating temperature also offers low input offset voltage. 2 range U The COMLINEAR CLC1002 is designed to operate from 4V to 12V supplies. l n Fully specified at 5V and ±5V supplies tr It consumes only 13mA of supply current per channel and offers a power a n CLC1002: Lead-free SOT23-6 - saving disable pin that disables the amplifier and decreases the supply cur- L o rent to below 225μA. The CLC1002 amplifier operates over the extended w APPLICATIONS temperature range of -40°C to +125°C. N n Transimpedance amplifiers o If larger bandwidth or slew rate is required, a higher minimum stable gain i n Pre-amplifier s version is available, the CLC1001 offers a minimum stable gain of 10 with e n Low noise signal processing A 2.1GHz GBWP and 410V/μs slew rate. n Medical instrumentation m n Probe equipment p Typical Application - Single Supply Photodiode Amplifier li n Test equipment fi e n Ultrasound channel amplifier r R e v 1 G Ordering Information Part Number Package Pb-Free RoHS Compliant Operating Temperature Range Packaging Method CLC1002IST6X SOT23-6 Yes Yes -40°C to +125°C Reel CLC1002ISO8X SOIC-8 Yes Yes -40°C to +125°C Reel CLC1002ISO8 SOIC-8 Yes Yes -40°C to +125°C Rail Moisture sensitivity level for all parts is MSL-1. Exar Corporation www.exar.com 48720 Kato Road, Fremont CA 94538, USA Tel. +1 510 668-7000 - Fax. +1 510 668-7001

Data Sheet CLC1002 Pin Configuration CLC1002 Pin Assignments Pin No. Pin Name Description 1 OUT Output OUT 1 6 +VS 2 -VS Negative supply -VS 2 + - 5 DIS 3 +IN Positive input C 4 -IN Negative input o +IN 3 4 -IN m Disable. Enabled if pin is left floating or pulled l i 5 DIS above VON, disabled if pin is grounded or pulled ne below VOFF. ar 6 +VS Positive supply C L C 1 0 0 2 U SOIC Pin Configuration SOIC Pin Assignments lt r a Pin No. Pin Name Description -L o 1 NC No connect w NC 1 8 DIS 2 -IN1 Negative input N 3 +IN1 Positive input o -IN1 2 7 +VS is 4 -VS Negative supply e +IN1 3 6 OUT 5 NC No connect A m 6 OUT Output -VS 4 5 NC p 7 +VS Positive supply li fi e Disable. Enabled if pin is left floating or pulled r 8 DIS above VON, disabled if pin is grounded or pulled Re v below VOFF. 1 G ©2007-2013 Exar Corporation 2/17 Rev 1G

Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper de- vice function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. C o Parameter Min Max Unit m l i Supply Voltage 0 14 V n e Input Voltage Range -Vs -0.5V +Vs +0.5V V ar C Reliability Information L C 1 Parameter Min Typ Max Unit 0 0 Junction Temperature 150 °C 2 Storage Temperature Range -65 150 °C U l Lead Temperature (Soldering, 10s) 260 °C t r a Package Thermal Resistance - L 6-Lead SOT23 177 °C/W o 8-Lead SOIC 100 °C/W w N Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. oi s e ESD Protection A m Product SOT23-6 p Human Body Model (HBM) 2kV l i fi Charged Device Model (CDM) 2kV e r R Recommended Operating Conditions ev 1 G Parameter Min Typ Max Unit Operating Temperature Range (CLC1002I) -40 +85 °C Operating Temperature Range (CLC1002A) -40 +125 °C Supply Voltage Range 4 12 V ©2007-2013 Exar Corporation 3/17 Rev 1G

Data Sheet Electrical Characteristics at +5V T = 25°C, V = +5V, -V = GND, R = 100Ω, R = 500Ω to V /2, G = 5; unless otherwise noted. A s s f L S Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response GBWP -3dB Gain Bandwidth Product G = +21, V = 0.2V 910 MHz OUT pp C BWSS -3dB Bandwidth G = +5, VOUT = 0.2Vpp 265 MHz o m BW Large Signal Bandwidth G = +5, V = 2V 54 MHz LS OUT pp l i BW 0.1dB Gain Flatness Small Signal G = +5, V = 0.2V 37 MHz n 0.1dBSS OUT pp e BW 0.1dB Gain Flatness Large Signal G = +5, V = 2V 29 MHz a 0.1dBLS OUT pp r Time Domain Response C L t , t Rise and Fall Time V = 1V step; (10% to 90%) 4.2 ns R F OUT C t Settling Time to 0.1% V = 1V step 12 ns 1 S OUT 0 OS Overshoot V = 1V step 3 % 0 OUT 2 SR Slew Rate 4V step 160 V/µs U Distortion/Noise Response l t HD2 2nd Harmonic Distortion 1V , 10MHz -72 dBc r pp a HD3 3rd Harmonic Distortion 1V , 10MHz -74 dBc - pp L THD Total Harmonic Distortion 1V , 10MHz -70 dB o pp w en Input Voltage Noise > 100kHz 0.6 nV/√Hz N i Input Current Noise > 100kHz 4.2 pA/√Hz n o DC Performance is e VIO Input Offset Voltage 0.1 mV A dVIO Average Drift 2.7 µV/°C m Ib Input Bias Current 28 µA p l dI Average Drift 46 nA/°C i b fi I Input Offset Current 0.1 µA e o r PSRR Power Supply Rejection Ratio DC 83 dB R e AOL Open-Loop Gain VOUT = VS / 2 80 dB v 1 G I Supply Current per channel 12.5 mA S Disable Characteristics t Turn On Time 1V step, 1% settling 80 ns ON t Turn Off Time 220 ns OFF OFF Off Isolation 2V , 5MHz 73 dB ISO pp OFFC Off Output Capacitance 5.8 pF OUT V Power Down Voltage Disabled if DIS pin is grounded or pulled below V Disabled if DIS < 1.5 V OFF OFF V Enable Voltage Enabled if DIS pin is floating or pulled above V Enabled if DIS > 3 V ON ON I Disable Supply Current No Load, DIS pin tied to ground 130 µA SD Input Characteristics R Input Resistance Non-inverting 4.2 MΩ IN C Input Capacitance 2 pF IN 0.8 to CMIR Common Mode Input Range V 5.1 CMRR Common Mode Rejection Ratio DC , V =1.5V to 4V 94 dB cm Output Characteristics 0.97 to R = 500Ω V L 4 V Output Voltage Swing OUT 0.96 to R = 2kΩ V L 4.1 I Output Current ±125 mA OUT I Short-Circuit Output Current V = V / 2 ±150 mA SC OUT S Notes: 1. 100% tested at 25°C ©2007-2013 Exar Corporation 4/17 Rev 1G

Data Sheet Electrical Characteristics at ±5V T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response GBWP -3dB Gain Bandwidth Product G = +21, V = 0.2V 965 MHz OUT pp C BWSS -3dB Bandwidth G = +5, VOUT = 0.2Vpp 290 MHz o m BW Large Signal Bandwidth G = +5, V = 2V 61 MHz LS OUT pp l i BW 0.1dB Gain Flatness Small Signal G = +5, V = 0.2V 45 MHz n 0.1dBSS OUT pp e BW 0.1dB Gain Flatness Large Signal G = +5, V = 2V 32 MHz a 0.1dBLS OUT pp r Time Domain Response C L t , t Rise and Fall Time V = 1V step; (10% to 90%) 3.8 ns R F OUT C t Settling Time to 0.1% V = 1V step 12 ns 1 S OUT 0 OS Overshoot V = 1V step 2 % 0 OUT 2 SR Slew Rate 2V step 170 V/µs U Distortion/Noise Response l t HD2 2nd Harmonic Distortion 2V , 10MHz -75 dBc r pp a HD3 3rd Harmonic Distortion 2V , 10MHz -66 dBc - pp L THD Total Harmonic Distortion 2V , 5MHz -65.5 dB o pp w en Input Voltage Noise > 100kHz 0.6 nV/√Hz N i Input Current Noise > 100kHz 4.2 pA/√Hz n o DC Performance is e VIO Input Offset Voltage(1) -1 0.5 1 mV A dVIO Average Drift 4.3 µV/°C m Ib Input Bias Current (1) -60 30 60 µA p l dI Average Drift 44 nA/°C i b fi I Input Offset Current 0.3 6 µA e o r PSRR Power Supply Rejection Ratio (1) DC 78 83 dB R e AOL Open-Loop Gain (1) VOUT = VS / 2 70 83 dB v 1 G I Supply Current (1) per channel 13 16 mA S Disable Characteristics t Turn On Time 1V step, 1% settling 115 ns ON t Turn Off Time 210 ns OFF OFF Off Isolation 2V , 5MHz 73 dB ISO pp OFFC Off Output Capacitance 5.7 pF OUT V Power Down Voltage Disabled if DIS pin is grounded or pulled below V Disabled if DIS < 1.3 V OFF OFF V Enable Voltage Enabled if DIS pin is floating or pulled above V Enabled if DIS > 3 V ON ON I Disable Supply Current (1) No Load, DIS pin tied to ground 180 225 µA SD Input Characteristics R Input Resistance Non-inverting 9.4 MΩ IN C Input Capacitance 1.82 pF IN CMIR Common Mode Input Range -4.3 to 5 V CMRR Common Mode Rejection Ratio (1) DC , V =-3.5V to 4V 75 90 dB cm Output Characteristics R = 500Ω (1) -3.3 ±4 3.6 V L V Output Voltage Swing OUT RL = 2kΩ ±4 V I Output Current ±130 mA OUT I Short-Circuit Output Current V = V / 2 ±165 mA SC OUT S Notes: 1. 100% tested at 25°C ©2007-2013 Exar Corporation 5/17 Rev 1G

Data Sheet Typical Performance Characteristics T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L Non-Inverting Frequency Response Inverting Frequency Response C 3 3 o m l i B) 0 B) 0 n d d e ain ( G = +5 ain ( G = -5 ar G G d d C ze-3 G = +10 ze-3 G = -10 L ali ali C m m or G = +20 or G = -20 1 N N 0 -6 -6 0 2 VOUT= 0.2Vpp VOUT= 0.2Vpp U -9 -9 lt 0.1 1 10 100 1000 0.1 1 10 100 1000 r a Frequency (MHz) Frequency (MHz) - L o Frequency Response vs. C Frequency Response vs. R w L L N 3 3 o i s CL= 470pF e Rs= 4.3Ω A 0 B) B) m alized Gain (d-3 CRCRLsLs==== 24110720ΩpΩ0FpF alized Gain (d 0 Rl = 1RKl = R2lK = 5K plifier m m Nor-6 CRLs== 3202ΩpF Nor-3 Rev 1 G VOUT= 0.2Vpp CRLs== 4130ΩpF VOUT= 0.2Vpp -9 -6 0.1 1 10 100 1000 0.1 1 10 100 1000 Frequency (MHz) Frequency (MHz) Frequency Response vs. V -3dB Bandwidth vs. Output Voltage OUT 1 350 0 300 Gain (dB)--21 VVOOUUTT== 43VVpppp dth (MHz)220500 d -3 wi Normalize-4 VOUT= 2Vpp 3dB Band110500 -5 - -6 50 -7 0 0.1 1 10 100 1000 0.0 1.0 2.0 3.0 4.0 Frequency (MHz) V (V ) OUT PP ©2007-2013 Exar Corporation 6/17 Rev 1G

Data Sheet Typical Performance Characteristics T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L Non-Inverting Frequency Response at V = 5V Inverting Frequency Response at V = 5V S S C 3 3 o m l i B) 0 B) 0 n d d e ain ( G = +5 ain ( G = -5 ar G G alized -3 G = +10 alized -3 G = -10 CLC orm G = +20 orm G = -20 1 N N 0 -6 -6 0 2 VOUT= 0.2Vpp VOUT= 0.2Vpp U -9 -9 lt 0.1 1 10 100 1000 0.1 1 10 100 1000 ra Frequency (MHz) Frequency (MHz) - L o Frequency Response vs. C at V = 5V Frequency Response vs. R at V = 5V w L S L S N 3 3 o i s CL= 470pF e Rs= 4.3Ω A 0 B) B) m alized Gain (d-3 CRCRLsLs==== 24110730ΩpΩ0FpF alized Gain (d 0 Rl = 1RKl = R2lK = 5K plifier m m Nor-6 CRLs== 3232ΩpF Nor-3 Rev 1 G VOUT= 0.2Vpp CRLs== 5100ΩpF VOUT= 0.2Vpp -9 -6 0.1 1 10 100 1000 0.1 1 10 100 1000 Frequency (MHz) Frequency (MHz) Frequency Response vs. V at V = 5V -3dB Bandwidth vs. Output Voltage at V = 5V OUT S S 1 350 0 300 Gain (dB)--21 VVOOUUTT== 21V.5ppVpp dth (MHz)220500 d -3 wi Normalize-4 VOUT= 1Vpp 3dB Band110500 -5 - -6 50 -7 0 0.1 1 10 100 1000 0.0 0.5 1.0 1.5 2.0 Frequency (MHz) V (V ) OUT PP ©2007-2013 Exar Corporation 7/17 Rev 1G

Data Sheet Typical Performance Characteristics - Continued T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L Input Voltage Noise Input Voltage Noise at V = 5V S 2.8 2.8 C 2.6 2.6 o 2.4 2.4 m Hz)2.2 Hz)2.2 li V/√ 2 V/√ 2 ne Noise (n111...468 Noise (n111...468 Car age 1.2 age 1.2 LC olt 1 olt 1 1 V V Input 00..68 Input 00..68 002 0.4 0.4 0.2 0.2 U 0 0 lt r 0.0001 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 a Frequency (MHz) Frequency (MHz) - L o Input Voltage Noise (>10kHz) Input Voltage Noise at V = 5V (>10kHz) w S N 0.9 0.9 o i s 0.85 0.85 e √Hz) 0.8 √Hz) 0.8 Am V/ V/ Noise (n0.07.57 Noise (n0.07.57 plifi e e e oltag0.65 oltag0.65 r R put V 0.6 put V 0.6 ev 1 n n G I I 0.55 0.55 0.5 0.5 0.01 0.1 1 1100 0.01 0.1 1 1100 Frequency (MHz) Frequency (MHz) R vs. Frequency OUT 10 Ω) (UT 1 O R 0.1 0.01 0.001 0.01 0.1 1 10 100 Frequency (MHz) ©2007-2013 Exar Corporation 8/17 Rev 1G

Data Sheet Typical Performance Characteristics - Continued T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L 2nd Harmonic Distortion vs. R 3rd Harmonic Distortion vs. R L L -55 -55 C o m -65 RL= 500Ω -65 RL= 500Ω lin e c) c) a dB -75 dB -75 r n ( n ( C o o Distorti -85 RL= 1kΩ Distorti -85 RL= 1kΩ LC1 0 0 -95 -95 2 VOUT= 1Vpp VVOOUUTT== 11VVpppp U -105 -105 lt r 5 10 15 20 5 10 15 20 a Frequency (MHz) Frequency (MHz) - L o 2nd Harmonic Distortion vs. V 3rd Harmonic Distortion vs. V w OUT OUT N -45 -45 o i -50 -50 s e -55 -55 20MHz A -60 20MHz -60 m c) -65 c) -65 p B B n (d -70 n (d -70 lifi o o Distorti --8705 Distorti --8705 er R e -85 -85 v -90 10MHz -90 10MHz 5MHz 1G 5MHz -95 -95 RL= 500Ω RL= 500Ω -100 -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 Output Amplitude (Vpp) Output Amplitude (Vpp) 2nd Harmonic Distortion vs. Gain 3rd Harmonic Distortion vs. Gain -50 -50 -55 -55 -60 AV+20 -60 AV+20 Bc)-65 Bc)-65 d d n ( n ( o-70 o-70 orti orti Dist-75 Dist-75 AV+5 -80 VOUT= 1Vpp AV+10 AV+5 -80 AV+10 -85 -85 VOUT= 1Vpp RL= 500Ω RL= 500Ω -90 -90 5 10 15 20 5 10 15 20 Frequency (MHz) Frequency (MHz) ©2007-2013 Exar Corporation 9/17 Rev 1G

Data Sheet Typical Performance Characteristics - Continued T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L 2nd Harmonic Distortion vs. R at V = 5V 3rd Harmonic Distortion vs. R at V = 5V L S L S -55 -55 C o m -65 RL= 500Ω -65 RL= 500Ω l i n e c) c) a dB -75 dB -75 r n ( n ( C o o storti -85 RL= 1kΩ storti -85 RL= 1kΩ LC Di Di 1 0 0 -95 -95 2 VVOOUUTT== 11VVpppp VVOOUUTT== 11VVpppp U -105 -105 lt r 5 10 15 20 5 10 15 20 a Frequency (MHz) Frequency (MHz) - L o 2nd Harmonic Distortion vs. V at V = 5V 3rd Harmonic Distortion vs. V at V = 5V w OUT S OUT S N -45 -45 o i -50 -50 s e 20MHz -55 -55 A -60 20MHz -60 m c) -65 c) -65 p B B n (d -70 n (d -70 lifi o o Distorti --8705 Distorti --8705 er R 10MHz e -85 -85 v -90 5MHz -90 10MHz 5MHz 1G -95 -95 RL= 500Ω RL= 500Ω -100 -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 Output Amplitude (Vpp) Output Amplitude (Vpp) 2nd Harmonic Distortion vs. Gain at V = 5V 3rd Harmonic Distortion vs. Gain Freq at V = 5V S S -50 -50 -55 -55 AV+20 AV+20 -60 -60 Bc)-65 AV+10 Bc)-65 d d n ( n ( o-70 o-70 orti orti st-75 st-75 AV+5 Di AV+5 Di -80 -80 AV+10 VOUT= 1Vpp VOUT= 1Vpp -85 -85 RL= 500Ω RL= 500Ω -90 -90 5 10 15 20 5 10 15 20 Frequency (MHz) Frequency (MHz) ©2007-2013 Exar Corporation 10/17 Rev 1G

Data Sheet Typical Performance Characteristics - Continued T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L Small Signal Pulse Response Small Signal Pulse Response at V = 5V S 0.15 2.65 C o 0.1 2.6 m l i n 0.05 2.55 e a V) V) r ge ( 0 ge ( 2.5 C Volta Volta LC -0.05 2.45 1 0 0 -0.1 2.4 2 U -0.15 2.35 lt r 0 50 100 150 200 0 50 100 150 200 a Time (ns) Time (ns) - L o Large Signal Pulse Response Large Signal Pulse Response at V = 5V w S N 3 4 o i s e 2 3.5 A m 1 3 p ge (V) 0 ge (V)2.5 lifi a a e Volt Volt r -1 2 R e v 1 G -2 1.5 -3 1 0 50 100 150 200 0 50 100 150 200 Time (ns) Time (ns) Enable Response Disable Response 5.5 1.5 5.5 1.5 Disable 4.5 Enable 4.5 1 1 e (V) 3.5 Outp e (V) 3.5 Outp Enable Voltag 12..55 Output 0.5 ut Voltage (V) Disable Voltag 12..55 Output 0.5 ut Voltage (V) 0 0 0.5 0.5 -0.5 -0.5 -0.5 -0.5 -50 0 50 100 150 200 -100 0 100 200 300 400 Time (ns) Time (ns) ©2007-2013 Exar Corporation 11/17 Rev 1G

Data Sheet Typical Performance Characteristics - Continued T = 25°C, V = ±5V, R = 100Ω, R = 500Ω , G = 5; unless otherwise noted. A s f L Enable Response at V = 5V Disable Response at V = 5V S S 5.5 1.5 5.5 1.5 C Disable o 4.5 Enable 4.5 m l 1 1 in ge (V) 3.5 Outpu ge (V) 3.5 Outpu ear Enable Volta 12..55 Output 0.5 t Voltage (V) Disable Volta 12..55 Output 0.5 t Voltage (V) CLC10 0 0 0 0.5 0.5 2 U -0.5 -0.5 -0.5 -0.5 lt r -50 0 50 100 150 200 -100 0 100 200 300 400 a Time (ns) Time (ns) - L o Off Isolation Off Isolation at V = 5V w S N -40 -40 o i -45 -45 s e -50 -50 A -55 -55 m dB)-60 dB)-60 p olation (--7605 olation (--7605 lifie Off Is-75 Off Is-75 r Re -80 -80 v 1 -85 -85 G -90 VOUT= 2Vpp -90 VVOOUUTT== 22VVpppp -95 -95 1 10 100 1 10 100 Frequency (MHz) Frequency (MHz) CMRR vs. Frequency PSRR vs. Frequency 100 100 80 80 B) 60 B) 60 R (d R (d R R M S C 40 P 40 20 20 0 0 0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 Frequency (MHz) Frequency (MHz) ©2007-2013 Exar Corporation 12/17 Rev 1G

Data Sheet Application Information input referred noise also increases. Basic Operation 3 2.75 Figures 1 and 2 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual V/rtHz)22.2.55 G = +5 C supply applications. They show the recommended bypass n e ( 2 G = +11 o capacitor values and overall closed loop gain equations. ed Nois1.75 G = +21 mlin +Vs 6.8μF Referr11.2.55 ear ut C np 1 L I C 0.75 1 Input + 0.1μF 0.5 0 0 100 1000 Output 2 Rf (Ohms) - U 0.1μF Rf RL Figure 3: Input Referred Voltage Noise vs. Rf and Rg ltra- L Rg 6.8μF The noise caused by a resistor is modeled with either a ow -Vs G = 1 + (Rf/Rg) voltage source in series with the resistance: N o i s Figure 1. Typical Non-Inverting Gain Circuit 4kTR e A +Vs m 6.8μF Or a current source in parallel with it: p l i fi e 4kT R1 + 0.1μF iR = R r R e Input Rg - Output v 1G RL 0.1μF Rf Op amp noise is modeled with three noise sources, en, in and i. These three sources are analogous to the DC input i 6.8μF voltage and current errors V , I and I . -Vs G = - (Rf/Rg) os bn bi For optimum input offset voltage set R1 = Rf || Rg Figure 2. Typical Inverting Gain Circuit The noise models must be analyzed in-circuit to determine the effect on the op amp output noise. Achieving Low Noise in an Application Since noise is statistical in nature rather than a continuous Making full use of the low noise of the CLC1002 requires signal, the set of noise sources in circuit add in an RMS careful consideration of resistor values. The feedback and (root mean square) fashion rather than in a linear fashion. gain set resistors (R and R ) and the non-inverting source f g For uncorrelated noise sources, this means you add the impedance (R ) all contribute noise to the circuit and source squares of the noise voltages. A typical non-inverting can easily dominate the overall noise if their values are application (see figure 1) results in the following noise at too high. The datasheet is specified with an R of 25Ω, at g the output of the op amp: which point the noise from R and R is about equal to the f g noise from the CLC1002. Lower value resistors could be 2 2 used at the expense of more distortion. R R e2 =e2 1+ f + in2R 2 1+ f + i2R2 op amp noise terms e , i and i o n R s R i f n n i Figure 3 shows total input voltage noise (amp+resistors) g g versus Rf and Rg. As the value of Rf increases, the total op amp noise terms en, in and ii ©2007-2013 Exar Corporation 13/17 Rev 1G

Data Sheet in figure 3 would be calculated as: 2 2 RL || (Rf + Rg) R R + e2 1+ f + e2 f + e2 external resistor noise Ttheermses mfoer aRssu,r eRmg eanntds Rarfe basic and are relatively easy to Rs R Rg R Rf g g perform with standard lab equipment. For design purposes external resistor noise terms for R , R and R however, prior knowledge of actual signal levels and load C S g f o impedance is needed to determine the dissipated power. m l Here, PD can be found from in e High source impedances are sometimes unavoidable, but a P = P + P - P r they increase noise from the source impedance and also D Quiescent Dynamic Load C make the circuit more sensitive to the op amp current Quiescent power can be derived from the specified IS LC noise. Analyze all noise sources in the circuit, not just the values along with known supply voltage, VSupply. Load 1 0 op amp itself, to achieve low noise in your application. power can be calculated as above with the desired signal 0 2 amplitudes using: U l (V ) = V / √2 t LOAD RMS PEAK r a ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff -L Power Dissipation o The dynamic power is focused primarily within the output w Power dissipation should not be a factor when operating stage driving the load. This value can be calculated as: N under the stated 500Ω load condition. However, o applications with low impedance, DC coupled loads PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS is e should be analyzed to ensure that maximum allowed Assuming the load is referenced in the middle of the A junction temperature is not exceeded. Guidelines listed m power rails or V /2. supply below can be used to verify that the particular application p l will not cause the device to operate beyond it’s intended Figure 4 shows the maximum safe power dissipation in the ifi e package vs. the ambient temperature for the packages operating range. r available. R e Maximum power levels are set by the absolute maximum v 1 G junction rating of 150°C. To calculate the junction 2.5 temperature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power n (W) 2 SOIC-8 dissipation. o ati p T = T + (Ө × P ) ssi1.5 SOT23-6 Junction Ambient JA D Di er Where T is the temperature of the working environment. w Ambient o 1 P m In order to determine PD, the power dissipated in the load mu needs to be subtracted from the total power delivered by axi0.5 M the supplies. 0 PD = Psupply - Pload -40 -20 0 20 40 60 80 100 120 Ambient Temperature (°C) Supply power is calculated by the standard power Figure 4. Maximum Power Derating equation. P = V × I supply supply RMS supply Driving Capacitive Loads V = V - V supply S+ S- Increased phase delay at the output due to capacitive loading Power delivered to a purely resistive load is: can cause ringing, peaking in the frequency response, and Pload = ((VLOAD)RMS2)/Rloadeff possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability The effective load resistor (Rload ) will need to include eff and settling performance. Refer to Figure 5. the effect of the feedback network. For instance, Rload eff ©2007-2013 Exar Corporation 14/17 Rev 1G

Data Sheet 3 6 Input + Rs G = 5 Output 2 4 - Rf CL RL V) 1 Output 2 Ou FigureR 5g. Addition of RS for Driving Capacitive Loads Input Voltage (-01 Input 0-2tput Voltage (V) Comline a Table 1 provides the recommended RS for various r capacitive loads. The recommended R values result in -2 -4 C S L <=1dB peaking in the frequency response. The Frequency C -3 -6 1 Response vs. CL plots, on page 7, illustrates the response 0 50 100 150 200 250 300 350 400 450 0 of the CLC1002. Time (us) 0 2 Figure 6. Overdrive Recovery U CL (pF) RS (Ω) -3dB BW (MHz) lt r a 10 43 275 Layout Considerations - L o 22 30 235 General layout and supply bypassing play major roles in w 47 20 190 high frequency performance. Exar has evaluation boards N 100 12 146 to use as a guide for high frequency layout and as aid in o i s 470 4.3 72 device testing and characterization. Follow the steps below e as a basis for high frequency layout: A m Table 1: Recommended RS vs. CL ▪ Include 6.8µF and 0.1µF ceramic capacitors for power p l For a given load capacitance, adjust R to optimize the supply decoupling ifi S e tradeoff between settling time and bandwidth. In general, ▪ Place the 6.8µF capacitor within 0.75 inches of the power pin r R reducing R will increase bandwidth at the expense of e S ▪ v Place the 0.1µF capacitor within 0.1 inches of the power pin 1 additional overshoot and ringing. G ▪ Remove the ground plane under and around the part, Overdrive Recovery especially near the input and output pins to reduce parasitic capacitance An overdrive condition is defined as the point when either ▪ one of the inputs or the output exceed their specified Minimize all trace lengths to reduce series inductances voltage range. Overdrive recovery is the time needed for Refer to the evaluation board layouts below for more the amplifier to return to its normal or linear operating information. point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLC1002 will typically recover in less Evaluation Board Information than 25ns from an overdrive condition. Figure 6 shows the The following evaluation boards are available to aid in the CLC1002 in an overdriven condition. testing and layout of these devices: Evaluation Board # Products CEB002 CLC1002 in SOT23-5 CEB003 CLC1002 in SOIC-8 ©2007-2013 Exar Corporation 15/17 Rev 1G

Data Sheet Evaluation Board Schematics Evaluation board schematics and layouts are shown in Fig- ures 7-11. These evaluation boards are built for dual- sup- ply operation. Follow these steps to use the board in a single-supply application: C o 1. Short -Vs to ground. m l 2. Use C3 and C4, if the -V pin of the amplifier is not i S n directly connected to the ground plane. e a r C L C 1 0 0 2 U l t r Figure 9. CEB002 Bottom View a - L o w N o i s e A m p l i fi e r R e v 1 G Figure 7. CEB002/CEB003 Schematic Figure 10. CEB003 Top View Figure 8. CEB002 Top View Figure 11. CEB003 Bottom View ©2007-2013 Exar Corporation 16/17 Rev 1G

Data Sheet Mechanical Dimensions SOT23-6 Package C o m l i n e a r C L C 1 0 0 2 U l t r a - L o w N o i s e SOIC-8 Package A m p l i fi e r R e v 1 G For Further Assistance: Exar Corporation Headquarters and Sales Offices 48720 Kato Road Tel.: +1 (510) 668-7000 Fremont, CA 94538 - USA Fax: +1 (510) 668-7001 www.exar.com NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. ©2007-2013 Exar Corporation 17/17 Rev 1G