Data sheet acquired from Harris Semiconductor SCHS040D − Revised October 2003 The CD4042B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffixes), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (D, DR, DT, DW, DWR, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). Copyright  2003, Texas Instruments Incorporated

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PACKAGE OPTION ADDENDUM www.ti.com 11-Nov-2009 PACKAGING INFORMATION OrderableDevice Status(1) Package Package Pins Package EcoPlan(2) Lead/BallFinish MSLPeakTemp(3) Type Drawing Qty CD4042BD ACTIVE SOIC D 16 40 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDE4 ACTIVE SOIC D 16 40 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDG4 ACTIVE SOIC D 16 40 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDR ACTIVE SOIC D 16 2500 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDRE4 ACTIVE SOIC D 16 2500 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDRG4 ACTIVE SOIC D 16 2500 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDT ACTIVE SOIC D 16 250 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDTE4 ACTIVE SOIC D 16 250 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDTG4 ACTIVE SOIC D 16 250 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDW ACTIVE SOIC DW 16 40 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDWE4 ACTIVE SOIC DW 16 40 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BDWG4 ACTIVE SOIC DW 16 40 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BE ACTIVE PDIP N 16 25 Pb-Free CUNIPDAU N/AforPkgType (RoHS) CD4042BEE4 ACTIVE PDIP N 16 25 Pb-Free CUNIPDAU N/AforPkgType (RoHS) CD4042BF ACTIVE CDIP J 16 1 TBD A42 N/AforPkgType CD4042BF3A ACTIVE CDIP J 16 1 TBD A42 N/AforPkgType CD4042BF3AS2329 OBSOLETE CDIP J 16 TBD CallTI CallTI CD4042BF3AS2534 OBSOLETE CDIP J 16 TBD CallTI CallTI CD4042BM OBSOLETE SOIC D 16 TBD CallTI CallTI CD4042BNSR ACTIVE SO NS 16 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BNSRE4 ACTIVE SO NS 16 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BNSRG4 ACTIVE SO NS 16 2000 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BPW ACTIVE TSSOP PW 16 90 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BPWE4 ACTIVE TSSOP PW 16 90 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) CD4042BPWG4 ACTIVE TSSOP PW 16 90 Green(RoHS& CUNIPDAU Level-1-260C-UNLIM noSb/Br) (1)Themarketingstatusvaluesaredefinedasfollows: ACTIVE:Productdevicerecommendedfornewdesigns. LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect. Addendum-Page1

PACKAGE OPTION ADDENDUM www.ti.com 11-Nov-2009 NRND:Notrecommendedfornewdesigns.Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartin anewdesign. PREVIEW:Devicehasbeenannouncedbutisnotinproduction.Samplesmayormaynotbeavailable. OBSOLETE:TIhasdiscontinuedtheproductionofthedevice. (2)EcoPlan-Theplannedeco-friendlyclassification:Pb-Free(RoHS),Pb-Free(RoHSExempt),orGreen(RoHS&noSb/Br)-pleasecheck http://www.ti.com/productcontentforthelatestavailabilityinformationandadditionalproductcontentdetails. TBD:ThePb-Free/Greenconversionplanhasnotbeendefined. Pb-Free(RoHS):TI'sterms"Lead-Free"or"Pb-Free"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirements forall6substances,includingtherequirementthatleadnotexceed0.1%byweightinhomogeneousmaterials.Wheredesignedtobesoldered athightemperatures,TIPb-Freeproductsaresuitableforuseinspecifiedlead-freeprocesses. Pb-Free(RoHSExempt):ThiscomponenthasaRoHSexemptionforeither1)lead-basedflip-chipsolderbumpsusedbetweenthedieand package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible)asdefinedabove. Green(RoHS&noSb/Br):TIdefines"Green"tomeanPb-Free(RoHScompatible),andfreeofBromine(Br)andAntimony(Sb)basedflame retardants(BrorSbdonotexceed0.1%byweightinhomogeneousmaterial) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incomingmaterialsandchemicals.TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimited informationmaynotbeavailableforrelease. InnoeventshallTI'sliabilityarisingoutofsuchinformationexceedthetotalpurchasepriceoftheTIpart(s)atissueinthisdocumentsoldbyTI toCustomeronanannualbasis. Addendum-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2009 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) CD4042BDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 CD4042BNSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2009 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) CD4042BDR SOIC D 16 2500 333.2 345.9 28.6 CD4042BNSR SO NS 16 2000 346.0 346.0 33.0 PackMaterials-Page2

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MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,65 0,10 M 0,19 14 8 0,15 NOM 4,50 6,60 4,30 6,20 Gage Plane 0,25 1 7 0°–8° A 0,75 0,50 Seating Plane 0,15 1,20 MAX 0,10 0,05 PINS ** 8 14 16 20 24 28 DIM A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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PACKAGE OPTION ADDENDUM www.ti.com 22-Jul-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) CD4042BD ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CD4042BM & no Sb/Br) CD4042BDR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CD4042BM & no Sb/Br) CD4042BDRG4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CD4042BM & no Sb/Br) CD4042BDT ACTIVE SOIC D 16 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CD4042BM & no Sb/Br) CD4042BDW ACTIVE SOIC DW 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CD4042BM & no Sb/Br) CD4042BE ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type -55 to 125 CD4042BE & no Sb/Br) CD4042BEE4 ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type -55 to 125 CD4042BE & no Sb/Br) CD4042BF ACTIVE CDIP J 16 1 TBD SNPB N / A for Pkg Type -55 to 125 CD4042BF CD4042BF3A ACTIVE CDIP J 16 1 TBD SNPB N / A for Pkg Type -55 to 125 CD4042BF3A CD4042BNSR ACTIVE SO NS 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CD4042B & no Sb/Br) CD4042BPW ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CM042B & no Sb/Br) CD4042BPWE4 ACTIVE TSSOP PW 16 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 CM042B & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 22-Jul-2020 RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF CD4042B, CD4042B-MIL : •Catalog: CD4042B •Military: CD4042B-MIL NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Dec-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) CD4042BDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 CD4042BNSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Dec-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) CD4042BDR SOIC D 16 2500 333.2 345.9 28.6 CD4042BNSR SO NS 16 2000 367.0 367.0 38.0 PackMaterials-Page2

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PACKAGE OUTLINE PW0016A TSSOP - 1.2 mm max height SCALE 2.500 SMALL OUTLINE PACKAGE SEATING PLANE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA 14X 0.65 16 1 2X 5.1 4.55 4.9 NOTE 3 8 9 0.30 B 4.5 16X 0.19 1.2 MAX 4.3 0.1 C A B NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.05 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220204/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com

EXAMPLE BOARD LAYOUT PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL UNDER SOLDER MASK OPENING METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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GENERIC PACKAGE VIEW DW 16 SOIC - 2.65 mm max height 7.5 x 10.3, 1.27 mm pitch SMALL OUTLINE INTEGRATED CIRCUIT This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224780/A www.ti.com

PACKAGE OUTLINE DW0016A SOIC - 2.65 mm max height SCALE 1.500 SOIC C 10.63 SEATING PLANE TYP 9.97 A PIN 1 ID 0.1 C AREA 14X 1.27 16 1 10.5 2X 10.1 8.89 NOTE 3 8 9 0.51 16X 0.31 7.6 B 7.4 0.25 C A B 2.65 MAX NOTE 4 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0.3 0 - 8 0.1 1.27 0.40 DETAIL A (1.4) TYPICAL 4220721/A 07/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side. 5. Reference JEDEC registration MS-013. www.ti.com

EXAMPLE BOARD LAYOUT DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SEE SYMM DETAILS 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) LAND PATTERN EXAMPLE SCALE:7X METAL SOLDER MASK SOLDER MASK METAL OPENING OPENING 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220721/A 07/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SYMM 1 16 16X (0.6) SYMM 14X (1.27) 8 9 R0.05 TYP (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:7X 4220721/A 07/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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