Model CB3 & CB3LV HCMOS/TTL Clock Oscillator FEATURES • Standard 7.0mm x 5.0mm 4-Pad Surface Mount Package • HCMOS/TTL Compatible Output • Fundamental and 3rd Overtone Crystal Designs • Frequency Range 1 – 200 MHz • Frequency Stability ±50 ppm Standard, ±25 ppm and ±20 ppm Available • Operating Voltages +5.0Vdc or +3.3Vdc • Operating Temperature to -40°C to +85°C • Output Enable Standard • Tape & Reel Packaging • RoHS/Green Compliant (6/6) APPLICATIONS Applications for Model CB3 and CB3LV include digital video, networking equipment, wireless communications, broadband access, Ethernet/Gigabit Ethernet, microprocessors/DSP/FPGA, storage area networks, fiber channel, computers and peripherals, test and measurement, SONET/SDH/DWDM, base stations and Pico cells. ORDERING INFORMATION CB3 - - M SUPPLY VOLTAGE FREQUENCY IN MHz LV = +3.3Vdc M - indicates MHz and decimal point. 3 Blank = +5.0Vdc FREQUENCY STABILITY OPERATING TEMPERATURE RANGE 6 = ± 20 ppm 1 7 = ± 32 ppm 2 C = -20°C to +70°C [standard] 5 = ± 25 ppm I = -40°C to +85°C 1 2 = ± 100 ppm 2 3 = ± 50 ppm [std] 1] 6I Stability/Temperature combination is not available. 2] These stabilities are not recommended for new designs. 3] Frequency is recorded with only leading significant digits before the ‘M’ and 4 - 6 significant digits after the ‘M’ (including zeros). [Ex. 3.579545 MHz, code as 3M579545; 14.31818 MHz, code as 14M31818; 125 MHz, code as 125M0000] 4] CTS Distributors may add a -T or -1 at the end of the part number to indicate Tape and Reel packaging. Not all performance combinations and frequencies may be available. Contact your local CTS Representative or CTS Customer Service for availability. PACKAGING INFORMATION [reference] Device quantity is 1,000 pieces maximum per reel. Document No. 008-0256-0 Page 1- 3 Rev. G www.ctscorp.com

Model CB3 & CB3LV 7.0mm x 5.0mm Low Cost HCMOS/TTL Clock Oscillator ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Maximum Supply Voltage V - -0.5 - +7.0 V CC Storage Temperature T - -40 - +100 °C STG Frequency Range CB3 fO - 1.5 - 107 MHz CB3LV - 1.5 - 200 Frequency Stability Δf/f See Note 1 and Ordering Information - - 20,25,50 or 100 ± ppm O Aging Δf First year - 3 5 ± ppm Operating Temperature Commercial TA - -20 25 +70 °C Industrial -40 +85 Supply Voltage CB3 VCC ±10% 4.5 5.0 5.5 V CB3LV 3.0 3.3 3.6 Supply Current Frequency Range Tested load condition noted for typical values. CB3 1.5MHz to 20MHz C=50pF - 10 25 L 20.001MHz to 80MHz CL=50pF - 30 50 I mA CC 80.001MHz to 107MHz CL=15pF - 40 80 CB3LV 1.5MHz to 20MHz C=15pF - 7 12 L 20.001MHz to 80MHz C=15pF - 20 40 L 80.001MHz to 200MHz C=15pF - 30 60 RS 1.5MHz to 50MHz L - - 50 E ET Output Load CL 50.001MHz to 80MHz - - 30 pF M 80.001MHz to 200MHz - - 15 A AR Output Voltage Levels AL P Logic '1' Level VOH C10M OTTSL L LoOadA D V9C0C%-0V.6CVC - - V C RI Logic '0' Level V CMOS - - 10%VCC T OL TTL Load 0.4 C E Output Current L E Logic '1' Level IOH VOH = 3.9V/2.2V VCC = 4.5V/3.0V - - -16/-8 mA Logic '0' Level IOL VOL = 0.4V VCC = 4.5V/3.0V - - +16/+8 Output Duty Cycle SYM @ 50% Level 45 - 55 % Rise and Fall Time @ 10% - 90% Levels Tested load condition noted for typical values. CB3 1.5MHz to 20MHz CL=50pF - 8 10 20.001MHz to 80MHz CL=50pF - 5 8 TR, TF 80.001MHz to 200MHz C=15pF - 2.5 5 ns L CB3LV 1.5MHz to 20MHz C=15pF - 6 8 L 20.001MHz to 80MHz C=15pF - 3 5 L 80.001MHz to 200MHz C=15pF - 1.5 3 L Start Up Time TS Application of VCC - - 10 ms Enable Function Enable Input Voltage V Pin 1 Logic '1', Output Enabled 2.0 - - V IH Disable Input Voltage V Pin 1 Logic '0', Output Disabled - - 0.8 IL Enable Time T Pin 1 Logic '1' - - 200 ns PLZ Standby Current IST Pin 1 Logic '0', Output Disabled - - 10 µA Period Jitter, Pk-Pk - - - - 50 Period Jitter, RMS - - - - 5 ps Phase Jitter, RMS - Bandwidth 12kHz - 20MHz - - 1 Notes: 1. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging. Document No. 008-0256-0 Page 2 - 3 Rev. G

Model CB3 & CB3LV 7.0mm x 5.0mm Low Cost HCMOS/TTL Clock Oscillator ELECTRICAL CHARACTERISTICS LVCMOS OUTPUT WAVEFORM TE ST CIRCUIT, CMOS LOAD ENABLE TRUTH TABLE D.U.T. PIN ASSIGNMENTS PIN SYMBOL DESCRIPTION PIN 1 PIN 3 1 EOH Enable Logic ‘1’ Output Open Output 2 GND Circuit & Package Ground Logic ‘0’ High Imp. 3 Output RF Output 4 VCC Supply Voltage MECHANICAL SPECIFICATIONS PACKAGE DRAWING MARKING INFORMATION 1. ** – Manufacturing Site Code. [Note a dash may follow the site code and is acceptable.] 2. XXXMXXXXXX – Frequency is marked with only leading significant digits before the ‘M’ and 4 – 6 digits after the ‘M’ (including zeros). CTS**CB3 Ex. XMXXXXXX [3M579545] XXXMXXXXXX XXMXXXXX [14M31818] XXXMXXXX [125M0000] ● YYWWSTV 3. YYWW – Date code, YY – year, WW – week. 4. ST – Frequency stability/temperature code. [Refer to Ordering Information.] 5. V – Voltage code. 3 = 3.3V, 5 = 5.0V. NOTES 1. Termination pads [e4]. Barrier-plating is nickel [Ni] with gold [Au] flash plate. 2. Reflow conditions per JEDEC J-STD-020, 260°C maximum. 3. Moisture Sensitivity Level 1 per JEDEC J-STD-020. SUGGESTED SOLDER PAD GEOMETRY CBYPASS should be ≥ 0.01 uF. Document No. 008-0256-0 Page 3 - 3 Rev. G