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DISCRETE SEMICONDUCTORS DATA SHEET book, halfpage M3D087 BSP122 N-channel enhancement mode vertical D-MOS transistor Product specification 2001 May 18 Supersedes data of 1997 Jun 23

Philips Semiconductors Product specification N-channel enhancement mode BSP122 vertical D-MOS transistor FEATURES QUICK REFERENCE DATA • Direct interface to C-MOS, TTL, SYMBOL PARAMETER MAX. UNIT etc. V drain-source voltage (DC) 200 V DS • High-speed switching I drain current (DC) 550 mA D • No secondary breakdown. R drain-source on-state resistance 2.5 W DSon V gate-source threshold voltage 2 V GSth DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT223 package and intended for use as a line current interruptor in handbook, halfpage 4 d telephonesetsandforapplicationsin relay, high-speed and line transformer drivers. g PINNING - SOT223 1 2 3 s PIN DESCRIPTION Top view MAM054 1 gate 2 drain 3 source Fig.1 Simplified outline (SOT223) and symbol. 4 drain LIMITING VALUES In accordance with the Absolute Maximum System (IEC60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V drain-source voltage (DC) - 200 V DS V gate-source voltage (DC) open drain - – 20 V GSO I drain current (DC) - 550 mA D I peak drain current - 3 A DM P total power dissipation T £ 25(cid:176) C; note1 - 1.5 W tot amb T storage temperature - 55 +150 (cid:176) C stg T junction temperature - 150 (cid:176) C j Note 1. Transistor mounted on an epoxy printed circuit board, 40x40x1.5mm, mounting pad for the drain tab minimum 6cm2. THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT R thermal resistance from junction to ambient; note1 83.3 K/W th j-a Note 1. Transistor mounted on an epoxy printed circuit board, 40x40x1.5mm, mounting pad for the drain tab minimum 6cm2. 2001May18 2

Philips Semiconductors Product specification N-channel enhancement mode BSP122 vertical D-MOS transistor CHARACTERISTICS T = 25(cid:176) Cunless otherwise specified. j SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V drain-source breakdown voltage I =10m A; V =0 200 - - V (BR)DSS D GS I drain-source leakage current V =160V; V =0 - - 1 m A DSS DS GS I gate-source leakage current V =Р20V; V =0 - - 100 nA GSS GS DS V gate-source threshold voltage I =1mA; V =V 0.4 - 2 V GSth D GS DS R drain-source on-resistance I =750mA; V =10V - 1.7 2.5 W DSon D GS I =20mA; V =2.4V - 3 - W D GS (cid:247) Y Πtransfer admittance I =750mA; V =25V 400 900 - mS fs D DS C input capacitance V =25V; V =0; f=1MHz - 100 - pF iss DS GS C output capacitance V =25V; V =0; f=1MHz - 20 - pF oss DS GS C reverse transfer capacitance V =25V; V =0; f=1MHz - 10 - pF rss DS GS Switching times (see Figs2and3) t turn-on time I =750mA; V =50V; - 10 20 ns on D DD V =0to10V GS t turn-off time I =750mA; V = 50V; - 45 60 ns off D DD V =0 to 10V GS handbook, halfpage 90 % handbook, halfpage VDD = 50 V INPUT 10 % 90 % 10 V OUTPUT ID 0 V 10 % 50 W ton toff MBB691 MBB692 VDD=50V. Fig.2 Switching times test circuit. Fig.3 Input and output waveforms. 2001May18 3

Philips Semiconductors Product specification N-channel enhancement mode BSP122 vertical D-MOS transistor PACKAGE OUTLINE Plastic surface mounted package; collector pad for good heat transfer; 4 leads SOT223 D B E A X c y HE v M A b1 4 Q A A1 1 2 3 Lp e1 bp w M B detail X e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y 1.8 0.10 0.80 3.1 0.32 6.7 3.7 7.3 1.1 0.95 mm 4.6 2.3 0.2 0.1 0.1 1.5 0.01 0.60 2.9 0.22 6.3 3.3 6.7 0.7 0.85 OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC EIAJ PROJECTION 97-02-28 SOT223 SC-73 99-09-13 2001May18 4

Philips Semiconductors Product specification N-channel enhancement mode BSP122 vertical D-MOS transistor DATA SHEET STATUS PRODUCT DATA SHEET STATUS(1) DEFINITIONS STATUS(2) Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to makechanges at any time in order to improve the design, manufacturing and supply. Changes will be communicatedaccording to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS DISCLAIMERS Short-form specification(cid:190) The data in a short-form Life support applications(cid:190) These products are not specification is extracted from a full data sheet with the designed for use in life support appliances, devices, or same type number and title. For detailed information see systems where malfunction of these products can the relevant data sheet or data handbook. reasonablybeexpectedtoresultinpersonalinjury.Philips Semiconductorscustomersusingorsellingtheseproducts Limitingvaluesdefinition(cid:190) Limitingvaluesgivenarein for use in such applications do so at their own risk and accordance with the Absolute Maximum Rating System agree to fully indemnify Philips Semiconductors for any (IEC60134). Stress above one or more of the limiting damages resulting from such application. values may cause permanent damage to the device. These are stress ratings only and operation of the device Right to make changes(cid:190) Philips Semiconductors attheseoratanyotherconditionsabovethosegiveninthe reservestherighttomakechanges,withoutnotice,inthe Characteristicssectionsofthespecificationisnotimplied. products, including circuits, standard cells, and/or Exposure to limiting values for extended periods may software, described or contained herein in order to affect device reliability. improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for Application information(cid:190) Applications that are theuseofanyoftheseproducts,conveysnolicenceortitle described herein for any of these products are for under any patent, copyright, or mask work right to these illustrative purposes only. Philips Semiconductors make products,andmakesnorepresentationsorwarrantiesthat norepresentationorwarrantythatsuchapplicationswillbe these products are free from patent, copyright, or mask suitable for the specified use without further testing or work right infringement, unless otherwise specified. modification. 2001May18 5

Philips Semiconductors Product specification N-channel enhancement mode BSP122 vertical D-MOS transistor NOTES 2001May18 6

Philips Semiconductors Product specification N-channel enhancement mode BSP122 vertical D-MOS transistor NOTES 2001May18 7

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