Product Sample & Technical Tools & Support & Folder Buy Documents Software Community bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 2 bq2425x 2A Single-Input I C, Stand-Alone Switched-Mode Li-Ion Battery Charger With Power-Path Management 1 Features 1 • High-EfficiencySwitched-ModeChargerWith • SynchronousFixed-FrequencyPWMController SeparatePowerPath Operatingat3MHzforSmallInductorSupport • StartupSystemFromDeeplyDischargedor • AnyBootRobustBatteryDetectionAlgorithm MissingBattery • ChargeTimeOptimizerforImprovedCharge • USBChargingCompliant TimesatAnyGivenChargeCurrent – SelectableInputCurrentLimitof100mA, • 2.40-mmx2.00-mm30-BallDSBGAand4-mmx 500mA,900mA,1.5A,and2A 4-mm24-PinQFNPackages • BC1.2CompatibleD+,D–Detection 2 Applications • InHostMode(AfterI2CCommunicationStarts andBeforeWatchdogTimerTimesOut) • MobilePhonesandSmartPhones – ProgrammableBatteryChargeVoltage, • MP3Players VBATREG • PortableMediaPlayers – ProgrammableChargeCurrent(I ) • HandheldDevices CHG – ProgrammableInputCurrentLimit(I ) LIM 3 Description – ProgrammableInputVoltage-BasedDynamic PowerManagementThreshold,(V ) The bq24250, bq24251, and bq24253 are highly IN_DPM integrated single-cell Li-Ion battery chargers and – ProgrammableInputOvervoltageProtection system power-path management devices targeted for Threshold(V ) OVP space-limited, portable applications with high-capacity – ProgrammableSafetyTimer batteries. The single-cell charger has a single input • ResistorProgrammableDefaultsfor: that operates from either a USB port or an AC wall adapterforaversatilesolution. – I upto2AWithCurrentMonitoringOutput CHG (ISET) DeviceInformation(1) – I upto2AWithCurrentMonitoringOutput LIM PARTNUMBER PACKAGE BODYSIZE(NOM) (ILIM) bq24250 VQFN(24) 4.00mmx4.00mm – V (VDPM) bq24251 IN_DPM bq24253 DSBGA(30) 2.40mmx2.00mm • WatchdogTimerDisableBit (1) For all available packages, see the orderable addendum at • Integrated4.9V,50mALDO theendofthedatasheet. • CompleteSystem-LevelProtection – InputUVLO,InputOvervoltageProtection CPMID 1 µF (OVP),BatteryOVP,SleepMode,VIN_DPM – InputCurrentLimit V2I.N2C µINF R1 IN PMID SW C1LB.OO0O µTH System Load VDPM 3MHz 33nF – ChargeCurrentLimit R2 PWM BOOT – ThermalRegulation LDO PGND 1 µF SYS – ThermalShutdown 22μF STAT – Voltage-Based,JEITACompatibleNTC MonitoringInput VGPIO BAT 1μF LDO – SafetyTimer SCL SCL R3 • 22VAbsoluteMaximumInputVoltageRating GSPDIOA1 SINDTA TS R4 RNTTECMP PACK++ • 10.5VMaximumOperatingInputVoltage HostGPIO2 /CE PACK- GPIO3 EN1 • LowRDS(on)IntegratedPowerFETsforaCharging GPIO4 EN2 ILIM ISET Rateofupto2A • Open-DrainStatusOutputs 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com Table of Contents 1 Features.................................................................. 1 9.4 DeviceFunctionalModes........................................30 2 Applications........................................................... 1 9.5 Programming...........................................................31 3 Description............................................................. 1 9.6 RegisterMaps ........................................................33 4 RevisionHistory..................................................... 2 10 ApplicationandImplementation........................ 39 10.1 ApplicationInformation..........................................39 5 Description(continued)......................................... 4 10.2 TypicalApplication ...............................................39 6 DeviceOptions....................................................... 4 11 PowerSupplyRecommendations..................... 42 7 PinConfigurationandFunctions......................... 5 12 Layout................................................................... 42 8 Specifications......................................................... 8 12.1 LayoutGuidelines.................................................42 8.1 AbsoluteMaximumRatings .....................................8 12.2 LayoutExample....................................................43 8.2 ESDRatings..............................................................8 12.3 ThermalConsiderations........................................44 8.3 RecommendedOperatingConditions.......................8 13 DeviceandDocumentationSupport................. 45 8.4 ThermalInformation..................................................9 13.1 RelatedLinks........................................................45 8.5 ElectricalCharacteristics...........................................9 13.2 Trademarks...........................................................45 8.6 TypicalCharacteristics............................................14 13.3 ElectrostaticDischargeCaution............................45 9 DetailedDescription............................................ 16 13.4 Glossary................................................................45 9.1 Overview.................................................................16 14 Mechanical,Packaging,andOrderable 9.2 FunctionalBlockDiagram.......................................17 Information........................................................... 45 9.3 FeatureDescription.................................................18 14.1 PackageSummary................................................46 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionG(January2015)toRevisionH Page • Changed20VMaximumInputVoltageRatingFeaturebulletto22VtomatchAbsoluteMaximumRatingstable..............1 • ChangedFigure11andFigure12imageX-axislabelsfrom"Temperature(fC)"to"Temperature(°C)"........................... 15 ChangesfromRevisionF(December2014)toRevisionG Page • DeletedLeadtemperature(soldering)specfromAbsoluteMaximumRatingstable.SeePackageOptionAddendum. .....8 • ChangedtableheadingfromHandlingRatingstoESDRatings.MovedT spectotheAbsoluteMaximumRatingstable 8 stg • ChangedthetestconditionofIBAT-BatterydischargecurrentinSYSOFFmode:Removed“(BAT,SW,SYS)”................ 9 • AddedspecforI /I ratio ................................................................................................................................................. 11 IN ILIM ChangesfromRevisionE(December2013)toRevisionF Page • AddedHandlingRatingtable,FeatureDescriptionsection,DeviceFunctionalModes,Applicationand Implementationsection,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentation Supportsection,andMechanical,Packaging,andOrderableInformationsection ............................................................... 1 • DeletedtheminimumspecforRILIM-SHORTandchangedthetypicalvalueto55ohmandmaximumspecto75ohm. 11 • ChangedV valuesto(4.65,4.85,5.04)andaddeddescriptioninthesecondcolumn“bq24250”.Addedonerow LDO belowfor“bq24251andbq24253”andaddedvalues(4.65,4.95,5.25)............................................................................. 12 ChangesfromRevisionD(July2013)toRevisionE Page • ChangedVDPMpindesctiptionfrom"......setsadefaultof4.36V"to".......setsadefaultof4.68V" .................................... 6 • ChangedtextstringintheV settingsdescriptionfrom:"TheISETresistormustbefloatedinordertoavoidan IN_DLM internalfault."to:"TheISETresistormustbeconnectedinordertoavoidanunstablechargingstate."............................ 20 • ChangedtextstringintheSleepModedescriptionfrom:"...sendsasingle256μspulseissentontheSTATandINT outputs..."to:"...sendsasingle256µspulseontheSTATandINToutputs..."................................................................... 26 2 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 • ChangedtextstringintheInputOver-VoltageProtectiondescriptionfrom:"...turnsthebatteryFET,sendsasingle 256μspulseissentontheSTATandINToutputs..."to"...turnsthebatteryFET,sendsasingle256μspulseonthe STATandINToutputs...."..................................................................................................................................................... 26 • AddedSerialInterfaceDescription....................................................................................................................................... 31 • ChangedRegister#3description,B1(4)(5)Namefrom:"USB_DET_1/EN1"to:"USB_DET_1/EN2"................................ 35 • ChangedRegister#3description,B0(LSB)Namefrom:"USB_DET_0/EN0"to:"USB_DET_0/EN1"................................ 35 • ChangedRegister#3description,B1(4)(5)andB0(LSB)FUNCTIONentriesfrom:"ReturnUSBdetectionresultor pinEN1/EN0status–"to"ReturnUSBdetectionresultorpinEN2/EN1status–";changed00-DCPdetected/ from:"EN1=0,EN0=0"to:"EN2=0,EN1=0";changed01-CDPdetected/from:"EN1=0,EN0=1"to:"EN2=0, EN1=1";changed10-SDPdetected/from:"EN1=1,EN0=0"to:"EN2=1,EN1=0";andchanged11-Apple/TTor non-standardadaptordetected/from:"EN1=1,EN0=1"to:"EN2=1,EN1=1",respectively............................................... 35 ChangesfromRevisionC(June2013)toRevisionD Page • ChangedVDPMPinDescriptionregulatorreferencefrom"1.23V"to"1.2" .......................................................................... 6 • ChangedtextstringinD+/D-pindescriptionfrom"....willremainlow..."to"...willremainhighimpedance..."...................... 7 • AddedSCLandSDAtoPinVoltageRangespecintheAbsoluteMaximumRatingstable.................................................. 8 • ChangedspecconditionsforOutputCurrent(Continuous),from"IN,SW,SYS,BAT"to"IN,SYS,BAT"inABS MaxRatingstable .................................................................................................................................................................. 8 • ChangedFigure20 .............................................................................................................................................................. 25 • AddedtexttoNTCMonitordescriptionforclarification........................................................................................................ 28 • AddedtexttoSafetyTimerdescriptionforclarification........................................................................................................ 28 • ChangedFaultConditionfrom"InputGood"to"InputFault&LDOLow"inFaultConditionstable.................................... 29 • ChangedRegister#2Resetstatefrom"10101100"to"xxxx1100"................................................................................... 34 • ChangedRegister#4Resetstatefrom"00000000"to"11111000"................................................................................... 35 • ChangedBitB7,B6,B5,B4,B3FUNCTIONdescriptionfrom"(default0)"to"(default1)"................................................ 35 • ChangedRegister#4Footnote(1)textfrom"...currentis500ma...."to".....currentisexternal.."...................................... 35 • ChangedTS_ENdescriptionfrom"Whensettoa‘1'theTSfunctionisdisabled....."to"Whensettoa‘0’,theTS functionisdisabled..."........................................................................................................................................................... 37 • AddedtexttoTS_STATdescriptionforclarification............................................................................................................. 37 • ChangedRegister#7,BitB3FUNCTIONdescriptionfrom"...ifTERMistrueorEN_PTMistrue..."to"ifTERMis trueorForcePTMstrue...".................................................................................................................................................. 38 ChangesfromRevisionB(May2013)toRevisionC Page • DeletedPREVIEWstatusnotefromdevicesbq24250YFF,bq24251YFF,bq24251RGE,andbq24253RGE ................... 45 ChangesfromRevisionA(March2013)toRevisionB Page • AddedPREVIEWstatustodevicesintheOrderingInformationtable,exceptthebq24250RGERandbq24250RGET.... 45 ChangesfromOriginal(October2012)toRevisionA Page • ChangedFrom:ProductBriefTo:Fulldatasheet.................................................................................................................. 1 • AddedTypicalCharacteristicsgraphs.................................................................................................................................. 14 • AddedTypicalCharacteristicsgraphs.................................................................................................................................. 15 • AddedTypicalCharacteristicsgraphs.................................................................................................................................. 16 • ChangedEquation(3).......................................................................................................................................................... 20 • ChangedtextintheF/SModeProtocolsectionfrom"...toeithertransmitdatatotheslave(R/Wbit1)orreceive datafromtheslave(R/Wbit0"to"...toeithertransmitdatatotheslave(R/Wbit0)orreceivedatafromtheslave Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com (R/Wbit1)"forclarification................................................................................................................................................... 32 4 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 5 Description (continued) The power-path management feature allows the bq24250, bq24251, and bq24253 to power the system from a high-efficiency DC-DC converter while simultaneously and independently charging the battery. The charger monitors the battery current at all times and reduces the charge current when the system load requires current above the input current limit. This reduced charge current allows for proper charge termination and enables the system to run with a defective or absent battery pack. Additionally, this reduced charge current enables instant system turnon even with a totally discharged battery or no battery. The architecture of the power-path management also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents. This supplementation of current requirements enables the use of a smaller adapter. The battery is charged in four phases: trickle charge, precharge, constant current, and constant voltage. In all charge phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the internal temperature threshold is exceeded. Additionally, a voltage-based, JEITA compatible battery pack thermistormonitoringinput(TS)thatmonitorsbatterytemperatureforsafechargingisincluded. 6 Device Options DEFAULT D+/D-OR DEFAULT I2COR I2C DEVICE INTORPG MINSYS TSPROFILE STAND OVP EN1/EN2 V ADDRESS OREG ALONE bq24250 10.5V EN1/EN2 INT 4.2V 3.5V JEITA I2C+SA 0x6A bq24251 10.5V D+/D- PG 4.2V 3.5V JEITA I2C+SA 0x6A bq24253 10.5V D+/D- PG 4.2V 3.5V JEITA SAOnly N/A and EN1/EN2 Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 7 Pin Configuration and Functions DSBGA/QFN 30Pins/24Pins TopView A B1AT S2YS PG3ND S4W I5N LDO VDPM ILIM BOOT PMID IN 24 23 22 21 20 19 B BAT SYS PGND SW IN CE 1 18 SW EN1 2 17 SW C BAT SYS PGND SW IN EN2 3 16 PGND bq24250 AGND 4 QFN 15 PGND D ISET EN2 EN1 /CE PMID SDA 5 14 SYS SCL 6 13 SYS E INT SCL STAT VDPM BOOT 7 8 9 10 11 12 F TS SDA PGND LDO ILIM AT NT TS ET AT AT T I S B B S I bq24250 DSBGA 1 2 3 4 5 A BAT SYS PGND SW IN LDO VDPM ILIM BOOT PMID IN 24 23 22 21 20 19 B BAT SYS PGND SW IN CE 1 18 SW D+ 2 17 SW C BAT SYS PGND SW IN D– 3 bq24251 16 PGND QFN AGND 4 15 PGND D ISET D- D+ /CE PMID SDA 5 14 SYS E /PG SCL STAT VDPM BOOT SCL 6 13 SYS 7 8 9 10 11 12 F TS SDA PGND LDO ILIM T G S T T T A P T E A A T S B B S I bq24251DSBGA 1 2 3 4 5 A BAT SYS PGND SW IN LDO VDPM ILIM BOOT PMID IN 24 23 22 21 20 19 B BAT SYS PGND SW IN CE 1 18 SW D+ 2 17 SW C BAT SYS PGND SW IN D– 3 bq24253 16 PGND QFN AGND 4 15 PGND D ISET D- D+ /CE PMID EN1 5 14 SYS E /PG EN2 /CHG VDPM BOOT EN2 6 13 SYS 7 8 9 10 11 12 F TS EN1 PGND LDO ILIM G G S T T T H P T E A A C IS B B bq24253DSBGA 6 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 PinFunctions PIN NAME bq24250 bq24251 bq24253 I/O DESCRIPTION YFF RGE YFF RGE YFF RGE Inputpowersupply.INisconnectedtothe IN A5,B5,C5 19 A5,B5,C5 19 A5,B5,C5 19 I externalDCsupply(ACadapterorUSBport). BypassINtoPGNDwith>2μFceramiccapacitor ConnectionbetweenblockingFETandhigh-side PMID D5 20 D5 20 D5 20 I FET. A4,B4, A4,B4, A4,B4, InductorConnection.Connecttotheswitching SW 17–18 17–18 17–18 O C4 C4 C4 sideoftheexternalinductor. HighSideMOSFETGateDriverSupply.Connect a0.033μFceramiccapacitor(voltagerating> BOOT E5 21 E5 21 E5 21 I 15V)fromBOOTtoSWtosupplythegatedrive forthehighsideMOSFETs. A3,B3, A3,B3, A3,B3, Groundterminal.Connecttothegroundplaneof PGND 15–16 15–16 15–16 C3,F3 C3,F3 C3,F3 thecircuit. SystemVoltageSenseandswitched-modepower A2,B2, A2,B2, A2,B2, supply(SMPS)outputfilterconnection.Connect SYS 13–14 13–14 13–14 I C2 C2 C2 SYStothesystemoutputattheoutputbulk capacitors.BypassSYSlocallywith>20μF. BatteryConnection.Connecttothepositive A1,B1, A1,B1, A1,B1, BAT 11–12 11–12 11–12 I/O terminalofthebattery.Additionally,bypassBAT C1 C1 C1 witha>1μFcapacitor. BatteryPackNTCMonitor.ConnectTStothe centertapofaresistordividerfromLDOtoGND. TheNTCisconnectedfromTStoGND.TheTS TS F1 9 F1 9 F1 9 I functionprovides4thresholdsforJEITAorPSE compatibility.SeetheNTCMonitorsectionfor moredetailsonoperationandselectingthe resistorvalues. InputDPMProgrammingInput.Connectaresistor dividerbetweenINandGNDwithVDPM connectedtothecentertaptoprogramtheInput VoltagebasedDynamicPowerManagement threshold(V ).Theinputcurrentisreduced VDPM E4 23 E4 23 E4 23 I IN_DPM tomaintainthesupplyvoltageatV .The IN_DPM referencefortheregulatoris1.2V.Shortpinto GNDifexternalresistorsarenotdesired—this setsadefaultof4.68VfortheinputDPM threshold. ChargeCurrentProgrammingInput.Connecta resistorfromISETtoGNDtoprogramthefast ISET D1 10 D1 10 D1 10 I chargecurrent.Thechargecurrentis programmablefrom300mAto2A. InputCurrentLimitProgrammingInput.Connecta resistorfromILIMtoGNDtoprogramtheinput currentlimitforIN.Thecurrentlimitis ILIM F5 22 F5 22 F5 22 I programmablefrom0.5Ato2A.ILIMhasno effectontheUSBinput.Ifanexternalresistoris notdesired,shorttoGNDfora2Adefaultsetting. ChargeEnableActive-LowInput.ConnectCEto CE D4 1 D4 1 D4 1 I ahighlogicleveltoplacethebatterychargerin standbymode. EN1 D3 2 – – F2 5 I InputCurrentLimitConfigurationInputs.Use EN1,andEN2tocontrolthemaximuminput EN2 D2 3 – – E2 6 I currentandenableUSBcompliance.SeeTable1 forprogrammingdetails. ChargeStatusOpenDrainOutput.CHGispulled lowwhenachargecyclestartsandremainslow CHG – – – – E3 7 O whilecharging.CHGishighimpedancewhenthe chargingterminatesandwhennosupplyexists. CHGdoesnotindicaterechargecycles. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com PinFunctions(continued) PIN NAME bq24250 bq24251 bq24253 I/O DESCRIPTION YFF RGE YFF RGE YFF RGE PowerGoodOpenDrainOutput.PGispulledlow whenavalidsupplyisconnectedtoIN.Avalid PG – – E1 8 E1 8 O supplyisbetweenV +V andV .Ifno BAT SLP OVP supplyisconnectedorthesupplyisoutofthis range,PGishighimpedance. StatusOutput.STATisanopen-drainoutputthat signalschargingstatusandfaultinterrupts.STAT pullslowduringcharging.STATishigh impedancewhenchargingiscompleteorthe chargerisdisabled.Whenafaultoccurs,a256μs STAT E3 7 E3 7 – – O pulseissentoutasaninterruptforthehost. STATisenabled/disabledusingtheEN_STATbit inthecontrolregister.STATwillindicaterecharge cycles.ConnectSTATtoalogicrailusinganLED forvisualindicationorthrougha10kΩresistorto communicatewiththehostprocessor. StatusOutput.INTisanopen-drainoutputthat signalschargingstatusandfaultinterrupts.INT pullslowduringcharging.INTishighimpedance whenchargingiscompleteorthechargeris INT E1 8 – – – – O disabled.Whenafaultoccurs,a256μspulseis sentoutasaninterruptforthehost.INTwill indicaterechargecycles.ConnectINTtoalogic railthrougha10kΩresistortocommunicatewith thehostprocessor. I2CInterfaceClock.ConnectSCLtothelogicrail SCL E2 6 E2 6 – – I througha10kΩresistor. I2CInterfaceData.ConnectSDAtothelogicrail SDA F2 5 F2 5 – – I/O througha10kΩresistor. D+ – – D3 2 D3 2 I BC1.2compatibleD+/D–BasedAdapter Detection.DetectsDCP,SDP,andCDP.Also complieswiththeunconnecteddeadbattery provisionclause.D+andD-areconnectedtothe D+andD–outputsoftheUSBportatpowerup. D– – – D2 3 D2 3 I AlsoincludesthedetectionofApple™and TomTom™adapterswherea500mAinput currentlimitisenabled.ThePGpinwillremain highimpedanceuntilthedetectionhas completed. LDOoutput.LDOisregulatedto4.9Vanddrives upto50mA.BypassLDOwitha1μFceramic LDO F4 24 F4 24 F4 24 O Capacitor.LDOisenabledwhenV <V UVLO IN <18V. AnalogGroundforQFNonly.Connecttothe AGND – 4 – 4 – 4 thermalpadandthegroundplaneofthecircuit. 8 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 8 Specifications 8.1 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT IN –0.3 22 V SW –0.7 12 V PinVoltageRange(with BOOT –0.3 20 V respecttoGND) LDO,STAT,INT,/CHG,/PG,EN1,EN2,EN3,/CE,D+,D-,ILIM,ISET,VDPM, –0.3 7 V TS,SCL,SDA SYS,BAT –0.3 5 V BOOTrelativetoSW –0.3 7 V OutputCurrent IN 2 A (Continuous) SYS,BAT 4 OutputSinkCurrent STAT,/CHG,/PG 5 mA Operatingfree-airtemperaturerange –40 85 °C Junctiontemperature,T –40 125 °C J InputPower IN 15 W Storagetemperature,T –65 150 °C stg (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. 8.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) ±2000 V(ESD) Electrostaticdischarge Chargeddevicemodel(CDM),perJEDECspecificationJESD22- ±500 V C101,allpins(2) (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 8.3 Recommended Operating Conditions AllvoltagesarewithrespecttoPGNDifnotspecified.Currentsarepositiveinto,negativeoutofthespecifiedterminal. ConsultPackagingSectionofthedatabookforthermallimitationsandconsiderationsofpackages MIN MAX UNIT V INvoltagerange 4.35 18(1) IN V INoperatingvoltagerange 4.35 10.5 I Inputcurrent 2 A IN I Currentinchargemode,BAT 2 A CHG I Currentindischargemode,BAT 4 A DISCHG R Chargecurrentprogrammingresistorrange 75 Ω ISET R Inputcurrentlimitprogrammingresistorrange 105 Ω ILIM P InputPower 12 W IN T Operatingjunctiontemperaturerange 0 125 °C J (1) TheinherentswitchingnoisevoltagespikesshouldnotexceedtheabsolutemaximumratingoneithertheBOOTorSWpins.Small routingloopsforthepowernetsinlayoutminimizeswitchingnoise. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 8.4 Thermal Information YFF RGE THERMALMETRIC(1) UNIT (30PINS) (24PINS) R Junction-to-ambientthermalresistance 76.5 32.9 °C/W θJA R Junction-to-case(top)thermalresistance 0.2 32.8 °C/W θJCtop R Junction-to-boardthermalresistance 44 10.6 °C/W θJB ψ Junction-to-topcharacterizationparameter 1.6 0.3 °C/W JT ψ Junction-to-boardcharacterizationparameter 43.4 10.7 °C/W JB R Junction-to-case(bottom)thermalresistance N/A 2.3 °C/W θJCbot (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 8.5 Electrical Characteristics V <V <V andV >V +V ,T =0ºC-125°CandT =25°Cfortypicalvalues(unlessotherwisenoted) UVLO IN OVP IN BAT SLP J J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT INPUTCURRENTS V <V <V ANDV > DPM IN OVP IN V +V PWMswitching, 13 BAT SLP CEEnable mA V <V <V ANDV > I SupplycurrentfromIN DPM IN OVP IN IN V +V PWMswitching, 5 BAT SLP CEDisable V =5.5V,0°C<T <85°C, IN J 170 225 μA High-ZMode 0°C<T <85°C,VBAT=4.2 Batterydischargecurrentinhighimpedancemode, J V, 16 22 (BAT,SW,SYS) VIN=0Vor5V,High-ZMode I μA BAT 0°C<T <85°C,VBAT=4.2 J BatterydischargecurrentinSYSOFFmode V, 1 VIN<UVLO,SYSOFFMode POWER-PATHMANAGEMENT MINSYSstage(noDPMor –1% 3.52 1% DPPM) MINSYSstage(DPMorDPPM –1.50% VMINSYS 1.50% active) –200mV VSYSREG SystemRegulationVoltage VBAT V BATREGstage +I CHG R on V V V BATRE SYSREGstage B+A2T.R1E%G B+A3T.R1E%G G +4.1% V – V Entersupplementmodevoltagethreshold V =3.6V BAT V SPLM BAT 40mV I Exitsupplementmodecurrentthreshold V =3.6V 20 mA SPLM BAT DeglitchTime,OUTShortCircuitduringDischarge Measuredfrom(V –V ) t BAT SYS 740 μs DGL(SC1) orSupplementMode =300mV RecoveryTime,OUTShortCircuitduring t 64 ms REC(SC1) DischargeorSupplementMode BATTERYCHARGER MeasuredfromBATtoSYS, 20 30 RON(BAT- InternalbatterychargerMOSFETon-resistance VBAT=4.2V(WCSP) mΩ SYS) MeasuredfromBATtoSYS, 30 40 V =4.2V(QFN) BAT 10 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Electrical Characteristics (continued) V <V <V andV >V +V ,T =0ºC-125°CandT =25°Cfortypicalvalues(unlessotherwisenoted) UVLO IN OVP IN BAT SLP J J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Operatinginvoltage I2Chostmode regulation,Programmable 3.5 4.44 V Range VBATREG SAmodeorI2Cdefaultmode 4.2 T =25°C –0.5% 0.5% J VoltageRegulationAccuracy T =0°Cto125°C –0.75% 0.75% J I FastChargeCurrentRange V ≤V <V 500 2000 mA CHG LOWV BAT BAT(REG) FastChargeCurrentAccuracy I2Cmode –7% 7% I LowChargeCurrentSetting SetviaI2C 297 330 363 mA CHG-LOW K I = ISET K ProgrammableFastChargeCurrentFactor CHG 232.5 250 267.5 AΩ ISET R ISET V MaximumISETpinvoltage(inregulation) 0.42 V ISET R ISET- Shortcircuitresistancethreshold 45 55 75 Ω SHORT Pre-chargetofastchargethreshold Rising 2.9 3 3.1 V V LOWV HysteresisforV Batteryvoltagefalling 100 mV LOWV Ipre-chgisaprecentileofthe I Pr-chargecurrent(V <V <V ) 8 10 12 % PRECHG BATUVLO BAT LOWV externalfastchargesettings. Deglitchtimeforpre-chargetofastcharge t 32 ms DGL(LOWV) transition V BatteryUndervoltagelockoutthreshold V rising 2.37 2.5 2.63 V BAT_UVLO BAT BatteryUVLOhysteresis 200 mV V Tricklechargetopre-chargethreshold 1.9 2 2.1 V BATSHRT HysteresisforVBATSHRT Batteryvoltagefalling 100 mV Tricklechargemodechargecurrent(V < I BAT 25 35 50 mA BATSHRT V ) BATSHRT t Deglitchtimefortricklechargetopre-charge DGL(BATSH 256 us transition RT) TerminationCurrentThreshold TerminationcurrentonSAonly 10 %ICHG I TERM TerminationCurrentThresholdTolerance –10% 10% Bothrisingandfalling,2-mV t Deglitchtimeforchargetermination over-drive,t ,t =100 64 ms DGL(TERM) RISE FALL ns V Rechargethresholdvoltage BelowV 70 115 160 mV RCH BATREG V fallingbelowV ,t t Deglitchtime BAT RCH FALL 32 ms DGL(RCH) =100ns BATTERYDETECTION V BatteryDetectionHighRegulationVoltage SameasV V V BATREG_HI BATREG BATREG V V BATREG_L BatteryDetectionLowRegulationVoltage 360mVoffsetfromV BATREG V BATREG –480mV O V V Batterydetectioncomparator V =VBATREG_HI BATREG V BATDETHi BATREG –120mV V V Batterydetectioncomparator V =V BATREG V BATDETLO BATREG BATREG_LO +120mV Alwaysonduringbattery I BatteryDetectionCurrentSink 7.5 mA DETECT detection ForbothV and t Batterydetectiontime BATREG_HI 32 ms DETECT V BATREG_LO Tsafe SafetyTimerAccuracy –10% +10% Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com Electrical Characteristics (continued) V <V <V andV >V +V ,T =0ºC-125°CandT =25°Cfortypicalvalues(unlessotherwisenoted) UVLO IN OVP IN BAT SLP J J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT INPUTPROTECTION I =100mA 90 95 100 mA IN_LIMIT I =150mA 135 142.5 150 IN_LIMIT I =500mA 450 475 500 IN_LIMIT I =900mA 810 860 910 IN_LIMIT I Inputcurrentlimiting IN I =1500mA 1400 1475 1550 IN_LIMIT I =2000mA 1850 1950 2050 IN_LIMIT K I = ILIM I =External LIM IN_LIMIT R ILIM Maximuminputcurrentlimitprogrammablerange I 500 2000 mA LIM forINinput K MaximuminputcurrentfactorforINinput I =500mAto2.0A 240 270 300 AΩ ILIM LIM V MaximumILIMpinvoltage(inregulation) 0.42 V ILIM I /I RatiobetweeninputcurrentandtheILIMpin ExternalILIMcontrolorstand 540 A/A IN ILIM currentinexternalcontrolorstandalonemode alone R ILIM- Shortcircuitresistancethreshold 55 75 Ω SHORT SAmode 4.2 10 V thresholdrange IN_DPM I2Cmode 4.2 4.76 USB100,USB150,USB500, VIN_DPMthresholdforUSBInputinSAmode USB900,currentlimitselected. 4.27 4.36 4.45 V V AlsoI2Cregisterdefault. IN_DPM Mustsettoexternalresistor V V V thresholdwithadaptorcurrentlimitand IN_DPM IN_DPM IN_DPM settingsviatheEN1/EN2pins . V . VDPMshortedtoGND ortheI2Cregisterinterface. –2% IN_DPM +2% V thresholdAccuracy BothI2CandSAmode –2% 2% IN_DPM V DPMregulationvoltage Externalresistorsettingonly 1.15 1.2 1.25 V REF_DPM IfVDPMisshortedtoground, V VIN_DPMshortthreshold V thresholdwilluse 0.3 V DPM_SHRT IN_DPM internaldefaultvalue ICactivethresholdvoltage V rising 3.15 3.35 3.5 V IN V UVLO ICactivehysteresis V fallingfromaboveV 175 mV IN UVLO 2.0V≤V ≤V ,V Sleep-modeentrythreshold,V BAT BATREG IN 0 50 100 mV V IN-VBAT falling SLP Sleep-modeexithysteresis,V 2.0V≤V ≤V 40 100 160 mV IN-VBAT BAT BATREG Risingvoltage,2-mVover t DeglitchtimeforINrisingaboveVIN+VSLP_EXIT 32 ms DGL(SLP) drive,t =100ns RISE Input Input Input OVP InputsupplyOVPthresholdvoltage INrising OVP V VOVP –200mV OVP +200m V VOVPhysteresis INfallingfromV 100 mV OVP INrisingvoltage,t =100 t DeglitchtimeforINRisingaboveVOVP RISE 32 ms DGL(OVP) ns V thresholdoverV % BAT BATREG BatteryOVPthresholdvoltage toturnoffchargerduring 102.5 105 107.5 V BATRE charge G V BOVP % LowerlimitforV falling VBOVPhysteresis BAT 1 V fromaboveV BATRE BOVP G t BOVPDeglitch Batteryentering/exitingBOVP 1 ms DGL(BOVP) 12 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Electrical Characteristics (continued) V <V <V andV >V +V ,T =0ºC-125°CandT =25°Cfortypicalvalues(unlessotherwisenoted) UVLO IN OVP IN BAT SLP J J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT PWMCONVERTER MeasuredfromINtoPMID R InternalblockingMOSFETon-resistance 60 100 mΩ ON(BLK) (WCSP&QFN) MeasuredfromPMIDtoSW R Internalhigh-sideMOSFETon-resistance 100 150 mΩ ON(HS) (WCSP&QFN) MeasuredfromSWtoPGND R Internallow-sideMOSFETon-resistance 110 165 mΩ ON(LS) (WCSP&QFN) I Cycle-by-cyclecurrentlimit VSYSshorted 2.6 3.2 3.8 A CbC f Oscillatorfrequency 2.7 3 3.3 MHz OSC D Maximumdutycycle 95% MAX D Minimumdutycycle 0% MIN Thermaltrip 150 °C T SHTDWN Thermalhysteresis 10 Chargecurrentbeginstocut T Thermalregulationthreshold 125 REG off LDO(LINEARDROPOUT) bq24250 4.65 4.85 5.04 V LDOOutputVoltage V =5.5V,I =0to50mA V LDO IN LDO bq24251andbq24253 4.65 4.95 5.25 I MaximumLDOOutputCurrent 50 mA LDO V LDODropoutVoltage(V –V ) V =5.0V,I =50mA 200 300 mV DO IN LDO IN LDO BATTERY-PACKNTCMONITOR(1) V Hightemperaturethreshold V falling 29.6 30 30.4 HOT TS V Hysteresisonhighthreshold V rising 1 HYS(HOT) TS V Warmtemperaturethreshold V falling 37.9 38.3 38.7 WARM TS V HYS(WARM Hysteresisonwarmtemperaturethreshold V rising 1 TS ) V Cooltemperaturethreshold V rising 56.1 56.5 56.9 COOL TS %V V Hysteresisoncooltemperaturethreshold V falling 1 LDO HSY(COOL) TS V Lowtemperaturethreshold V rising 59.6 60 60.4 COLD TS V Hysteresisonlowthreshold V falling 1 HYS(COLD) TS V Freezetemperaturethreshold V rising 62 62.5 63 FRZ TS V Hysteresisonfreezethreshold V falling 1 HYS(FRZ) TS V TSdisablethreshold 70 73 TS_DIS t DeglitchtimeonTSchange 32 ms DGL(TS) INPUTS(EN1,EN2,EN2,CE,CE1,CE2,BATREG,SCL,SDA,DBP) V Inputhighthreshold 1 V IH V Inputlowthreshold 0.4 V IL STATUSOUTPUTS(CHG,PG,STAT,INT,BATRDY) V Low-leveloutputsaturationvoltage I =5mA,sinkcurrent 0.4 V OL O I High-levelleakagecurrent Hi-Zand5Vapplies 1 µA IH TIMERS 45minsafetytimer 2700 t 6hrsafetytimer 21600 s SAFETY 9hrsafetytimer 32400 t WATCH- Watchdogtimer 50 s DOG Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com Electrical Characteristics (continued) V <V <V andV >V +V ,T =0ºC-125°CandT =25°Cfortypicalvalues(unlessotherwisenoted) UVLO IN OVP IN BAT SLP J J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT D+/D–DETECTION I D+currentsourceforDCD DCD 7 13 µA DP_SRC R D–pull-downresistanceforDCD DCD 14.25 24.8 kΩ DM_DWN V D+lowcomparatorthresholdforDCD DCD 0.85 0.9 0.95 V DP_LOW V D+sourcevoltageforPrimaryDetection PrimaryDetection 0.5 0.6 0.7 V DP_SRC D+sourcevoltageoutputcurrentforPrimary I PrimaryDetection 200 µA DP_SRC_PD Detection I D–sinkcurrentforPrimaryDetection PrimaryDetection 50 100 150 µA DM_SINK V PrimaryDetectionthreshold PrimaryDetection 250 325 400 mV DAT_REF V PrimaryDetectionthreshold PrimaryDetection 0.85 0.9 0.95 V LGC V D-sourcevoltageforSecondaryDetection SecondaryDetection 0.5 0.6 0.7 V DM_SRC D-sourcevoltageoutputcurrentforSecondary I SecondaryDetection 200 µA DM_SRC_PD Detection I D+sinkcurrentforSecondaryDetection SecondaryDetection 50 100 150 µA DP_SINK V SecondaryDetectionthreshold SecondaryDetection 250 325 400 mV DAT_REF V Apple/TomTomdetectionlowthreshold Apple/TomTomDetection 1.8 1.85 1.975 V ATT_LO V Apple/TomTomdetectionhighthreshold Apple/TomTomDetection 3.2 3.5 3.8 V ATT_HI D–,switchopen 4.5 C InputCapacitance pF I D+,switchopen 4.5 D–,switchopen –1 1 I LeakageCurrentintoD+/D– µA D_LKG D+,switchopen –1 1 14 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 8.6 Typical Characteristics VBAT=3.8V VIN=5V VREG=4.2V VBAT=3.8V VIN=6V VREG=4.2V ICHG=0.5A ILIM=1A ICHG=1A ILIM=1A Figure1.BatteryDetection Figure2.BatteryRemoval 88 4.350 86 4.345 84 4.340 4.335 82 Efficiency(%) 778680 (V)VSYS-REG444...333223050 4.315 74 4.310 72 4.305 70 4.300 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 0.0 0.5 1.0 1.5 2.0 2.5 VBAT(V) C001 ISYS(A) C004 I =2A V =5V V =4.2V V =5V NoBattery I =2A CHG IN REG IN LIM V =4.2V ChargeDisable REG Figure3.EfficiencyvsBatteryVoltage Figure4.SystemVoltageRegulationvsLoadCurrent 100 100 95 95 90 90 85 85 %) 80 %) 80 ( ( y y nc 75 nc 75 e e Effici 70 Effici 70 65 65 60 VVIINN= = 55VV 60 VVIINN= = 55VV 55 VVIINN= = 77VV 55 VVIINN= = 77VV 50 VVIINN= = 1100VV 50 VVIINN= = 1100VV 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0 200 400 600 800 1000 1200 1400 1600 1800 2000 OutputCurrent(mA) C002 OutputCurrent(mA) C003 V =4.2V V =3.6V REG REG Figure5.EfficiencyvsOutputCurrent Figure6.EfficiencyvsOutputCurrent Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com Typical Characteristics (continued) 18 0.7 16 0.6 14 12 0.5 A)10 A) 0.4 ( 8 ( IBAT 6 IBAT0.3 4 0.2 2 0.1 0 ±2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VBAT(V) C007 VBAT(V) C010 V =0V SYSOFF=0 ChargeEnabled V =0V SYSOFF=1 ChargeEnabled IN IN BAT&SYSareShorted BAT&SYSareShorted Figure7.BATIQ,SYSOFF=0 Figure8.BATIQ,SYSOFF=1 20 500 CEEN 18 450 CEDIS 16 400 A)14 A) 350 m (12 ( 300 nt nt urre10 urre 250 C 8 C 200 ut ut Inp 6 Inp 150 4 100 2 50 0 0 0 5 10 15 20 25 0 5 10 15 20 25 InputVoltage(V) C008 InputVoltage(V) C009 ChargeENandDIS NoBatteryandSystem ChargeEN Hi-ZEN Figure9.InputIQWithChargeDISandEN Figure10.InputIQwithChargeEnableandHi-Z 2.5 3.0 2.5 2.0 2.0 1.5 1.5 %) %) y( 1.0 y( 1.0 c c a a ur 0.5 ur 0.5 c c c c A A 0.0 0.0 ±0.5 500mA 500mA ±0.5 1A ±1.0 1A 1.5A 1.5A ±1.0 ±1.5 0 10 20 30 40 50 60 70 80 90 100110120130 0 10 20 30 40 50 60 70 80 90 100110120130 Temperature(°C) C011 Temperature(°C) C012 V =3.3V V =5V V =4.2V V =3.8V V =5V V =4.2V BAT IN REG BAT IN REG I =2A I =2A LIM LIM Figure11.I AccuracywithInternalSettings,V =3.3V Figure12.I AccuracywithInternalSettings,V =3.8V CHG BAT CHG BAT 16 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Typical Characteristics (continued) 0.6 0.5 0.4 N M/II0.3 LI VI 0.2 0.1 RILIM = 257 (cid:159) RILIM = 140 (cid:159) 0.0 0.23 0.24 0.24 0.24 0.24 0.28 Input Current C013 V =3.9V V =10.5V BAT OVP I =1A I =1A CHG LIM Figure13.RatioBetweenVILIMandIINWithExternalILIM Figure14.InputOVPEventwithINT Control 9 Detailed Description 9.1 Overview The bq24250 is a highly-integrated, single-cell, Li-Ion battery charger with integrated current sense resistors targeted for space-limited, portable applications with high-capacity batteries. The single-cell charger has a single inputthatoperatesfromeitheraUSBportorACwalladapterforaversatilesolution. The bq24250 device has two modes of operation: 1) I2C mode, and 2) standalone mode. In I2C mode, the host adjusts the charge parameters and monitors the status of the charger operation. In standalone mode, the external resistor sets the input-current limit, and charge current limit. Standalone mode also serves as the default settings when a DCP adapter is present. It enters host mode while the I2C registers are accessed and the watchdog timer has not expired (if enabled). The battery is charged in four phases: trickle charge, pre-charge, constant current and constant voltage. In all charge phases, an internal control loop monitors the IC junction temperatureandreducesthechargecurrentiftheinternaltemperaturethresholdisexceeded. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 9.2 Functional Block Diagram PMID Q1 LDO LDO IN Charge Pump Q2 ILIM REF_CBCLIMV +_ CbC BOOT Comparator IAINm_LIpM VREF_INLIM +_ VDPM VREF_DPM +_ VAINm_DpPM LOOPPWSEMLECT Host COMPENSATION DRIVER SW + VDPM_DAC_ I2COnly VLDO Q3 TJ PGND 125C + MINSYS Amp _ + VREF_MINSYS + AICmHGp _ VSYSMIN ISET + VABAmTRpEG _ SYS _ComSlpeaerpator VREF_BATREG + VBAT+VSLP + VREF_ICHG VREF_TERM EENN21//DD-+ cDudD+rereIcenaconpnodtuddelteirDmr/-it RVefMeINreSYnSce CTeormmpRinaearactithooanrr+geComparator Q4 LDOBCaPutrrtreeDcnehttaeSrcgoteuOrcre + VBATREG–0.12V VBAT MINSYS SCL ICHGAmp BAT I2C VOUTMINComparator + SDA Controller + VOUT Charge Pump CHARGE CONTROLLER INT/PG MINSYSComparator + VSYS VMINSYS BATSHORTComparator STAT/CHG + VBAT VBATSHRT SupplementComparator + VSYS DISABLE VBAT VBSUP VLDO /CE + TS-10°C + TS0°C + TS10°C + TS45°C + TS60°C TS 18 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 9.3 Feature Description 9.3.1 ChargeProfile The bq2425x family provides a switch-mode buck regulator with output power path and a charge controller to provide optimum performance over the full battery charge cycle. The control loop for the buck regulator has 7 primaryfeedbackloopsthatcansetthedutycycle: 1. ConstantCurrent(CC) 2. ConstantVoltage(CV) 3. MinimumSystemVoltage(MINSYS) 4. InputCurrent(I ) ILIM 5. InputVoltage(V ) IN_DPM 6. DieTemperature 7. CyclebyCycleCurrent The feedback with the minimum duty cycle will be chosen as the active loop. The bq24250, 1, 3 support a precision Li-Ion or Li-Polymer charging system for single-cell applications. The Dynamic Power Path Management (DPPM) feature regulates the system voltage to a minimum of V , so that startup is enabled MINSYS even with a missing or deeply discharged battery. This provides a much better overall user experience in mobile applications. Figure 15 illustrates a typical charge profile while also demonstrating the minimum system output voltageregulation. Trickle Pre- CurrentRegulation VoltageRegulation Termination Charge charge Phase(CC) Phase(CV) VBATREG ICHG ICHG VMINSYS VSYS (3.5V) VBAT VLOWV VBATSHRT IPRECHG ITERM IBATSHRT Lineartrickle Linear Linear BATFETon-- PWMfastcharge BATFEToff charge Pre-charge fastcharger MINSYS BATREG SYSREG regulation regulation regulation Figure15. bq24250ChargeProfileandMinimumSystemOutputVoltageRegulation Figure 16 demonstrates a measured charge profile with the bq2425X while charging a 2700mAh Li-Ion battery at achargerateof1A. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com Feature Description (continued) 5.0 1.2 1.1 4.5 1.0 4.0 0.9 3.5 A) 0.8 ( V) 3.0 0.7 ent ( r e r g 2.5 0.6 u a C olt 2.0 0.5 ge V r 0.4 a 1.5 h VVBAT C BAT 0.3 1.0 VVSYS 0.2 SYS 0.5 0.1 IIBAT BAT 0.0 0.0 0 2k 4k 6k 8k 10k 12k 14k 16k Time(s) C005 I =1A CHG Figure16. bq24250ChargeProfilewhileCharginga2700-mAhBatteryata1AChargeRate Figure 17 illustrates the precharge behavior of the above charge profile by narrowing the time axis to 0 – 120 seconds. 3.7 1.2 1.1 3.5 1.0 0.9 ) A 3.3 0.8 ( V) 0.7 ent ( r e r g 3.1 0.6 u a C olt 0.5 ge V r 2.9 0.4 a h VVBAT C BAT 0.3 2.7 VVSYS 0.2 SYS 0.1 IIBAT BAT 2.5 0.0 0 20 40 60 80 100 120 Time(s) C006 I =1A CHG Figure17. bq24250ChargeProfileWhileCharginga2700-mAhBatteryata1AChargeDuringPrecharge 20 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Feature Description (continued) 9.3.2 EN1andEN2Pins The bq24250 is I2C and Stand Alone part. The EN1 and EN2 pins are available in this IC spin to support USB 2.0 compliance. These pins are used for Input Current Limit Configuration I. Set EN1 and EN2 to control the maximuminputcurrentandenableUSBcompliance.SeeTable1belowforprogrammingdetails. The bq24251 is also an I2C and Stand Alone part. The EN1 and EN2 are not available for this spin but the D+/D- are available to support the BC1.2 D+/D- Based Adapter Detection. It detects DCP, SDP, and CDP. Also it complies with the unconnected dead battery provision clause. D+ and D- pins are connected to the D+ and D- outputs of the USB port at power up. Also includes the detection of AppleTM and TomTomTM adapters where a 500mA input current limit is enabled. The /PG pin will remain high impedance state until the detection is completed. The bq24253 is only Stand Alone part. Both of the D+/D- and EN1/EN2 are available for this spin. During power up, the device checks first for the D+/D-. The EN1 and EN2 do not take effect until D+/D- detection routine is overandachangeonthestatusoftheEN1andEN2occurred. When the input current limit pins change state, the V threshold changes as well. See Table 1 for the IN_DPM detailedtruthtable: Table1.EN1andEN2TruthTable(1) EN2 EN1 InputCurrentLimit V Threshold IN_DPM 0 0 500mA 4.36V 0 1 ExternallyprogrammedbyILIM(upto2.0A) ExternallyprogrammedVDPM 1 0 100mA 4.36V 1 1 InputHi-Z None (1) USB3.0supportavailable.ContactyourlocalTIrepresentativefordetails. 9.3.3 ExternalSettings:ISET,ILIMandVIN_DPM Iftheexternalresistorsettingsareused,thefollowingequationscanbefollowedtoconfigurethechargesettings. Thefastchargecurrentresistor(R )canbesetbyusingthefollowingformula: ISET K 250 R = ISET = ISET I I FC FC (1) WhereI isthedesiredfastchargecurrentsettinginAmperes. FC Theinputcurrentlimitresistor(R )canbesetbyusingthefollowingformula: ILIM K 270 R = ILIM = ILIM I I IC IC (2) WhereI isthedesiredinputcurrentlimitinAmperes. IC Based on the application diagram reference designators, the resistor R1 and R2 can be calculated as follows to setV : IN_DPM R +R R +R V = V ´ 1 2 =1.2V´ 1 2 IN_DPM REF_DPM R R 2 2 (3) V should be chosen first along with R . Choosing R first will ensure that R will be greater than the IN_DPM 1 1 2 resistancechosen.ThisisthecasesinceV shouldbechosentobegreaterthan2xV . IN_DPM REF_DPM If external resistors are not desired in order to reduce the BOM count, the VDPM and the ILIM pins can be shorted to set the internal defaults. The ISET resistor must be connected in order to avoid an unstable charging state.NotethatfloatingtheILIMpinwillresultinzerochargecurrentiftheexternalISETisconfiguredviatheI2C register.Table2summarizesthesettingswhentheILIM,ISET,andV pinsareshortedtoGND: IN_DPM Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com Table2.ILIM,VDPM,andISETShortBehaviors PINSHORTED BEHAVIOR ILIM Inputcurrentlimit=2A VDPM V =4.68V IN_DPM ISET Fault—ChargingSuspended 9.3.4 BC1.2D+/D–Detection The bq24251 and the bq24253 include a fully BC1.2 compatible D+/D– source detection. This detection supports thefollowingtypesofports: • DCP(dedicatedchargeport) • CDP(chargingdownstreamport) • SDP(standarddownstreamport) • Apple™/TomTom™ports This D+/D– detection algorithm does not support ACA (accessory charge adapter) identification, but the input current will default to 500mA when a charge port is attached to the ACA and bq24251/3 is connected to the OTG port. The D+/D– detection algorithm is only active when the device is in standalone mode (e.g. the host is not communicating with the device and the watch dog timer has expired). However, when the device is in host mode (e.g. host is communicating via I2C to the device) writing a ‘1’ to register 0x04 bit location 4 (DPDM_EN) forces the device to perform a D+/D– detection. This allows the D+/D– detection to be enabled in both host mode and defaultmode.Thecurrentlimitwillnotbeimplementedinhostmode. As described previously, the bq24253 is only a Stand Alone part. Both of the D+/D- and EN1/EN2 are available for this spin. The below flow diagram illustrates the behavior of the bq24253 in D+/D- detection and the effect of the EN1/EN2. During power up, the device checks first for the D+/D-. The EN1 and EN2 do not take effect until D+/D-detectionroutineisoverandachangeonthestatusoftheEN1andEN2occurred. 22 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Battery or Input Is Inserted No VIN or VBAT Good? Yes Enable D+/D- Detection Algorithm Set SDP, CDP, DCP, or Non-Standard port settings EN1/EN2 Change State? No VIN < UVLO No Yes Yes EN1/EN2 Truth Table Becomes Active VIN < UVLO No Yes Figure18. bq24253D+/D-andEN1/EN2 TheD+/D– detectionalgorithmhas5primarystates.Thesestatesaretermedthefollowing: 1. DataContactDetect 2. PrimaryDetection 3. SecondaryDetection 4. Non-standardAdapterDetection(forApple™/TomTom™) 5. DetectionConfiguration The DCD state determines if the device has properly connected to the D+/D– lines. If the device is not in host mode and VBUS is inserted (or DPDM_EN is true) the device enters the DCD state and enable the appropriate algorithm. If the DCD timer expires, the device enters the Non-standard Adapter Detection (for Apple™ / TomTom™)state.OtherwiseitentersthePrimaryDetectionstate. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com When entering the Primary Detection state, the appropriate algorithm is enabled to determine whether to enter the secondary detection state for DCP and CDP or the secondary detection state for SDP/Non-Standard adaptors. The non-standard adapter detection state for Apple™ / TomTom™ tests for the unique conditions for these non- standard adapters. If the algorithm passes the unique conditions found with these adapters, it proceeds to the DetectionConfigurationstate.Otherwiseitrevertsbacktotheprimarydetectionstate. The secondary detection state determines whether the input port is a DCP, CDP, SDP, or other non-standard adapters. If the Primary Detection state indicated that the input port is either a DCP or CDP, the device enables the appropriate algorithm to differentiate between the two. If the Primary Detection state indicated that the input port is either a SDP or non-standard adapter, the device enables the appropriate algorithm to differentiate betweenthesetwoports.Oncecomplete,thedevicecontinuestotheDetectionConfigurationstate. DCP CDP SDP Non Settings Settings Settings Standard Adapter No Yes Yes VBAT> VBATGD? VBAT> VBATGD Turn on VDP_SRC No CLR_AVnDd Pkeise ps eitt oton ‘u1n’itnil I2C ATnudr kne oenp iVt DoPn_S uRnCtil CLR_VDPis set to‘1’ CDPand CDPand SDPand SDPand Apple/TT or DCP External ILIM weak battery good battery weak battery good battery Non-Standard Start 6 hr timer IILIM=100 mA IILIM=1500 mA IILIM=100 mA Hi-Z mode IILIM=0.5A Start 45 min timer Start 6 hr timer Start 45 min timer Start 6 hr timer Detection Done. Set detection status in register Figure19. DetectionConfigurationState The detection configuration state sets the input current limit of the device along with the charge timer. The exception to the CDP and the SDP settings are due to the Dead Battery Provision (DBP) clause for unconnected devices. This clause states that the device can pull a maximum of 100mA when not connected due to a dead battery. During the battery wakeup time, the device sources a voltage on the D+ pin in order to comply with the DBP clause. Once the battery is good, the system can clear the D+ pin voltage by writing a ‘1’ to address 0x07 bit position 4 (CLR_VDP). The device must connect to the host within 1sec of clearing the D+ pin voltage per the DPBclause. AsummaryoftheinputcurrentlimitsandtimerconfigurationsforeachchargeporttypearefoundinTable3. Table3.D+/D–DetectionResultsperChargePortType CHARGEPORTTYPE INPUTCURRENTLIMIT CHARGETIMER DCP ExternalILIM 6hours CDPDeadBattery 100mA 45minutes CDPGoodBattery 1500mA 6hours SDPDeadBattery 100mA 45minutes SDPGoodBattery Hi-Z N/A Non-Standard 500mA 6hours 24 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 9.3.5 TransientResponse The BQ24250/1/3 includes an advanced hybrid switch mode control architecture. When the device is regulating the charge current (fast-charge), a traditional voltage mode control loop is used with a Type-3 compensation network. However, the BQ24250/1/3 switches to a current mode control loop when the device enters voltage regulation. Voltage regulation occurs in three charging conditions: 1) Minimum system voltage regulation (battery below MINSYS), 2) Battery voltage regulation (I < I ), and 3) Charge Done (V = V + 3.5%). This BAT CHG SYS BAT architecture allows for superior transient performance when regulating the voltage due to the simplification of the compensation when using current mode control. The below transient response plot illustrates a 0A to 2A load step with 4.7ms full cycle and 12% duty cycle. A 3.9V Li-Ion battery is used. The input voltage is set to 5V, chargecurrentissetto0.5Aandtheinputcurrentislimitedto0.5A.Notethatahighlineimpedanceinputsupply wasusedtoindicatearealisticinputscenario(adapterandcable).ThisisillustratedbythechangeinV seenat IN theinputoftheIC. Figure 33 shows a ringing at both the input voltage and the input current. This is caused by the input current limit speedupcomparator. 9.3.6 AnyBootBatteryDetection The bq2425x family includes a sophisticated battery detection algorithm used to provide the system with the proper status of the battery connection. The AnyBoot battery algorithm also guarantees the detection of voltage basedbatteryprotectorsthatmayhavealongclosuretime(duetothehysteresisoftheprotectionswitchandthe cell capacity). The AnyBoot battery detection algorithm utilizes a dual-voltage based detection methodology where the system rail switches between two primary voltage levels. The period of the voltage level shift is 64ms andthereforethepowersupplyrejectionofthedown-systemelectronicsdetectsthisshiftasessentiallyDC. The AnyBoot algorithm has essentially 3 states. The 1st state is used to determine if the device has terminated with a battery attached. If it has terminated due to the battery not being present, then the algorithm moves to the 2nd and 3rd states. The 2nd and 3rd states shift the system voltage level between 4.2V and 3.72V. In each state there are comparator checks to determine if a battery has been inserted. The two states guarantees the detection of a battery even if the voltage of the cell is at the same level of the comparator thresholds. The algorithm will remain in states 2 and 3 until a battery has been inserted. The flow diagram details for the Anyboot algorithmareshowninFigure20. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com Enter Battery Detection BATREG = Vreg setting–480 mV No BATREVGBA+T1>20 mV? Yes 32 msTimer Expired? Yes reBgaisttteerry u Dpdeatetectde,d a, nSdT PATTM mode aborted (if enabled) No No 32 msTimer Expired? Yes BATREG = 4.2 V No Yes Yes Battery Detected, STAT VBAT< 4.08 V? 32 msTimer Expired? register updated and Exit Battery Detection No No 32msTimer Expired? Yes ONLYON FIRST LOOPITERATION “No Battery”Condition BATREG = 4.2 V Update STATRegisters and send Fault Pulse Yes Enter PTM mode Force PTM = 1? Exit Battery Detection No BATREG = 3.72 V No Yes Yes Battery Detected, STAT VBAT> 3.84 V? 32 msTimer Expired? register updated and Exit Battery Detection No No 32 msTimer Expired? Yes Figure20. AnyBootBatteryDetectionFlowDiagram 26 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 9.3.7 InputVoltageBasedDPM During normal charging process, if the input power source is not able to support the programmed or default charging current, the supply voltage deceases. Once the supply drops to VIN_DPM, the input current limit is reduced down to prevent the further drop of the supply. When the IC enters this mode, the charge current is lower than the set. This feature ensures IC compatibility with adapters with different current capabilities without a hardwarechange. 9.3.8 SleepMode The bq2425x enters the low-power sleep mode if the voltage on VIN falls below sleep-mode entry threshold, VBAT+VSLP, and VIN is higher than the under-voltage lockout threshold, VUVLO. This feature prevents draining the battery during the absence of VIN. When VIN < VBAT+VSLP, the bq2425x turns off the PWM converter, turns on the battery FET, sends a single 256µs pulse on the STAT and INT outputs and the FAULT/STAT bits of the status registers are updated in the I2C. Once VIN > VBAT+VSLP with the hysteresis, the FAULT bits are clearedandthedeviceinitiatesanewchargecycle. 9.3.9 InputOver-VoltageProtection The bq2425x provides over-voltage protection on the input that protects downstream circuitry. The built-in input over-voltage protection to protect the device and other components against damage from overvoltage on the input supply (Voltage from VIN to PGND). When VIN > VOVP, the bq2425x turns off the PWM converter, turns on the battery FET, sends a single 256μs pulse on the STAT and INT outputs and the FAULT/STAT bits of the status registers and the battery/supply status registers are updated in the I2C. Once the OVP fault is removed, the FAULT bits are cleared and the device returns to normal operation. The OVP threshold for the bq24250 is programmablefrom6.5Vto10.5VusingVOVPbitsinregister#7. 9.3.10 NTCMonitor The bq24250/1/3 includes the integration of an NTC monitor pin that complies with the JEITA specification (PSE alsoavailableuponrequest).ThevoltagebasedNTCmonitorallowsfortheuseofanyNTCresistorwiththeuse ofthecircuitshowninFigure21. LDO R2 TS NTC R3 Figure21. VoltageBasedNTCCircuit The use of R3 is only necessary when the NTC does not have a beta near 3500K. When deviating from this beta, error will be introduced in the actual temperature trip thresholds. The trip thresholds are summarized below whicharetypicalvaluesprovidedinthespecificationtable. Table4.RatiometricTSTripThresholdsforJEITACompliantCharging TSTHRESHOLDS V /V TS LDO V 30.0% HOT V 38.3% WARM V 56.5% COOL V 60% COLD Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com When sizing for R2 and R3, it is best to solve two simultaneous equations that ensure the temperature profile of the NTC network will cross the V and V thresholds. The accuracy of the V and V thresholds will HOT COLD WARM COOL dependonthebetaofthechosenNTCresistor.Thetwosimultaneousequationsareshownbelow: æ R R ö ç 3 NTC TCOLD ÷ çR +R ÷ %V = è 3 NTC TCOLD ø ´100 COLD æ R R ö ç 3 NTC TCOLD ÷+R2 çR +R ÷ è 3 NTC TCOLD ø æ R R ö ç 3 NTC THOT ÷ çR +R ÷ %V = è 3 NTC THOT ø ´100 HOT æ R R ö ç 3 NTC THOT ÷+R2 çR +R ÷ è 3 NTC THOT ø (4) WheretheNTCresistanceattheV andV temperaturesmustberesolvedasfollows: HOT COLD ( ) b 1 -1 R =R e TCOLD To NTC TCOLD o ( ) β 1 -1 R =R e THOT To NTC THOT o (5) To be JEITA compliant, T must be 0°C and T must be 60°C. If an NTC resistor is chosen such that the COLD HOT beta is 4000K and the nominal resistance is 10kΩ, the following R2 and R3 values result from the above equations: R =5kΩ 2 R =9.82kΩ 3 Figure22illustratesthetemperatureprofileoftheNTCnetworkwithR2andR3settotheabovevalues. Example NTC Network Profile of %LDO vs.TEMP 60 Tcool 55 %) 50 nt ( e erc 45 P O D L 40 Twarm 35 30 0 10 20 30 40 50 60 Temperature (C) Figure22. VoltageBasedNTCCircuitTemperatureProfile For JEITA compliance, the T and T levels are to be 10°C and 45°C respectively. However, there is COOL WARM some error due to the variation in beta from 3500K. As shown above, the actual temperature points at which the NTC network crosses the V and V are 13°C and 47°C respectively. This error is small but should be COOL WARM consideredwhenchoosingthefinalNTCresistor. 28 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Once the resistors are configured, the internal JEITA algorithm will apply the below profile at each trip point for battery voltage regulation and charge current regulation. In order to ensure continuation of the charge process when an almost-full battery stops charging due to a cold temperature fault, it is recommended that a CE toggle is doneontheI2CorCEpin. 4.10Vmax ProgrammedVBAT_REG 4.06Vtyp NoCharge NoCharge ProgrammedICHG (1C) 0.5C NoCharge NoCharge TS_DIS VCOLD VCOOL VWARM VHOT Figure23. JEITAProfileforVoltageandCurrentRegulationLoops 9.3.11 ProductionTestMode To aid in end mobile device product manufacturing, the bq2425x includes a Production Test Mode (PTM), where the device is essentially a DC-DC buck converter. In this mode the input current limit to the charger is disabled and the output current limit is limited only by the inductor cycle-by-cycle current (e.g. 3.5A). The PTM mode can be used to test systems with high transient loads such as GSM transmission without the need of a battery being present. As a means of safety, the Anyboot algorithm will determine if a battery is not present at the output prior to enabling the PTM mode. If a battery is present and the software attempts to enter PTM mode, the device will not enablePTMmode. 9.3.12 SafetyTimer At the beginning of charging process, the bq24250/1/3 starts the safety timer. This timer is active during the entire charging process. If charging has not terminated before the safety timer expires, the IC enters suspend mode where charging is disabled. The safety timer time is selectable using the I2C interface. A single 256μs pulse is sent on the STAT and INT outputs and the FAULT/ bits of the status registers are updated in the I2C. This function prevents continuous charging of a defective battery if the host fails to reset the safety timer. When 2xTMR_EN bit is set to “1”, the safety timer runs at a rate 2x slower than normal (the timer is extended) under thefollowingconditions: • Pre-chargeorlinearmode(minimumsystemvoltagemode), • Duringthermalregulationwherethechargecurrentisreduced, • DuringTSfaultwherethe chargecurrentisreducedduetotemperatureriseonthebattery,inputcurrentlimit The safety timer is suspended during OVP, TS fault where charge is disabled, thermal shut down, and sleep mode.RemovingthebatterycausesthesafetytimertoberesetandNOThalted/paused. 9.3.13 WatchdogTimer In addition to the safety timer, the bq24250/1 contains a 50-second watchdog timer that monitors the host through the I2C interface. Once a write is performed on the I2C interface, a watchdog timer is reset and started. The watchdog timer can be disabled by writing “0” on WD_EN bit of register #1. Writing “1” on that bit enables andresetsthetimer. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com If the watchdog timer expires, the IC enters DEFAULT mode where the default charge parameters are loaded and charging continues. The I2C may be accessed again to re-initialize the desired values and restart the watchdogtimeraslongasthesafetytimerhasnotexpired.Oncethesafetytimerexpires,chargingisdisabled. 9.3.14 FaultModes The bq2425x family includes several hardware fault detections. This allows for specific conditions that could cause a safety concern to be detected. With this feature, the host can be alleviated from monitoring unsafe charging conditions and also allows for a “fail-safe” if the host is not present. The table below summarizes the faultsthataredetectedandtheresultingbehavior. FAULTCONDITION CHARGERBEHAVIOR SAFETYTIMERBEHAVIOR InputOVP VSYSandICHGDisabled Suspended InputUVLO VSYSandICHGDisabled Reset Sleep(VIN<VBAT) VSYSandICHGDisabled Suspended TSFault(BatterOverTemp) VSYSActiveandICHGDisabled Suspended ThermalShutdown VSYSandICHGDisabled Suspended TimerFault VSYSActiveandICHGDisabled Reset NoBattery VSYSActiveandICHGDisabled Suspended ISETShort VSYSActiveandICHGDisabled Suspended InputFault&LDOLow VSYSandICHGDisabled Suspended 9.3.15 DynamicPowerPathManagement The bq24250/1/3 features a SYS output that powers the external system load connected to the battery. This output is active whenever a valid source is connected to IN or BAT. The following discusses the behavior of SYS withasourceconnectedtothesupplyorabatterysourceonly. When a valid input source is connected to the input and the charge is enabled, the charge cycle is initiated. In case of VBAT > ~3.5V, the SYS output is connected to VBAT. If the SYS voltage falls to VMINSYS, it is regulated to the VSYSREG threshold to maintain the system output even with a deeply discharged or absent battery. In this mode, the SYS output voltage is regulated by the buck converter and the battery FET is linearly regulated to regulate the charge current into the battery. The current from the supply is shared between charging thebatteryandpoweringthesystemloadatSYS. The dynamic power path management (DPPM) circuitry of the bq24250/1/3 monitors the current limits continuously and if the SYS voltage falls to the VMINSYS voltage, it adjusts charge current to maintain the minimum system voltage and supply the load on SYS. If the charge current is reduced to zero and the load increasesfurther,thebq24250/1/3entersbatterysupplementmode.Duringsupplementmode,thebatteryFETis turnedonandthebatterysupplementsthesystemload. If the battery is ever 5% above the regulation threshold, the battery OVP circuit shuts the PWM converter off and the battery FET is turned on to discharge the battery to safe operating levels. Battery OVP FAULT is shown in theI2CFAULTregisters. When no input source is available at the input and the battery is connected, the battery FET is turned on similar to supplement mode. The battery must be above VBATUVLO threshold to turn on the SYS output. In this mode, the current is not regulated; however, there is a short circuit current limit. If the short circuit limit is reached, the batteryFETisturnedoffforthedeglitchtime.Afterthedeglitchtime,thebatteryFETisturnedontotestandsee if the short has been removed. If it has not, the FET turns off and the process repeats until the short is removed. ThisprocessistoprotecttheinternalFETfromovercurrent. 30 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 9.4 Device Functional Modes 9.4.1 I2COperation(HostMode/DefaultMode) There are two primary modes of operation when interacting with the charge parameters of the bq24250 and bq24251 chargers: 1) Host mode operation where the I2C registers set the charge parameters, and 2) Default modewheretheregisterdefaultssetthechargeparameters. Figure24illustratesthebehaviorofthebq24250whentransitioningbetweenhostmodeandstandalonemode: Battery or Input is Inserted No V or V GOOD? IN BAT Yes ILIM=EN1/EN2 No I2C command received? VDPM=External Default ISET=External Default Yes ILIM=Register Value VDPM=Register Value ISET=Register Value No Yes 50s Watchdog Expired? Host Mode Figure24. HostModeandStandAloneModeHandoff Once the battery or input is inserted and above the good thresholds, the device determines if an I2C command hasbeenreceivedinordertodiscernwhethertooperatefromtheI2Cregistersortheinternalregisterdefaults.In stand-alonemodetheinputcurrentlimitissetbytheEN1/EN2pins.Ifthewatchdogtimerisenabled,thedevice willenterstandaloneoperationoncethewatchdogtimerexpiresandre-initiatethedefaultchargesettings. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 9.5 Programming 9.5.1 SerialInterfaceDescription The bq2425x uses an I2C compatible interface to program charge parameters. I2C ™ is a 2-wire serial interface developed by NXP (formerly Philips Semiconductor, see I2C-Bus Specification, Version 5, October 2012). The bus consists of a data line (SDA) and a clock line (SCL) with pull-up structures. When the bus is idle, both SDA and SCL lines are pulled high. All the I2C compatible devices connect to the I2C bus through open drain I/O pins, SDA and SCL. A master device, usually a microcontroller or a digital signal processor, controls the bus. The master is responsible for generating the SCL signal and device addresses. The master also generates specific conditions that indicate the START and STOP of data transfer. A slave device receives and/or transmits data on thebusundercontrolofthemasterdevice. The bq2425x device works as a slave and supports the following data transfer modes, as defined in the I2C Bus™ Specification: standard mode (100 kbps) and fast mode (400 kbps). The interface adds flexibility to the battery charge solution, enabling most functions to be programmed to new values depending on the instantaneousapplicationrequirements.TheI2CcircuitryispoweredfromINwhenasupplyisconnected. The data transfer protocol for standard and fast modes is exactly the same; therefore, they are referred to as the F/S-mode in this document. The bq24250/1 device only supports 7-bit addressing. The device 7-bit address is definedas‘1101010’(0x6Ah). To avoid I2C hang-ups, a timer (t ) runs during I2C transactions. If the transaction takes longer than I2CRESET t , any additional commands are ignored and the I2C engine is reset. The timeout is reset with START I2CRESET andrepeatedSTARTconditionsandstopswhenavalidSTOPconditionissent. 9.5.1.1 F/SModeProtocol The master initiates data transfer by generating a start condition. The start condition is when a high-to-low transition occurs on the SDA line while SCL is high, as shown in Figure 25. All I2C -compatible devices should recognizeastartcondition. DATA CLK S P START Condition STOPCondition Figure25. STARTandSTOPCondition The master then generates the SCL pulses, and transmits the 7-bit address and the read/write direction bit R/W on the SDA line. During all transmissions, the master ensures that data is valid. A valid data condition requires the SDA line to be stable during the entire high period of the clock pulse (see Figure 26). All devices recognize the address sent by the master and compare it to their internal fixed addresses. Only the slave device with a matching address generates an acknowledge (see Figure 27) by pulling the SDA line low during the entire high periodoftheninthSCLcycle.Upondetectingthisacknowledge,themasterknowsthatcommunicationlinkwitha slavehasbeenestablished. DATA CLK Data Line Change Stable; of Data Data Valid Allowed Figure26. BitTransferontheSerialInterface 32 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Programming (continued) The master generates further SCL cycles to either transmit data to the slave (R/W bit 0) or receive data from the slave (R/W bit 1). In either case, the receiver needs to acknowledge the data sent by the transmitter. So an acknowledge signal can either be generated by the master or by the slave, depending on which one is the receiver. The 9-bit valid data sequences consisting of 8-bit data and 1-bit acknowledge can continue as long as necessary. To signal the end of the data transfer, the master generates a stop condition by pulling the SDA line from low to high while the SCL line is high (see Figure 25). This releases the bus and stops the communication link with the addressed slave. All I2C compatible devices must recognize the stop condition. Upon the receipt of a stop condition, all devices know that the bus is released, and wait for a start condition followed by a matching address. If a transaction is terminated prematurely, the master needs to send a STOP condition to prevent the slave I2C logic from remaining in a incorrect state. Attempting to read data from register addresses not listed in thissectionwillresultin0xFFhbeingreadout. Data Output by Transmitter NotAcknowledge Data Output by Receiver Acknowledge SCLFrom 1 2 8 9 Master Clock Pulse for START Acknowledgement Condition Figure27. AcknowledgeontheI2CBus Recognize START or Recognize STOPor REPEATED START REPEATED START Condition Condition GenerateACKNOWLEDGE Signal P SDA MSB Acknowledgement Sr Signal From Slave Address R/W SCL S Sr or ACK ACK or Sr P Figure28. BusProtocol Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 9.6 Register Maps 9.6.1 Register#1 Memorylocation:00,Resetstate:x0xxxxxx BIT NAME READ/WRITE FUNCTION Read:0–Nofault B7(MSB) WD_FAULT Readonly 1–WDtimeoutifWDenabled 0–Disable B6 WD_EN Read/Write 1–Enable(alsoresetsWDtimer) B5 STAT_1 Readonly 00–Ready 01–Chargeinprogress B4 STAT_0 Readonly 10–Chargedone 11–Fault B3 FAULT_3 Readonly 0000–Normal 0001–InputOVP B2 FAULT_2 Readonly 0010–InputUVLO B1 FAULT_1 Readonly 0011–Sleep 0100–BatteryTemperature(TS)Fault 0101–BatteryOVP 0110–ThermalShutdown B0(LSB) FAULT_0 Readonly 0111–TimerFault 1000–NoBatteryconnected 1001–ISETshort 1010–InputFaultandLDOlow • WD_FAULT – ‘0’ indicates no watch dog fault has occurred, where a ‘1’ indicates a fault has previously occurred. • WD_EN – Enables or disables the internal watch dog timer. A ‘1’ enables the watch dog timer and a ‘0’ disablesit.'1'isdefaultforbq24251only. • STAT –Indicatesthechargecontrollerstatus. • FAULT – Indicates the faults that have occurred. If multiple faults occurred, they can be read by sequentially addressing this register (e.g. reading the register 2 or more times). Once all faults have been read and the device is in a non-fault state, the fault register will show “Normal”. Regarding the "Input Fault & LDO Low" the IC indicates this if LDO is low and at the same time the input is below UVLO or coming out of UVLO with LDOstilllow. 34 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 9.6.2 Register#2 Memorylocation:01,Resetstate:xxxx1100 BIT NAME READ/WRITE FUNCTION Write: B7(MSB) Reset Writeonly 1–Resetallregisterstodefaultvalues 0–Noeffect B6 I Read/Write 000–USB2.0hostwith100mAcurrentlimit IN_ILIMIT_2 001–USB3.0hostwith150mAcurrentlimit B5 I Read/Write IN_ILIMIT_1 010–USB2.0hostwith500mAcurrentlimit 011–USB3.0hostwith900mAcurrentlimit 100–Chargerwith1500mAcurrentlimit B4 IIN_ILIMIT_0 Read/Write 101–Chargerwith2000mAcurrentlimit 110–ExternalILIMcurrentlimit 111-Noinputcurrentlimitwithinternalclampat3A(PTMMODE) 0–DisableSTATfunction B3 EN_STAT Read/Write 1–EnableSTATfunction 0–Disablechargetermination B2 EN_TERM Read/Write 1–Enablechargetermination 0–Chargingisenabled B1 CE Read/Write 1–Chargingisdisabled 0–Nothighimpedancemode B0(LSB) HZ_MODE Read/Write 1–Highimpedancemode • I –Setstheinputcurrentlimitlevel.Wheninhostmodethisregistersetstheregulationlevel.However, IN_LIMIT when in standalone mode (e.g. no I2C writes have occurred after power up or the WD timer has expired) the externalresistorsettingforI setstheregulationlevel. ILIM • EN_STAT – Enables and disables the STAT pin. When set to a ‘1’ the STAT pin is enabled and function normally.Whensettoa ‘0’theSTATpinisdisabledandtheopendrainFETisinHiZmode. • EN_TERM – Enables and disables the termination function in the charge controller. When set to a ‘1’ the termination function will be enabled. When set to a ‘0’ the termination function will be disabled. When terminationisdisabled,therearenoindicationsofthechargerterminating(i.e.STATpinorSTATregisters). • CE – The charge enable bit which enables or disables the charge function. When set to a ‘0’, the charger operates normally. When set to a ‘1’, the charger is disables by turning off the BAT FET between SYS and BAT.TheSYSpincontinuestostayactiveviatheswitchmodecontrollerifaninputispresent. • HZ_MODE – Sets the charger IC into low power standby mode. When set to a ‘1’, the switch mode controller is disabled but the BAT FET remains ON to keep the system powered. When set to a ‘0’, the charger operatesnormally. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 35 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 9.6.3 Register#3 Memorylocation:02,Resetstate:10001111 BIT NAME READ/WRITE FUNCTION B7(MSB) VBATREG_5(1) Read/Write BatteryRegulationVoltage:640mV(default1) B6 VBATREG_4(1) Read/Write BatteryRegulationVoltage:320mV(default0) B5 VBATREG_3(1) Read/Write BatteryRegulationVoltage:160mV(default0) B4 VBATREG_2(1) Read/Write BatteryRegulationVoltage:80mV(default0) B3 VBATREG_1(1) Read/Write BatteryRegulationVoltage:40mV(default1) B2 VBATREG_0(1) Read/Write BatteryRegulationVoltage:20mV(default1) B1(4)(5) USB_DET_1/EN2 ReadOnly ReturnUSBdetectionresultorpinEN2/EN1status– 00–DCPdetected/EN2=0,EN1=0 01–CDPdetected/EN2=0,EN1=1 B0(LSB) USB_DET_0/EN1 ReadOnly 10–SDPdetected/EN2=1,EN1=0 11–Apple/TTornon-standardadaptordetected/EN2=1,EN1=1 (1) Chargevoltagerangeis3.5V—4.44Vwiththeoffsetof3.5Vandstepof20mV(default4.2V) • V –Setsthebatteryregulationvoltage BATREG • USB_DET/EN – Provides status of the D+/D– detection-results for spins that include the D+/D– pins or the stateofEN1/EN2forspinsthatincludetheEN1/EN2pins 9.6.4 Register#4 Memorylocation:03,Resetstate:11111000 BIT NAME READ/WRITE FUNCTION Chargecurrent B7(MSB) ICHG_4(1)(2) Read/Write 800mA–(default1) Chargecurrent: B6 ICHG_3(1) (2) Read/Write 400mA–(default1) Chargecurrent: B5 ICHG_2(1) (2) Read/Write 200mA–(default1) Chargecurrent: B4 ICHG_1(1) (2) Read/Write 100mA–(default1) Chargecurrent: B3 ICHG_0(1) (2) Read/Write 50mA–(default1) B2 ITERM_2(3) Read/Write Terminationcurrentsensethreshold:100mA(default0) B1 ITERM_1(3) Read/Write Terminationcurrentsensethreshold:50mA(default0) B0(LSB) ITERM_0(3) Read/Write Terminationcurrentsensethreshold:25mA(default0) (1) Chargecurrentoffsetis500mAanddefaultchargecurrentisexternal(maximumis2.0A) (2) Whenallbitsare1’s,itisexternalISETchargingmode (3) Terminationthresholdvoltageoffsetis50mA.Thedefaultterminationcurrentis50mAifthechargeisselectedfromI2C.Otherwise, terminationissetto10%ofICHGinexternalI_setmodewith+/-10%accuracy. • I –Setsthechargecurrentregulation CHG • I –Setsthecurrentlevelatwhichthechargerwillterminate TERM 36 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 9.6.5 Register#5 Memorylocation:04,Resetstate:xx00x010 BIT NAME READ/WRITE FUNCTION B7(MSB) LOOP_STATUS1(1) ReadOnly 00–Noloopisactivethatslowsdowntimer 01–V regulationloopisactive IN_DPM B6 LOOP_STATUS0(1) ReadOnly 10–Inputcurrentlimitloopisactive 11–Thermalregulationloopisactive 0–Normalchargecurrentsetby03h B5 LOW_CHG Read/Write 1–Lowchargecurrentsetting330mA(default0) 0–Bitreturnsto0afterD+/D–detectionisperformed B4 DPDM_EN Read/Write 1–ForceD+/D–detection(default0) 0–CElow B3 CE_STATUS ReadOnly 1–CEhigh B2 V (2) Read/Write InputV voltage:320mV(default0) INDPM_2 IN-DPM B1 V (2) Read/Write InputV voltage:160mV(default1) INDPM_1 IN-DPM B0(LSB) V (2) Read/Write InputV voltage:80mV(default0) INDPM_0 IN-DPM (1) LOOP_STATUSbitsshowifthereareanyloopisactivethatslowdownthesafetytimer.Ifastatusoccurs,thesebitsannouncethe statusanddonotclearuntilread.Ifmorethanoneoccurs,thefirstoneisshown. (2) VIN-DPMvoltageoffsetis4.20VanddefaultV thresholdis4.36V. IN_DPM • LOOP_STATUS – Provides the status of the active regulation loop. The charge controller allows for only one loopcanregulateatatime. • LOW_CHG – When set to a ‘1’, the charge current is reduced 330mA independent of the charge current settinginregister0x03.Whensetto ‘0’,thechargecurrentissetbyregister0x03. • DPDM_EN – Forces a D+/D- detection routine to be executed once a ‘1’ is written. This is independent of the inputbeingsupplied. • CE_STATUS – Provides the status of the CE pin level. If the CE pin is forced high, this bit returns a ‘1’. If the CEpinisforcedlow,thisbitreturnsa ‘0’. • V –SetstheinputVDPMlevel. INDPM Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 37 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 9.6.6 Register#6 Memorylocation:05,Resetstate:101x1xxx BIT NAME READ/WRITE FUNCTION 0–Timernotslowedatanytime B7(MSB) 2XTMR_EN Read/Write 1–Timerslowedby2xwheninthermalregulation,V orDPPM(default1) IN_DPM B6 TMR_1 Read/Write SafetyTimerTimeLimit 00–0.75hourfastcharge 01–6hourfastcharge(default01) B5 TMR_2 Read/Write 10–9hourfastcharge 11–Disablesafetytimers 0–SYSOFFdisabled B4 SYSOFF Read/Write 1–SYSOFFenabled 0–TSfunctiondisabled B3 TS_EN Read/Write 1–TSfunctionenabled(default1) B2 TS_STAT2 Readonly TSFaultMode: 000–Normal,NoTSfault B1 TS_STAT1 Readonly 001–TStemp>T (ChargingsuspendedforJEITAandStandardTS) HOT 010–T <TStemp<T (RegulationvoltageisreducedforJEITAstandard) WARM HOT 011–T <TStemp<T (ChargecurrentisreducedforJEITAstandard) COLD COOL 100–TStemp<T (ChargingsuspendedforJEITAandStandardTS) COLD B0(LSB) TS_STAT0 Readonly 101–T <TStemp<T (Chargingat3.9Vand100mAandonlyforPSEoption FREEZE COLD only) 110–TStemp<T (ChargingsuspendedforPSEoptiononly) FREEZE 111–TSopen(TSdisabled) • 2xTMR_EN – When set to a ‘1’, the 2x Timer function is enabled and allows for the timer to be extended if a conditionoccurswherethechargecurrentisreduced(i.e.V ,thermalregulation,etc.).Whensettoa ‘0’, IN_DPM this function is disabled and the normal timer will always be executed independent of the current reduce conditions. • SYSOFF –Whensettoa ‘1’andtheinputisremoved,theinternalbatteryFETisturnedoffinordertoreduce the leakage from the BAT pin to less than 1µA. Note that this disconnects the battery from the system. When settoa‘0’,thisfunctionisdisabled. • TS_EN – Enables and disables the TS function. When set to a ‘0’ the TS function is disabled otherwise it is enabled.OnlyappliestospinsthathaveaTSpin. • TS_STAT – Provides status of the TS pin state for versions that have a TS pin. “100” indicates the TS temp < T and charging suspended for JEITA Standard. In order to ensure continuation of the charge process COLD when an almost-full battery stops charging due to a cold temperature fault, it is recommended that a CE toggleisdoneontheI2CorCEpin. 38 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 9.6.7 Register#7 Memorylocation:06,Resetstate:11100000 BIT NAME READ/WRITE FUNCTION B7(MSB) VOVP_2 Read/Write OVPvoltage: B6 VOVP_1 Read/Write 000–6.0V;001–6.5V;010–7.0V;011–8.0V 100–9.0V;101–9.5V;110–10.0V;111–10.5V B5 VOVP_0 Read/Write 0–KeepD+voltagesourceonduringDBPcharging B4 CLR_VDP Read/Write 1–TurnoffD+voltagesourcetoreleaseD+line FORCE_BAT 0–EnterthebatterydetectionroutineonlyifTERMistrueorForcePTMistrue B3 Read/Write DET 1–Enterthebatterydetectionroutine 0–PTMmodeisdisabled B2 FORCE_PTM Read/Write 1–PTMmodeisenabled B1 N/A Read/Write Notavailable.Keepsetto0. B0(LSB) N/A Read/Write Notavailable.Keepsetto0. • VOVP– SetstheOVPlevel • CLR_VDP – When the D+/D– detection has finished, some cases require the D+ pin to force a voltage of 0.6V. This bit allows the system to clear the voltage prior to any communication on the D+/D– pins. A ‘1’ clearsthevoltageattheD+pinifpresent. • FORCE_BATDET – Forces battery detection and provides status of the battery presence. A logic ‘1’ enables thisfunction. • FORCE_PTM – Puts the device in production test mode (PTM) where the input current limit is disabled. Note that a battery must not be present prior to using this function. Otherwise the function will not be allowed to execute.Alogic‘1’enablesthePTMfunction. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 39 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 10.1 Application Information The bq2425x devices are high-efficiency switched-mode chargers. The device has integrated power FETs that are able to charge at up to a 2-A charging rate, and an integrated 50-mA LDO. In I2C mode (bq24250/1), the device has programmable battery charge voltage (VBATREG), charge current (ICHG), input current limit (ILIM), and input over-voltage protection threshold (VOVP). The charge current and the input current limit are programmed using external resistors (RISET and RILIM) connected from the ISET and ILIM pins to ground. The range of these resistors can be found in the datasheet. Both of these currents can be programmed up to 2 A. The device also has complete system-level protection such as input under-voltage lockout (UVLO), input over- voltage protection (OVP), battery OVP, sleep mode, thermal regulation and thermal shutdown, voltage-based NTCmonitoringinput,andsafetytimers. 10.2 Typical Application CPMID 1 µF PMID LO IN SW 1.0PH VBUS System Load D- CIN D+ 2.2 µF R1 CBOOT GND VDPM 3 MHz 33nF PWM R2 BOOT PGND D- SYS D+ 22(cid:29)F VSYS LDO 1PF BAT /PG 1(cid:29)F LDO VGPIO R3 TS TEMP PACK+ SCL SCL R4 RNTC SDA SDA PACK- Host GPIO1 STAT GPIO2 /CE ILIM ISET Figure29. bq24251TypicalApplicationCircuit 40 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 Typical Application (continued) 10.2.1 DesignRequirements Use the following typical application design procedure to select external components values for the bq24251 device. Table5.DesignParameters SPECIFICATION TESTCONDITION MIN TYP MAX UNIT InputDCvoltage,VIN Recommendedinputvoltagerange 4.35 10.5 V Inputcurrent Recommendedinputcurrentrange 2 A Chargecurrent Fastchargecurrentrange 0.5 2 A Outputregulationvoltage StandalonemodeorI2Cdefaultmode 4.2 V I2Chostmode:operatinginvoltageregulation, Outputregulationvoltage 3.5 4.44 V programmablerange LDO LDOoutputvoltage 4.9 V 10.2.2 DetailedDesignProcedure 10.2.2.1 InductorSelection Theinductorselectiondependsontheapplicationrequirements.Thebq24250isdesignedtooperateataround1 µH. The value will have an effect on efficiency, and the ripple requirements, stability of the charger, package size,andDCRoftheinductor.The1μHinductorprovidesagoodtradeoffbetweensizeandefficiencyandripple. Once the inductance has been selected, the peak current is needed in order to choose the saturation current rating of the inductor. Make sure that the saturation current is always greater than or equal to the calculated IPEAK.Thefollowingequationcanbeusedtocalculatethecurrentripple: ΔI ={VBAT(VIN–VBAT)}/(VINxƒsxL) (6) L Thenusecurrentrippletocalculatethepeakcurrentasfollows: I =Loadx(1+ΔI /2) (7) PEAK L In this design example, the regulation voltage is set to 4.2V, the input voltage is 5V and the inductance is selected to be 1µH. The maximum charge current that can be used in this application is 1A and can be set by I2C command. The peak current is needed in order to choose the saturation current rating of the inductor. Using equation 6 and 7, ΔI is calculated to be 0.224A and the inductor peak current is 1.112A. A 1µF BAT cap is L neededand22µFSYScapisneededonthesystemtrace. The default settings for external fast charge current and external setting of current limit are chosen to be IFC=500mAandILIM=1A.RISETandRILIMneedtobecalculatedusingequation1and2inthedatasheet. Thefastchargecurrentresistor(RISET)canbesetasfollows: RISET=250/0.5A=500Ω Theinputcurrentlimitresistor(RILIM)canbesetasfollows: RILIM=270/1A=270Ω TheexternalsettingsofVIN_DPMcanbedesignedbycalculatingR1andR2accordingtoequation3inthisdata sheet and the typical application circuit. VIN_DPM should be chosen first along with R1. VIN_DPM is chosen to be 4.48V and R1 is set to 274KΩ in this design example. Using equation 3, the value of R2 is calculated to be 100KΩ. Inthisdesignexample,theapplicationneedstobeJEITAcompliant.Thus,T mustbe0°CandT mustbe COLD HOT 60°C. If an NTC resistor is chosen such that the beta is 4500K and the nominal resistance is 13KΩ, the calculated R3 and R4 values are 5KΩ and 8.8KΩ respectively. These results are obtained from equation 4 and 5 inthisdatasheet. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 41 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 10.2.3 ApplicationCurves V =3.8V I =1A V =3.6V I =2A V =4.36V BAT CHG BAT CHG DPM I =0A I =1.5A I =0A I =0.5A SYS LIM SYS LIM Figure30.Startup Figure31.V Startup,4.2V DPM V =3.3V I =1A V =5.2V BAT CHG IN I =0A SYS Figure32.1.0µHCCMOperation Figure33.2-ALoadStepTransient 42 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 11 Power Supply Recommendations Thedevicesaredesignedtooperatefromaninputvoltagerangebetween4.35Vand10.5V.Thisinputsupply mustbewellregulated.Iftheinputsupplyislocatedmorethanafewinchesfromthebq24250charger, additionalbulkcapacitancemayberequiredinadditiontotheceramicbypasscapacitors. 12 Layout 12.1 Layout Guidelines 1. PlacetheBOOT,PMID,IN,BAT,andLDOcapacitorsascloseaspossibletotheICforoptimalperformance. 2. Connect the inductor as close as possible to the SW pin, and the SYS/CSIN cap as close as possible to the inductorminimizingnoiseinthepath. 3. Place a 1-μF PMID capacitor as close as possible to the PMID and PGND pins, making the high frequency currentloopareaassmallaspossible. 4. The local bypass capacitor from SYS/CSIN to GND must be connected between the SYS/CSIN pin and PGND of the IC. This minimizes the current path loop area from the SW pin through the LC filter and back to thePGNDpin. 5. Place all decoupling capacitors close to their respective IC pins and as close as possible to PGND (do not place components such that routing interrupts power-stage currents). All small control signals must be routed awayfromthehigh-currentpaths. 6. To reduce noise coupling, use a ground plane if possible, to isolate the noisy traces from spreading its noise allovertheboard.PutviasinsidethePGNDpadsfortheIC. 7. The high-current charge paths into IN, Micro-USB, BAT, SYS/CSIN, and from the SW pins must be sized appropriatelyforthemaximumchargecurrenttoavoidvoltagedropsinthesetraces. 8. For high-current applications, the balls for the power paths must be connected to as much copper in the board as possible. This allows better thermal performance because the board conducts heat away from the IC. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 43 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 12.2 Layout Example Figure34. Recommendedbq2425xPCBLayoutforDSBGAPackage 44 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 12.3 Thermal Considerations During the charging process, to prevent overheat of the chip, bq24250/1/3 monitors the junction temperature, T , J of the die and begins to taper down the charge current once T reaches the thermal regulation threshold, TREG. J ThechargecurrentisreducedwhenthejunctiontemperatureincreasesaboveTREG.Oncethechargecurrentis reduced, the system current is reduced while the battery supplements the load to supply the system. This may cause a thermal shutdown of the IC if the die temperature rises too. At any state, if T exceeds TSHTDWN, J bq2425x suspends charging and disables the buck converter. During thermal shutdown mode, PWM is turned off, all safety timers are suspended, and a single 256μs pulse is sent on the STAT and INT outputs and the FAULT/STATbitsofthestatusregistersareupdatedintheI2C.AnewchargingcyclebeginswhenT fallsbelow J TSHTDWNbyapproximately10°C. Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 45 ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 www.ti.com 13 Device and Documentation Support 13.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table6.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY bq24250 Clickhere Clickhere Clickhere Clickhere Clickhere bq24251 Clickhere Clickhere Clickhere Clickhere Clickhere bq24253 Clickhere Clickhere Clickhere Clickhere Clickhere 13.2 Trademarks Alltrademarksarethepropertyoftheirrespectiveowners. 13.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 13.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 46 SubmitDocumentationFeedback Copyright©2012–2015,TexasInstrumentsIncorporated ProductFolderLinks:bq24250 bq24251 bq24253

bq24251: Not Recommended For New Designs bq24250,bq24251,bq24253 www.ti.com SLUSBA1H–OCTOBER2012–REVISEDAUGUST2015 14.1 Package Summary YFF Package YFF Package Symbol (Top View) (Top Side Symbol for bq2425x) A1 A2 A3 A4 A5 B1 B2 B3 B4 B5 TI YMLLLLS C1 C2 C3 C4 C5 bq24250 D D1 D2 D3 D4 D5 E1 E2 E3 E4 E5 F1 F2 F3 F4 F5 E TI YMLLLLS bq24251 TI YMLLLLS bq24253 0-PinA1 Marker, TI-TI Letters,YM-Year Month Date Code, LLLL-Lot Trace Code,S-Assembly Site Code Copyright©2012–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 47 ProductFolderLinks:bq24250 bq24251 bq24253

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) BQ24250RGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR BQ24250 & no Sb/Br) BQ24250RGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR BQ24250 & no Sb/Br) BQ24250YFFR ACTIVE DSBGA YFF 30 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 BQ24250 & no Sb/Br) BQ24250YFFT ACTIVE DSBGA YFF 30 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 BQ24250 & no Sb/Br) BQ24251RGER NRND VQFN RGE 24 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ24251 & no Sb/Br) BQ24251RGET NRND VQFN RGE 24 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ24251 & no Sb/Br) BQ24251YFFR NRND DSBGA YFF 30 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 BQ24251 & no Sb/Br) BQ24251YFFT NRND DSBGA YFF 30 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 BQ24251 & no Sb/Br) BQ24253RGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ24253 & no Sb/Br) BQ24253RGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ24253 & no Sb/Br) BQ24253YFFR ACTIVE DSBGA YFF 30 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 BQ24253 & no Sb/Br) BQ24253YFFT ACTIVE DSBGA YFF 30 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 BQ24253 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) BQ24250RGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 BQ24250RGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 BQ24250YFFR DSBGA YFF 30 3000 180.0 8.4 2.09 2.59 0.78 4.0 8.0 Q1 BQ24250YFFT DSBGA YFF 30 250 180.0 8.4 2.09 2.59 0.78 4.0 8.0 Q1 BQ24251RGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 BQ24251RGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 BQ24251YFFR DSBGA YFF 30 3000 180.0 8.4 2.09 2.59 0.78 4.0 8.0 Q1 BQ24251YFFT DSBGA YFF 30 250 180.0 8.4 2.09 2.59 0.78 4.0 8.0 Q1 BQ24253RGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 BQ24253RGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 BQ24253YFFR DSBGA YFF 30 3000 180.0 8.4 2.09 2.59 0.78 4.0 8.0 Q1 BQ24253YFFT DSBGA YFF 30 250 180.0 8.4 2.09 2.59 0.78 4.0 8.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) BQ24250RGER VQFN RGE 24 3000 367.0 367.0 35.0 BQ24250RGET VQFN RGE 24 250 210.0 185.0 35.0 BQ24250YFFR DSBGA YFF 30 3000 182.0 182.0 20.0 BQ24250YFFT DSBGA YFF 30 250 182.0 182.0 20.0 BQ24251RGER VQFN RGE 24 3000 367.0 367.0 35.0 BQ24251RGET VQFN RGE 24 250 210.0 185.0 35.0 BQ24251YFFR DSBGA YFF 30 3000 182.0 182.0 20.0 BQ24251YFFT DSBGA YFF 30 250 182.0 182.0 20.0 BQ24253RGER VQFN RGE 24 3000 367.0 367.0 35.0 BQ24253RGET VQFN RGE 24 250 210.0 185.0 35.0 BQ24253YFFR DSBGA YFF 30 3000 182.0 182.0 20.0 BQ24253YFFT DSBGA YFF 30 250 182.0 182.0 20.0 PackMaterials-Page2

GENERIC PACKAGE VIEW RGE 24 VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4204104/H

PACKAGEOUTLINE RGE0024H VQFN- 1mmmaxheight PLASTICQUADFLATPACK-NOLEAD A 4.1 B 3.9 4.1 PIN1INDEXAREA 3.9 1MAX C SEATINGPLANE 0.05 0.00 0.08 C (cid:3)(cid:3)(cid:3)(cid:3)(cid:21)(cid:17)(cid:26)(cid:147)(cid:19)(cid:17)(cid:20) 2X2.5 (0.2)TYP 7 12 20X0.5 6 13 2X 25 SYMM 2.5 1 18 0.30 PIN1ID 24X 0.18 (OPTIONAL) 24 19 0.1 C A B SYMM 0.48 0.05 C 24X 0.28 4219016 A 082017 NOTES: 1. Alllineardimensionsareinmillimeters.Anydimensionsinparenthesisareforreferenceonly.Dimensioningandtolerancing perASMEY14.5M. 2. Thisdrawingissubjecttochangewithoutnotice. 3. Thepackagethermalpadmustbesolderedtotheprintedcircuitboardforthermalandmechanicalperformance. www.ti.com

EXAMPLEBOARDLAYOUT RGE0024H VQFN- 1mmmaxheight PLASTICQUADFLATPACK-NOLEAD (3.825) (2.7) 24 19 24X(0.58) 24X(0.24) 1 18 20X(0.5) 25 SYMM (3.825) 2X (cid:11)(cid:145)(cid:19)(cid:17)(cid:21)(cid:12)(cid:3)(cid:57)(cid:44)(cid:36) (1.1) TYP 6 13 (R0.05) 7 12 2X(1.1) SYMM LANDPATTERNEXAMPLE SCALE:20X 0.07MAX 0.07MIN ALLAROUND METAL ALLAROUND SOLDERMASK OPENING SOLDERMASK METALUNDER OPENING SOLDERMASK NONSOLDERMASK DEFINED SOLDERMASK (PREFERRED) DEFINED SOLDERMASKDETAILS 4219016 A 082017 NOTES:(continued) 4. Thispackageisdesignedtobesolderedtoathermalpadontheboard.Formoreinformation,seeTexasInstruments literaturenumber SLUA271(www.ti.comlitslua271) . 5. Soldermasktolerancesbetweenandaroundsignalpadscanvarybasedonboardfabricationsite. www.ti.com

EXAMPLESTENCILDESIGN RGE0024H VQFN- 1mmmaxheight PLASTICQUADFLATPACK-NOLEAD (3.825) 4X(1.188) 24 19 24X(0.58) 24X(0.24) 1 18 20X(0.5) SYMM (3.825) (0.694) TYP 6 13 (R0.05)TYP 25 METAL TYP 7 12 (0.694) TYP SYMM SOLDERPASTEEXAMPLE BASEDON0.125mmTHICKSTENCIL EXPOSEDPAD 78PRINTEDCOVERAGEBYAREA SCALE:20X 4219016 A 082017 NOTES:(continued) 6. Lasercuttingapertureswithtrapezoidalwallsandroundedcornersmayofferbetterpasterelease.IPC-7525mayhavealternate designrecommendations.. www.ti.com

PACKAGE OUTLINE YFF0030 DSBGA - 0.625 mm max height SCALE 4.500 DIE SIZE BALL GRID ARRAY B E A BUMP A1 CORNER D C 0.625 MAX SEATING PLANE BALL TYP 0.30 0.05 C 0.12 1.6 TYP SYMM F D: Max = 2.418 mm, Min =2 .357 mm E E: Max = 2.018 mm, Min =1 .957 mm D SYMM 2 TYP C B A 0.4 TYP 1 2 3 4 5 30X 0.3 0.4 TYP 0.2 0.015 C A B 4219433/A 03/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT YFF0030 DSBGA - 0.625 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 30X ( 0.23) 1 2 3 4 5 A (0.4) TYP B C SYMM D E F SYMM LAND PATTERN EXAMPLE SCALE:25X ( 0.23) 0.05 MAX 0.05 MIN ( 0.23) METAL SOLDER MASK OPENING SOLDER MASK METAL UNDER OPENING SOLDER MASK NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219433/A 03/2016 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com

EXAMPLE STENCIL DESIGN YFF0030 DSBGA - 0.625 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP (R0.05) TYP 30X ( 0.25) 1 2 3 4 5 A (0.4) TYP B METAL TYP C SYMM D E F SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:30X 4219433/A 03/2016 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

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