Atmel AT42QT1040 Four-key QTouch® Touch Sensor IC DATASHEET Features  Number of QTouch® Keys:  Up to four  Discrete Outputs:  Four discrete outputs indicating individual key touch  Technology:  Patented spread-spectrum charge-transfer (direct mode)  Electrode Design:  Simple self-capacitance style (refer to the Touch Sensors Design Guide)  Electrode Materials:  Etched copper, silver, carbon, Indium Tin Oxide (ITO)  Electrode Substrates:  PCB, FPCB, plastic films, glass  Panel Materials:  Plastic, glass, composites, painted surfaces (low particle density metallic paints possible)  Panel Thickness:  Up to 10mm glass, 5mm plastic (electrode size dependent)  Key Sensitivity:  Fixed key threshold, sensitivity adjusted via sample capacitor value  Adjacent Key Suppression  Patented Adjacent Key Suppression® (AKS®) technology to enable accurate key detection  Interface:  Pin-per-key outputs, plus debug mode to observe sensor signals  Moisture Tolerance:  Increased moisture tolerance based on hardware design and firmware tuning  Signal Processing:  Self-calibration, auto drift compensation, noise filtering  Applications:  Mobile, consumer, white goods, toys, kiosks, POS, and so on  Power:  1.8V –5.5V  Package:  20-pin 3x3mm VQFN RoHS compliant 9524D–AT42–05/2013

1. Pinout and Schematic 1.1 Pinout Configuration 2 K 3 S S N C C C N S N N N S 20 19 18 17 16 SNS2 1 15 SNSK3 SNSK1 2 14 OUT2 SNS1 3 QT1040 13 OUT3 SNSK0 4 12 OUT1 SNS0 5 11 OUT0 6 7 8 9 10 C C S D C N N S D N V V AT42QT1040 [DATASHEET] 2 9524D–AT42–05/2013

1.2 Pin Descriptions Table 1-1. Pin Listing Pin Name Type Function Notes If Unused... 1 SNS2 I/O Sense pin To Cs2 Leave open To Cs1 and option resistor + Connect to option 2 SNSK1 I/O Sense pin and option detect key resistor* 3 SNS1 I/O Sense pin To Cs1 Leave open To Cs0 and option resistor + Connect to option 4 SNSK0 I/O Sense pin and option detect key resistor* 5 SNS0 I/O Sense pin To Cs0 Leave open 6 N/C – – – 7 N/C – – – 8 Vss P Supply ground – 9 Vdd P Power – 10 N/C – – – Alternative function: Debug 11 OUT0 OD Out 0 Leave open CLK Alternative function: Debug 12 OUT1 OD Out 1 Leave open DATA 13 OUT3 OD Out 3 Leave open 14 OUT2 OD Out 2 Leave open 15 SNSK3 I/O Sense pin To Cs3 + key Leave open 16 SNS3 I/O Sense pin To Cs3 Leave open 17 N/C – – – 18 N/C – – – 19 N/C – – – 20 SNSK2 I/O Sense pin To Cs2 + key Leave open * Option resistor should always be fitted even if channel is unused and Cs capacitor is not fixed. I/O CMOS input and output OD CMOS open drain output P Ground or power AT42QT1040 [DATASHEET] 3 9524D–AT42–05/2013

1.3 Schematic Figure 1-1. Typical Circuit NOTES: VUNREG VREG 1) The central pad on the underside of the VQFN chip is a Vss pin and should be connected to ground. Do not put any other tracks underneath the body of the chip. 2) It is important to place all Cs and Rs components physically near to the chip. Creg Creg VDD J1 1 Freoclloomwm reegnudleadto vr amluaensu ffoarc tiunrpeurt's GND Add a 100 nF capacitor close to pin 9. RAKS 2 ON and output bypass capacitors (Creg). OFF VDD 3 AKS SELECT D3 D2 D1 D0 VDD J2 LE LE LE LE 1 FAST RFS 2 9 3 SLOW RL0 11 OUT0 VDD SPEED SELECT RL1 12 OUT1 RL2 14 OUT2 SNSK0 4 Rs0 Key0 RL3 13 5 Cs0 OUT3 SNS0 Example use of output pins J3 SNSK1 2 Rs1 Key1 5 3 Cs1 5 SNS1 4 4 QT1040 3 3 SNSK2 20 Rs2 Key2 2 6 1 Cs2 2 N/C SNS2 1 7 1 N/C 10 N/C SNSK3 15 Rs3 Key3 17 16 Cs3 N/C SNS3 18 N/C 19 N/C VSS 8 Suggested regulator manufacturers:  Torex (XC6215 series)  Seiko (S817 series)  BCDSemi (AP2121 series) For component values in Figure 1-1 check the following sections:  Section 3.1 on page 7: Cs capacitors (Cs0 – Cs3)  Section 3.5 on page 7: Voltage levels  Section 3.3 on page 7: LED traces AT42QT1040 [DATASHEET] 4 9524D–AT42–05/2013

2. Overview of the AT42QT1040 2.1 Introduction The AT42QT1040 (QT1040) is a digital burst mode charge-transfer (QT™) capacitive sensor driver designed for touch-key applications. The device can sense from one to four keys; one to three keys can be disabled by not installing their respective sense capacitors. Any of the four channels can be disabled in this way. The device includes all signal processing functions necessary to provide stable sensing under a wide variety of changing conditions, and the outputs are fully de-bounced. Only a few external parts are required for operation. The QT1040 modulates its bursts in a spread-spectrum fashion in order to heavily suppress the effects of external noise, and to suppress RF emissions. 2.2 Signal Processing 2.2.1 Detect Threshold The internal signal threshold level is fixed at 10 counts of change with respect to the internal reference level. This in turn adjusts itself slowly in accordance with the drift compensation mechanism. See Section 3.1 on page 7 for details on how to adjust the sensitivity of each key. When going out of detect there is a hysteresis element to the detection. The signal threshold must drop below 8 counts of change with respect to the internal reference level to register as un-touched. 2.2.2 Detection Integrator The device features a detection integration mechanism, which acts to confirm a detection in a robust fashion. A per- key counter is incremented each time the key has exceeded its threshold, and a key is only finally declared to be touched when this counter reaches a fixed limit of 5. In other words, the device has to exceed its threshold, and stay there for 5 acquisitions in succession without going below the threshold level, before the key is declared to be touched. 2.2.3 Burst Length Limitations Burst length is the number of times the charge transfer process is performed on a given channel; that is, the number of pulses it takes to measure the key capacitance. The maximum burst length is 2048 pulses. The recommended design is to use a capacitor that gives a signal of <1000 pulses. Longer bursts take more time and use more power. Note that the keys are independent of each other. It is therefore possible, for example, to have a signal of 100 on one key and a signal of 1000 on another. Refer to Application Note QTAN0002, Secrets of a Successful QTouch Design (downloadable from the Atmel website), for more information on using a scope to measure the pulses and hence determine the burst length. Refer also to the Touch Sensors Design Guide. 2.2.4 Adjacent Key Suppression Technology The device includes the Atmel-patented Adjacent Key Suppression (AKS) technology, to allow the use of tightly spaced keys on a keypad with no loss of selectability by the user. There is one global AKS group, implemented so that only one key in the group may be reported as being touched at any one time. The use of AKS is selected by connecting a 1M resistor between Vdd and the SNSK0 pin (see Section 4.1 on page 9 for more information). When AKS is disabled, any combinations of keys can enter detect. AT42QT1040 [DATASHEET] 5 9524D–AT42–05/2013

2.2.5 Auto Drift Compensation Signal drift can occur because of changes in Cx and Cs over time. It is crucial that drift be compensated for, otherwise false detections, non-detections, and sensitivity shifts will follow. Drift compensation is performed by making the reference level track the raw signal at a slow rate, but only while there is no detection in effect. The rate of adjustment must be performed slowly otherwise legitimate detections could be ignored. Once an object is sensed and a key is in detect, the drift compensation mechanism ceases, since the signal is legitimately high and should not therefore cause the reference level to change. The QT1040 drift compensation is asymmetric, that is, the reference level drift-compensates in one direction faster than it does in the other. Specifically, it compensates faster for decreasing (towards touch) signals than for increasing (away from touch) signals. The reason for this difference in compensation rates is that increasing signals should not be compensated for quickly, since a nearby finger could be compensated for partially or entirely before even approaching the sense electrode. However, decreasing signals need to be compensated for more quickly. For example, an obstruction over the sense pad (for which the sensor has already made full allowance) could suddenly be removed, leaving the sensor with an artificially elevated reference level and thus become insensitive to touch. In this latter case, the sensor will compensate for the object's removal very quickly, usually in only a few seconds. Negative drift (that is, towards touch) occurs at a rate of ~3 seconds, while positive drift occurs at a rate of ~1second. Drifting only occurs when no keys are in detect state. 2.2.6 Response Time The QT1040 response time is highly dependent on run mode and burst length, which in turn is dependent on Cs and Cx. With increasing Cs, response time slows, while increasing levels of Cx reduce response time. The response time will also be slower in slow mode due to a longer time between burst measurements. This mode offers an increased detection latency in favor of reduced average current consumption. 2.2.7 Spread Spectrum The QT1040 modulates its internal oscillator by ±7.5% during the measurement burst. This spreads the generated noise over a wider band reducing emission levels. This also reduces susceptibility since there is no longer a single fundamental burst frequency. 2.2.8 Max On-duration If an object or material obstructs the sense pad, the signal may rise enough to create a detection, preventing further operation. To prevent this, the sensor includes a timer known as the Max On-duration feature which monitors detections. If a detection exceeds the timer setting, the sensor performs an automatic recalibration. Max On-duration is set to ~30s. AT42QT1040 [DATASHEET] 6 9524D–AT42–05/2013

3. Wiring and Parts 3.1 Cs Sample Capacitors Cs0–Cs3 are the charge sensing sample capacitors; normally they are identical in nominal value. The optimal Cs values depend on the corresponding keys electrode design, the thickness of the panel and its dielectric constant. Thicker panels require larger values of Cs. Values can be in the range 2.2nF (for faster operation) to 22nF (for best sensitivity); typical values are 4.7nF to 10nF. The value of Cs should be chosen such that a light touch on a key mounted in a production unit or a prototype panel causes a reliable detection. The chosen Cs value should never be so large that the key signals exceed ~1000, as reported by the chip in the debug data. The Cs capacitors must be X7R or PPS film type, for stability. For consistent sensitivity, they should have a 10% tolerance. Twenty percent tolerance may cause small differences in sensitivity from key to key and unit to unit. If a key is not used, the Cs capacitor may be omitted. 3.2 Rs Resistors The series resistors Rs0–Rs3 are in line with the electrode connections (close to the QT1040 chip) and are used to limit electrostatic discharge (ESD) currents and to suppress radio frequency (RF) interference. A typical value is 4.7k, but up to 20k can be used if it is found to be of benefit. Although these resistors may be omitted, the device may become susceptible to external noise or radio frequency interference (RFI). For details on how to select these resistors refer to Application Note QTAN0002, Secrets of a Successful QTouch Design, and the Touch Sensors Design Guide, both downloadable from the Touch Technology area of the Atmel website, www.atmel.com. 3.3 LED Traces and Other Switching Signals For advice on LEDs and nearby traces, refer to Application Note QTAN0002, Secrets of a Successful QTouch Design, and the Touch Sensors Design Guide, both downloadable from the Touch Technology area of Atmel’s website, www.atmel.com. 3.4 PCB Cleanliness Modern no-clean flux is generally compatible with capacitive sensing circuits. CAUTION: If a PCB is reworked to correct soldering faults relating to the device, or to any associated traces or components, be sure that you fully understand the nature of the flux used during the rework process. Leakage currents from hygroscopic ionic residues can stop capacitive sensors from functioning. If you have any doubts, a thorough cleaning after rework may be the only safe option. 3.5 Power Supply See Section 5.2 on page 15 for the power supply range. If the power supply fluctuates slowly with temperature, the device tracks and compensates for these changes automatically with only minor changes in sensitivity. If the supply voltage drifts or shifts quickly, the drift compensation mechanism is not able to keep up, causing sensitivity anomalies or false detections. The usual power supply considerations with QT parts apply to the device. The power should be clean and come from a separate regulator if possible. However, this device is designed to minimize the effects of unstable power, and except in extreme conditions should not require a separate Low Dropout (LDO) regulator. AT42QT1040 [DATASHEET] 7 9524D–AT42–05/2013

See under Figure 1.3 on page 4 for suggested regulator manufacturers. Caution: A regulator IC shared with other logic can result in erratic operation and is not advised. A single ceramic 0.1µF bypass capacitor, with short traces, should be placed very close to the power pins of the IC. Failure to do so can result in device oscillation, high current consumption, erratic operation, and so on. It is assumed that a larger bypass capacitor (for example, 1µF) is somewhere else in the power circuit; for example, near the regulator. To assist with transient regulator stability problems, the QT1040 waits 500µs any time it wakes up from a sleep state (that is, in Sleep mode) before acquiring, to allow Vdd to fully stabilize. 3.6 VQFN Package Restrictions The central pad on the underside of the VQFN chip should be connected to ground. Do not run any tracks underneath the body of the chip, only ground. Figure 3-1 shows an example of good/bad tracking. Figure 3-1. Examples of Good and Bad Tracking Example of GOOD tracking Example of BAD tracking AT42QT1040 [DATASHEET] 8 9524D–AT42–05/2013

4. Detailed Operations 4.1 Adjacent Key Suppression The use of AKS is selected by the connection of a 1M resistor (RAKS resistor) between the SNSK0 pin and either Vdd (AKS mode on) or Vss (AKS mode off). Table 4-1. RAKS Resistor RAKS Connected To... Mode Vdd AKS on Vss AKS off The RAKS resistor should always be connected to either Vdd or Vss and should not be changed during operation of the device. Note: Changing the RAKS option will affect the sensitivity of the particular key. Always check that the sensitivity is suitable after a change. Retune Cs0 if necessary. 4.2 Discrete Outputs There are four discrete outputs (channels 0 to 3), located on pins OUT0 to OUT3. An output pin goes active when the corresponding key is touched. The outputs are open-drain type and are active-low. On the OUT2 pin there is a ~500 ns low pulse occurring approximately 20ms after a power-up/reset (see Figure 4-1 for an example oscilloscope trace of this pulse at two zoom levels). This pulse may need to be considered from the system design perspective. The discrete outputs have sufficient current sinking capability to directly drive LEDs. Try to limit the sink current to less than 5mA per output and be cautious if connecting LEDs to a power supply other than Vdd; if the LED supply is higher than Vdd it may cause erratic behavior of the QT1040 and back-power the QT1040 through its I/O pins. AT42QT1040 [DATASHEET] 9 9524D–AT42–05/2013

Figure 4-1. ~500 ns Pulse On OUT2 Pin SNS0K OUT2 Power-on/ ~20 ms Pulse onOUT2 Reset SNS0K OUT2 4.3 Speed Selection Speed selection is determined by a 1M resistor (RFS resistor) connected between SNSK1 and either Vdd (Fast Mode) or Vss (Slow Mode). Table 4-2. RFS Resistor RFS Connected To Mode Vdd Fast mode Vss Slow mode In Fast Mode, the device sleeps for 16ms between burst acquisitions. In Slow Mode, the device sleeps for 64ms between acquisitions. Hence, Slow Mode conserves more power but results in slightly less responsiveness. Note: The RFS resistor should always be connected to either Vdd or Vss and not changed during operation of the device. Changing the RFS option will affect the sensitivity of the particular key. Always check that the sensitivity is suitable after a change. Retune Cs1 if necessary. 4.4 Moisture Tolerance The presence of water (condensation, sweat, spilt water, and so on) on a sensor can alter the signal values measured and thereby affect the performance of any capacitive device. The moisture tolerance of QTouch devices can be improved by designing the hardware and fine-tuning the firmware following the recommendations in the application note Atmel AVR3002: Moisture Tolerant QTouch Design (www.atmel.com/Images/doc42017.pdf). AT42QT1040 [DATASHEET] 10 9524D–AT42–05/2013

4.5 Calibration Calibration is the process by which the sensor chip assesses the background capacitance on each channel. During calibration, a number of samples are taken in quick succession to get a baseline for the channel reference value. Calibration takes place ~50ms after power is applied to the device. Calibration also occurs if the Max On-duration is exceeded or a positive re-calibration occurs. 4.6 Debug Mode An added feature to this device is a debug option whereby internal parameters from the IC can be clocked out and monitored externally. Debug mode is entered by shorting the CS3 capacitor (SNSK3 and SNS3 pins) on power-up and removing the short within 5 seconds. Note: If the short is not removed within 5 seconds, debug mode is still entered, but with Channel 3 unusable until a re-calibration occurs. Note that as Channel 3 will show as being in detect, a recalibration will occur after Max On-duration (~30 seconds). Debug CLK pin (OUT0) and Debug Data pin (OUT1) float while debug data is not being output and are driven outputs once debug output starts (that is, not open drain). The serial data is clocked out at a rate of ~200kHz, MSB first, as in Table 4-3. Table 4-3. Serial Data Output Byte Purpose Notes 0 Frame Number Framing index number 0-255 Upper nibble: major revision 1 Chip Version Lower nibble: minor revision 2 Reference 0 Low Byte Unsigned 16-bit integer 3 Reference 0 High Byte 4 Reference 1 Low Byte Unsigned 16-bit integer 5 Reference 1 High Byte 6 Reference 2 Low Byte Unsigned 16-bit integer 7 Reference 2 High Byte 8 Reference 3 Low Byte Unsigned 16-bit integer 9 Reference 3 High Byte 10 Signal 0 Low Byte Unsigned 16-bit integer 11 Signal 0 High Byte 12 Signal 1 Low Byte Unsigned 16-bit integer 13 Signal 1 High Byte 14 Signal 2 Low Byte Unsigned 16-bit integer 15 Signal 2 High Byte 16 Signal 3 Low Byte Unsigned 16-bit integer 17 Signal 3 High Byte AT42QT1040 [DATASHEET] 11 9524D–AT42–05/2013

Table 4-3. Serial Data Output (Continued) Byte Purpose Notes 18 Delta 0 Low Byte Signed 16-bit integer 19 Delta 0 High Byte 20 Delta 1 Low Byte Signed 16-bit integer 21 Delta 1 High Byte 22 Delta 2 Low Byte Signed 16-bit integer 23 Delta 2 High Byte 24 Delta 3 Low Byte Signed 16-bit integer 25 Delta 3 High Byte 26 Flags Various operational flags 27 Flags2 Unsigned bytes 28 Status Byte Unsigned byte. See Table 4-4 Repeat of framing index number in 29 Frame Number byte 0 Table 4-4. Status Byte (Byte 28) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 CAL Number of Keys (2–4) Key 3 Key 2 Key 1 Key 0 Bit 7: This bit is set during calibration Bits 4 – 6: Contains the number of keys active Bits 0 – 3: Show the touch status of the corresponding keys Figure 4-2 to Figure 4-5 show the usefulness of the debug data out feature. Channels can be monitored and tweaked to the specific application with great accuracy. AT42QT1040 [DATASHEET] 12 9524D–AT42–05/2013

Figure 4-2. Byte Clocked Out (~5µs Period) Figure 4-3. Byte Following Byte (~ 30µs Period) Figure 4-4. Full Debug Send (30 Bytes) AT42QT1040 [DATASHEET] 13 9524D–AT42–05/2013

Figure 4-5. Debug Lines Floating Between Debug Data Sends (30 Bytes, ~2ms to Send) AT42QT1040 [DATASHEET] 14 9524D–AT42–05/2013

5. Specifications 5.1 Absolute Maximum Specifications Vdd –0.5 to +6.0V Max continuous pin current, any control or drive pin ±10mA Voltage forced onto any pin –0.5V to (Vdd + 0.5) V CAUTION: Stresses beyond those listed under Absolute Maximum Specifications may cause permanent damage the device. This is a stress rating only and functional operation of the device at these or other conditions beyo those indicated in the operational sections of this specification is not implied. Exposure to absolute maximu specification conditions for extended periods may affect device reliability 5.2 Recommended Operating Conditions Operating temperature –40°C to +85°C Storage temperature –55°C to +125°C Vdd 1.8V to 5.5V Supply ripple+noise ±20mV maximum Cx capacitance per key 2 to 20pF 5.3 DC Specifications Vdd = 5.0V, Cs = 4.7nF, Ta = recommended range, unless otherwise noted Parameter Description Min Typ Max Units Notes Vil Low input logic level –0.5 – 0.3 V Vih High input logic level 0.6 × Vdd Vdd Vdd + 0.5 V Vol Low output voltage 0 – 0.7 V 10 mA sink current Voh High output voltage 0.8 × Vdd – Vdd V 10 mA source current Iil Input leakage current – <0.05 1 µA Rrst Internal RST pull-up resistor 20 – 50 k AT42QT1040 [DATASHEET] 15 9524D–AT42–05/2013

5.4 Timing Specifications Parameter Description Min Typ Max Units Notes TBS Burst duration – 3.5 – ms Cx = 5 pF, Cs = 18 nF Fc Burst center frequency – 119 – kHz Fm Burst modulation, percentage –7.5 – +7.5 % TPW Burst pulse width – 2 – µs 5.5 Power Consumption Vdd (V) AKS Mode (RAKS) Speed (RFS) Power Consumption (µA) Off Slow 31 Off Fast 104 1.8 On Slow 36 On Fast 114 Off Slow 100 Off Fast 340 3.3 On Slow 117 On Fast 380 Off Slow 215 Off Fast 710 5.0 On Slow 245 On Fast 800 AT42QT1040 [DATASHEET] 16 9524D–AT42–05/2013

5.6 Mechanical Dimensions (cid:19) (cid:5) + (cid:12)(cid:22)(cid:23)(cid:18)(cid:6)(cid:18)~(cid:19) = (cid:21)(cid:6)(cid:2)(cid:12)(cid:9)(cid:13)(cid:6)(cid:12)(cid:5) (cid:14)(cid:10)(cid:16)(cid:9)(cid:13)(cid:6)(cid:12)(cid:5) ‘‘(cid:6)(cid:6) ‘ (cid:19)(cid:2) (cid:6)|(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:6)q(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:6)&(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:6)z(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:2)(cid:3) (cid:17)(cid:10)(cid:20)(cid:20)(cid:10)(cid:7)(cid:9)(cid:2)(cid:6)(cid:20)(cid:12)(cid:7)(cid:21)(cid:6)(cid:10)(cid:7)(cid:21) [](cid:23)(cid:22)(cid:25)(cid:18)(cid:24)^(cid:18)(cid:4)(cid:17)(cid:13)(cid:29)X(cid:20)(cid:17)(cid:18)_(cid:18)(cid:31)(cid:31)\ (cid:5)(cid:3)"(cid:6)&(cid:18)[&(cid:127)\ (cid:21)(cid:22)(cid:20)(cid:23)(cid:10)(cid:15) (cid:20)(cid:6)(cid:7) (cid:7)(cid:10)(cid:20) (cid:20)(cid:4)(cid:24) (cid:7)(cid:10)(cid:14)(cid:12) (cid:6)(cid:8) (cid:6) (cid:18)(cid:18) ‘(cid:18) (cid:3)"q(cid:8)(cid:18) (cid:3)"&(cid:3)(cid:18) (cid:3)"&(cid:8) (cid:12)(cid:22)(cid:23)(cid:18)}(cid:6)(cid:18)(cid:5);(cid:13)(cid:31)^(cid:17)(cid:20) (cid:18) ‘(cid:6)(cid:18) (cid:3)"(cid:3)(cid:3)(cid:18) (cid:3)"(cid:3)(cid:2)(cid:18) (cid:3)"(cid:3)(cid:8) (cid:6)< [(cid:5)(cid:18)(cid:3)"(cid:9)\ (cid:2) (cid:17) (cid:18) x(cid:18) (cid:3)"(cid:6)q(cid:18) (cid:3)"(cid:2)(cid:2)(cid:18) (cid:3)"(cid:2)q =(cid:2) (cid:6)(cid:9) (cid:9) (cid:18) (cid:5)(cid:18) (cid:18) (cid:3)"(cid:6)(cid:8)(cid:2) (cid:18) (cid:19)(cid:18) (cid:2)"z(cid:3)(cid:18) (cid:9)"(cid:3)(cid:3)(cid:18) (cid:9)"(cid:6)(cid:3) (cid:6)(cid:2) < (cid:18) (cid:19)(cid:2)(cid:18) (cid:6)"<(cid:3)(cid:18) (cid:6)"(cid:8)(cid:8)(cid:18) (cid:6)"q(cid:3) (cid:6)(cid:6) (cid:8) (cid:18) =(cid:18) (cid:2)"z(cid:3)(cid:18) (cid:9)"(cid:3)(cid:3)(cid:18) (cid:9)"(cid:6)(cid:3) (cid:18) =(cid:2)(cid:18) (cid:6)"<(cid:3)(cid:18) (cid:6)"(cid:8)(cid:8)(cid:18) (cid:6)"q(cid:3) x (cid:18) (cid:17)(cid:18) $(cid:18) (cid:3)"<(cid:8)(cid:18) $ (cid:6)(cid:3)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)z(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)&(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)q(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)(cid:18)| (cid:18) ,(cid:18) (cid:3)"(cid:9)(cid:8)(cid:18) (cid:3)"<(cid:3)(cid:18) (cid:3)"<(cid:8) , { (cid:3)"(cid:9)(cid:18)(cid:128)(cid:17)^(cid:18)[<%\ (cid:18) {(cid:18) (cid:3)"(cid:2)(cid:3)(cid:18) $(cid:18) $ (cid:23)(cid:10)(cid:14)(cid:14)(cid:10)(cid:20)(cid:9)(cid:13)(cid:6)(cid:12)(cid:5) (cid:18) +(cid:18) (cid:3)"(cid:3)(cid:3)(cid:18) $(cid:18) (cid:3)"(cid:3)& (cid:6)(cid:7)(cid:6)(cid:8)(cid:7)(cid:6)(cid:9) (cid:14)(cid:6)(cid:14)(cid:15)(cid:12) (cid:8)(cid:16)(cid:17) (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:7)(cid:10)(cid:11) (cid:3)(cid:12)(cid:13)(cid:11)(cid:9)(cid:9) (cid:18)(cid:19)(cid:20)(cid:18)#(cid:18)(cid:2)(cid:3)$(cid:27)(cid:13)(cid:28)#(cid:18)(cid:9)(cid:18)%(cid:18)(cid:9)(cid:18)%(cid:18)(cid:3)"&(cid:8)(cid:18)(cid:31)(cid:31)(cid:18)*(cid:24)(cid:28)+#(cid:18)(cid:18)(cid:18),(cid:17)(cid:13)(cid:28)(cid:18)(cid:12)(cid:22)(cid:25)(cid:14);(cid:18)(cid:3)"<(cid:8)(cid:18)(cid:31)(cid:31)#(cid:18) (cid:12)(cid:13)(cid:14)(cid:15)(cid:13)(cid:16)(cid:17)(cid:18)(cid:19)(cid:20)(cid:13)(cid:21)(cid:22)(cid:23)(cid:16)(cid:18)(cid:5)(cid:24)(cid:23)(cid:25)(cid:13)(cid:14)(cid:25)(cid:26) (cid:6)"(cid:8)(cid:8)(cid:18)%(cid:18)(cid:6)"(cid:8)(cid:8)(cid:18)(cid:31)(cid:31)(cid:18)=%(cid:27)(cid:24)(cid:29)(cid:17)(cid:28)(cid:18)(cid:12)(cid:13)(cid:28)#(cid:18)(cid:18)>;(cid:17)(cid:20)(cid:31)(cid:13)!!+(cid:18)=(cid:23);(cid:13)(cid:23)(cid:14)(cid:17)(cid:28)(cid:18) (cid:10)(cid:11)(cid:5) (cid:2)(cid:3)(cid:4)(cid:2) (cid:5) (cid:27)(cid:13)(cid:14)(cid:15)(cid:13)(cid:16)(cid:17)(cid:28)(cid:20)(cid:13)(cid:21)(cid:22)(cid:23)(cid:16)(cid:29)(cid:30)(cid:13)(cid:25)(cid:31)(cid:17)!"(cid:14)(cid:24)(cid:31) (cid:12)!(cid:13)(cid:29)(cid:25)(cid:22)(cid:14)(cid:18)?(cid:17)(cid:20)+(cid:18)>;(cid:22)(cid:23)(cid:18)@X(cid:13)(cid:28)(cid:18)(cid:11)!(cid:13)(cid:25)(cid:18)Z(cid:24)(cid:18),(cid:17)(cid:13)(cid:28)(cid:18)(cid:12)(cid:13)(cid:14)(cid:15)(cid:13)(cid:16)(cid:17)(cid:18)[?@(cid:11)Z\(cid:18) AT42QT1040 [DATASHEET] 17 9524D–AT42–05/2013

5.7 Marking Either of the following two markings may be used: Abbreviationof Pin1ID 140 PartNumber: 1 40 AT42QT 0 R1 CodeRevision: 1.0Released ProgramWeekCodeNumber1-52Where: A=1B=2...Z=26 thenusingtheunderscoreA=27...Z=52 140 Pin1ID Abbreviationof PartNumber: 1 40 AT42QT 0 R1X CodeRevision: Assembly R1=1.0Released LocationCode YZZ TraceabilityCode (Y=lastdigitofyear;forexample,9=2009,0=2010,etc ZZ=assemblytracecode) 5.8 Part Number Part Number Description AT42QT1040-MMH 20-pin 3x3 mm VQFN RoHS compliant The part number comprises: AT = Atmel 42 = Touch Business Unit QT = Charge-transfer technology 1040 = (1) Keys only (04) number of channels (0) variant number MMH = Package identifier AT42QT1040 [DATASHEET] 18 9524D–AT42–05/2013

5.9 Moisture Sensitivity Level (MSL) MSL Rating Peak Body Temperature Specifications MSL1 260oC IPC/JEDEC J-STD-020 AT42QT1040 [DATASHEET] 19 9524D–AT42–05/2013

Revision History Revision No. History Revision A – March 2009  Initial release for chip revision 1.0 Revision B – April 2009  Update to pin listing in Table 1-1 Revision C – November 2012  Updated Atmel logo and other minor changes Revision D – May 2013  Updated template AT42QT1040 [DATASHEET] 20 9524D–AT42–05/2013

Notes AT42QT1040 [DATASHEET] 21 9524D–AT42–05/2013

Atmel Corporation Atmel Asia Limited Atmel München GmbH Atmel Japan G.K. 1600 Technology Drive Unit 01-5 & 16, 19F Business Campus 16F Shin-Osaki Kangyo Bldg San Jose, CA 95110 BEA Tower, Millennium City 5 Parkring 4 1-6-4 Osaki, Shinagawa-ku USA 418 Kwun Tong Roa D-85748 Garching bei München Tokyo 141-0032 Tel: (+1) (408) 441-0311 Kwun Tong, Kowloon GERMANY JAPAN Fax: (+1) (408) 487-2600 HONG KONG Tel: (+49) 89-31970-0 Tel: (+81) (3) 6417-0300 www.atmel.com Tel: (+852) 2245-6100 Fax: (+49) 89-3194621 Fax: (+81) (3) 6417-0370 Fax: (+852) 2722-1369 © 2013 Atmel Corporation. All rights reserved. / Rev.: 9524D–AT42–05/2013 Atmel®, Atmel logo and combinations thereof, Adjacent Key Suppression®, AKS®, QTouch®and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be registered trademarks or trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.

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