Features (cid:129) Fast read access time – 45ns (cid:129) Low-power CMOS operation – 100µA max standby – 30mA max active at 5MHz (cid:129) JEDEC standard packages – 40-lead PDIP – 44-lead PLCC (cid:129) Direct upgrade from 512K (Atmel® AT27C516) EPROM 1Mb (64K x 16) (cid:129) 5V ± 10% power supply One-time (cid:129) High-reliability CMOS technology Programmable – 2000V ESD protection – 200mA latchup immunity Read-only Memory (cid:129) Rapid programming algorithm – 100µs/word (typical) (cid:129) CMOS- and TTL-compatible inputs and outputs (cid:129) Integrated product identification code Atmel AT27C1024 (cid:129) Industrial and automotive temperature ranges (cid:129) Green (Pb/halide-free) packaging option 1. Description The Atmel AT27C1024 is a low-power, high-performance 1,048,576-bit, one-time pro- grammable, read-only memory (OTP EPROM) organized as 64K by 16 bits. It requires only one 5V power supply in normal read mode operation. Any word can be accessed in less than 45ns, eliminating the need for speed reducing WAIT states. The x16 organization makes this part ideal for high-performance, 16- and 32-bit microprocessor systems. In read mode, the AT27C1024 typically consumes 15mA. Standby mode supply current is typically less than 10µA. The AT27C1024 is available in industry-standard, JEDEC-approved, one-time programma- ble (OTP) PDIP and PLCC packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems. With high-density, 64K word storage capability, the AT27C1024 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. The AT27C1024 has additional features to ensure high quality and efficient production use. The rapid programming algorithm reduces the time required to program the part and guar- antees reliable programming. Programming time is typically only 100µs/word. The integrated product identification code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper pro- gramming algorithms and voltages. 0019N–EPROM–4/11

2. Pin configurations 44-lead PLCC 40-lead PDIP Pin name Function Top view Top view A0 - A15 Addresses 13 14 15 E PP C CC GM C 15 14 O0 - O15 Outputs O O O C V N V P N A A VPP 1 40 VCC CE 2 39 PGM 6 5 4 3 2 1 4 3 2 1 0 CE Chip enable O12 7 4 4 4 4 439 A13 O15 3 38 NC O11 8 38 A12 O14 4 37 A15 OE Output enable O10 9 37 A11 O13 5 36 A14 PGM Program strobe O9 10 36 A10 O12 6 35 A13 O8 11 35 A9 O11 7 34 A12 NC No connect GND 12 34 GND O10 8 33 A11 NC 13 33 NC O9 9 32 A10 Note: Both GND pins must be O7 14 32 A8 O8 10 31 A9 connected. O6 15 31 A7 GND 11 30 GND O5 16 30 A6 O7 12 29 A8 O4 17 29 A5 O6 13 28 A7 18 19 20 21 22 23 24 25 26 27 28 O5 14 27 A6 O4 15 26 A5 3 2 1 0 E C 0 1 2 3 4 O O O O O N A A A A A O3 16 25 A4 O2 17 24 A3 O1 18 23 A2 O0 19 22 A1 OE 20 21 A0 3. System considerations Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance. At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V and ground terminals of the device, as close to the device as possible. CC Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic capacitor should be utilized, again connected between the V and ground terminals. This capacitor should be positioned as CC close as possible to the point where the power supply is connected to the array. Figure 3-1. Block diagram Atmel AT27C1024 2 0019N–EPROM–4/11

Atmel AT27C1024 4. Absolute maximum ratings* Temperature under bias. . . . . . . . . . . . .-55C to + 125C *NOTICE: Stresses beyond those listed under “Absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the Storage temperature. . . . . . . . . . . . . . . .-65C to + 150C device at these or any other conditions beyond those indicated in the operational sections of this specification is Voltage on any pin with not implied. Exposure to absolute maximum rating respect to ground. . . . . . . . . . . . . . . . . . .-2.0V to + 7.0V(1) conditions for extended periods may affect device reliability. Voltage on A9 with respect to ground . . . . . . . . . . . . . . . . -2.0V to + 14.0V(1) V supply voltage with PP respect to ground. . . . . . . . . . . . . . . . . -2.0V to + 14.0V(1) Note: 1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is V + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns. CC 5. DC and AC characteristics Table 5-1. Operating modes Mode/Pin CE OE PGM Ai V Outputs PP Read V V X(1) Ai X D IL IL OUT Output disable X V X X X High Z IH Standby V X X X X(5) High Z IH Rapid program(2) V V V Ai V D IL IH IL PP IN PGM verify V V V Ai V D IL IL IH PP OUT PGM inhibit V X X X V High Z IH PP A9 = V (3) H Product identification(4) V V X A0 = V or V V Identification code IL IL IH IL CC A1 - A15 = V IL Notes: 1. X can be V or V . IL IH 2. Refer to programming characteristics. 3. V = 12.0 ± 0.5V. H 4. Two identifier words may be selected. All Ai inputs are held low (V ), except A9, which is set to V ,and A0, which is tog- IL H gled low (V ) to select the manufacturer’s identification word and high (V ) to select the device code word. IL IH 5. Standby V current (I ) is specified with V = V . V > V will cause a slight increase in I . CC SB PP CC CC PP SB Table 5-2. DC and AC operating conditions for read operation Atmel AT27C1024 -45 -70 Ind. -40C - 85C -40C - 85C Operating temp. (case) Auto. V power supply 5V ±10% 5V ±10% CC 3 0019N–EPROM–4/11

Table 5-3. DC and operating characteristics for read operation Symbol Parameter Condition Min Max Units Ind. ±1 µA I Input load current V = 0V to V LI IN CC Auto. ±5 µA Ind. ±5 µA I Output leakage current V = 0V to V LO OUT CC Auto. ±10 µA I (2) V (1)) read/standby current V = V 10 µA PP1 PP PP CC I (CMOS), CE = V ± 0.3V 100 µA I V (1) standby current SB1 CC SB CC I (TTL), CE = 2.0 to V + 0.5V 1 mA SB2 CC I V active current f = 5MHz, I = 0mA, CE = V 30 mA CC CC OUT IL V Input low voltage -0.6 0.8 V IL V Input high voltage 2.0 V + 0.5 V IH CC V Output low voltage I = 2.1mA 0.4 V OL OL V Output high voltage I = -400µA 2.4 V OH OH Notes: 1. V must be applied simultaneously with or before V , and removed simultaneously with or after V . CC PP PP 2. V may be connected directly to V , except during programming. The supply current would then be the sum of I and PP CC CC I . PP. Table 5-4. AC characteristics for read operation Atmel AT27C1024 -45 -70 Symbol Parameter Condition Min Max Min Max Units t (1) Address to output delay CE = OE = V 45 70 ns ACC IL t (1) CE to output delay OE = V 45 70 ns CE IL t (1) OE to output delay CE = V 20 25 ns OE IL OE or CE high to output float, t (1) 20 25 ns DF whichever occurred first Output hold from address, CE or OE, t 7 7 ns OH whichever occurred first Note: 1. See AC waveforms for read operation. Atmel AT27C1024 4 0019N–EPROM–4/11

Atmel AT27C1024 Figure 5-1. AC waveforms for read operation(1) Notes: 1. Timing measurement reference level is 1.5V for -45. Input AC drive levels are V = 0.0V and V = 3.0V. Timing measure- IL IH ment reference levels for all other speed grades are V = 0.8V and V = 2.0V. Input AC drive levels are V = 0.45V and OL OH IL V = 2.4V. IH 2. OE may be delayed up to t - t after the falling edge of CE without impact on t . CE OE CE 3. OE may be delayed up to t - t after the address is valid without impact on t . ACC OE ACC 4. This parameter is only sampled, and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Table 5-5. Pin capacitance f = 1MHz, T = 25°C(1) Symbol Typ Max Units Conditions C 4 10 pF V = 0V IN IN C 8 12 pF V = 0V OUT OUT Note: 1. Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested. Figure 5-2. Input test waveforms and measurement levels For -45 devices only: t , t < 5ns (10% to 90%) R F For -70 devices only: t , t < 20 ns (10% to 90%) R F 5 0019N–EPROM–4/11

Figure 5-3. Output test load Note: 1. C = 100pF including jig capacitance, except -45 devices, where C = 30pF. L L Figure 5-4. Programming waveforms(1) Notes: 1. The input timing reference is 0.8V for V and 2.0V for V . IL IH 2. t and t are characteristics of the device, but must be accommodated by the programmer. OE DFP 3. When programming the Atmel AT27C1024, a 0.1µF capacitor is required across V and ground to suppress sputious volt- PP age transients. Atmel AT27C1024 6 0019N–EPROM–4/11

Atmel AT27C1024 Table 5-6. DC programming characteristics T = 25 ± 5°C, V = 6.5 ± 0.25V, V = 13.0 ± 0.25V A CC PP Limits Symbol Parameter Test conditions Min Max Units I Input load current V = V , V ±10 µA LI IN IL IH V Input low level -0.6 0.8 V IL V Input high level 2.0 V + 0.1 V IH CC V Output low voltage I = 2.1mA 0.4 V OL OL V Output high voltage I = -400µA 2.4 V OH OH I V supply current (program and verify) 50 mA CC2 CC I V supply current CE = PGM = V 30 mA PP2 PP IL V A9 product identification voltage 11.5 12.5 V ID Table 5-7. AC programming characteristics T = 25  5C, V = 6.5  0.25V, V = 13.0  0.25V A CC PP Limits Symbol Parameter Test conditions(1) Min Max Units t Address setup time 2 µs AS t CE setup time 2 µs CES Input rise and fall times t OE setup time 2 µs OES (10% to 90%) 20ns t Data setup time 2 µs DS t Address hold time Input pulse levels 0 µs AH 0.45V to 2.4V t Data hold time 2 µs DH t OE high to output float delay(2) 0 130 ns DFP Input timing reference level t V setup time 0.8V to 2.0V 2 µs VPS PP t V setup time 2 µs VCS CC Output timing reference level t PGM program pulse width(3) 95 105 µs PW 0.8V to 2.0V t Data valid from OE 150 ns OE t V pulse rise time during programming 50 ns PRT PP Notes: 1. V must be applied simultaneously with or before V and removed simultaneously with or after V . CC PP PP 2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven. See timing diagram. 3. Program pulse width tolerance is 100µsec 5%. Table 5-8. The Atmel AT27C1024 integrated product identification code Pins Hex Codes A0 O15-O8 O7 O6 O5 O4 O3 O2 O1 O0 data Manufacturer 0 0 0 0 0 1 1 1 1 0 001E Device type 1 0 1 1 1 1 0 0 0 1 00F1 7 0019N–EPROM–4/11

6. Rapid programming algorithm A 100µs PGM pulse width is used to program. The address is set to the first location. V is raised to 6.5V and V is raised CC PP to 13.0V. Each address is first programmed with one 100µs PGM pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 100µs pulses are applied with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. V is then lowered to 5.0V and V to 5.0V. All words are read again and compared with the original data to PP CC determine if the device passes or fails. Figure 6-1. Rapid programming algorithm Atmel AT27C1024 8 0019N–EPROM–4/11

Atmel AT27C1024 7. Ordering information Green Package (Pb/halide-free) I (mA) t CC ACC (ns) Active Standby Atmel ordering code Package Lead finish Operation range AT27C1024-45JU 44J Matte tin Industrial 45 30 0.1 AT27C1024-45PU 40P6 Matte tin (-40C to 85C) AT27C1024-70JU 44J Matte tin Industrial 70 30 0.1 AT27C1024-70PU 40P6 Matte tin (-40C to 85C) Package type 44J 44-lead, plastic, J-leaded chip carrier (PLCC) 40P6 40-lead, 0.600" wide, plastic, dual inline package (PDIP) 9 0019N–EPROM–4/11

8. Packaging information 44J – PLCC 1.14(0.045) X 45° 1.14(0.045) X 45° PIN NO. 1 0.318(0.0125) IDENTIFIER 0.191(0.0075) E1 E B1 D2/E2 B e A2 D1 A1 D A 0.51(0.020)MAX 45° MAX (3X) COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A 4.191 – 4.572 A1 2.286 – 3.048 A2 0.508 – – D 17.399 – 17.653 D1 16.510 – 16.662 Note 2 E 17.399 – 17.653 Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC E1 16.510 – 16.662 Note 2 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254mm) per side. Dimension D1 D2/E2 14.986 – 16.002 and E1 include mold mismatch and are measured at the extreme B 0.660 – 0.813 material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102mm) maximum B1 0.330 – 0.533 e 1.270 TYP 10/04/01 TITLE DRAWING NO. REV. Package Drawing Contact: 44J, 44-lead, Plastic J-leaded chip carrier (PLCC) packagedrawings@atmel.com 44J B Atmel AT27C1024 10 0019N–EPROM–4/11

Atmel AT27C1024 40P6 – PDIP D PIN 1 E1 A SEATING PLANE A1 L B B1 e E COMMON DIMENSIONS 0º ~ 15º REF (Unit of Measure = mm) C SYMBOL MIN NOM MAX NOTE eB A – – 4.826 A1 0.381 – – D 52.070 – 52.578 Note 2 E 15.240 – 15.875 E1 13.462 – 13.970 Note 2 B 0.356 – 0.559 B1 1.041 – 1.651 Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. L 3.048 – 3.556 Mold Flash or Protrusion shall not exceed 0.25mm (0.010"). C 0.203 – 0.381 eB 15.494 – 17.526 e 2.540 TYP 09/28/01 TITLE DRAWING NO. REV. Package Drawing Contact: 40P6, 40-lead (0.600"/15.24mm Wide) Plastic Dual packagedrawings@atmel.com 40P6 B Inline Package (PDIP) 11 0019N–EPROM–4/11

9. Revision history Doc. Rev. Date Comments 0019N 04/2011 Remove VSOP package Add lead finish to ordering information 0019M 12/2007 Atmel AT27C1024 12 0019N–EPROM–4/11

Atmel Corporation Atmel Asia Limited Atmel Munich GmbH Atmel Japan 2325 Orchard Parkway Unit 01-5 & 16, 19F Business Campus 9F, Tonetsu Shinkawa Bldg. San Jose, CA 95131 BEA Tower, Millennium City 5 Parkring 4 1-24-8 Shinkawa USA 418 Kwun Tong Road D-85748 Garching b. Munich Chuo-ku, Tokyo 104-0033 Tel: (+1) (408) 441-0311 Kwun Tong, Kowloon GERMANY JAPAN Fax: (+1) (408) 487-2600 HONG KONG Tel: (+49) 89-31970-0 Tel: (+81) (3) 3523-3551 www.atmel.com Tel: (+852) 2245-6100 Fax: (+49) 89-3194621 Fax: (+81) (3) 3523-7581 Fax: (+852) 2722-1369 © 2011 Atmel Corporation. All rights reserved. / Rev.: 0019N–EPROM–4/11 Atmel®, logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trade- marks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.

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