AT24C64B I2C-Compatible (2-Wire) Serial EEPROM 64K (8192 x 8) DATASHEET Features  Low-voltage and Standard-voltage Operation ̶ 2.7V (V = 2.7V to 5.5V) CC ̶ 1.8V (V = 1.8V to 5.5V) CC  Low-power Devices (I = 6μA at 5.5V) Available SB  Internally Organized 8192 x 8  2-Wire Serial Interface  Schmitt Trigger, Filtered Inputs for Noise Suppression  Bi-directional Data Transfer Protocol  400kHz Clock Rate  Write Protect Pin for Hardware Data Protection  32-byte Page Write Mode (Partial Page Writes Allowed)  Self-Timed Write Cycle (5ms max)  High Reliability ̶ Endurance: 1,000,000 Write Cycles ̶ Data Retention: 100 Years  Lead-free/Halogen-free Devices Available  8-lead JEDEC SOIC and TSSOP Packages Description The Atmel® AT24C64B provides 65,536 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 8,192 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common 2-Wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24C64B is available in space saving 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-Wire serial interface. In addition, the entire family is available in 2.7V (2.7 to 5.5V) and 1.8V (1.8 to 5.5V) versions. Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

1. Pin Configurations Table 1-1. Pin Configurations 8-lead SOIC 8-lead TSSOP Pin Name Function (Top View) (Top View) A – A Address Inputs 0 2 A0 1 8 VCC A0 1 8 VCC GND Ground A1 2 7 WP A1 2 7 WP A2 3 6 SCL GNAD2 34 65 SSCDLA SCL Serial Clock Input GND 4 5 SDA SDA Serial Data WP Write Protect V Power Supply CC 2. Absolute Maximum Ratings* Operating Temperature . . . . . . . . . . . . .-55 to +125C *Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage Storage Temperature . . . . . . . . . . . . . . .-65 to +150°C to the device. This is a stress rating only and functional operation of the device at these or any Voltage on Any Pin other conditions beyond those indicated in the with Respect to Ground . . . . . . . . . . . . . . . -1V to +7V operational sections of this specification is not implied. Exposure to absolute maximum rating Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V conditions for extended periods may affect device DC Output Current. . . . . . . . . . . . . . . . . . . . . . . . 5mA reliability. 2 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

3. Block Diagram VCC GND WP Start SCL Stop SDA Logic Serial EN Control H.V. Pump/Timing Logic LOAD Device COMP Data Recovery Address Comparator LOAD INC A2 A1 R/W Data Word EC EEPROM A0 ADDR/Counter X D Y DEC Serial MUX DIN DOUT/ACK Logic DOUT 4. Pin Description Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices. Device Addresses (A2, A1, A0): The A , A , and A pins are Device Address inputs which are hardwired or left 2 1 0 not connected for hardware compatibility with other AT24Cxxxx devices. When the pins are hardwired, as many as eight 64Kb devices may be addressed on a single bus system (see Section 7., “Device Addressing”). If the pins are left floating, the A , A , and A pins will be internally pulled down to GND if the capacitive coupling to the 2 1 0 circuit board V plane is <3pF. If coupling is >3pF, Atmel recommends connecting the address pins to GND. CC Write Protect (WP): The Write Protect input, when connected to GND, allows normal Write operations. When WP is connected high to V , all Write operations to the upper quandrant (16Kb) of memory are inhibited. If the CC pin is left floating, the WP pin will be internally pulled down to GND if the capacitive coupling to the circuit board V plane is <3pF. If coupling is >3pF, Atmel recommends connecting the pin to GND. CC AT24C64B [DATASHEET] 3 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

5. Memory Organization AT24C64B, 64K Serial EEPROM: The 64K is internally organized as 256 pages of 32 bytes each. Random word addressing requires a 13 bit data word address. 5.1 Pin Capacitance (1) Applicable over recommended operating range from T = 25°C, f = 1MHz, V = +5.0V. A CC Symbol Test Condition Max Units Conditions C Input/Output Capacitance (SDA) 8 pF V =0V I/O I/O C Input Capacitance (A , A , A , SCL) 6 pF V =0V IN 0 1 2 IN Note: 1. This parameter is characterized and is not 100% tested. 5.2 DC Characteristics Applicable over recommended operating range from: T = -40 to +85°C, V = +1.8V to +5.5V (unless otherwise noted). AI CC Symbol Parameter Test Condition Min Typ Max Units V SupplyVoltage 1.8 5.5 V CC1 V SupplyVoltage 2.7 5.5 V CC2 V SupplyVoltage 4.5 5.5 V CC3 I SupplyCurrent V =5.0V Readat400kHz 0.4 1.0 mA CC1 CC I SupplyCurrent V =5.0V Writeat400kHz 2.0 3.0 mA CC2 CC StandbyCurrent I V =1.8V V =V orV 1.0 A SB1 (1.8VOption) CC IN CC SS StandbyCurrent I V =2.7V V =V orV 2.0 A SB2 (2.7VOption) CC IN CC SS StandbyCurrent I V =4.5-5.5V V =V orV 6.0 A SB3 (5.0VOption) CC IN CC SS I InputLeakageCurrent V =V orV 0.10 3.0 A LI IN CC SS I OutputLeakageCurrent V =V orV 0.05 3.0 A LO OUT CC SS V InputLowLevel(1) -0.6 V x0.3 V IL CC V InputHighLevel(1) V x0.7 V +0.5 V IH CC CC V OutputLowLevel V = 3.0V I =2.10mA 0.4 V OL2 CC OL V OutputLowLevel V = 1.8V I =0.15mA 0.2 V OL1 CC OL Note: 1. V min and V max are reference only and are not tested. IL IH 4 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

5.3 AC Characteristics Applicable over recommended operating range from T = -40°C to +85°C, V = +1.8V to +5.5V, CL = 1 TTL AI CC Gate and 100pF (unless otherwise noted). Test conditions are listed in Note 2. 1.8V to 3.6V 5V Symbol Parameter Min Max Min Max Units f Clock Frequency, SCL 400 400 kHz SCL t Clock Pulse Width Low 1.3 1.2 μs LOW t Clock Pulse Width High 0.6 0.6 μs HIGH t Noise Suppression Time(1) 100 50 ns I t Clock Low to Data Out Valid 0.2 0.9 0.1 0.9 μs AA t Time the bus must be free before a new transmission can start(1) 1.3 1.2 μs BUF t Start Hold Time 0.6 0.6 μs HD.STA t Start Set-up Time 0.6 0.6 μs SU.STA t Data In Hold Time 0 0 μs HD.DAT t Data In Set-up Time 100 100 ns SU.DAT t Inputs Rise Time(1) 0.3 0.3 μs R t Inputs Fall Time(1) 300 300 ns F t Stop Set-up Time 0.6 0.6 μs SU.STO t Data Out Hold Time 200 50 ns DH t Write Cycle Time 5 5 ms WR Write Endurance(1) 25C, Page Mode, 5.0V 1,000,000 Cycles Notes: 1. This parameter is characterized and is not 100% tested (T = 25C). A 2. AC measurement conditions:  R (connects to V ): 1.3k (2.5V, 5.5V), 10k (1.7V) L CC  Input pulse voltages: 0.3V to 0.7V CC CC  Input rise and fall times: 50ns  Input and output timing reference voltages: 0.5 x V CC AT24C64B [DATASHEET] 5 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

6. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or Stop condition as defined below. Figure 6-1. Data Validity SDA SCL Data Stable Data Stable Data Change Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other command. Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop command will place the EEPROM in a standby power mode. Figure 6-2. Start and Stop Definition SDA SCL Start Stop 6 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. Figure 6-3. Output Acknowledge 1 8 9 SCL Data In Data Out Start Acknowledge Standby Mode: The AT24C64B features a low-power standby mode which is enabled:  Upon power-up,  After the receipt of the Stop bit, and  Completion of any internal operations. Memory Reset: After an interruption in protocol, power loss or system reset, any 2-Wire part can be reset by following these steps: 1. Clock up to nine cycles, 2. Look for SDA high in each cycle while SCL is high, 3. Create a Start condition as SDA is high. The device is ready for the next communication after the above steps have been completed. Figure 6-4. Software Reset Dummy Clock Cycles SCL 1 2 3 8 9 Start Start Stop Bit Bit Bit SDA AT24C64B [DATASHEET] 7 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

Figure 6-5. Bus Timing — SCL: Serial Clock, SDA: Serial Data I/O t t HIGH t F R t t LOW LOW SCL t t t t t SU.STA HD.STA HD.DAT SU.DAT SU.STO SDA In t t t AA DH BUF SDA Out Figure 6-6. Write Cycle Timing — SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th bit ACK WORDn t (1) WR Stop Start Condition Condition Note: 1. The write cycle time t is the time from a valid Stop condition of a Write Sequence to the end of the internal WR clear/write cycle. 8 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

7. Device Addressing The 64Kb EEPROM requires an 8-bit device address word following a Start condition to enable the device for a Read or Write operation. The device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown below. This is common to all 2-Wire EEPROM devices. Figure 7-1. Device Address 1 0 1 0 A2 A1 A0 R/W MSB LSB The 64Kb uses the three Device Address bits A2, A1, and A0 to allow as many as eight devices on the same bus. These bits must compare to their corresponding hardwired input pins. The A , A , and A pins use an 2 1 0 internal proprietary circuit that biases them to a Logic Low condition if the pins are allowed to float. The eighth bit of the Device Address is the Read/Write operation select bit. A Read operation is initiated if this bit is high, and a Write operation is initiated if this bit is low. Upon a compare of the Device Address, the EEPROM will output a zero. If a compare is not made, the device will return to standby state. Noise Protection: Special internal circuitry placed on the SDA and SCL pins prevent small noise spikes from activating the device. A low-V detector resets the device to prevent data corruption in a noisy environment. CC Data Security: The AT24C64B has a hardware data protection scheme which allows the user to write protect the upper quadrant (16Kb) of memory when the WP pin is at V . CC AT24C64B [DATASHEET] 9 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

8. Write Operations Byte Write: A Write operation requires two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, i.e. microcontroller, must terminate the write sequence with a Stop condition. At this time, the EEPROM enters an internally-timed write cycle, t , to the nonvolatile memory. All inputs are disabled during WR this write cycle and the EEPROM will not respond until the write is complete. Figure 8-1. Byte Write S W T R S A I T R Device T First Second O T Address E Word Address Word Address Data P SDA Line M L R A M A L A A S S / C S C SC C B BW K B K BK K Note: * = Don’t Care bits Page Write: The 64K EEPROM is capable of 32-byte Page Writes. A Page Write is initiated the same way as a Byte Write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 31 more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the Page Write sequence with a Stop condition. Figure 8-2. Page Write S W T R S A I T R Device T First Second O T Address E Word Address (n) Word Address (n) Data (n) Data (n + x) P SDA Line M L R A A A A A S S / C C C C C B BWK K K K K Note: * = Don’t Care bits The data word address’ lower five bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than 32 data words are transmitted to the EEPROM, the data word address will roll-over and the previous data will be overwritten. Acknowledge Polling: Once the internally-timed write cycle has started and the EEPROM inputs are disabled, Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address word. The Read/Write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the Read or Write Sequence to continue. 10 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

9. Read Operations Read operations are initiated the same way as Write operations with the exception the Read/Write Select bit in the device address word is set to one. There are three read operations:  Current Address Read  Random Address Read  Sequential Read Current Address Read: The internal data word address counter maintains the last address accessed during the last Read or Write operation, incremented by one. This address stays valid between operations as long as the device power is maintained. The address roll-over during Read is from the last byte of the last memory page to the first byte of the first page. The address roll-over during Write is from the last byte of the current page to the first byte of the same page. Once the Device Address with the Read/Write Select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but does generate a following Stop condition. Figure 9-1. Current Address Read S T R S A E T R Device A O T Address D Data P SDA Line M L R A N S S / C O B B WK A C K Random Read: A Random Read requires a dummy Byte Write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another Start condition. The microcontroller now initiates a Current Address Read by sending a Device Address with the Read/Write Select bit high. The EEPROM acknowledges the Device Address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following Stop condition. Figure 9-2. Random Read S W S T R 1st, 2nd Word T R S RA Device TI Address (n) RA Device EA OT T Address E T Address D Data (n) P SDA Line M LR A A A N S S / C C C O B BW K K K A C K Dummy Write Note: 1. * = Don’t Care bits AT24C64B [DATASHEET] 11 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will roll-over and the Sequential Read will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a following Stop condition. Figure 9-3. Sequential Read R S E A A A T Device A C C C O Address D Data (n) K Data (n + 1) K Data (n + 2) K Data (n + x) P SDA Line R A N / C O WK A C K 12 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

10. Ordering Code Detail A T 2 4 C 6 4 B N - 1 0 S U - 2.7-T Shipping Carrier Option Atmel Designator Blank = Bulk (Tubes) T = Tape and Reel, Standard Quantity Product Family Operating Voltage 24C = Standard I2C Serial 1.8 = 1.8V to 5.5V EEPROM 2.7 = 2.7V to 5.5V Package Device Grade or Device Density Wafer/Die Thickness 64 = 64 kilobit U = Green, Lead-free/Halogen-free Industrial Temperature Range (-40°C to +85°C) Device Revision 11 = 11mil Wafer Thickness Package Option S = JEDEC SOIC Package Variation T = TSSOP (Package Type Dependant) N = 0.150” with SOIC Speed Type 10 = Default Value Note: This field is not used for Serial EEPROM products. AT24C64B [DATASHEET] 13 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

11. Part Markings AT24C64B: Package Marking Information (3) (4) 8-lead SOIC 8-lead TSSOP ATMELYWW U% D 24C64BN AT64B SU%% D Note 1: designates pin 1 Note 2: Package drawings are not to scale Note 3: Back side marking will include Assembly Location and lot Number Note 4: Back side marking will include Date Code, Assembly Location and Lot Number Date Codes V oltages Y = Year M = Month WW = Work Week of Assembly %% = Minimum Voltage 9: 2009 3: 2013 A: January 02: Week 2 1 8 or 1: 1.8V min 0: 2010 4: 2014 B: February 04: Week 4 2 7 or 3: 2.7V min 1: 2011 5: 2015 ... ... 2: 2012 6: 2016 L: December 52: Week 52 Country of Assembly Lot Number Grade/Lead Finish Material @ = Country of Assembly AAA...A = Atmel Wafer Lot Number U: Industrial/Matte Tin/SnAguCu Trace Code Atmel Truncation XX = Trace Code (Atmel Lot Numbers Correspond to Code) AT: Atmel Example: AA, AB.... YZ, ZZ ATM: Atmel ATML: Atmel 1/31/14 TITLE DRAWING NO. REV. Package Mark Contact: 24C64BSM, AT24C64B Package Marking Information 24C64BSM A DL-CSO-Assy_eng@atmel.com 14 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

12. Ordering Information Delivery Information Lead Operation Atmel Ordering Code Finish Package Voltage Form Quantity Range AT24C64BN-10SU-2.7 Bulk (Tubes) 100 per Tube 2.7V to 5.5V(1) AT24C64BN-10SU-2.7-T Tape and Reel 4,000 per Reel 8S1 AT24C64BN-10SU-1.8 Bulk (Tubes) 100 per Tube 1.8V to 5.5V AT24C64BN-10SU-1.8-T Matte Tin(2) Tape and Reel 4,000 per Reel Industrial Lead-free Temperature AT24C64B-10TU-2.7 Halogen-free Bulk (Tubes) 100 per Tube (-40C to 85C) 2.7V to 5.5V(1) AT24C64B-10TU-2.7-T Tape and Reel 5,000 per Reel 8X AT24C64B-10TU-1.8 Bulk (Tubes) 100 per Tube 1.8V to 5.5V AT24C64B-10TU-1.8-T Tape and Reel 5,000 per Reel Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, see Section 5.2, “DC Characteristics” and Section 5.3, “AC Characteristics”. 2. U = Green Package and RoHS compliant. Package Type 8S1 8-lead 0.150” wide body, Plastic Gull Wing Small Outline (JEDEC SOIC) 8X 8-lead 4.4mm body, Plastic Thin Shrink Small Outline Package (TSSOP) AT24C64B [DATASHEET] 15 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

13. Packaging Information 13.1 8S1 — 8-lead JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A1 A 1.35 – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 D E1 3.81 – 3.99 E 5.79 – 6.20 SIDE VIEW e 1.27 BSC Notes: This drawing is for general information only. L 0.40 – 1.27 Refer to JEDEC Drawing MS-012, Variation AA ØØ 0° – 8° for proper dimensions, tolerances, datums, etc. 6/22/11 TITLE GPC DRAWING NO. REV. 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing SWB 8S1 G Package Drawing Contact: Small Outline (JEDEC SOIC) packagedrawings@atmel.com 16 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

13.2 8X — 8-lead TSSOP C 1 Pin 1 indicator this corner E1 E L1 N L Top View End View A b A1 COMMON DIMENSIONS e A2 (Unit of Measure = mm) D SYMBOL MIN NOM MAX NOTE Side View A - - 1.20 A1 0.05 - 0.15 Notes: 1. This drawing is for general information only. A2 0.80 1.00 1.05 Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. D 2.90 3.00 3.10 2, 5 2. Dimension D does not include mold Flash, protrusions or gate E 6.40 BSC burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. E1 4.30 4.40 4.50 3, 5 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm b 0.19 0.25 0.30 4 (0.010in) per side. e 0.65 BSC 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess L 0.45 0.60 0.75 of the b dimension at maximum material condition. Dambar L1 1.00 REF cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. C 0.09 - 0.20 5. Dimension D and E1 to be determined at Datum Plane H. 2/27/14 TITLE GPC DRAWING NO. REV. 8X, 8-lead 4.4mm Body, Plastic Thin Package Drawing Contact: Shrink Small Outline Package (TSSOP) TNR 8X E packagedrawings@atmel.com AT24C64B [DATASHEET] 17 Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

14. Revision History Doc. Rev. Date Comments Added Bulk (Tube) Shipping Carrier Option Changed Standard Quantity Tape and Reel Option to “T” 3350G 01/2017 Updated Ordering Information Table Removed AT24C64B-W1.8-11 Part Number Add ordering code detail and part markings. Update the 8X package drawing, template, 3350F 05/2014 logos, and disclaimer page. (No change in functional specification.) 3350E 09/2007 Update template; implemented revision history. 18 AT24C64B [DATASHEET] Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017

X X X X X X Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2017 Atmel Corporation. / Rev.: Atmel-3350G-SEEPROM-AT24C64B-Datasheet_012017. Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. Other terms and product names may be trademarks of others. DISCLAIMER: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. SAFETY-CRITICAL, MILITARY, AND AUTOMOTIVE APPLICATIONS DISCLAIMER: Atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to result in significant personal injury or death (“Safety-Critical Applications”) without an Atmel officer's specific written consent. Safety-Critical Applications include, without limitation, life support devices and systems, equipment or systems for the operation of nuclear facilities and weapons systems. Atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by Atmel as military-grade. Atmel products are not designed nor intended for use in automotive applications unless specifically designated by Atmel as automotive-grade.