AT24C512C I2C-Compatible (2-wire) Serial EEPROM 512-Kbit (65,536 x 8) DATASHEET Features  Low-voltage and Standard-voltage Operation ̶ V = 1.7V to 3.6V CC ̶ V = 2.5V to 5.5V CC  Internally Organized as 65,536 x 8 (512K)  I2C-Compatible (2-Wire) Serial Interface  Schmitt Triggers, Filtered Inputs for Noise Suppression  Bidirectional Data Transfer Protocol  400kHz (1.7V) and 1MHz (2.5V, 5.5V) Compatibility  Write Protect Pin for Hardware Data Protection  128-byte Page Write Mode ̶ Partial Page Writes Allowed  Random and Sequential Read Modes  Self-timed Write Cycle (5ms Max)  High Reliability ̶ Endurance: 1,000,000 Write Cycles ̶ Data Retention: 40 Years  Green Package Options (Pb/Halide-free/RoHS Compliant) ̶ 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-pad UDFN, 8-ball WLCSP, and 8-ball VFBGA Packages  Die sale Options: Wafer Form and Tape and Reel Available Description The Atmel® AT24C512C provides 524,288 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 65,536 words of 8 bits each. The cascadable feature of the device allows up to eight devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-pad UDFN, 8-ball WLCSP, and 8-ball VFBGA packages. In addition, the entire family is available in 1.7V to 3.6V and 2.5V to 5.5V versions. Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

1. Pin Configurations and Pinouts Figure 1. Pin Configurations Pin Name Function A , A , A Address Inputs 0 1 2 GND Ground SDA Serial Data SCL Serial Clock Input WP Write Protect V Power Supply CC 8-lead SOIC 8-lead TSSOP 8-pad UDFN A0 1 8 VCC A0 1 8 VCC A0 1 8 VCC A1 2 7 WP A1 2 7 WP A1 2 7 WP A2 3 6 SCL GNAD2 34 65 SSCDLA GNAD2 34 65 SSCDLA GND 4 5 SDA Top View Top View Top View 8-ball WLSCP 8-ball VFBGA SDA VCC A0 1 8 VCC SCL A1 2 7 WP A2 WP A1 A2 3 6 SCL GND 4 5 SDA GND A0 Top View Top View Note: Drawings are not to scale. 2. Absolute Maximum Ratings Operating Temperature . . . . . . . . . . .-55°C to +125°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Storage Temperature. . . . . . . . . . . . .-65°C to +150°C This is a stress rating only, and functional operation of the device at these or any other conditions beyond those Voltage on any pin indicated in the operational sections of this specification is with respect to ground . . . . . . . . . . . . . -1.0V to +7.0V not implied. Exposure to absolute maximum rating conditions for extended periods may affect device Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V reliability. DC Output Current. . . . . . . . . . . . . . . . . . . . . . .5.0mA 2 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

3. Block Diagram Figure 3-1. Block Diagram V CC GND WP SCL Start Stop SDA Logic Serial EN Control H.V. Pump/Timing Logic LOAD Device COMP Data Recovery Address Comparator LOAD INC A A21 R/W Data Word EC EEPROM A Addr/counter D 0 X Y DEC Serial MUX D D /ACK IN OUT Logic D OUT 4. Pin Descriptions Serial Clock (SCL) — The SCL input is used to positive-edge clock data into each EEPROM device and negative- edge clock data out of each device. Serial Data (SDA) — The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven, and may be wire-ORed with any number of other open-drain or open-collector devices. Device Addresses (A , A , A ) — The A , A , and A pins are device address inputs that are hardwired or left not 2 1 0 2 1 0 connected for compatibility with other Atmel AT24Cxx devices. When the pins are hardwired, as many as eight 512K devices may be addressed on a single bus system (see Section 7. “Device Addressing” on page 9 for more details). If these pins are left floating, the A , A , and A pins will be internally pulled down to GND. However, due 2 1 0 to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the address pins to a known state. When using a pull-up resistor, Atmel recommends using 10k or less. Write Protect (WP) — The Write Protect input, when connected to GND, allows normal write operations. When WP pin is connected directly to V , all write operations to the memory are inhibited. If the pin is left floating, the CC WP pin will be internally pulled down to GND; however, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pin to a known state. When using a pull-up resistor, Atmel recommends using 10k or less. Table 4-1. Write Protect WP Pin Status Part of the Array Protected At V Full Array CC At GND Normal Read/Write Operations AT24C512C [DATASHEET] 3 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

5. Memory Organization AT24C512C, 512-Kbit Serial EEPROM: The 512K is internally organized as 512 pages of 128 bytes each. Random word addressing requires a 16-bit data word address. 5.1 Pin Capacitance Table 5-1. Pin Capacitance(1) Applicable over recommended operating range from T = 25C, f = 1.0MHz, V = 5.5V. A CC Symbol Test Condition Max Units Conditions C Input/Output Capacitance (SDA) 8 pF V = 0V I/O I/O C Input Capacitance (A , A , A , SCL) 6 pF V = 0V IN 0 1 2 IN Note: 1. This parameter is characterized and is not 100% tested. 5.2 DC Characteristics Table 5-2. DC Characteristics Applicable over recommended operating range from: T = -40C to +85C, V = 1.7V to 3.6V or 2.5V to 5.5V (unless AI CC otherwise noted). Symbol Parameter Test Condition Min Typ Max Units V Supply Voltage 1.7 3.6 V CC1 V Supply Voltage 2.5 5.5 V CC2 Read at 400kHz 1.0 mA I Supply Current V = 3.6V CC1 CC Write at 400kHz 3.0 mA Read at 400kHz 2.0 mA I Supply Current V = 5.0V CC2 CC Write at 400kHz 3.0 mA V = 1.7V 1.0 μA CC I Standby Current V = V or V SB1 IN CC SS V = 3.6V 3.0 μA CC V = 2.5V 2.0 μA CC I Standby Current V = V or V SB2 IN CC SS V = 5.5V 6.0 μA CC I Input Leakage Current V = V orV 0.10 3.0 μA LI IN CC SS Output Leakage I V = V orV 0.05 3.0 μA LO Current OUT CC SS V Input Low Level(1) -0.6 V x 0.3 V IL CC V Input High Level(1) V x 0.7 V + 0.5 V IH CC CC V Output Low Level V = 1.7V I = 0.15mA 0.2 V OL1 CC OL V Output Low Level V = 3.0V I = 2.1mA 0.4 V OL2 CC OL Note: 1. V min and V max are reference only, and are not tested. IL IH 4 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

5.3 AC Characteristics Table 5-3. AC Characteristics Applicable over recommended operating range from T = -40C to +85C, V = 1.7V to 3.6V or 2.5V to 5.5V (where AI CC applicable), CL = 100pF (unless otherwise noted). Test conditions are listed in Note 2. 1.7V 2.5V, 5.0V Symbol Parameter Min Max Min Max Units f Clock Frequency, SCL 400 1000 kHz SCL t Clock Pulse Width Low 1.3 0.4 μs LOW t Clock Pulse Width High 0.6 0.4 μs HIGH t Noise Suppression Time(1) 100 50 ns I t Clock Low to Data Out Valid 0.05 0.9 0.05 0.55 μs AA Time the bus must be free before a new t 1.3 0.5 μs BUF transmission can start(1) t Start Hold Time 0.6 0.25 μs HD.STA t Start Set-up Time 0.6 0.25 μs SU.STA t Data In Hold Time 0 0 μs HD.DAT t Data In Set-up Time 100 100 ns SU.DAT t Inputs Rise Time(1) 0.3 0.3 μs R t Inputs Fall Time(1) 300 100 ns F t Stop Set-up Time 0.6 0.25 μs SU.STO t Data Out Hold Time 50 50 ns DH t Write Cycle Time 5 5 ms WR Endurance(1) 25°C, Page Mode, 3.3V 1,000,000 Write Cycles Notes: 1. This parameter is ensured by characterization only. 2. AC measurement conditions:  R (connects to V ): 1.3k (2.5V, 5V), 10k (1.7V) L CC  Input pulse voltages: 0.3V to 0.7V CC CC  Input rise and fall times:  50ns  Input and output timing reference voltages: 0.5V CC AT24C512C [DATASHEET] 5 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

6. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or Stop condition as defined below. Figure 6-1. Data Validity SDA SCL Data Stable Data Stable Data Change Start Condition: A high-to-low transition of SDA with SCL high is a Start condition, which must precede any other command. Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode. Figure 6-2. Start and Stop Definition SDA SCL Start Stop 6 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. Figure 6-3. Output Acknowledge SCL 1 8 9 Data In Data Out Start Acknowledge Standby Mode: The AT24C512C features a low-power standby mode, which is enabled:  Upon power-up and  After the receipt of the Stop condition and the completion of any internal operations. Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol reset by following these steps: 1. Create a Start condition (if possible). 2. Clock nine cycles. 3. Create another Start condition followed by a Stop condition, as shown in Figure 6-4 below. The device should be ready for the next communication after above steps have been completed. In the event that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to reset the device. Figure 6-4. Software Reset Dummy Clock Cycles SCL 1 2 3 8 9 Start Start Stop Condition Condition Condition SDA AT24C512C [DATASHEET] 7 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

Figure 6-5. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O t t HIGH t F R t t SCL LOW LOW t t t t t SU.STA HD.STA HD.DAT SU.DAT SU.STO SDA IN t t t AA DH BUF SDA OUT Figure 6-6. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th Bit ACK WORD N (1) t WR Stop Start Condition Condition Note: 1. The write cycle time, t , is the time from a valid Stop condition of a write sequence to the end of the internal WR clear/write cycle. 8 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

7. Device Addressing The 512K EEPROM requires an 8-bit device address word following a Start condition to enable the chip for a read or write operation. The device address word consists of a mandatory ‘1010’ sequence for the first four most-significant bits (see Figure 7-1 below). This is common to all 2-wire EEPROM devices. The 512K uses the three device address bits, A2, A1, and A0, to allow as many as eight devices on the same bus. These bits must compare to their corresponding hardwired input pins. The A , A , and A pins use an 2 1 0 internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high, and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a zero. If a valid compare is not made, the device will return to a standby state. Figure 7-1. Device Address 512K 1 0 1 0 A2 A1 A0 R/W MSB LSB 8. Write Operations Byte Write: A Byte Write operation requires two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero, and then the part is to receive an 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The addressing device, such as a microcontroller, then must terminate the write sequence with a Stop condition. At this time, the EEPROM enters an internally-timed write cycle, t , to the nonvolatile memory. All inputs are WR disabled during this write cycle, and the EEPROM will not respond until the write is complete (see Figure 8-1). Figure 8-1. Byte Write S W T R S A I T R Device T First Second O T Address E Word Address Word Address Data P SDA Line M R A A A A S / C C C C B W K K K K AT24C512C [DATASHEET] 9 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

Page Write: The 512-Kbit EEPROM is capable of 128-byte page writes. A Page Write is initiated the same way as a byte write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 127 more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a Stop condition and the internally timed write cycle will begin. The lower seven bits of the data word address are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than 128 data words are transmitted to the EEPROM, the data word address will roll-over, and the previous data will be overwritten. The address roll over during write is from the last byte of the current page to the first byte of the same page. Figure 8-2. Page Write S W T R S A I T R Device T First Second O T Address E Word Address (n) Word Address (n) Data (n) Data (n + x) P SDA Line M R A A A A A S / C C C C C B WK K K K K Acknowledge Polling: Once the internally-timed write cycle has started and the EEPROM inputs are disabled, Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address word. The read/write select bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the read or write sequence to continue. Data Security: AT24C512C has a hardware data protection scheme that allows the user to write protect the entire memory when the WP pin is at V . CC 10 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

9. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three types of read operations: Current Address Read, Random Address Read, and Sequential Read. 9.1 Current Address Read The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll-over during read is from the last byte of the last memory page to the first byte of the first page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out on the SDA line. The microcontroller does not respond with an zero, but does generate a following Stop condition. Figure 9-1. Current Address Read S T R S A E T R Device A O T Address D Data P SDA Line M R A N S / C O B W K A C K 9.2 Random Read A Random Read requires an initial byte write sequence to load in the data word address. This is known as a “dummy write” operation. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another Start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero, but does generate a following Stop condition. Figure 9-2. Random Read S W S T R T R S A I A E T R Device T First Word Second Word R Device A O T Address E Address Address T Address D Data (n) P SDA LINE M R A A L A R A N S / C C S C / C O B W K K B K WK A C Dummy Write K AT24C512C [DATASHEET] 11 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

9.3 Sequential Read Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will roll-over and the sequential read will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a following Stop condition. Figure 9-3. Sequential Read S W T R A I R Device T First Word Second Word T Address E Address Address . . . SDA LINE M R A A L A S / C C S C B W K K B K Dummy Write S T R S A E T R Device A O T Address D Data (n) Data (n + 1) Data (n + 2) Data (n + x) P . . . R A A A A N / C C C C O K K K K W A C K 12 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

10. Ordering Code Detail A T 2 4 C 5 1 2 C - S S H M x x - T Atmel Designator Shipping Carrier Option B = Bulk (Tubes) T = Tape and Reel, Standard Quantity Option E = Tape and Reel, Expanded Quantity Option Product Family 24C = Standard I2C-compatible Product Variation Serial EEPROM xx = Applies to select packages only. See ordering table for variation details. Device Density 512 = 512k Operating Voltage M = 1.7V to 3.6V D = 2.5V to 5.5V Device Revision Package Device Grade or Wafer/Die Thickness H = Green, NiPdAu Lead Finish, Industrial Temperature Range (-40°C to +85°C) U = Green, Matte Sn Lead Finish, Industrial Temperature Range (-40°C to +85°C) 11 = 11mil Wafer Thickness Package Option SS = JEDEC SOIC S = EIAJ SOIC X = TSSOP MA = UDFN U1 = WLCSP, 3x5 Grid Array C = VFBGA WWU = Wafer Unsawn AT24C512C [DATASHEET] 13 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

11. Part Markings AT24C512C: Package Marking Information 8-lead SOIC 8-lead EIAJ 8-lead TSSOP ATMLHYWW ATHYWW ATMLHYWW ###% @ ###% @ ###% @ AAAAAAAA AAAAAAAA AAAAAAA 8-pad UDFN 8-ball WLCSP 8-ball VFBGA 2.0 x 3.0 mm Body 1.5 x 2.0 mm Body ### ATMEL H%@ ###% ###U YXX UYMXX YMXX PIN 1 Note 1: designates pin 1 Note 2: Package drawings are not to scale Catalog Number Truncation AT24C512C Truncation Code: ### = 2FC Date Codes V oltages Y = Year M = Month WW = Work Week of Assembly % = Minimum Voltage 3: 2013 7: 2017 A: January 02: Week 2 M: 1.7V min 4: 2014 8: 2018 B: February 04: Week 4 D: 2.5V min 5: 2015 9: 2019 ... ... 6: 2016 0: 2020 L: December 52: Week 52 Country of Assembly L ot Number G rade/Lead Finish Material @ = Country of Assembly AAA...A = Atmel Wafer Lot Number H: Industrial/NiPdAu U: Industrial/Matte Tin Trace Code Atmel Truncation XX = Trace Code (Atmel Lot Numbers Correspond to Code) AT: Atmel Example: AA, AB.... YZ, ZZ ATM: Atmel ATML: Atmel 3/25/13 TITLE DRAWING NO. REV. Package Mark Contact: 24C512CSM, AT24C512C Package Marking Information 24C512CSM E DL-CSO-Assy_eng@atmel.com 14 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

12. Ordering Information Delivery Information Operation Atmel Ordering Code Lead Finish Package Voltage Form Quantity Range AT24C512C-SSHM-B Bulk (Tubes) 100 per Tube 1.7V to 3.6V AT24C512C-SSHM-T Tape and Reel 4,000 per Reel 8S1 AT24C512C-SSHD-B Bulk (Tubes) 100 per Tube 2.5V to 5.5V AT24C512C-SSHD-T Tape and Reel 4,000 per Reel AT24C512C-SHM-B Bulk (Tubes) 95 per Tube 1.7V to 3.6V AT24C512C-SHM-T Tape and Reel 2,000 per Reel 8S2 AT24C512C-SHD-B Bulk (Tubes) 95 per Tube NiPdAu 2.5V to 5.5V (Lead-free/Halogen-free) AT24C512C-SHD-T Tape and Reel 2,000 per Reel AT24C512C-XHM-B Bulk (Tubes) 100 per Tube Industrial 1.7V to 3.6V Temperature AT24C512C-XHM-T Tape and Reel 5,000 per Reel (-40C to 85C) 8X AT24C512C-XHD-B Bulk (Tubes) 100 per Tube 2.5V to 5.5V AT24C512C-XHD-T 5,000 per Reel AT24C512C-MAHM-T 5,000 per Reel 8MA2 AT24C512C-MAHM-E 15,000 per Reel Tape and Reel AT24C512C-U1UM-T(1) 8U-8 1.7V to 3.6V SnAgCu AT24C512C-CUM-T 5,000 per Reel (Lead-free/Halogen-free) 8U2-1 AT24C512C-CUMHY-T AT24C512C-WWU11M(2) N/A Wafer Sale Note 2 Notes: 1. WLCSP Package: CAUTION: Exposure to ultraviolet (UV) light can degrade the data stored in the EEPROM cells. Therefore, customers who use a WLCSP product must ensure that exposure to ultraviolet light does not occur 2. For wafer sales, please contact Atmel sales. Package Type 8S1 8-lead, 0.150” wide, Plastic Gull Wing, Small Outline (JEDEC SOIC) 8S2 8-lead, 0.208” wide, Plastic Gull Wing, Small Outline (EIAJ SOIC) 8X 8-lead, 4.40mm body, Plastic Thin Shrink Small Outline (TSSOP) 8MA2 8-pad, 2.00mm x 3.00mm body, 0.50mm Pitch, Ultra Thin Dual No Lead (UDFN) 8U-8 8-ball, 3 x 5 Grid Array, Wafer Level Chip Scale (WLCSP) 8U2-1 8-ball, 2.35mm x 3.73mm body, 0.75mm pitch, Small Die Ball Grid Array (VFBGA) AT24C512C [DATASHEET] 15 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

13. Package Information 13.1 8S1 — 8-lead JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A1 A 1.35 – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 D E1 3.81 – 3.99 E 5.79 – 6.20 SIDE VIEW e 1.27 BSC Notes: This drawing is for general information only. L 0.40 – 1.27 Refer to JEDEC Drawing MS-012, Variation AA ØØ 0° – 8° for proper dimensions, tolerances, datums, etc. 6/22/11 TITLE GPC DRAWING NO. REV. 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing SWB 8S1 G Package Drawing Contact: Small Outline (JEDEC SOIC) packagedrawings@atmel.com 16 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

13.2 8S2 — 8-lead EIAJ SOIC TOP VIEW END VIEW C 1 E E1 L 8 q SIDE VIEW e b A COMMON DIMENSIONS (Unit of Measure = mm) A1 SYMBOL MIN NOM MAX NOTE A 1.70 2.16 A1 0.05 0.25 b 0.35 0.48 4 C 0.15 0.35 4 D D 5.13 5.35 E1 5.18 5.40 2 Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. E 7.70 8.26 2. Mismatch of the upper and lower dies and resin burrs aren't included. L 0.51 0.85 3. Determines the true geometric position. q 0° 8° 4. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. e 1.27 BSC 3 11/10/14 TITLE GPC DRAWING NO. REV. 8S2, 8-lead, 0.208” Body, Plastic Package Drawing Contact: STN 8S2 G Small Outline Package (EIAJ) packagedrawings@atmel.com AT24C512C [DATASHEET] 17 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

13.3 8X — 8-lead TSSOP C 1 Pin 1 indicator this corner E1 E L1 N L Top View End View A b A1 COMMON DIMENSIONS e A2 (Unit of Measure = mm) D SYMBOL MIN NOM MAX NOTE Side View A - - 1.20 A1 0.05 - 0.15 Notes: 1. This drawing is for general information only. A2 0.80 1.00 1.05 Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. D 2.90 3.00 3.10 2, 5 2. Dimension D does not include mold Flash, protrusions or gate E 6.40 BSC burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. E1 4.30 4.40 4.50 3, 5 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm b 0.19 0.25 0.30 4 (0.010in) per side. e 0.65 BSC 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess L 0.45 0.60 0.75 of the b dimension at maximum material condition. Dambar L1 1.00 REF cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. C 0.09 - 0.20 5. Dimension D and E1 to be determined at Datum Plane H. 2/27/14 TITLE GPC DRAWING NO. REV. 8X, 8-lead 4.4mm Body, Plastic Thin Package Drawing Contact: Shrink Small Outline Package (TSSOP) TNR 8X E packagedrawings@atmel.com 18 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

13.4 8MA2 — 8-pad UDFN E 1 8 Pin 1 ID 2 7 D 3 6 4 5 TOP VIEW C SIDE VIEW A2 A A1 E2 b (8x) 8 1 COMMON DIMENSIONS 7 2 Pin#1 ID (Unit of Measure = mm) D2 6 3 SYMBOL MIN NOM MAX NOTE A 0.50 0.55 0.60 5 4 A1 0.0 0.02 0.05 e (6x) A2 - - 0.55 L (8x) K D 1.90 2.00 2.10 BOTTOM VIEW D2 1.40 1.50 1.60 Notes: 1. This drawing is for general information only. Refer to E 2.90 3.00 3.10 Drawing MO-229, for proper dimensions, tolerances, E2 1.20 1.30 1.40 datums, etc. 2. The Pin #1 ID is a laser-marked feature on Top View. b 0.18 0.25 0.30 3 3. Dimensions b applies to metallized terminal and is C 1.52 REF measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on L 0.30 0.35 0.40 the other end of the terminal, the dimension should e 0.50 BSC not be measured in that radius area. 4. The Pin #1 ID on the Bottom View is an orientation K 0.20 - - feature on the thermal pad. 11/26/14 TITLE GPC DRAWING NO. REV. 8MA2, 8-pad 2 x 3 x 0.6mm Body, Thermally Package Drawing Contact: Enhanced Plastic Ultra Thin Dual Flat No-Lead YNZ 8MA2 G packagedrawings@atmel.com Package (UDFN) 19 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

13.5 8U-8 — 8-ball WLCSP TOP VIEW BOTTOM VIEW A1 CORNER A1 CORNER 1 2 3 4 5 5 4 3 2 1 -B- A A E B E1 E2 B C C -A- D D2 Øb(8X) d 0.015(4X) D1 n0.015m C j n0.05m C A B SIDE VIEW d 0.075 C A A2 -C- A1 SEATING PLANE COMMON DIMENSIONS PIN ASSIGNMENT MATRIX (Unit of Measure = mm) 1 2 3 4 5 SYMBOL MIN TYP MAX NOTE A VCC WP A0 A 0.456 0.495 0.534 A1 0.16 - 0.22 B SCL A 1 A2 0.280 0.305 0.330 C SDA A2 VSS E Contact Atmel for details E1 0.866 E2 0.500 D Contact Atmel for details D1 1.000 D2 0.500 b 0.240 0.270 0.300 4/11/13 TITLE GPC DRAWING NO. REV. 8U-8, 8-ball Wafer Level Chip Scale Package Package Drawing Contact: (WLCSP) GRX 8U-8 A packagedrawings@atmel.com 20 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

13.6 8U2-1 — 8-ball VFBGA f 0.10 C d0.10 (4X) d0.08 C A1 BALL D A C A1 BALL PAD CORNER PAD CORNER 2 1 Øb A j n0.15m C A B j n0.08m C B E e C D (e1) A1 B d A2 (d1) A TOP VIEW SIDE VIEW BOTTOM VIEW 8 SOLDER BALLS COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A 0.81 0.91 1.00 A1 0.15 0.20 0.25 A2 0.40 0.45 0.50 b 0.25 0.30 0.35 D 2.35 BSC Notes: E 3.73 BSC 1. This drawing is for general e 0.75 BSC 2. Dimension 'b' is measured at the maximum solder ball diameter. e1 0.74 REF 3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu. d 0.75 BSC d1 0.80 REF 6/11/13 TITLE GPC DRAWING NO. REV. 8U2-1, 8-ball, 2.35 x 3.73 mm Body, 0.75 mm pitch, Package Drawing Contact: Very Thin, Fine-Pitch Ball Grid Array Package GWW 8U2-1 G packagedrawings@atmel.com (VFBGA) AT24C512C [DATASHEET] 21 Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

14. Revision History Doc. Rev. Date Comments 8720G 09/2015 Added the AT24C512C-CUMHY-T package option. Added the UDFN expanded quantity option. 8720F 01/2015 Updated package outline drawings and the ordering information section. Correct spelling error. 8720E 08/2013 Correct subscript pin names on pinouts. Update the I and I supply currents in the DC Characteristics table. CC1 CC2 Added 8U-8 WLCSP package offering. 8720D 03/2013 Update related information throughout document. Update footers and disclaimer page. Update part markings. 8720C 07/2012 Update package drawings. Update template. Replace part markings with single page standard marking. 8720B 12/2010 Remove five ordering code variations. 8720A 09/2010 Initial document release. 22 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: AT24C512C1-10CI-2.7 AT24C512C1-10CC-2.7 AT24C512C-SSHM-T AT24C512C-XHM-T AT24C512C-XHM-B AT24C512C-MAHM-T AT24C512C-SSHM-B AT24C512C-SHD-B AT24C512C-SHD-T AT24C512C-SSHD-B AT24C512C-SSHD-T AT24C512C-XHD-B AT24C512C-XHD-T AT24C512C-SSHMEU-T AT24C512C-SHM-T AT24C512C-U1UM-T AT24C512C-MAHM-E AT24C512C-CUM-T-923 AT24C512C-CUM-T-834 AT24C512C-CUM-T AT24C512C-SHM-B