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Datasheet AS1364 1A Low Dropout Linear Voltage Regulator 1 General Description 2 Key Features d The AS1364 is a low-dropout linear regulator (LDO) designed to Guaranteed Output Current: 1A operate from 2V to 5.5V input, that delivers a wide range of highly Low Dropout: 140mV @ 1A i accurate (±0.75%) factory-trimmed output voltages as well as l adjustable output voltages (using an external resistor-divider Output Voltage Accuracy: Up to ±0.75% a network). 2.0V to 5.5V Input Voltage The ultra-low dropout device requires only 140mV dropout voltage v while delivering a guaranteed 1A load current and is therefore Fixed VOUT: 1.2V to 5.0V perfectly suited for battery-operated portable applications. Adjustable VOUT: 1.2V to 5.3V l Additionally the AS1364 offers extremely low 10µVRMS (100Hz to l 100kHz) or 45µVRMS (10Hz to 1MHz) output voltage noise. Low Gro und Current: 35µA i Table 1. Standard Products Low GShutdown Current: 10nA t s Model Output Type BYP SET Low Output Noise: 45µVRMS (from 10Hz to 1MHz) AS1364-AD Adjustable No Yes AThermal Overload Prote ction t AS1364-_ _ Fixed Yes No Output Current Limit n The device features an internal PMOS pass transistor (for a lows Output discharge path during shutdown supply current of only 35µA), reset output, a low-power shutdown e mode, and protection from short-circuit and thermal-overlmoad 8-pin TDFN 3x3mm Package conditions. 3 Atpplications n When in shutdown, a 5k (typ) discharge path is connected a between the output pin and ground. The AS1364 is available in a The device is ideal for laptops, PDAs, portable audio devices, mobile 8-pin TDFN 3x3mm package. ophones, cordless phones, and any other battery-operated portable device. c Figure 1. AS1364 - Typical Application Diagram l a c i n 3 6 IN OUT VIN VOUT h 4 5 COUT CIN 4.7µF 4.7µF IN AS1364 OUT c On 2 1 e Off EN8 P7OK Reset Output C10BnYFP GND SET/BYP T www.austriamicrosystems.com Revision 1.8 1 - 19

AS1364 Datasheet - Pin Assignments 4 Pin Assignments Figure 2. Pin Assignments (Top View) d i l a POK 1 8 GND v EN 2 7 SET/BYP AS1364 IN 3 6 OUT l l IN 4 5 O UT i G t s A t n s e m 4.1 Pin Descriptions t n Table 2. Pin Descriptions a Pin Number Pin Name o Description Note: Open-Drain POK Output. POK remains low while VOUT is below the POK threshold. 1 POK c Connect a 100k pull-up resistor from this pin to OUT to obtain an output voltage (see Figure 1). Active-Low Shu tdown Input. A logic low disables the output and reduces the supply current to 0.1µA. In shultdown, the POK output is low and OUT high impedance. 2 EN VDD: Noramal operation. GND: Shutdown. c 2.0V to 5.5V Supply Voltage. Bypass with a 4.7µF input capacitor to GND (see Dropout Voltage on 3, 4 IN ipage 11). These inputs are internally connected, but they also must be externally connected for proper n operation. Regulator Output. Bypass with a 4.7µF low-ESR output capacitor to GND. Connect the OUT pins 5, 6 OUT h together externally. Voltage-Setting Input. Connect to GND to select the factory-preset output voltage. Connect this pin to c an external resistor-divider for adjustable-output operation (see Figure 1) – (AS1364-AD only) 7 SET/BYP Bypass Pin. Connect a 10nF capacitor from this pin to OUT to improve PSRR and noise performance. e (AS1364-AD does not offer this feature) 8 GND Ground T Connect to Exposed pad Connect to PCB metal area for heatsink purposes. May be left open or connected to common ground. Substrate www.austriamicrosystems.com Revision 1.8 2 - 19

AS1364 Datasheet - Absolute Maximum Ratings 5 Absolute Maximum Ratings Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute Maximum Ratings d Parameter Min Max Units Comments Electrical Parameters i l IN, EN, POK to GND -0.3 +7 V a OUT, SET/BYP to GND -0.3 VIN + 0.3 V v Output Short-Circuit Duration Infinite Latch-Up -100 +100 mA JEDEC 78 Electrostatic Discharge l l ESD 2 kV HBM MIL-Std. 883E 3015.7 methods i Temperature Ranges and Storage Conditions G t Thermal Resistance JA 36.3 ºC/W son PCB Operating Temperature Range -40 +85 ºC A Storage Temperature Range -65 +150 ºC t Junction Temperature +125 ºC n s The reflow peak soldering temperature (body temperature) speecified is in accordance with IPC/JEDEC J-STD-020 m “Moisture/Reflow Sensitivity Classification for Non- Package Body Temperature +260 ºC Hermetic Solid State Surface Mount Devices”. t The lead finish for Pb-free leaded packages is matte tin n (100% Sn). a o c l a c i n h c e T www.austriamicrosystems.com Revision 1.8 3 - 19

AS1364 Datasheet - Electrical Characteristics 6 Electrical Characteristics Note: All limits are guaranteed. The parameters with min and max values are guaranteed by production tests or SQC (Statistical Quality Control) methods. VIN = VOUT(NOM) + 500mV or VIN = +2.0V (whichever is greater),CIN = COUT = 4.7µF, EN = IN, TAMB = -40°C to +85ºC (unless otherwise specified). Typical values are at TAMB = +25ºC. d Table 4. Electrical Characteristics i Symbol Parameter Condition Min Typ Max Unit l VIN Input Voltage 2.0 5.5 Va VPOR Power On Reset Falling, 100mV hysteresis 1.79 1.87 1.95 vV IOUT = 250mA, TAMB = +25ºC -0.75 +0.75 Outpu(Pt Vreoslteatg Me oAdcec)uracy IOUT = 250mA -1.5 l+1.5 % IOUT = 1mA to 1A, VIN > (VOUT + 0.5V)1 -2 l+2 i VOUT Adjustable Output Voltage Range G 1.2 t 5.3 V VSET/BYP SET/BYP Voltage Threshold VIN = 2.5V, IOUT = 250mA, 1.1s7 1.20 1.23 V (Adjustable Mode) VOUT set to 2.0V A IOUT Guaranteed Output Current (RMS) 1 A t ILIMIT Short-Circuit Current Limit VOUT = 0 n 1.1 1.5 2.3 A In-Regulation Current Limit VOUTs > 96% of nominal value, VIN  2.0V 1.5 A e SET/BYP Threshold 50 100 150 mV m ISET SET/BYP Input Bias Current VSET/BYP =t 1.20V -100 +100 nA n IOUT = 100µA 35 150 IQ Ground-Pin Current a µA oIOUT = 1A 75 200 IOUT = 250mA, VOUT = 3.3V 35 85 VIN - VOUT Dropout Voltage 2 c mV IOUT = 1A, VOUT = 3.3V 140 320 VLNR Line Regulation VIN from (VOUT + 100mV) to 5.5V, -0.125 +0.125 %/V l ILOAD = 5mA VLDR Load Regulation a IOUT = 1mA to 1A 0.001 %/mA c f = 1kHz, IOUT = 10mA, CBYP = 10nF 78 f = 1kHz, IOUT = 10mA 72 i n f = 10kHz, IOUT = 10mA, CBYP = 10nF 75 PSRR Ripple Rejection dB f = 10kHz, IOUT = 10mA 65 h f = 100kHz, IOUT = 10mA, CBYP = 10nF 54 c f = 100kHz, IOUT = 10mA 46 100Hz to 100kHz, COUT = 3.3µF, 10 e CBYP = 10nF; 100Hz to 100kHz, COUT = 3.3µF; 50 T Output Voltage Noise µVRMS 10Hz to 1MHz, COUT = 3.3µF, 45 CBYP = 10nF; 10Hz to 1MHz, COUT = 3.3µF; 70 www.austriamicrosystems.com Revision 1.8 4 - 19

AS1364 Datasheet - Electrical Characteristics Table 4. Electrical Characteristics (Continued) Symbol Parameter Condition Min Typ Max Unit Shutdown EN = GND, VIN = 5.5V, TAMB = 25°C 0.01 0.5 IOFF Shutdown Supply Current µA EN = GND, VIN = 5.5V 0.1 15 d VIH 2.0V < VIN < 5.5V 1.6 V EN Input Threshold i VIL 2.0V < VIN < 5.5V 0.6 V l EN = IN or GND, TAMB = +25ºC 1 a ISHDNN EN Input Bias Current nA TAMB = +85ºC 5 v POK Output VOL POK Output Low Voltage POK sinking 1mA 0.05 0 .25 V l Operating Voltage Range for Valid POK sinking 100µA 1.1 l5.5 V POK Signal i POK = 5.5V, TAMB G= +25ºC t1 POK Output High leakage Current nA s TAMB = +85ºC 5 POK Threshold Rising edge (refeArenced to VOUT(NOM)) 90 94 98 % Thermal Protection t TSHDNN Thermal Shutdown Temperature n 170 ºC s TSHDNN Thermal Shutdown Hysteresis e 20 ºC Output Capacitor m t Load Capacitor Range 1 4.7 µF COUT Output Capacitor n a Load Capacitor ESR 500 m o 1. Guaranteed by production test of load regulation and line regulation. 2. Dropout voltage is defined as VIN - VOUT, when VOUT is 100cmV below the value of VOUT measured for VIN = (VOUT(NOM) + 500mV). Since the minimum input voltage is 2.0V, this specification is only valid when VOUT(NOM) > 2.0V. l a c i n h c e T www.austriamicrosystems.com Revision 1.8 5 - 19

AS1364 Datasheet - Typical Operating Characteristics 7 Typical Operating Characteristics VIN = VOUT(NOM) + 0.5V, CIN = COUT = 4.7µF, TAMB = 25°C (unless otherwise specified). Figure 3. VDROP vs. IOUT Figure 4. VOUT vs. IOUT; VOUT(NOM) = 3.3V 160 3.31 d 3.309 140 i . 3.308 mV) 120 V) . 3.307 al e ( 100 e ( 3.306 g g v olta 80 olta 3.305 pout V 60 utput V 33..330034 ll o 40 O Dr 3.302 i 20 3.301G t s 0 3.3 0 200 400 600 800 1000 A 0 200 400 600 800 1000 Load Current (mA) Otutput Current (mA) Figure 5. VOUT vs. Temperature; VOUT(NOM) = 3.3V Figure 6. VOUT vs. VIN;n VOUT(NOM) = 3.3V 3.32 s 3.5 e m 3.315 3 t . . V) 3.31 V) 2n.5 e ( a e ( g 3.305 og 2 a a olt olt V 3.3 V 1.5 ut c ut p p Out 3.295 Out 1 l no load 3.29 0.5 a Iout = 1A 3.285 0 c -45 -30 -15 0 15 30 45 60 75 90 0 1 2 3 4 5 6 Tempeirature (°C) Input Voltage (V) n Figure 7. Quiescent Current vs. VIN Figure 8. Quiescent Current vs. IOUT 180 90 h no load 160 80 . c Iout = 1A . A) 140 A) 70 nt (µ 120 e nt (µ 60 rre 1T00 rre 50 u u C 80 C 40 nt nt ce 60 ce 30 s s e e ui 40 ui 20 Q Q Vin = 3.8V 20 10 Vin = 5.5V 0 0 0 1 2 3 4 5 6 0 200 400 600 800 1000 Input Voltage (V) Output Current (mA) www.austriamicrosystems.com Revision 1.8 6 - 19

AS1364 Datasheet - Typical Operating Characteristics Figure 9. Quiescent Current vs. Temperature Figure 10. Spectral Noise vs. Freq; IOUT = 10mA 90 10 COUT = 3.3µF . 80 . z) µA) 70 V/ H nt (60 y (µ 1 d urre50 nsit i nt C40 e De l sce30 ois 0.1 a e N Qui20 ut v 10 no load utp Iout = 250mA O 0 0.01 l -45 -30 -15 0 15 30 45 60 75 90 0.01 0.1 1 10 l100 1000 Temperature (°C) Frequency (kHiz) G t s Figure 11. PSRR vs. Frequency; IOUT = 10mA A 100 t n 80 s e B) . 60 m t d R ( n SR 40 a P o 20 c 0 l 0.01 1 100 10000 a Frequency (kHz) c i n h c e T www.austriamicrosystems.com Revision 1.8 7 - 19

AS1364 Datasheet - Typical Operating Characteristics Figure 12. Line Transient Response; Figure 13. Load Transient Response; VIN = 3.8V to 4.3V, IOUT = 100mA VIN = 3.8V, IOUT = 50mA to 500mA Div VOUT 0mV/Div d VIN 0mV/ 5 i 0 2 l a Div VOUT 20mV/Div IOUT v200mA/ l l 100µs/Div 5µs/Div i G t s Figure 14. Startup; VIN = 3.8V, IOUT = 100mA Figure 15. Startup; VIN = 3.8V, IOUT = 100mA A t n s e m VIN 1V/Div VINnt 1V/Div a o UT Divc UT Div VO 1V/ VO 1V/ l 1ms/Div a 20µs/Div c i n h c e T www.austriamicrosystems.com Revision 1.8 8 - 19

AS1364 Datasheet - Detailed Description 8 Detailed Description The AS1364 output voltage is factory-trimmed or is adjustable from +1.2V to +5V, and is guaranteed to supply 1A of output current. The device consists of a +1.20V internal reference, error amplifier, MOSFET driver, P-channel pass transistor, internal feedback voltage-divider and a comparator (see Figure 16). Figure 16. AS1364 - Block Diagram d i l a v VIN 2.0V to 5.5V 4 l IN l C4.I7NµF IN3 TSheenrsmoarl i MOSFET G 5 t Driver s OUT w/ILIM VOUT A 6 1.2V to 5.0V On 2 Shutdown tOUT Off Logic COUT EN 1.20V 5k n 4.7µF + s Reference Error – e R1 VOUT Ammplifier Logic Supply Voltage t RPOK n 100k a To Controller 1 o 7 POK + SET/BYP c + – – R2 + + l94%VREF – 100mV – 8 a AS1364 GND c i n h c Figure16 shows the block diagram of the AS1364. It identifies the basics of a series linear regulator employing a P-Channel MOSFET as the e control element. A stable voltage reference (1.2V REF in Figure16) is compared with an attenuated sample of the output voltage. Any difference between the two voltages (reference and sample) creates an output from the error amplifier that drives the series control element to reduce the T difference to a minimum. The error amplifier incorporates additional buffering to drive the relatively large gate capacitance of the series pass P- channel MOSFET, when additional drive current is required under transient conditions. Input supply variations are absorbed by the series element, and output voltage variations with loading are absorbed by the low output impedance of the regulator. When in shutdown, a 5k discharge path is connected between the output terminal and ground. www.austriamicrosystems.com Revision 1.8 9 - 19

AS1364 Datasheet - Detailed Description 8.1 Output Voltage Selection At the factory trimmed versions of the AS1364 offering the bypass pin (see Figure ), the output voltage is then set to an internally trimmed voltage (see Ordering Information on page 18). For the adjustable AS1364-AD, an output voltage between +1.2V and +5V can be set by using two external resistors (see Figure 17). In this mode, VOUT is determined by: R d V = V 1+----1-- (EQ 1) OUT SETBYP  R  2 i Where: l VSET/BYP = 1.2V ±0.03V a A simplification of R1 and R2 selection is: v V R = R --------O----U----T-----–1 (EQ 2) 1 2 V  SETBYP l Since the input bias current at SET is less than 100nA, large resistance values can be used for R1 and R2 to minimize power consumption and l therefore increasing efficiency. i G t Note: Up to 125k is acceptable for R2. If the SET pin is connected to GND without a resistor, 3.3V will be set as output voltage. s In preset voltage mode, the impedance from SET to GND should be less than 10k or spurious conditions may cause the voltage at SET to exceed the 50mV threshold. A t Figure 17. Adjustable Output Voltage Typical Application n s e m t n a3 5 IN o OUT VIN VOUT 4 6 COUT C4.I7NµF IN ASc1364 OUT R1 4.7µF On 2 7 Off EN SET/BYP l 8 1 a R2 GND POK Reset Output c i n h 8.2 Shutdown c If pin EN is connected to GND the AS1364 is disabled. In shutdown mode all internal circuits are turned off, reducing supply current to 10nA (typ). For noermal device operation pin EN must be connected to IN. During shutdown, POK goes low. When in shutdown, a 5k (typ) discharge path is connected between the output pin and ground. T 8.3 Power-OK The AS1364 features a power-ok indicator that asserts when the output voltage falls out of regulation. The open-drain POK output goes low when output voltage at OUT falls 6% below its nominal value. A 100k pull-up resistor from POK to a (typically OUT) provides a logic control signal. POK can be used as a power-on-reset (POR) signal to a microcontroller or can drive an external LED to indicate a power failure condition. Note: POK is low during shutdown. www.austriamicrosystems.com Revision 1.8 10 - 19

AS1364 Datasheet - Application Information 9 Application Information 9.1 Dropout Voltage Dropout is the input to output voltage difference, below which the linear regulator ceases to regulate. At this point, the output voltage change follows the input voltage change. Dropout voltage may be measured at different currents and, in particular at the regulator maximum one. From this is obtained the MOSFET maximum series resistance over temperature etc. More generally: d V = I R (EQ 3) DROPOUT LOAD SERIES i Dropout is probably the most important specification when the regulator is used in a battery application. The dropout performance of the l regulator defines the useful “end of life” of the battery before replacement or re-charge is required. a Figure 18. Graphical Representation of Dropout Voltage v l l i GVIN t VOUT s V =V +0.5V IN OUT(TYP) A t n sDropout Voltage VeOUT m 100mV VIN t n a V OUT o V IN c l a Figure18 shows the variation of VOUT as VIN is varied for a certain load current. The practical value of dropout is the differential voltage (VOUT- c VIN) measured at the point where the LDO output voltage has fallen by 100mV below the nominal, fully regulated output value. The nominal regulated output voltage of the LDO is that obtained when there is 500mV (or greater) input-output voltage differential. i n 9.2 Efficiency Low quiescent current andh low input-output voltage differential are important in battery applications amongst others, as the regulator efficiency is directly related to quiescent current and dropout voltage. Efficiency is given by: c V I Efficiency = ------L---O---A---D-----------L---O---A---D----100% (EQ 4) V I +I  e IN Q LOAD Where: IQ = QTuiescent current of LDO www.austriamicrosystems.com Revision 1.8 11 - 19

AS1364 Datasheet - Application Information 9.3 Power Dissipation Maximum power dissipation (PD) of the LDO is the sum of the power dissipated by the internal series MOSFET and the quiescent current required to bias the internal voltage reference and the internal error amplifier, and is calculated as: PD Seriespass = I V –V  Watts (EQ 5) MAX LOADMAX INMAX OUTMIN Internal power dissipation as a result of the bias current for the internal voltage reference and the error amplifier is calculated as: d PD Bias = V I Watts (EQ 6) MAX INMAX Q i Total LDO power dissipation is calculated as: l PD Total = PD Seriespass+PD Bias Watts (EQa 7) MAX MAX MAX v 9.4 Junction Temperature Under all operating conditions, the maximum junction temperature should not be allowed to exceed 125ºC (unless the data shee t specifically allows). Limiting the maximum junction temperature requires knowledge of the heat path from junction to case (JCºC/W fixeld by the IC manufacturer), and adjustment of the case to ambient heat path (CAºC/W) by manipulation of the PCB copper area adjalcent to the IC position. i Figure 19. Package Physical Arrangements G t s A TDFN Package t n s Package Chip e Bond Wire m t Lead Frame n a PCB o Exposed Pad c l a Figure 20. Steady State Heat Flow Equivalent Circuit c i n Junction Package PCB/Heatsink Ambient h TJ°C TC°C TS°C TA°C c e RJC RCS RSA T Chip Power www.austriamicrosystems.com Revision 1.8 12 - 19

AS1364 Datasheet - Application Information Total Thermal Path Resistance: R = R +R +R (EQ 8) JA JC CS SA Junction Temperature (TJºC) is determined by: T = PD R +T ºC (EQ 9) J MAX JA AMB d 9.5 Explanation of Steady State Specifications i 9.5.1 Line Regulation l Line regulation is defined as the change in output voltage when the input (or line) voltage is changed by a known quantity. It is a measure of tahe regulator’s ability to maintain a constant output voltage when the input voltage changes. Line regulation is a measure of the DC open loop gain v of the error amplifier. More generally: V Line Regulation = --------O----U---T- and is a pure number V l IN l In practise, line regulation is referred to the regulator output voltage in terms of % / VOUT . This is particularly useful wihen the same regulator is available with numerous output voltage trim options. G t s V 100 Line Regulation = --------O----U---T------------- % / V (EQ 10) VIN AVOUT t 9.5.2 Load Regulation n Load regulation is defined as the change of the output voltage when the load current is changed by a known quantity. It is a measure of the s regulator’s ability to maintain a constant output voltage when the load changes. Load regulation is a measure of the DC closed loop output e resistance of the regulator. More generally: m V t Load Regulation = --------O----U---T- and is unnits of ohms () (EQ 11) I a OUT In practise, load regulation is referred to the regulator output voltage in oterms of % / mA. This is particularly useful when the same regulator is available with numerous output voltage trim options. cV 100 Load Regulation = --------O----U---T----------------- % / mA (EQ 12) I V OUT OUT l 9.5.3 Setting Accuracy a Accuracy of the final output voltage is determined by the accuracy of the ratio of R1 and R2, the reference accuracy and the input offset voltage of the error amplifier. When the regulator is csupplied pre-trimmed, the output voltage accuracy is fully defined in the output voltage specification. When the regulator has a SET terminal, the output voltage may be adjusted externally. In this case, the tolerance of the external resistor network i must be incorporated into the final accuracy calculation. Generally: n V = V V 1+R-----1----------R----1-- (EQ 13) h OUT SET SET  R2R2 The reference tolerance is given both at 25ºC and over the full operating temperature range. c 9.5.4 Total Accuracy e Away from dropout, total steady state accuracy is the sum of setting accuracy, load regulation and line regulation. Generally: T Total % Accuracy = Setting % Accuracy + Load Regulation % + Line Regulation % (EQ 14) www.austriamicrosystems.com Revision 1.8 13 - 19

AS1364 Datasheet - Application Information 9.6 Explanation of Dynamic Specifications 9.6.1 Power Supply Rejection Ratio (PSRR) Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low d quiescent current conditions. Generally: V PSSR = 20Log--------O---U---T-- dB using lower case  to indicate AC values (EQ 15) i V l IN a Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally. v 9.6.2 Output Capacitor ESR The series regulator is a negative feedback amplifier, and as such is conditionally stable. The ESR of the output capacitor is usu ally used to cancel one of the open loop poles of the error amplifier in order to produce a single pole response. Excessive ESR values mlay actually cause instability by excessive changes to the closed loop unity gain frequency crossover point. The range of ESR values for stalbility is usually shown either by a plot of stable ESR versus load current, or a limit statement in the datasheet. i Some ceramic capacitors exhibit large capacitance and ESR variations with temperatGure. Z5U and Y5V capacitorst may be required to ensure stability at temperatures below TAMB = -10ºC. With X7R or X5R capacitors, a 4.7µF capacitor should be sufficsient at all operating temperatures. Larger output capacitor values (10µF max) help to reduce noise and improvAe load transient-response, s tability and power-supply rejection. t 9.6.3 Input Capacitor n An input capacitor at VIN is required for stability. It is recommended that a 4.7µF capacitor be connected between the AS1364 power supply s input pin VIN and ground (capacitance value may be increased without limit subject to ESR limits). This capacitor must be located at a distance e of not more than 1cm from the VIN pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used m at the input. t 9.6.4 Noise n a The regulator output is a DC voltage with noise superimposed on the output. The noise comes from three sources; the reference, the error amplifier input stage, and the output voltage setting resistors. Noise is ao random fluctuation and if not minimized in some applications, will produce system problems. c 9.6.5 Transient Response The series regulator is a negative feedback system, and therefore any change at the output will take a finite time to be corrected by the error l loop. This “propagation time” is related to the bandwidth of the error loop. The initial response to an output transient comes from the output a capacitance, and during this time, ESR is the dominant mechanism causing voltage transients at the output. More generally: V c= I R Units are Volts, Amps, Ohms. (EQ 16) TRANSIENT OUTPUT ESR Thus an initial +50mA change of output current will produce a -12mV transient when the ESR=240m. Remember to keep the ESR within i stability recommendations when reducing ESR by adding multiple parallel output capacitors. n After the initial ESR transient, there follows a voltage droop during the time that the LDO feedback loop takes to respond to the output change. This drift is approx. linear ihn time and sums with the ESR contribution to make a total transient variation at the output of: cVTRANSIENT = IOUTPUTRESR+-C------T--------- Units are Volts, Seconds, Farads, Ohms. (EQ 17) LOAD Where: e CLOAD is output capacitor T = PrTopagation delay of the LDO This shows why it is convenient to increase the output capacitor value for a better support for fast load changes. Of course the formula holds for t < “propagation time”, so that a faster LDO needs a smaller cap at the load to achieve a similar transient response. For instance 50mA load current step produces 50mV output drop if the LDO response is 1usec and the load cap is 1µF. There is also a steady state error caused by the finite output impedance of the regulator. This is derived from the load regulation specification discussed above. www.austriamicrosystems.com Revision 1.8 14 - 19

AS1364 Datasheet - Application Information 9.6.6 Turn On Time This specification defines the time taken for the LDO to awake from shutdown. The time is measured from the release of the enable pin to the time that the output voltage is within 5% of the final value. It assumes that the voltage at VIN is stable and within the regulator Min and Max limits. Shutdown reduces the quiescent current to very low, mostly leakage values (<1µA). 9.6.7 Thermal Protection d To prevent operation under extreme fault conditions, such as a permanent short circuit at the output, thermal protection is built into the device. Die temperature is measured, and when a 170ºC (AS1364) threshold is reached, the device enters shutdown. When the die cools sufficiently, the device will restart (assuming input voltage exists and the device is enabled). Hysteresis of 20ºC prevents low frequency oscillation between start- i up and shutdown around the temperature threshold. l a v l l i G t s A t n s e m t n a o c l a c i n h c e T www.austriamicrosystems.com Revision 1.8 15 - 19

AS1364 Datasheet - Package Drawings and Markings 10 Package Drawings and Markings The device is available in an 8-pin TDFN 3x3mm package. Figure 21. 8-pin TDFN 3x3mm Package D D2 A SEE DETAIL B D2/2 d B i NX L l a 2 2/ E E E2 v 2x C PIN 1 INDEX AREA aaa (D/2 4xE/2) l l NX K PIN 1( IDN/2D xEEX/2 A)REA aaa C 2x 7 e N N-1 iNX b 5 4 TOP VIEW G 6 (ND-1) X e tdddbbbC C A B s e BTM VIEW Terminal Tip e/2 5 A ccc C t A3 C 7 NX A n SEATING s 0.08 C SIDE VIEW PLANE 1 e A m t Datum A or B EVEN TERMINAL SIDE n a Symbol Min Typ Max Notes Symbol Min Typ Max Notes o A 0.70 0.75 0.80 1, 2 D BSC 3.00 1, 2 A1 0.00 0.02 0.05 1, 2 E BSC 3.00 1, 2 c A3 0.20 REF 1, 2 D2 1.60 2.50 1, 2 L1 0.15 1, 2 E2 1.35 1.75 1, 2 L2 0.13 l1, 2 L 0.30 0.40 0.50 1, 2 a aaa 0.15 1, 2  0º 14º 1, 2 bbb 0.10 1, 2 K 0.20 1, 2 c ccc 0.10 1, 2 b 0.25 0.30 0.35 1, 2, 5 ddd 0.05i 1, 2 e 0.65 eee 0n.08 1, 2 N 8 1, 2 ggg 0.10 1, 2 ND 4 1, 2, 5 h Notes: c 1. Figure21 is shown for illustration only. e 2. All dimensions are in millimeters; angles in degrees. 3. Dimensioning and tolerancing conform to ASME Y14.5 M-1994. T 4. N is the total number of terminals. 5. The terminal #1 identifier and terminal numbering convention shall conform to JEDEC 95-1, SPP-012. Details of terminal #1 identifier are optional, but must be located within the zone indicated. The terminal #1 identifier may be either a mold or marked feature. 6. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 7. ND refers to the maximum number of terminals on side D. 8. Unilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals www.austriamicrosystems.com Revision 1.8 16 - 19

AS1364 Datasheet - Package Drawings and Markings Revision History Revision Date Owner Description - - - Initial revisions 1.5 Sep 2011 Changes made across document d 1.6 18 Nov, 2011 afe 1.7 12 Dec, 2011 Updated equations in Power Dissipation section i l 1.8 03 Apr, 2012 Corrected Figure1, Figure16, Figure17 a Note: Typos may not be explicitly mentioned under revision history. v l l i G t s A t n s e m t n a o c l a c i n h c e T www.austriamicrosystems.com Revision 1.8 17 - 19

AS1364 Datasheet - Ordering Information 11 Ordering Information The device is available as the standard products shown in Table 5. Table 5. Ordering Information Ordering Code Marking Output SET/BYP Delivery Form Package d Adjustable AS1364-BTDT-AD ASRF SET Tape and Reel 8-pin TDFN 3x3mm (preset to 3.3V) i AS1364-BTDT-12* ASRN 1.2V BYP Tape and Reel 8-pin TDFN 3x3mm l AS1364-BTDT-15 ASRG 1.5V BYP Tape and Reel 8-pin TDFN 3x3mma AS1364-BTDT-18 ASRH 1.8V BYP Tape and Reel 8-pin TDFN 3x3mm v AS1364-BTDT-30 ASRJ 3.0V BYP Tape and Reel 8-pin TDFN 3x3mm AS1364-BTDT-33 ASRI 3.3V BYP Tape and Reel 8-pin T DFN 3x3mm AS1364-BTDT-45 ASRK 4.5V BYP Tape and Reel 8-plin TDFN 3x3mm l *Future product. i Non-standard devices are available between 1.4V and 4.6V in 50mV steps and betweGen 4.6V and 5.0V in 100mV tsteps. For more information and inquiries contact http://www.austriamicrosystems.com/contact s A t Note: All products are RoHS compliant. Buy our products or get free samples online at ICdirect: h ttp://www.austriamicrosystemns.com/ICdirect s Technical Support is available at http://www.austriamicrosystems.com/Technicael-Support m For further information and requests, please contact us mailto:sales@austtriamicrosystems.com or find your local distributor at http://www.austriamicrosystems.com/dnistributor a o c l a c i n h c e T www.austriamicrosystems.com Revision 1.8 18 - 19

AS1364 Datasheet - Ordering Information Copyrights Copyright © 1997-2012, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. d Disclaimer i l Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. a austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at v any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are l specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 l parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. i The information furnished here by austriamicrosystems AG is believed to be correct aGnd accurate. However, austritamicrosystemsAG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property dasmage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to rAecipient or any third party sh all arise or flow out of austriamicrosystemsAG rendering of technical or other services. t n s e m t n a o c l Contact Information a Headquarters c austriamicrosystems AG Tobelbaderstrasse 30 i A-8141 Unterpremstaetten, Austrina Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01h c For Sales Offices, Distributors and Representatives, please visit: http://www.aeustriamicrosystems.com/contact T www.austriamicrosystems.com Revision 1.8 19 - 19

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: a ms: AS1364-BTDT-18 AS1364-BTDT-30 AS1364-BTDT-AD AS1364-BTDT-45 AS1364-BTDT-33