1 kV RMS Six-Channel Digital Isolators Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 FEATURES FUNCTIONAL BLOCK DIAGRAMS Small 20-lead QSOP VDD1A 1 ADuM7640 20VDD2A 1000 V rms isolation rating GND1 2 19GND2 Safety and regulatory approvals (pending): VIA 3 ENCODE DECODE 18VOA UL recognition (pending) VIB 4 ENCODE DECODE 17VOB 1000 V rms for 1 minute per UL 1577 VIC 5 ENCODE DECODE 16VOC Low power operation VID 6 ENCODE DECODE 15VOD 3.3 V operation VDD1B 7 14VDD2B 1.6 mA per channel maximum at 0 Mbps to 1 Mbps VIE 8 ENCODE DECODE 13VOE 5 V7 o.8p merAat pioenr channel maximum at 25 Mbps GNVDIF1190 ENCODE DECODE 1121VGONFD2 10448-001 2.2 mA per channel maximum at 0 Mbps to 1 Mbps Figure 1. ADuM7640 11.2 mA per channel maximum at 25 Mbps Bidirectional communication VDD1A 1 ADuM7641 20VDD2A Up to 25 Mbps data rate (NRZ) GND1 2 19GND2 3 V/5 V level translation VIA 3 ENCODE DECODE 18VOA High temperature operation: 105°C VIB 4 ENCODE DECODE 17VOB High common-mode transient immunity: >15 kV/μs VIC 5 ENCODE DECODE 16VOC VID 6 ENCODE DECODE 15VOD APPLICATIONS VDD1B 7 14VDD2B General-purpose, multichannel isolation VOE 8 DECODE ENCODE 13VIE SRPSI- 2in3t2e/rRfSa-c4e2/d2a/RtaS -c4o8n5v etrratners ciseoivlaetriso n GNVDIF1190 ENCODE DECODE 1121VGONFD2 10448-002 Figure 2. ADuM7641 Industrial field bus isolation GENERAL DESCRIPTION VDD1A 1 ADuM7642 20VDD2A The ADuM7640/ADuM7641/ADuM7642/ADuM76431 are GND1 2 19GND2 6-channel digital isolators based on the Analog Devices, Inc., VIA 3 ENCODE DECODE 18VOA iCoupler® technology. These 1 kV digital isolation devices are VIB 4 ENCODE DECODE 17VOB VIC 5 ENCODE DECODE 16VOC packaged in a small 20-lead QSOP. They offer space savings and VOD 6 DECODE ENCODE 15VID a lower price than 2.5 kV or 5 kV isolation solutions when only VDD1B 7 14VDD2B functional isolation is needed. VOE 8 DECODE ENCODE 13VIE Tpohwise fra mcoinlys,u lmikep tmioann, yu Asinnga loong eD-teevnitche st ois oonlaet-osrisx,t ohf ftehres pvoewrye lro owf GNVDIF1190 ENCODE DECODE 1121VGONFD2 10448-003 other digital isolators, with the supply voltage on either side Figure 3. ADuM7642 ranging from 3.0 V to 5.5 V. Despite their low power consumption, the ADuM7640/ADuM7641/ADuM7642/ADuM7643 provide VDD1A 1 ADuM7643 20VDD2A low pulse width distortion (< 6 ns for C grade) and a channel- GND1 2 19GND2 by-channel glitch filter to protect the device against extraneous VIA 3 ENCODE DECODE 18VOA noise disturbances. Four channel direction combinations are VIB 4 ENCODE DECODE 17VOB available with a maximum data rate of 1 Mbps or 25 Mbps. All VOC 5 DECODE ENCODE 16VIC products have a default output high logic state in the absence of VOD 6 DECODE ENCODE 15VID VDD1B 7 14VDD2B input power. VOE 8 DECODE ENCODE 13VIE GNVDIF1190 ENCODE DECODE 1121VGONFD2 10448-004 Figure 4. ADuM7643 1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents pending. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ......................................................... 10 Applications ....................................................................................... 1 ESD Caution................................................................................ 10 General Description ......................................................................... 1 Pin Configurations and Function Descriptions ......................... 11 Functional Block Diagrams ............................................................. 1 Typical Performance Characteristics ........................................... 15 Revision History ............................................................................... 2 Applications Information .............................................................. 17 Specifications ..................................................................................... 3 Printed Circuit Board Layout ................................................... 17 Electrical Characteristics—5 V Operation................................ 3 Propagation Delay-Related Parameters ................................... 17 Electrical Characteristics—3.3 V Operation ............................ 5 DC Correctness ............................................................................ 17 Electrical Characteristics—Mixed 5 V/3.3 V Operation ........ 7 Magnetic Field Immunity ............................................................. 18 Electrical Characteristics—Mixed 3.3 V/5 V Operation ........ 8 Power Consumption .................................................................. 19 Package Characteristics ............................................................... 9 Insulation Lifetime ..................................................................... 19 Regulatory Information ............................................................... 9 Outline Dimensions ....................................................................... 20 Insulation and Safety Related Specifications ............................ 9 Ordering Guide .......................................................................... 20 Recommended Operating Conditions ...................................... 9 REVISION HISTORY 9/12—Revision 0: Initial Version Rev. 0 | Page 2 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION All typical specifications are at T = 25°C, V = V = 5 V. Minimum/maximum specifications apply over the entire recommended operation A DD1 DD2 range of 4.5 V ≤ V ≤ 5.5 V, 4.5 V ≤ V ≤ 5.5 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching specifications are tested DD1 DD2 A with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 1. A Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Pulse Width PW 250 40 ns Within PWD limit Data Rate 1 25 Mbps Within PWD limit Propagation Delay t , t 75 28 40 50 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 25 2 6 ns |t − t | PLH PHL Change vs. Temperature 5 3 ps/°C Propagation Delay Skew1 t 20 14 ns PSK Channel Matching Codirectional2 t 25 6 12 ns PSKCD Opposing Directional3 t 30 7 12 ns PSKOD Jitter 2 2 ns 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. 3 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. Table 2. 1 Mbps—A and C Grades 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT No load ADuM7640 I 5.7 7.0 44 54 mA DD1 I 4.4 5.9 11 13 mA DD2 ADuM7641 I 5.5 6.8 38 46 mA DD1 I 4.6 5.7 15 19 mA DD2 ADuM7642 I 5.2 6.3 31 38 mA DD1 I 4.8 6.0 19 24 mA DD2 ADuM7643 I 4.8 6.0 24 30 mA DD1 I 5.0 6.3 22 29 mA DD2 Rev. 0 | Page 3 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Voltage Threshold Logic High V 0.7 V V IH DDx Logic Low V 0.3 V V IL DDx Output Voltages Logic High V V − 0.1 5.0 V I = −20 µA, V = V OH DDx Ox Ix IxH V − 0.4 4.8 V I = −4 mA, V = V DDx Ox Ix IxH Logic Low V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 4 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDx Supply Current per Channel Quiescent Supply Current Input I 0.95 1.16 mA DDI (Q) Output I 0.73 0.98 mA DDO (Q) Dynamic Supply Current Input I 0.26 mA/Mbps DDI (D) Output I 0.04 mA/Mbps DDO (D) AC SPECIFICATIONS Output Rise/Fall Time t/t 2.0 ns 10% to 90% R F Common-Mode Transient Immunity1 |CM| 15 25 kV/µs V = V , V = 1000 V, transient Ix DDx CM magnitude = 800 V Refresh Rate f 600 kHz DC data inputs r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOL < 0.8 × VDDLx or VOH > 0.7 × VDDIx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 4 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 ELECTRICAL CHARACTERISTICS—3.3 V OPERATION All typical specifications are at T = 25°C, V = V = 3.3 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range of 3.0 V ≤ V ≤ 3.6 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 4. A Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Pulse Width PW 250 40 ns Within PWD limit Data Rate 1 25 Mbps Within PWD limit Propagation Delay t , t 85 33 49 66 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 25 2 6 ns |t − t | PLH PHL Change vs. Temperature 5 3 ps/°C Propagation Delay Skew1 t 20 14 ns PSK Channel Matching Codirectional2 t 25 6 12 ns PSKCD Opposing Directional3 t 30 6 15 ns PSKOD Jitter 2 2 ns 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. 3 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. Table 5. 1 Mbps—A and C Grades 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT No load ADuM7640 I 4.1 5.2 32 38 mA DD1 I 3.3 4.3 7.2 8.7 mA DD2 ADuM7641 I 3.9 4.9 27 33 mA DD1 I 3.4 4.2 11 13 mA DD2 ADuM7642 I 3.7 4.7 23 27 mA DD1 I 3.5 4.4 14 16 mA DD2 ADuM7643 I 3.5 4.4 18 21 mA DD1 I 3.6 4.5 16 20 mA DD2 Rev. 0 | Page 5 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet Table 6. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Voltage Threshold Logic High V 0.7 V V IH DDx Logic Low V 0.3 V V IL DDx Output Voltages Logic High V V − 0.2 3.3 V I = −20 µA, V = V OH DDx Ox Ix IxH V − 0.5 3.1 V I = −4 mA, V = V DDx Ox Ix IxH Logic Low V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 4 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDx Supply Current per Channel Quiescent Supply Current Input I 0.68 0.87 mA DDI (Q) Output I 0.55 0.72 mA DDO (Q) Dynamic Supply Current Input I 0.19 mA/Mbps DDI (D) Output I 0.03 mA/Mbps DDO (D) AC SPECIFICATIONS Output Rise/Fall Time t/t 2.8 ns 10% to 90% R F Common-Mode Transient Immunity1 |CM| 15 20 kV/µs V = V , V = 1000 V, Ix DDx CM transient magnitude = 800 V Refresh Rate f 550 kHz DC data inputs r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOL < 0.8 VDDLx or VOH > 0.7 × VDDIx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 6 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OPERATION All typical specifications are at T = 25°C, V = 5 V, V = 3.3 V. Minimum/maximum specifications apply over the entire recom- A DD1 DD2 mended operation range of 4.5 V ≤ V ≤ 5.5 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching DD1 DD2 A specifications are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 7. A Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Pulse Width PW 250 40 ns Within PWD limit Data Rate 1 25 Mbps Within PWD limit Propagation Delay t , t 80 30 42 58 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 25 2 6 ns |t − t | PLH PHL Change vs. Temperature 5 3 ps/°C Propagation Delay Skew1 t 20 14 ns PSK Channel Matching Codirectional2 t 25 5 15 ns PSKCD Opposing Directional3 t 30 8 15 ns PSKOD Jitter 2 2 ns 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. 3 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. Table 8. 1 Mbps—A, C Grades 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT No load ADuM7640 IDD1 5.7 7.0 44 54 mA IDD2 3.3 4.1 7.5 8.7 mA ADuM7641 IDD1 5.4 6.8 38 46 mA IDD2 3.4 4.0 11 13 mA ADuM7642 IDD1 5.1 6.3 31 38 mA IDD2 3.5 4.3 14 16 mA ADuM7643 IDD1 4.8 6.0 24 30 mA IDD2 3.6 4.3 16 20 mA Table 9. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Voltage Threshold Logic High V 0.7 V V IH DDx Logic Low V 0.3 V V IL DDx Output Voltages Logic High V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −4 mA, V = V DDx DDx Ox Ix IxH Logic Low V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 4 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDx AC SPECIFICATIONS Output Rise/Fall Time t/t 2.5 ns 10% to 90% R F Common-Mode Transient Immunity1 |CM| 15 20 kV/µs V = V , V = 1000 V, Ix DDx CM transient magnitude = 800 V Refresh Rate f 600 kHz DC data inputs r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOL < 0.8 VDDLx or VOH > 0.7 × VDDIx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 7 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V OPERATION All typical specifications are at T = 25°C, V = 3.3 V, V = 5 V. Minimum/maximum specifications apply over the entire recom- A DD1 DD2 mended operation range of 3.0 V ≤ V ≤ 3.6 V, 4.5 V ≤ V ≤ 5.5 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching DD1 DD2 A specifications are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 10. A Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Pulse Width PW 250 40 ns Within PWD limit Data Rate 1 25 Mbps Within PWD limit Propagation Delay t , t 80 29 46 60 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 25 2 6 ns |t − t | PLH PHL Change vs. Temperature 5 3 ps/°C Propagation Delay Skew1 t 20 14 ns PSK Channel Matching Codirectional2 t 25 6 13 ns PSKCD Opposing Directional3 t 30 9 18 ns PSKOD Jitter 2 2 ns 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. 3 Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. Table 11. 1 Mbps—A, C Grades 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT No load ADuM7640 I 4.1 4.9 32 38 mA DD1 I 4.5 5.9 11 13 mA DD2 ADuM7641 I 3.9 4.7 27 33 mA DD1 I 4.6 5.7 15 19 mA DD2 ADuM7642 I 3.7 4.4 23 27 mA DD1 I 4.8 6.0 19 24 mA DD2 ADuM7643 I 3.5 4.2 18 21 mA DD1 I 5.0 6.2 22 29 mA DD2 Table 12. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Voltage Threshold Logic High V 0.7 V V IH DDx Logic Low V 0.3 V V IL DDx Output Voltages Logic High V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −4 mA, V = V DDx DDx Ox Ix IxH Logic Low V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 4 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDx AC SPECIFICATIONS Output Rise/Fall Time t/t 2.5 ns 10% to 90% R F Common-Mode Transient Immunity1 |CM| 15 20 kV/µs V = V , V = 1000 V, Ix DDx CM transient magnitude = 800 V Refresh Rate f 550 kHz DC data inputs r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOL < 0.8 VDDLx or VOH > 0.7 × VDDIx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. 0 | Page 8 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 PACKAGE CHARACTERISTICS Table 13. Parameter Symbol Min Typ Max Unit Test Conditions/Comments Resistance (Input to Output)1 R 1013 Ω I-O Capacitance (Input to Output)1 C 2 pF f = 1 MHz I-O Input Capacitance2 C 4.0 pF I IC Junction-to-Ambient Thermal Resistance θ 76 °C/W Thermocouple located at JA center of package underside 1 The device is considered a 2-terminal device: Pin 1 through Pin 10 are shorted together, and Pin 11 through Pin 20 are shorted together. 2 Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADuM7640/ADuM7641/ADuM7642/ADuM7643 are approved by the organizations listed in Table 14. See Table 18 and the Insulation Lifetime section for recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 14. UL (Pending) Recognized Under UL 1577 Component Recognition Program1 Single Protection,1000 V rms Isolation Voltage File E274400 1 In accordance with UL 1577, each ADuM7640/ADuM7641/ADuM7642/ADuM7643 is proof tested by applying an insulation test voltage ≥ 1200 V rms for 1 sec (current leakage detection limit = 5 µA). INSULATION AND SAFETY RELATED SPECIFICATIONS Table 15. Parameter Symbol Value Unit Test Conditions/Comments Rated Dielectric Insulation Voltage 1000 V rms 1 minute duration Minimum External Air Gap (Clearance) L(I01) 3.8 mm min Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage) L(I02) 2.8 mm min Measured from input terminals to output terminals, shortest distance path along body Minimum Internal Gap (Internal Clearance) 2.6 μm min Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1 Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1) RECOMMENDED OPERATING CONDITIONS 350 Table 16. 300 A) Parameter Symbol Min Max Unit m T ( 250 Operating Temperature TA −40 +105 °C N E Supply Voltages1 V , V 3.0 5.5 V R DD1 DD2 UR 200 Input Signal Rise and Fall 1.0 ms C G Times N MITI 150 LI 1 All voltages are relative to their respective grounds. See the DC Correctness Y- 100 section for information about immunity to external magnetic fields. T E AF S 50 00 50CASE TEMP1E0R0ATURE (°C)150 200 10448-005 Figure 5. Thermal Derating Curve, Dependence of Safety-Limiting Values on Case Temperature per DIN V VDE V 0884-10 Rev. 0 | Page 9 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Stresses above those listed under Absolute Maximum Ratings Table 17. may cause permanent damage to the device. This is a stress rating Parameter Rating only; functional operation of the device at these or any other Storage Temperature (T ) Range −65°C to +150°C conditions above those indicated in the operational section of ST Ambient Operating Temperature (T) −40°C to +105°C this specification is not implied. Exposure to absolute maximum A Supply Voltages (V , V ) −0.5 V to +7.0 V rating conditions for extended periods may affect device reliability. DD1 DD2 Input Voltages (VIA, VIB, VIC, VID, VIE, VIF)1, 2 −0.5 V to VDDI + 0.5 V ESD CAUTION Output Voltages (V , V , V , V , V , −0.5 V to V + 0.5 V OA OB OC OD IE DDO V )1, 2 IF Average Output Current per Pin3 Side 1 (I ) −10 mA to +10 mA O1 Side 2 (IO2) −10 mA to +10 mA Common-Mode Transients3 −100 kV/µs to +100 kV/µs 1 VDDI and VDDO refer to the supply voltages on the input and output sides of a given channel, respectively. See the Printed Circuit Board Layout section. 2 See Figure 5 for maximum rated current values for various temperatures. 3 Refers to common-mode transients across the insulation barrier. Common- mode transients exceeding the absolute maximum ratings may cause latch-up or permanent damage. Table 18. Maximum Continuous Working Voltage1 Parameter Max Unit Constraint AC Voltage, Bipolar Waveform 420 V peak 50-year minimum lifetime AC Voltage, Unipolar Waveform Basic Insulation 420 V peak 50-year minimum lifetime DC Voltage Basic Insulation 420 V peak 50-year minimum lifetime 1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information. Table 19. Truth Table (Positive Logic) V Input1 V State2 V State3 V Output1 Description Ix DDI DDO Ox H Powered Powered H Normal operation; data is high. L Powered Powered L Normal operation; data is low. X Unpowered Powered H Input unpowered. Output pins are in the default high state. Outputs return to input state within 1.6 µs of V power restoration. See the pin DDI function descriptions (Table 20 through Table 23) for more information. X Powered Unpowered Z Output unpowered. Output pins are in high impedance state. Outputs return to input state within 1.6 µs of V power restoration. See the pin DDO function descriptions (Table 20 through Table 23Table 22) for more information. 1 VIx and VOx refer to the input and output signals of a given channel (A, B, C, D, E or F). 2 VDDI refers to the supply voltage on the input side of a given channel (A, B, C, D, E or F). 3 VDDO refers to the supply voltage on the output side of a given channel (A, B, C, D, E or F). Rev. 0 | Page 10 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD1A 1 20 VDD2A GND1* 2 19 GND2* VIA 3 18 VOA VIB 4 ADuM7640 17 VOB VIC 5 (NToOt Pto V SIEcaWle) 16 VOC VID 6 15 VOD VDD1B 7 14 VDD2B VIE 8 13 VOE VIF 9 12 VOF GND1* 10 11 GND2* *PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED. CIIPSNIO NTRNESENR CTENOOCA MTPLIMCLNYBEG NC SBDOIDOENETDN H.2E P PGCIINTRN EOS1D1 UT .AN OCND OPD INCS PNB RIE NSEC IC1TD9OIE NAM G1RM GEBERONOTDUHENDD. 10448-006 Figure 6. ADuM7640 Pin Configuration Table 20. ADuM7640 Pin Function Descriptions Pin No. Mnemonic Description 1 V Supply Voltage A for Isolator Side 1 (3.0 V to 5.5 V). Pin 1 must be connected externally to Pin 7. Connect a 0.01 µF to DD1A 0.1 µF between V (Pin 1) and GND (Pin 2). DD1A 1 2 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the 1 PCB ground plane is recommended. 3 V Logic Input A. IA 4 V Logic Input B. IB 5 V Logic Input C. IC 6 V Logic Input D. ID 7 V Supply Voltage B for Isolator Side 1 (3.0 V to 5.5 V). Pin 7 must be connected externally to Pin 1. Connect a 0.01 µF to DD1B 0.1 µF between V (Pin 7) and GND (Pin 10). DD1B 1 8 V Logic Input E. IE 9 V Logic Input F. IF 10 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the PCB 1 ground plane is recommended. 11 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 12 V Logic Output F. OF 13 V Logic Output E. OE 14 V Supply Voltage B for Isolator Side 2 (3.0 V to 5.5 V). Pin 14 must be connected externally to Pin 20. Connect a 0.01 µF DD2B to 0.1 µF between V (Pin 14) and GND (Pin 11). DD2B 2 15 V Logic Output D. OD 16 V Logic Output C. OC 17 V Logic Output B. OB 18 V Logic Output A. OA 19 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 20 V Supply Voltage A for Isolator Side 2 (3.0 V to 5.5 V). Pin 20 must be connected externally to Pin 14. Connect a 0.01 µF DD2A to 0.1 µF between V (Pin 20) and GND (Pin 19). DD2A 2 Reference the AN-1109 Application Note for specific layout guidelines. Rev. 0 | Page 11 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet VDD1A 1 20 VDD2A GND1* 2 19 GND2* VIA 3 18 VOA VIB 4 ADuM7641 17 VOB VIC 5 (NToOt Pto V SIEcaWle) 16 VOC VID 6 15 VOD VDD1B 7 14 VDD2B VOE 8 13 VIE VIF 9 12 VOF GND1* 10 11 GND2* *PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED. CIIPSNIO NTRNESENR CTENOOCA MTPLIMCLNYBEG NC SBDOIDOENETDN H.2E P PGCIINTRN EOS1D1 UT .AN OCND OPD INCS PNB RIE NSEC IC1TD9OIE NAM G1RM GEBERONOTDUHENDD. 10448-007 Figure 7. ADuM7641 Pin Configuration Table 21. ADuM7641 Pin Function Descriptions Pin No. Mnemonic Description 1 V Supply Voltage A for Isolator Side 1 (3.0 V to 5.5 V). Pin 1 must be connected externally to Pin 7. Connect a 0.01 µF to DD1A 0.1 µF between V (Pin 1) and GND (Pin 2). DD1A 1 2 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the PCB 1 ground plane is recommended. 3 V Logic Input A. IA 4 V Logic Input B. IB 5 V Logic Input C. IC 6 V Logic Input D. ID 7 V Supply Voltage B for Isolator Side 1 (3.0 V to 5.5 V). Pin 7 must be connected externally to Pin 1. Connect a 0.01 µF to DD1B 0.1 µF between V (Pin 7) and GND (Pin 10). DD1B 1 8 V Logic Output E. OE 9 V Logic Input F. IF 10 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the PCB 1 ground plane is recommended. 11 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 12 V Logic Output F. OF 13 V Logic Input E. IE 14 V Supply Voltage B for Isolator Side 2 (3.0 V to 5.5 V). Pin 14 must be connected externally to Pin 20. Connect a 0.01 µF DD2B to 0.1 µF between V (Pin 14) and GND (Pin 11). DD2B 2 15 V Logic Output D. OD 16 V Logic Output C. OC 17 V Logic Output B. OB 18 V Logic Output A. OA 19 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 20 V Supply Voltage A for Isolator Side 2 (3.0 V to 5.5 V). Pin 20 must be connected externally to Pin 14. Connect a 0.01 µF DD2A to 0.1 µF between V (Pin 20) and GND (Pin 19). DD2A 2 Reference the AN-1109 Application Note for specific layout guidelines. Rev. 0 | Page 12 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 VDD1A 1 20 VDD2A GND1* 2 19 GND2* VIA 3 18 VOA VIB 4 ADuM7642 17 VOB VIC 5 (NToOt Pto V SIEcaWle) 16 VOC VOD 6 15 VID VDD1B 7 14 VDD2B VOE 8 13 VIE VIF 9 12 VOF GND1* 10 11 GND2* *PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED. CIIPSNIO NTRNESENR CTENOOCA MTPLIMCLNYBEG NC SBDOIDOENETDN H.2E P PGCIINTRN EOS1D1 UT .AN OCND OPD INCS PNB RIE NSEC IC1TD9OIE NAM G1RM GEBERONOTDUHENDD. 10448-008 Figure 8. ADuM7642 Pin Configuration Table 22. ADuM7642 Pin Function Descriptions Pin No. Mnemonic Description 1 V Supply Voltage A for Isolator Side 1 (3.0 V to 5.5 V). Pin 1 must be connected externally to Pin 7. Connect a 0.01 µF to DD1A 0.1 µF between V (Pin 1) and GND (Pin 2). DD1A 1 2 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the PCB 1 ground plane is recommended. 3 V Logic Input A. IA 4 V Logic Input B. IB 5 V Logic Input C. IC 6 V Logic Output D. OD 7 V Supply Voltage B for Isolator Side 1 (3.0 V to 5.5 V). Pin 7 must be connected externally to Pin 1. Connect a 0.01 µF to DD1B 0.1 µF between V (Pin 7) and GND (Pin 10). DD1B 1 8 V Logic Output E. OE 9 V Logic Input F. IF 10 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the PCB 1 ground plane is recommended. 11 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 12 V Logic Output F. OF 13 V Logic Input E. IE 14 V Supply Voltage B for Isolator Side 2 (3.0 V to 5.5 V). Pin 14 must be connected externally to Pin 20. Connect a 0.01 µF DD2B to 0.1 µF between V (Pin 14) and GND (Pin 11). DD2B 2 15 V Logic Input D. ID 16 V Logic Output C. OC 17 V Logic Output B. OB 18 V Logic Output A. OA 19 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 20 V Supply Voltage A for Isolator Side 2 (3.0 V to 5.5 V). Pin 20 must be connected externally to Pin 14. Connect a 0.01 µF DD2A to 0.1 µF between V (Pin 20) and GND (Pin 19). DD2A 2 Reference the AN-1109 Application Note for specific layout guidelines. Rev. 0 | Page 13 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet VDD1A 1 20 VDD2A GND1* 2 19 GND2* VIA 3 18 VOA VIB 4 ADuM7643 17 VOB VOC 5 (NToOt Pto V SIEcaWle) 16 VIC VOD 6 15 VID VDD1B 7 14 VDD2B VOE 8 13 VIE VIF 9 12 VOF GND1* 10 11 GND2* *PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED. CIIPSNIO NTRNESENR CTENOOCA MTPLIMCLNYBEG NC SBDOIDOENETDN H.2E P PGCIINTRN EOS1D1 UT .AN OCND OPD INCS PNB RIE NSEC IC1TD9OIE NAM G1RM GEBERONOTDUHENDD. 10448-009 Figure 9. ADuM7643 Pin Configuration Table 23. ADuM7643 Pin Function Descriptions Pin No. Mnemonic Description 1 V Supply Voltage A for Isolator Side 1 (3.0 V to 5.5 V). Pin 1 must be connected externally to Pin 7. Connect a 0.01 µF to DD1A 0.1 µF between V (Pin 1) and GND (Pin 2). DD1A 1 2 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the PCB 1 ground plane is recommended. 3 V Logic Input A. IA 4 V Logic Input B. IB 5 V Logic Output C. OC 6 V Logic Output D. OD 7 V Supply Voltage B for Isolator Side 1 (3.0 V to 5.5 V). Pin 7 must be connected externally to Pin 1. Connect a 0.01 µF to DD1B 0.1 µF between V (Pin 7) and GND (Pin 10). DD1B 1 8 V Logic Output E. OE 9 V Logic Input F. IF 10 GND Ground Reference for Isolator Side 1. Pin 2 and Pin 10 are internally connected, and connecting both pins to the PCB 1 ground plane is recommended. 11 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 12 V Logic Output F. OF 13 V Logic Input E. IE 14 V Supply Voltage B for Isolator Side 2 (3.0 V to 5.5 V). Pin 14 must be connected externally to Pin 20. Connect a 0.01 µF DD2B to 0.1 µF between V (Pin 14) and GND (Pin 11). DD2B 2 15 V Logic Input D. ID 16 V Logic Input C. IC 17 V Logic Output B. OB 18 V Logic Output A. OA 19 GND Ground Reference for Isolator Side 2. Pin 11 and Pin 19 are internally connected, and connecting both pins to the PCB 2 ground plane is recommended. 20 V Supply Voltage A for Isolator Side 2 (3.0 V to 5.5 V). Pin 20 must be connected externally to Pin 14. Connect a 0.01 µF DD2A to 0.1 µF between V (Pin 20) and GND (Pin 19). DD2A 2 Reference the AN-1109 Application Note for specific layout guidelines. Rev. 0 | Page 14 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 TYPICAL PERFORMANCE CHARACTERISTICS 10 45 40 8 35 A) 30 A) m CURRENT (m 64 53V.3V I CURRENT (DD1 221505 5V 3.3V 2 10 5 0 0 0 5 10DATA RA1T5E (Mbps)20 25 30 10448-010 0 5 DA1T0A RATE (M1b5ps) 20 25 10448-013 Figure 10. Typical Supply Current per Input Channel vs. Data Rate Figure 13. Typical ADuM7640 VDD1 Supply Current vs. Data Rate for 5 V and 3.3 V Operation for 5 V and 3.3 V Operation 4 12 10 3 A) 8 A) m CURRENT (m 2 5V CURRENT (DD2 64 35.3VV I 1 3.3V 2 00 5 10DATA RA1T5E (Mbps)20 25 30 10448-011 00 5 DA1T0A RATE (M1b5ps) 20 25 10448-014 Figure 11. Typical Supply Current per Output Channel vs. Data Rate Figure 14. Typical ADuM7640 VDD2 Supply Current vs. Data Rate for 5 V and 3.3 V Operation (No Output Load) for 5 V and 3.3 V Operation 4 40 35 3 30 A) CURRENT (mA) 2 35.V3V I CURRENT (mDD1 221505 35.3VV 1 10 5 0 0 0 5 10DATA RA1T5E (Mbps)20 25 30 10448-012 0 5 DA1T0A RATE (M1b5ps) 20 25 10448-015 Figure 12. Typical Supply Current per Output Channel vs. Data Rate Figure 15. Typical ADuM7641 VDD1 Supply Current vs. Data Rate for 5 V and 3.3 V Operation (15 pF Output Load) for 5 V and 3.3 V Operation Rev. 0 | Page 15 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet 18 25 16 20 14 A) 12 A) m m T ( 5V T ( 15 EN 10 EN 5V R R R R U 8 U C C 10 DD2 6 3.3V DD2 3.3V I I 4 5 2 0 0 0 5 DA1T0A RATE (M1b5ps) 20 25 10448-016 0 5 DA1T0A RATE (M1b5ps) 20 25 10448-018 Figure 16. Typical ADuM7641 VDD2 Supply Current vs. Data Rate Figure 18. Typical ADuM7642 VDD2 Supply Current vs. for 5 V and 3.3 V Operation Data Rate for 5 V and 3.3 V Operation 35 30 30 25 25 A) A) 20 m m NT ( 20 NT ( 5V E 5V E R R 15 R R CU 15 CU 3.3V DD1 3.3V DD1 10 I 10 I 5 5 0 0 0 5 DA1T0A RATE (M1b5ps) 20 25 10448-017 0 5 DA1T0A RATE (M1b5ps) 20 25 10448-019 Figure 17. Typical ADuM7642 VDD1 Supply Current vs. Figure 19. Typical ADuM7643 VDD1 or VDD2 Supply Current vs. Data Rate for 5 V and 3.3 V Operation Data Rate for 5 V and 3.3 V Operation Rev. 0 | Page 16 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 APPLICATIONS INFORMATION PRINTED CIRCUIT BOARD LAYOUT PROPAGATION DELAY-RELATED PARAMETERS The ADuM7640/ADuM7641/ADuM7642/ADuM7643 digital Propagation delay is a parameter that describes the time it takes isolators require no external interface circuitry for the logic a logic signal to propagate through a component. The input-to- interfaces. Power supply bypassing is strongly recommended at the output propagation delay time for a high-to-low transition may differ from the propagation delay time for a low-to-high transition. input and output supply pins (see Figure 20). Connect four bypass capacitors between Pin 1 and Pin 2 for V , between Pin 7 and DD1A INPUT (VIx) 50% Pin 10 for V , between Pin 11 and Pin 14 for V , and between DD1B DD2B Pin 19 and Pin 20 for V . Connect the V supply pin and the tPLH tPHL DD2A DD1A VVDD1B ssuuppppllyy ppiinn ttooggeetthheerr,. aTnhde ccoanpnaceictto trh vea VluDeDs2 sB hsouuplpdl yb pe ifnr oamnd OUTPUT (VOx) 50% 10448-021 DD2A Figure 21. Propagation Delay Parameters 0.01 µF to 0.1 µF. The total lead length between both ends of the capacitor and the power supply pin should not exceed 20 mm. Pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately VDD1A VDD2A GND1 GND2 the timing of the input signal is preserved. VIA VOA VIB VOB Channel-to-channel matching refers to the maximum amount VIC/VOC VOC/VIC of time that the propagation delay differs between channels VID/VOD VOD/VID VDD1B VDD2B within a single ADuM7640/ADuM7641/ADuM7642/ADuM7643 VIE/VOE VOE/VIE component. GNVDIF1 VGONFD2 10448-020 Propagation delay skew refers to the maximum amount of time Figure 20. Recommended Printed Circuit Board Layout that the propagation delay differs between multiple ADuM7640/ ADuM7641/ADuM7642/ADuM7643 components operating In applications involving high common-mode transients, it is under the same conditions. important to minimize board coupling across the isolation barrier. DC CORRECTNESS Furthermore, users should design the board layout so that any coupling that occurs affects all pins equally on a given component Positive and negative logic transitions at the isolator input side. Failure to follow this design guideline can cause voltage cause narrow (~1 ns) pulses to be sent to the decoder using the differentials between pins that exceed the absolute maximum transformer. The decoder is bistable and is, therefore, either set ratings of the device, which can lead to latch-up or permanent or reset by the pulses, indicating input logic transitions. In the damage. absence of logic transitions at the input for more than ~1 µs, a With proper PCB design choices, the ADuM7640/ADuM7641/ periodic set of refresh pulses indicative of the correct input state ADuM7642/ADuM7643 can readily meet CISPR 22 Class A is sent to ensure dc correctness at the output. If the decoder receives (and FCC Class A) emissions standards, as well as the more no internal pulses for more than approximately 5 µs, the input side stringent CISPR 22 Class B (and FCC Class B) standards in is assumed to be unpowered or nonfunctional, in which case the an unshielded environment. For PCB-related EMI mitigation isolator output is forced to a default high state by the watchdog techniques, including board layout and stack-up issues, see the timer circuit. AN-1109 Application Note. Rev. 0 | Page 17 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet MAGNETIC FIELD IMMUNITY The preceding magnetic flux density values correspond to specific current magnitudes at given distances from the ADuM7640/ The magnetic field immunity of the ADuM7640/ADuM7641/ ADuM7641/ADuM7642/ADuM7643 transformers. Figure 23 ADuM7642/ADuM7643 is determined by the changing magnetic shows these allowable current magnitudes as a function of field, which induces a voltage in the transformer receiving coil frequency for selected distances. As shown in Figure 23, the large enough to either falsely set or reset the decoder. The following ADuM7640/ ADuM7641/ADuM7642/ADuM7643 are extremely analysis defines the conditions under which this can occur. The immune and can be affected only by extremely large currents 3 V operating condition of the ADuM7640/ADuM7641/ operated at high frequency very close to the component. For the ADuM7642/ADuM7643 is examined because it represents the 1 MHz example noted previously, a 1.2 kA current would have most susceptible mode of operation. to be placed 5 mm away from the ADuM7640/ADuM7641/ The pulses at the transformer output have an amplitude greater ADuM7642/ADuM7643 to affect the operation of the component. than 1.0 V. The decoder has a sensing threshold at approximately 1000 0.5 V, thus establishing a 0.5 V margin in which induced voltages can be tolerated. The voltage induced across the receiving coil is A) k given by T ( 100 N E R V = (−dβ/dt) ∑ π rn2; n = 1, 2, … , N UR where: LE C 10 B β is magnetic flux density (gauss). WA rn is the radius of the nth turn in the receiving coil (cm). LLO 1 A N is the total number of turns in the receiving coil. M U M Given the geometry of the receiving coil in the ADuM7640/ XI 0.1 ADuM7641/ADuM7642/ADuM7643 and an imposed MA DISTANCE = 5mm DISTANCE = 100mm requirement that the induced voltage be, at most, 50% of the 0.5 V DISTANCE = 1m mgivaerngi nfr eaqt utheen cdye ccoande br,e a c amlcauxliamteudm. T ahlleo rweasubllte ims sahgonwetnic i nfi eFlidg uatr ea 22. 0.011k 10kMAGNETI1C0 0FkIELD FREQ1MUENCY (Hz1)0M 100M 10448-023 Figure 23. Maximum Allowable Current for Various s) 1000 Current-to-ADuM7640/ADuM7641/ADuM7642/ADuM7643 Spacings s u a g Note that at combinations of strong magnetic field and high k UX ( 100 frequency, any loops formed by printed circuit board traces can L C F induce error voltages sufficiently large to trigger the thresholds ETI 10 of succeeding circuitry. Take care in the layout of such traces to N AG avoid this possibility. M 1 E L B A W 0.1 O L L A UM 0.01 M XI A M0.0011k 10kMAGNETI1C0 0FkIELD FRE1QMUENCY (Hz1)0M 100M 10448-022 Figure 22. Maximum Allowable External Magnetic Flux Density For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.5 kgauss induces a voltage of 0.25 V at the receiving coil. This voltage is approximately 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event occurs during a transmitted pulse and is of the worst-case polarity, it reduces the received pulse from >1.0 V to 0.75 V, still well above the 0.5 V sensing threshold of the decoder. Rev. 0 | Page 18 of 20

Data Sheet ADuM7640/ADuM7641/ADuM7642/ADuM7643 POWER CONSUMPTION The insulation lifetime of the ADuM7640/ADuM7641/ ADuM7642/ADuM7643 depends on the voltage waveform type The supply current at a given channel of the ADuM7640/ imposed across the isolation barrier. The iCoupler insulation ADuM7641/ADuM7642/ADuM7643 isolator is a function of structure degrades at different rates depending on whether the the supply voltage, the data rate of the channel, and the output waveform is bipolar ac, unipolar ac, or dc. Figure 24, Figure 25, load of the channel. and Figure 26 illustrate these different isolation voltage For each input channel, the supply current is given by waveforms. I = I f ≤ 0.5 f DDI DDI (Q) r Bipolar ac voltage is the most stringent environment. The goal I = I × (2f − f) + I f > 0.5 f of a 50-year operating lifetime under the bipolar ac condition DDI DDI (D) r DDI (Q) r determines the Analog Devices recommended maximum For each output channel, the supply current is given by working voltage. I = I f ≤ 0.5 f DDO DDO (Q) r In the case of unipolar ac or dc voltage, the stress on the insulation I = (I + (0.5 × 10−3) × C × V ) × (2f − f) + I DDO DDO (D) L DDO r DDO (Q) is significantly lower. This allows operation at higher working f > 0.5 f r voltages while still achieving a 50-year service life. The working where: voltages listed in Table 18 can be applied while maintaining the I , I are the input and output dynamic supply currents 50-year minimum lifetime, provided that the voltage conforms to DDI (D) DDO (D) per channel (mA/Mbps). either the unipolar ac or dc voltage case. Any cross-insulation I , I are the specified input and output quiescent voltage waveform that does not conform to Figure 25 or Figure 26 DDI (Q) DDO (Q) supply currents (mA). should be treated as a bipolar ac waveform, and its peak voltage f is the input logic signal frequency (MHz); it is half the input should be limited to the 50-year lifetime voltage value listed in data rate, expressed in units of Mbps. Table 18. f is the input stage refresh rate (Mbps). r The voltage presented in Figure 25 is shown as sinusoidal for C is the output load capacitance (pF). L illustration purposes only. It is meant to represent any voltage V is the output supply voltage (V). DDO waveform varying between 0 V and some limiting value. The limiting value can be positive or negative, but the voltage cannot To calculate the total V and V supply current, the supply cross 0 V. DD1 DD2 currents for each input and output channel corresponding to RATED PEAK VOLTAGE VshDoDw1 a pnedr V-cDhDa2n anree lc asulcpuplalyte cdu arnrden ttost aalse da. fFuinguctrieo 1n0 o afn dda Ftaig ruartee 1fo1r 0V 10448-024 an unloaded output condition. Figure 12 shows the per-channel Figure 24. Bipolar AC Waveform supply current as a function of data rate for a 15 pF output condition. Figure 13 through Figure 17 show the total V and DD1 V supply current as a function of data rate for ADuM7640/ RATED PEAK VOLTAGE DD2 ADuM7641/ADuM7642/ADuM7643 channel configurations. INSULATION LIFETIME 0V 10448-025 Figure 25. Unipolar AC Waveform All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation depends on the characteristics of the voltage waveform RATED PEAK VOLTAGE applied across the insulation. In addition to the testing performed bseyt tohfe erveagluulaattoiorny sa gtoen dceietesr, mAninaelo tgh De elivfeicteims cea rorfi eths eo uint saunl aetxitoenn sive 0V 10448-026 Figure 26. DC Waveform structure within the ADuM7640/ADuM7641/ADuM7642/ ADuM7643 components. Analog Devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. Accel- eration factors for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. The values shown in Table 18 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum working voltages. In many cases, the approved working voltage is higher than the 50-year service life voltage. Operation at these high working voltages can lead to shortened insulation life in some cases. Rev. 0 | Page 19 of 20

ADuM7640/ADuM7641/ADuM7642/ADuM7643 Data Sheet OUTLINE DIMENSIONS 0.345(8.76) 0.341(8.66) 0.337(8.55) 20 11 0.158(4.01) 0.154(3.91) 0.150(3.81) 0.244(6.20) 0.236(5.99) 1 10 0.228(5.79) 0.010(0.25) 0.020(0.51) 0.065(1.65) 0.069(1.75) 0.006(0.15) 0.010(0.25) 0.049(1.25) 0.053(1.35) CO00P..00L10A04N((00A..21R50I))TY 0.02B5S(C0.64) 0.012(0.30) SPELAATNIENG 80°° 0.050(1.27) 0R.E04F1(1.04) 0.004(0.10) 0.008(0.20) 0.016(0.41) COMPLIANTTOJEDECSTANDARDSMO-137-AD C(RINOEFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIAORRNOESUNANORDETEDAIN-POIPNFRFCOHINPECRSHI;AMTEEQILUFLOIIVMRAELUTEESNRETDISNIMFDOEERNSSIGIONN.S 08-19-2008-A Figure 27. 20-Lead Shrink Small Outline Package [QSOP] (RQ-20) Dimensions shown in inches and (millimeters) ORDERING GUIDE Number Number Maximum Maximum of Inputs, of Inputs, Maximum Propagation Pulse Width Temperature Package Package Model1 V Side V Side Data Rate Delay, 5 V Distortion Range Description Option DD1 DD2 ADuM7640ARQZ 6 0 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7640ARQZ-RL7 6 0 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel ADuM7640CRQZ 6 0 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7640CRQZ-RL7 6 0 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel ADuM7641ARQZ 5 1 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7641ARQZ-RL7 5 1 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel ADuM7641CRQZ 5 1 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7641CRQZ-RL7 5 1 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel ADuM7642ARQZ 4 2 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7642ARQZ-RL7 4 2 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel ADuM7642CRQZ 4 2 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7642CRQZ-RL7 4 2 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel ADuM7643ARQZ 3 3 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7643ARQZ-RL7 3 3 1 Mbps 20 ns 75 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel ADuM7643CRQZ 3 3 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP RQ-20 ADuM7643CRQZ-RL7 3 3 25 Mbps 14 ns 50 ns −40°C to +105°C 20-Lead QSOP, RQ-20 7” Tape and Reel 1 Z = RoHS Compliant Part. ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10448-0-9/12(0) Rev. 0 | Page 20 of 20

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADUM7642CRQZ-RL7 ADUM7641ARQZ ADUM7640CRQZ ADUM7641ARQZ-RL7 ADUM7643CRQZ-RL7 ADUM7640ARQZ-RL7 ADUM7642ARQZ ADUM7640CRQZ-RL7 ADUM7641CRQZ ADUM7642ARQZ-RL7 ADUM7643CRQZ ADUM7643ARQZ-RL7 ADUM7643ARQZ ADUM7641CRQZ-RL7 ADUM7642CRQZ ADUM7640ARQZ EVAL-ADUM7643EBZ