Dual-Channel Isolators with isoPower Integrated DC-to-DC Converter, 50 mW Data Sheet ADuM5240/ADuM5241/ADuM5242 FEATURES FUNCTIONAL BLOCK DIAGRAMS Integrated isolated dc-to-dc converter Regulated 5 V/10 mA output VDD 1 OSC. RECT. REG. 8 VISO Dual dc to 1 Mbps (NRZ) signal isolation channels Narrow-body, 8-lead SOIC package VIA 2 ENCODE DECODE 7 VOA RoHS compliant High temperature operation: 105°C VIB 3 ENCODE DECODE 6 VOB Precise timing characteristics 33 nnss mmaaxxiimmuumm pchualsnen weli-dtoth-c dhiastnonretli omna tching GND 4 5 GNDISO 06014-001 Figure 1. ADuM5240 70 ns maximum propagation delay High common-mode transient immunity: >25 kV/μs Safety and regulatory approvals UL recognition VDD 1 OSC. RECT. REG. 8 VISO 2500 V rms for 1 minute, per UL 1577 CSA Component Acceptance Notice #5A VOA 2 DECODE ENCODE 7 VIA VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIB 3 ENCODE DECODE 6 VOB V = 560 V peak IORM GND 4 5 GNDISO 06014-002 GENERAL DESCRIPTION Figure 2. ADuM5241 The ADuM524x1 are dual-channel digital isolators with isoPower® integrated, isolated power. Based on the Analog Devices, Inc., iCoupler® technology, a chip scale dc-to-dc converter provides VDD 1 OSC. RECT. REG. 8 VISO up to 50 mW of regulated, isolated power at 5 V, which eliminates the need for a separate isolated dc-to-dc converter in low power VOA 2 DECODE ENCODE 7 VIA isolated designs. The Analog Devices chip scale transformer iCoupler technology is used both for the isolation of the logic VOB 3 DECODE ENCODE 6 VIB signals as well as for the dc-to-dc converter. The result is a small fTohrem A fDacutoMr,5 t2o4taxl iissoollaattoiorsn p sroolvuitdioen t.w o independent isolation GND 4 5 GNDISO 06014-003 Figure 3. ADuM5242 channels in a variety of channel configurations, operating from a 5 V input supply. ADuM524x units can be used in combination with other iCoupler products to achieve greater channel counts. 1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2007–2012 Analog Devices, Inc. All rights reserved.

ADuM5240/ADuM5241/ADuM5242 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................7 General Description ......................................................................... 1 Pin Configurations and Function Descriptions ............................8 Functional Block Diagrams ............................................................. 1 Typical Performance Characteristics ........................................... 10 Revision History ............................................................................... 2 Applications Information .............................................................. 11 Specifications ..................................................................................... 3 DC-to-DC Converter................................................................. 11 Electrical Characteristics ............................................................. 3 Propagation Delay-Related Parameters ................................... 11 Package Characteristics ............................................................... 5 DC Correctness and Magnetic Field Immunity ..................... 11 Regulatory Information ............................................................... 5 Thermal Analysis ....................................................................... 12 Insulation and Safety-Related Specifications ............................ 5 PCB Layout ................................................................................. 12 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Increasing Available Power ....................................................... 13 Characteristics .............................................................................. 6 Insulation Lifetime ..................................................................... 13 Recommended Operating Conditions ...................................... 6 Outline Dimensions ....................................................................... 14 Absolute Maximum Ratings ............................................................ 7 Ordering Guide .......................................................................... 14 REVISION HISTORY 5/12—Rev. A to Rev. B Created Hyperlink for Safety and Regulatory Approvals Entry in Features Section ................................................................. 1 Change to PCB Layout Section ..................................................... 12 7/07—Rev. 0 to Rev. A Updated VDE Certification Throughout ...................................... 1 Changes to Features .......................................................................... 1 Changes to Regulatory Information Section and Table 4 ........... 5 Changes to Table 5 and Figure 4 Caption ...................................... 6 Changes to Table 7 ............................................................................ 7 Added Table 8; Renumbered Sequentially .................................... 7 Added Insulation Lifetime Section .............................................. 13 3/07—Revision 0: Initial Version Rev. B | Page 2 of 16

Data Sheet ADuM5240/ADuM5241/ADuM5242 SPECIFICATIONS ELECTRICAL CHARACTERISTICS All voltages are relative to their respective ground. All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at T = 25°C, V = 5.0 V, V = 5.0 V, unless otherwise noted. A DD ISO Table 1. Parameter Symbol Min Typ Max Unit Test Conditions DC-TO-DC CONVERTER DC-to-DC Converter Enabled DC to 1 Mbps Data Rate Logic signal frequency ≤ 1 MHz Setpoint V 4.5 5.2 5.5 V I = 0 mA ISO (SET) ISO Maximum V Output Current I 10 mA V = 4.5 V ISO ISO (max) ISO Noise1 250 mV p-p Input Supply Current At Maximum I Current I 140 mA I = 10 mA ISO DD (max) ISO No Load I Current I 104 mA I = 0 mA ISO DD (Q) ISO DC-to-DC Converter Disabled Primary Side Supply Input Current2 ADuM5240 I 3.3 mA V = 4.0 V DD (DISABLE) DD ADuM5241 I 2.7 mA V = 4.0 V DD (DISABLE) DD ADuM5242 I 2.2 mA V = 4.0 V DD (DISABLE) DD Secondary Side Supply Input Current3 ADuM5240 I 2.6 mA ISO (DISABLE) ADuM5241 I 2.8 mA ISO (DISABLE) ADuM5242 I 3.0 mA ISO (DISABLE) DC-to-DC Converter Enable Threshold4 V 4.2 4.5 V DD (ENABLE) DC-to-DC Converter Disable Threshold4 V 3.7 V DD (DISABLE) LOGIC SPECIFICATIONS Logic Input Currents I , I −10 +0.01 +10 µA IA IB Logic High Input Threshold V 0.7 (V or V IH DD V ) ISO Logic Low Input Threshold V 0.3 (V or V IL DD V ) ISO Logic High Output Voltages V , V (V or V ) (V or V ) V I = −20 µA, V ≥ V OAH OBH DD ISO DD ISO Ox Ix IH − 0.1 (V or V ) (V or V ) V I = −4 mA, V ≥ V DD ISO DD ISO Ox Ix IH − 0.5 − 0.2 Logic Low Output Voltages V , V 0.0 0.1 V I = 20 µA, V ≤ V OAL OBL Ox Ix IL 0.0 0.4 V I = 4 mA, V ≤ V Ox Ix IL Rev. B | Page 3 of 16

ADuM5240/ADuM5241/ADuM5242 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions AC SPECIFICATIONS Minimum Pulse Width5 PW 100 ns C = 15 pF, CMOS signal levels L Maximum Data Rate6 1 Mbps C = 15 pF, CMOS signal levels L Propagation Delay7 t , t 25 70 ns C = 15 pF, CMOS signal levels PHL PLH L Pulse Width Distortion, |t − t |8 PWD 3 ns C = 15 pF, CMOS signal levels PLH PHL L Propagation Delay Skew8 t 45 ns C = 15 pF, CMOS signal levels PSK L Channel-to-Channel Matching, t 3 ns C = 15 pF, CMOS signal levels PSKCD L Codirectional Channels9 Channel-to-Channel Matching, t 15 ns C = 15 pF, CMOS signal levels PSKCD L Opposing-Directional Channels9 Output Rise/Fall Time (10% to 90%) t /t 2.5 ns C = 15 pF, CMOS signal levels R F L Common-Mode Transient |CM | 25 35 kV/µs V = V , V , V = 1000 V, H Ix DD ISO CM Immunity at Logic High Output transient magnitude = 800 V Common-Mode Transient |CM| 25 35 kV/µs V = 0 V, V = 1000 V, L Ix CM Immunity at Logic Low Output transient magnitude = 800 V Refresh Frequency f 1.0 MHz r Switching Frequency f 300 MHz OSC 1 Peak noise occurs at frequency corresponding to the refresh frequency (see the PCB Layout section). 2 I supply current values are specified with no load present on the digital outputs. DD (DISABLE) 3 I supply current values are specified with no load present on the digital outputs and power sourced by an external supply. ISO (DISABLE) 4 Enable/disable threshold is the V voltage at which the internal dc-to-dc converter is enabled/disabled. DD 5 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 6 The maximum data rate is the fastest data rate at which the specified pulse width distortion and V supply voltage is guaranteed. ISO 7 t propagation delay is measured from the 50% level of the falling edge of the V signal to the 50% level of the falling edge of the V signal. t propagation delay is PHL Ix Ox PLH measured from the 50% level of the rising edge of the V signal to the 50% level of the rising edge of the V signal. Ix Ox 8 t is the magnitude of the worst-case difference in t and/or t that is measured between units at the same operating temperature, supply voltages, and output PSK PHL PLH load within the recommended operating conditions. 9 Channel-to-channel matching is the absolute value of the difference in propagation delays between the two channels when operated with identical loads. Rev. B | Page 4 of 16

Data Sheet ADuM5240/ADuM5241/ADuM5242 PACKAGE CHARACTERISTICS Table 2. Parameter Symbol Min Typ Max Unit Test Conditions Resistance (Input-to-Output) R 1012 Ω I-O Capacitance (Input-to-Output) C 1.0 pF f = 1 MHz I-O Input Capacitance C 4.0 pF I IC Junction-to-Air Thermal Resistance θ 80 °C/W JA REGULATORY INFORMATION The ADuM524x are approved by the organizations listed in Table 3. Refer to Table 8 and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 3. UL CSA VDE Recognized under 1577 Approved under CSA Component Certified according to DIN V VDE V 0884-10 Component Recognition Program1 Acceptance Notice #5A (VDE V 0884-10):2006-122 Single/basic insulation, 2500 V rms Basic insulation per CSA 60950-1-03 Reinforced insulation, 560 V peak isolation rating and IEC 60950-1, 400 V rms (566 V peak) maximum working voltage File E214100 File 205078 File 2471900-4880-0001 1 In accordance with UL 1577, each ADuM524x is proof-tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 µA). 2 In accordance with DIN V VDE V 0884-10, each ADuM524x is proof-tested by applying an insulation test voltage ≥ 1050 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval. INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 4. Parameter Symbol Value Unit Conditions Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration Minimum External Air Gap (Clearance) L(I01) 4.90 min mm Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage) L(I02) 4.01 min mm Measured from input terminals to output terminals, shortest distance path along body Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1 Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1) Maximum Working Voltage Compatible with V 425 V peak Continuous peak voltage across the IORM 50-Year Service Life isolation barrier Rev. B | Page 5 of 16

ADuM5240/ADuM5241/ADuM5242 Data Sheet DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS This isolator is suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. Table 5. Description Conditions Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms I to IV For Rated Mains Voltage ≤ 300 V rms I to III Climatic Classification 40/105/21 Pollution Degree (DIN VDE 0110, Table 1) 2 Maximum Working Insulation Voltage V 424 V peak IORM Input-to-Output Test Voltage, Method b1 V × 1.875 = V , 100% production V 795 V peak IORM PR PR test, t = 1 sec, partial discharge < 5 pC m Input-to-Output Test Voltage, Method a V PR After Environmental Tests Subgroup 1 V × 1.6 = V , t = 60 sec, partial 680 V peak IORM PR m discharge < 5 pC After Input and/or Safety Test Subgroup 2 and Subgroup 3 V × 1.2 = V , t = 60 sec, partial 510 V peak IORM PR m discharge < 5 pC Highest Allowable Overvoltage Transient overvoltage, t = 10 seconds V 4000 V peak TR TR Safety-Limiting Values Maximum value allowed in the event of a failure; see Figure 4 Case Temperature T 150 °C S Supply Current I 312 mA S1 Insulation Resistance at T V = 500 V R >109 Ω S IO S 350 RECOMMENDED OPERATING CONDITIONS mA) 300 Table 6. T ( Parameter Value N RRE 250 Operating Temperature Range (TA) −40°C to +105°C CU Supply Voltages1 D200 G VD VDD, DC-to-DC Converter Enabled 4.5 V to 5.5 V TIN 150 VDD, DC-to-DC Converter Disabled (VDD) 2.7 V to 4.0 V RA VISO, DC-to-DC Converter Disabled (VISO) 2.7 V to 5.5 V E OP 100 Input Signal Rise/Fall Time 1.0 ms E F Input Supply Slew Rate 10 V/ms SA 500 06014-004 1 All voltages are relative to their respective ground. 0 50 100 150 200 AMBIENT TEMPERATURE (°C) Figure 4. Thermal Derating Curve, Dependence of Safety-Limiting Values on Case Temperature, per DIN V VDE V 0884-10 Rev. B | Page 6 of 16

Data Sheet ADuM5240/ADuM5241/ADuM5242 ABSOLUTE MAXIMUM RATINGS Table 7. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent damage to the device. This is a stress Storage Temperature Range (T ) −55°C to +150°C rating only; functional operation of the device at these or any ST Ambient Operating Temperature Range (T) −40°C to +105°C other conditions above those indicated in the operational A Supply Voltages (V , V )1 −0.5 V to +7.0 V section of this specification is not implied. Exposure to absolute DD ISO Input Voltage (V , V )1 −0.5 V to maximum rating conditions for extended periods may affect IA IB (V or V ) + 0.5 V device reliability. DD ISO Output Voltage (V , V )1 −0.5 V to OA OB (V or V ) + 0.5 V DD ISO Average Output Current per Pin (I )2 −18 mA to +18 mA ESD CAUTION O Common-Mode Transients (|CM|)3 −100 kV/µs to +100 kV/µs 1 All voltages are relative to their respective ground. 2 See Figure 4 for maximum rated current values for various temperatures. 3 Refers to common-mode transients across the insulation barrier. Common- mode transients exceeding the Absolute Maximum Ratings may cause latch-up or permanent damage. Table 8. Maximum Continuous Working Voltage1 Parameter Max Unit Constraint AC Voltage, Bipolar Waveform 425 V peak 50-year minimum lifetime AC Voltage, Unipolar Waveform Basic Insulation 566 V peak Maximum approved working voltage per IEC 60950-1 Reinforced Insulation 560 V peak Maximum approved working voltage per VDE V 0884-10 DC Voltage Basic Insulation 566 V peak Maximum approved working voltage per IEC 60950-1 Reinforced Insulation 560 V peak Maximum approved working voltage per VDE V 0884-10 1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Rev. B | Page 7 of 16

ADuM5240/ADuM5241/ADuM5242 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 8 VISO VDD 1 8 VISO VIA 2 ADuM5240 7 VOA VOA 2 ADuM5242 7 VIA GVNIDB 34 (NToOt Pto V SIEcWale) 56 VGONBDISO 06014-009 GVNODB 34 (NToOt Pto V SIEcWale) 56 GVINBDISO 06014-011 Figure 5. ADuM5240 Pin Configuration Figure 7. ADuM5242 Pin Configuration Table 9. ADuM5240 Pin Function Descriptions Table 11. ADuM5242 Pin Function Descriptions Pin Pin No. Mnemonic Description No. Mnemonic Description 1 V Supply Voltage for Isolator Primary Side, 1 V Supply Voltage for Isolator Primary Side, DD DD 4.5 V to 5.5 V (DC-to-DC Enabled) and 4.5 V to 5.5 V (DC-to-DC Enabled) and 2.7 V to 4.0 V (DC-to-DC Disabled). 2.7 V to 4.0 V (DC-to-DC Disabled). 2 V Logic Input A. 2 V Logic Output A. IA OA 3 V Logic Input B. 3 V Logic Output B. IB OB 4 GND Ground. Ground reference for isolator 4 GND Ground. Ground reference for isolator primary side. primary side. 5 GND Isolated Ground. Ground reference for 5 GND Isolated Ground. Ground reference for ISO ISO isolator secondary side. isolator secondary side. 6 V Logic Output B. 6 V Logic Input B. OB IB 7 V Logic Output A. 7 V Logic Input A. OA IA 8 V Isolated Supply Voltage for Isolator 8 V Isolated Supply Voltage for Isolator ISO ISO Secondary Side, 4.5 V to 5.5 V Output Secondary Side, 4.5 V to 5.5 V Output (DC-to-DC Enabled), and 2.7 V to 5.5 V (DC-to-DC Enabled), and 2.7 V to 5.5 V Input (DC-to-DC Disabled). Input (DC-to-DC Disabled). VDD 1 8 VISO VOA 2 ADuM5241 7 VIA GVNIDB 34 (NToOt Pto V SIEcWale) 56 VGONBDISO 06014-010 Figure 6. ADuM5241 Pin Configuration Table 10. ADuM5241 Pin Function Descriptions Pin No. Mnemonic Description 1 V Supply Voltage for Isolator Primary Side, DD 4.5 V to 5.5 V (DC-to-DC Enabled) and 2.7 V to 4.0 V (DC-to-DC Disabled). 2 V Logic Output A. OA 3 V Logic Input B. IB 4 GND Ground. Ground reference for isolator primary side. 5 GND Isolated Ground. Ground reference ISO for isolator secondary side. 6 V Logic Output B. OB 7 V Logic Input A. IA 8 V Isolated Supply Voltage for Isolator ISO Secondary Side, 4.5 V to 5.5 V Output (DC-to-DC Enabled), and 2.7 V to 5.5 V Input (DC-to-DC Disabled). Rev. B | Page 8 of 16

Data Sheet ADuM5240/ADuM5241/ADuM5242 Table 12. ADuM5240 Truth Table V State DC-to-DC Converter V State V Input V Input V Output V Output DD ISO IA IB OA OB Powered Enabled Powered (Internally) H H H H Powered Enabled Powered (Internally) L L L L Powered Enabled Powered (Internally) H L H L Powered Enabled Powered (Internally) L H L H Powered Disabled Powered (Externally) H H H H Powered Disabled Powered (Externally) L L L L Powered Disabled Powered (Externally) H L H L Powered Disabled Powered (Externally) L H L H Powered Disabled Unpowered X X Z Z Unpowered Disabled Powered (Externally) X X L L Unpowered Disabled Unpowered X X Z Z Table 13. ADuM5241 Truth Table V State DC-to-DC Converter V State V Input V Input V Output V Output DD ISO IA IB OA OB Powered Enabled Powered (Internally) H H H H Powered Enabled Powered (Internally) L L L L Powered Enabled Powered (Internally) H L H L Powered Enabled Powered (Internally) L H L H Powered Disabled Powered (Externally) H H H H Powered Disabled Powered (Externally) L L L L Powered Disabled Powered (Externally) H L H L Powered Disabled Powered (Externally) L H L H Powered Disabled Unpowered X X L Z Unpowered Disabled Powered (Externally) X X Z L Unpowered Disabled Unpowered X X Z Z Table 14. ADuM5242 Truth Table V State DC-to-DC Converter V State V Input V Input V Output V Output DD ISO IA IB OA OB Powered Enabled Powered (Internally) H H H H Powered Enabled Powered (Internally) L L L L Powered Enabled Powered (Internally) H L H L Powered Enabled Powered (Internally) L H L H Powered Disabled Powered (Externally) H H H H Powered Disabled Powered (Externally) L L L L Powered Disabled Powered (Externally) H L H L Powered Disabled Powered (Externally) L H L H Powered Disabled Unpowered X X L L Unpowered Disabled Powered (Externally) X X Z Z Unpowered Disabled Unpowered X X Z Z Rev. B | Page 9 of 16

ADuM5240/ADuM5241/ADuM5242 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 120 100% V) m E ( LOAD 100 ULS 0 mA) AD P ENT ( 80 % LO 100 R 0 R 9 U 60 %- UT C %-10 50 INPDD 40 TO 90 I E 20 ONS 0 0 06014-005 RESP –50 06014-007 0 2 4 6 8 10 12 0 5 10 15 20 25 30 35 IISO OUTPUT LOAD CURRENT (mA) TIME (µs) Figure 8. Typical I Input Current vs. I Output Load Current Figure 10. Typical V Transient Load Response, 5 V Output, DD ISO ISO 90% to 10% to 90% Pulsed Load, 100 nF Bypass Capacitance vs. Time 5.5 200 5.4 150 5.3 E (V) 5.2 100 OLTAG 5.1 E (mV) 50 V S T 5.0 OI 0 U N OUTP 4.9 V ISO–50 O 4.8 S VI –100 4.7 44..65 06014-006 ––125000 06014-008 0 2 4 6 8 10 12 0 20 40 60 80 100 IISO OUTPUT LOAD CURRENT (mA) TIME (ns) Figure 9. Typical Isolated V Output Voltage vs. I Output Load Current Figure 11. Typical Output Voltage Noise at 100% Load, ISO ISO 100 nF Bypass Capacitance vs. Time Rev. B | Page 10 of 16

Data Sheet ADuM5240/ADuM5241/ADuM5242 APPLICATIONS INFORMATION DC-TO-DC CONVERTER PROPAGATION DELAY-RELATED PARAMETERS The dc-to-dc converter section of the ADuM524x works on Propagation delay is a parameter that describes the time it takes principles that are common to most modern power supply a logic signal to propagate through a component. The propagation designs. V power is supplied to an oscillating circuit that delay to a logic low output may differ from the propagation DD switches current into a chip scale air core transformer. Power is delay to a logic high. transferred to the secondary side where it is rectified to a high dc voltage. The power is then linearly regulated down to about INPUT (VIx) 50% 5.2 V and supplied to the secondary side data section and to the tPLH tPHL VsmISOa lpl ipno wfoerr e sxetcetrinoanl cuosme. pTahtiibs ldee wsiigthn tahlleo w8-sl efaodr aS OphICys picaaclklya ging OUTPUT (VOx) 50% 06014-012 of this device. Active feedback was not implemented in this Figure 12. Propagation Delay Parameters version of isoPower for reasons of size and cost. Pulse width distortion is the maximum difference between Because the oscillator runs at a constant high frequency inde- these two propagation delay values and is an indication of how pendent of the load, excess power is internally dissipated in the accurately the timing of the input signal is preserved. output voltage regulation process. Limited space for transformer Channel-to-channel matching refers to the maximum amount coils and components also adds to internal power dissipation. the propagation delay differs between channels within a single This results in low power conversion efficiency, especially at low ADuM524x component. load currents. Propagation delay skew refers to the maximum amount the The load characteristic curve in Figure 8 shows that the VDD propagation delay differs between multiple ADuM524x current is typically 80 mA with no VISO load and 110 mA at full components operating under the same conditions. V load at the V supply pin. ISO DD DC CORRECTNESS AND MAGNETIC FIELD Alternate supply architectures are possible using this technology. IMMUNITY Addition of a digital feedback path allows regulation of power Positive and negative logic transitions at the isolator input cause on the primary side. Feedback would allow significantly higher narrow (~1 ns) pulses to be sent to the decoder via the transformer. power, efficiency, and synchronization of multiple supplies at the The decoder is bistable and is, therefore, either set or reset by expense of size and cost. Future implementations of isoPower the pulses, indicating input logic transitions. In the absence of includes feedback to achieve these performance improvements. logic transitions at the input for more than 1 μs, a periodic set The ADuM524x can be operated with the internal dc-to-dc of refresh pulses indicative of the correct input state are sent to enabled or disabled. With the internal dc-to-dc converter ensure dc correctness at the output. If the decoder receives no enabled, the isolated supply of Pin 8 provides the output power internal pulses of more than about 5 μs, the input side is assumed as well as power to the secondary-side circuitry of the part. to be unpowered or nonfunctional, in which case the isolator The internal dc-to-dc converter state of the ADuM524x is output is forced to a default state by the watchdog timer circuit controlled by the input V voltage, as defined in Table 6. In (see Table 12 through Table 14). DD normal operating mode, V is set between 4.5 V and 5.5 V and DD The limitation on the magnetic field immunity of the ADuM524x the internal dc-to-dc converter is enabled. When/if it is desired is set by the condition in which induced voltage in the receiving to disable the dc-to-dc converter, V is lowered to a value DD coil of the transformer is sufficiently large to either falsely set or between 2.7 V and 4.0 V. In this mode, V power is supplied ISO reset the decoder. The following analysis defines the conditions externally by the user and the signal channels of the ADuM524x under which this may occur. The 3 V operating condition of the continue to operate normally. ADuM524x is examined because it represents the most susceptible There is hysteresis into the V input voltage detect circuit. mode of operation. DD Once the dc-to-dc converter is active, the input voltage must be The pulses at the transformer output have an amplitude greater decreased below the turn-on threshold to disable the converter. than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus This feature ensures that the converter does not go into establishing a 0.5 V margin in which induced voltages can be oscillation due to noisy input power. tolerated. The voltage induced across the receiving coil is given by V = (−dβ/dt)Σπr2; n = 1, 2, … , N n where: β is magnetic flux density (gauss). N is the number of turns in the receiving coil. r is the radius of the nth turn in the receiving coil (cm). n Rev. B | Page 11 of 16

ADuM5240/ADuM5241/ADuM5242 Data Sheet Given the geometry of the receiving coil in the ADuM524x and Note that at combinations of strong magnetic field and high an imposed requirement that the induced voltage be at most frequency, any loops formed by printed circuit board (PCB) 50% of the 0.5 V margin at the decoder, a maximum allowable traces could induce error voltages sufficiently large enough to magnetic field is calculated, as shown in Figure 13. trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. 100 UX THERMAL ANALYSIS L F C 10 Each ADuM524x component consists of two internal die, TI E N attached to a split-paddle lead frame. For the purposes of E MAGgauss) 1 thermal analysis, it is treated as a thermal unit with the highest Lk junction temperature reflected in the θ value in Table 2. The ABY ( JA ALLOWDENSIT0.1 vmaoluuen otefd θ JoAn i sa b JaEsDedE Con s tmanedasaurdre 4m-leanytesr t PakCeBn wwiitthh ftihnee -pwaridt th M traces in still air. Under normal operating conditions, the U XIM 0.01 ADuM524x operates at full load across the full temperature A M range without derating the output current. For example, a part with no external load drawing 80 mA and dissipating 400 mW 0.0011k 10kMAGNETI1C0 0FkIELD FREQ1MUENCY (Hz1)0M 100M 06014-013 cthauessee sd ae v3i2c°eCs ttoe mrupne rwaaturmre. rise above ambient. It is normal for Figure 13. Maximum Allowable External Magnetic Flux Density Following the recommendations in the PCB Layout section For example, at a magnetic field frequency of 1 MHz, the decreases the thermal resistance to the PCB allowing increased maximum allowable magnetic field of 0.2 kgauss induces a thermal margin at high ambient temperatures. voltage of 0.25 V at the receiving coil. This is about 50% of the sensing threshold and does not cause a faulty output transition. PCB LAYOUT Similarly, if such an event were to occur during a transmitted The ADuM524x requires no external circuitry for its logic pulse (and was of the worst-case polarity), it would reduce the interfaces. Power supply bypassing is required at the input and received pulse from >1.0 V to 0.75 V—still well above the 0.5 V output supply pins (see Figure 15). sensing threshold of the decoder. The power supply section of the ADuM524x uses a 300 MHz The preceding magnetic flux density values correspond to oscillator frequency to pass power through its chip scale trans- specific current magnitudes at given distances from the formers. In addition, the normal operation of the data section ADuM524x transformers. Figure 14 expresses these allowable of the iCoupler introduces switching transients, as described in current magnitudes as a function of frequency for selected the DC Correctness and Magnetic Field Immunity section, on distances. As shown in Figure 14, the ADuM524x is extremely the power supply pins (see Figure 11). Low inductance capacitors immune and can only be affected by extremely large currents are required to bypass noise generated at the switching frequency operated at high frequencies very close to the component. For as well as 1 ns pulses generated by the data transfer and dc refresh the 1 MHz example noted, one would have to place a 0.5 kA circuitry. The total lead length between both ends of the capacitor current 5 mm away from the ADuM524x to affect the operation and the input power supply pin should not exceed 20 mm. of the component. In cases where EMI emission is a concern, series inductance may 1000 be added to critical power and ground traces. Discrete inductors A) DISTANCE = 1m should be added to the line such that the high frequency bypass k T ( 100 capacitors are between the inductor and the ADuM524x device N E R pin. Inductance can be added in the form of discrete inductors R U C or ferrite beads added to both power and ground traces. The E 10 BL recommended value corresponds to impedance between 50 Ω A DISTANCE = 100mm W and 100 Ω at approximately 300 MHz. O L 1 L A If the switching speed of the data outputs is causing unacceptable M DISTANCE = 5mm MU EMI, capacitance to ground can be added at output pins to slow AXI 0.1 the rise and fall time of the output. This slew rate limits the output. M Capacitance values depend on application speed requirements. 0.01 1k 10MkAGNET1IC0 0FkIELD FRE1QMUENCY (H1z0)M 100M 06014-014 S ee the AN-0971 Application Note for board layout guidelines. Figure 14. Maximum Allowable Current for Various Current-to-ADuM524x Spacings Rev. B | Page 12 of 16

Data Sheet ADuM5240/ADuM5241/ADuM5242 Load regulation transients are the primary source of lower lifetime of the insulation structure within the ADuM524x. frequency power supply voltage excursions, as illustrated in Analog Devices performs accelerated life testing using voltage Figure 10. These should be dealt with by adding an additional levels higher than the rated continuous working voltage. Accel- supply stiffening capacitor between V and GND . The eration factors for several operating conditions are determined. ISO ISO stiffening capacitor can be of a more highly inductive type These factors allow calculation of the time to failure at the actual because the high frequency bypass is handled by the required working voltage. The values shown in Table 8 summarize the peak low inductance capacitor. voltage for 50 years of service life for a bipolar ac operating condi- tion and the maximum CSA/VDE approved working voltages. In VDD VISO many cases, the approved working voltage is higher than 50-year service life voltage. Operation at these high working voltages VIA/OA 00nF 00nF OPT VOA/IA can lead to shortened insulation life in some cases. VIB/OB 1 1 VOB/IB The insulation lifetime of the ADuM524x depends on the voltage GND GNDISO 06014-015 winasvuelfaotiromn tsytprue citmupreo sdeedg raacdroesss a tth dei fisfeorleatnito nra bteasr rdieepr. eTnhdei niCg oounp ler Figure 15. Recommended Printed Circuit Board Layout whether the waveform is bipolar ac, unipolar ac, or dc. Figure 16, In applications involving high common-mode transients, care Figure 17, and Figure 18 illustrate these different isolation should be taken to ensure that board coupling across the isolation voltage waveforms. barrier is minimized. Furthermore, the board layout should be Bipolar ac voltage is the most stringent environment. The goal designed such that any coupling that does occur equally affects of a 50-year operating lifetime under the ac bipolar condition all pins on a given component side. Failure to ensure this can determines the recommended maximum working voltage of cause voltage differentials between pins exceeding the absolute Analog Devices. maximum ratings of the device (specified in Table 7), thereby leading to latch-up and/or permanent damage. In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower, which allows operation at The ADuM524x is a power device that dissipates as much as higher working voltages while still achieving a 50-year service 600 mW of power when fully loaded. Because it is not possible life. The working voltages listed in Table 8 can be applied while to apply a heat sink to an isolation device, the device primarily maintaining the 50-year minimum lifetime provided the voltage depends on heat dissipation into the PCB through the GND conforms to either the unipolar ac or dc voltage cases. Any cross- pins. If the device is used at high ambient temperatures, care insulation voltage waveform that does not conform to Figure 17 or should be taken to provide a thermal path from the GND pins Figure 18 should be treated as a bipolar ac waveform, and its to the PCB ground plane. The board layout in Figure 15 shows peak voltage should be limited to the 50-year lifetime voltage enlarged pads for Pin 4 and Pin 5. Multiple vias should be value listed in Table 8. implemented from each of the pads to the ground plane, which significantly reduce the temperatures inside the chip. Note that the voltage presented in Figure 17 is shown as sinusoidal The dimensions of the expanded pads are left to the discretion for illustration purposes only. It is meant to represent any of the designer and the available board space. voltage waveform varying between 0 V and some limiting value. The limiting value can be positive or negative, but the voltage INCREASING AVAILABLE POWER cannot cross 0 V. The ADuM524x devices are not designed with the capability of RATED PEAK VOLTAGE running several devices in parallel. However, if more power is rreuqnu eiraecdh tgor oruunp fmroumlti panle ilnodaidvsi,d iut aisl ApoDsusiMbl5e 4to2x g droeuvpic elo. aFdosr and 0V 06014-021 Figure 16. Bipolar AC Waveform example, if a transceiver and external logic must be powered, one ADuM524x could be dedicated to the transceiver and an additional ADuM524x could power the external logic, which RATED PEAK VOLTAGE ptor eitvse nowts nis ssuupeps lwy.i th load sharing because each load is dedicated 0V 06014-022 INSULATION LIFETIME Figure 17. Unipolar AC Waveform All insulation structures eventually breaks down when subjected to voltage stress over a sufficiently long period. The rate of RATED PEAK VOLTAGE ivnoslutalgatei owna vdeefgorramda atpiopnli eisd d aecpreonssd tehnet ionns uthlaet icohna.r Ianc taedridsittiicosn o tfo t he 0V 06014-023 the testing performed by the regulatory agencies, Analog Devices Figure 18. DC Waveform carries out an extensive set of evaluations to determine the Rev. B | Page 13 of 16

ADuM5240/ADuM5241/ADuM5242 Data Sheet OUTLINE DIMENSIONS 5.00(0.1968) 4.80(0.1890) 8 5 4.00(0.1574) 6.20(0.2441) 3.80(0.1497) 1 4 5.80(0.2284) 1.27(0.0500) 0.50(0.0196) BSC 1.75(0.0688) 0.25(0.0099) 45° 0.25(0.0098) 1.35(0.0532) 8° 0.10(0.0040) 0° COPLANARITY 0.51(0.0201) 0.10 SEATING 0.31(0.0122) 0.25(0.0098) 10..2470((00..00510507)) PLANE 0.17(0.0067) COMPLIANTTOJEDECSTANDARDSMS-012-AA C(RINOEFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIAORRNOESUNANORDEETDAIN-POMPFRIFLOLMPIMIRLELIATIMTEEERTFSEO;RIRNECUQHSUEDIVIINMAELDENENSSTIIOGSNNFS.OR 012407-A Figure 19. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Number Number of Inputs, of Inputs, Maximum Data Package Model1 V Side V Side Rate (Mbps) Temperature Range Package Description Option DD ISO ADuM5240ARZ 2 0 1 −40°C to +105°C 8-Lead SOIC_N R-8 ADuM5240ARZ-RL7 2 0 1 −40°C to +105°C 8-Lead SOIC_N, 7” Tape and Reel R-8 ADuM5241ARZ 1 1 1 −40°C to +105°C 8-Lead SOIC_N R-8 ADuM5241ARZ-RL7 1 1 1 −40°C to +105°C 8-Lead SOIC_N, 7” Tape and Reel R-8 ADuM5242ARZ 0 2 1 −40°C to +105°C 8-Lead SOIC_N R-8 ADuM5242ARZ-RL7 0 2 1 −40°C to +105°C 8-Lead SOIC_N, 7” Tape and Reel R-8 1 Z = RoHS Compliant Part. Rev. B | Page 14 of 16

Data Sheet ADuM5240/ADuM5241/ADuM5242 NOTES Rev. B | Page 15 of 16

ADuM5240/ADuM5241/ADuM5242 Data Sheet NOTES ©2007–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06014-0-5/12(B) Rev. B | Page 16 of 16

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADUM5240ARZ ADUM5242ARZ-RL7 ADUM5241ARZ ADUM5240ARZ-RL7 ADUM5241ARZ-RL7 ADUM5242ARZ