Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability Data Sheet ADuM3200/ADuM3201 FEATURES GENERAL DESCRIPTION Enhanced system-level ESD performance per IEC 61000-4-x The ADuM3200/ADuM32011 are dual-channel, digital isola- High temperature operation: 125°C tors based on the Analog Devices, Inc., iCoupler® technology. Narrow body, RoHS-compliant, 8-lead SOIC Combining high speed CMOS and monolithic transformer Low power operation technology, these isolation components provide outstanding 5 V operation performance characteristics superior to alternatives such as 1.7 mA per channel maximum at 0 Mbps to 2 Mbps optocoupler devices. 3.7 mA per channel maximum at 10 Mbps By avoiding the use of LEDs and photodiodes, iCoupler 7.0 mA per channel maximum at 25 Mbps devices remove the design difficulties commonly associated 3.3 V operation with optocouplers. The typical optocoupler concerns regarding 1.5 mA per channel maximum at 0 Mbps to 2 Mbps uncertain current transfer ratios, nonlinear transfer functions, 2.5 mA per channel maximum at 10 Mbps and temperature and lifetime effects are eliminated with the 5.2 mA per channel maximum at 25 Mbps simple iCoupler digital interfaces and stable performance char- Bidirectional communication acteristics. The need for external drivers and other discrete 3.3 V/5 V level translation components is eliminated with these iCoupler products. Further- High data rate: dc to 25 Mbps (NRZ) more, iCoupler devices consume one-tenth to one-sixth the Precise timing characteristics power of optocouplers at comparable signal data rates. 3 ns maximum pulse width distortion 3 ns maximum channel-to-channel matching The ADuM3200/ADuM3201 isolators provide two independent High common-mode transient immunity: >25 kV/μs isolation channels in a variety of channel configurations and Safety and regulatory approvals data rates (see the Ordering Guide). They operate with 3.3 V UL recognition: 2500 V rms for 1 minute per UL 1577 or 5 V supply voltages on either side, providing compatibility CSA Component Acceptance Notice 5A with lower voltage systems as well as enabling voltage translation VDE Certificate of Conformity functionality across the isolation barrier. The ADuM3200W DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 and ADuM3201W are automotive grade versions qualified V = 560 V peak for 125°C operation. IORM Qualified for automotive applications In comparison to the ADuM1200/ADuM1201 isolators, the APPLICATIONS ADuM3200/ADuM3201 isolators contain various circuit and layout changes to provide increased capability relative to system- Size-critical multichannel isolation level IEC 61000-4-x testing (ESD, burst, and surge). The precise SPI interface/data converter isolation capability in these tests for either the ADuM1200/ADuM1201 RS-232/RS-422/RS-485 transceiver isolation or ADuM3200/ADuM3201 products is strongly determined by Digital field bus isolation the design and layout of the user board or module. For more Hybrid electric vehicles, battery monitor information, see the AN-793 Application Note, ESD/Latch-Up Considerations with iCoupler Isolation Products. FUNCTIONAL BLOCK DIAGRAMS VDD1 1 8 VDD2 VDD1 1 8 VDD2 VIA 2 ENCODE DECODE 7 VOA VOA 2 DECODE ENCODE 7 VIA VIB 3 ENCODE DECODE 6 VOB VIB 3 ENCODE DECODE 6 VOB GND1 4 5 GND2 05927-001 GND1 4 5 GND2 05927-002 Figure 1. ADuM3200 Functional Block Diagram Figure 2. ADuM3201 Functional Block Diagram 1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,329. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADuM3200/ADuM3201 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Insulation and Safety-Related Specifications .......................... 12 Applications ....................................................................................... 1 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics ............................................................................ 13 General Description ......................................................................... 1 Functional Block Diagrams ............................................................. 1 Recommended Operating Conditions .................................... 13 Absolute Maximum Ratings ......................................................... 14 Revision History ............................................................................... 3 Specifications ..................................................................................... 4 ESD Caution................................................................................ 14 Electrical Characteristics—5 V, 105°C Operation ................... 4 Pin Configurations and Function Descriptions ......................... 15 Electrical Characteristics—3.3 V, 105°C Operation ................ 5 Typical Performance Characteristics ........................................... 16 Application Information ................................................................ 17 Electrical Characteristics—Mixed 5 V/3.3 V, 105°C Operation ....................................................................................... 6 PC Board Layout ........................................................................ 17 Electrical Characteristics—Mixed 3.3 V/5 V, 105°C System-Level ESD Considerations and Enhancements ........ 17 Operation ....................................................................................... 7 Propagation Delay-Related Parameters ................................... 17 Electrical Characteristics—5 V, 125°C Operation ................... 8 DC Correctness and Magnetic Field Immunity........................... 17 Electrical Characteristics—3.3 V, 125°C Operation ................ 9 Power Consumption .................................................................. 19 Electrical Characteristics—Mixed 5 V/3.3 V, 125°C Insulation Lifetime ..................................................................... 19 Operation ..................................................................................... 10 Outline Dimensions ....................................................................... 20 Electrical Characteristics—Mixed 3.3 V/5 V, 125°C Ordering Guide .......................................................................... 21 Operation ..................................................................................... 11 Automotive Products ................................................................. 21 Package Characteristics ............................................................. 12 Regulatory Information ............................................................. 12 Rev. F | Page 2 of 24

Data Sheet ADuM3200/ADuM3201 REVISION HISTORY 10/2014—Rev. C to Rev. D Changed Low Voltage Operation from 3 V to 3.3 V 5/2016—Rev. E to Rev. F (Throughout) ..................................................................................... 1 Change to Logic High Output Voltages Parameter and Changes to Features Section ............................................................ 1 Logic Low Output Voltages Parameter, Table 3 ............................ 4 Changes to Table 2 ............................................................................ 3 Change to Logic High Output Voltages Parameter and Changes to Table 5 ............................................................................ 4 Logic Low Output Voltages Parameter, Table 6 ............................ 5 Changes to Table 8 ............................................................................ 5 Change to Logic High Output Voltages Parameter and Changes to Table 11 .......................................................................... 6 Logic Low Output Voltages Parameter, Table 9 ............................ 6 Specified W Grade in Table 13 and Table 14 ................................. 7 Change to Logic High Output Voltages Parameter and Specified W Grade in Table 16 and Table 17 ................................. 8 Logic Low Output Voltages Parameter, Table 12 .......................... 7 Specified W Grade in Table 19 and Table 20 ................................. 9 Change to Logic High Output Voltages Parameter and Specified W Grade in Table 22 and Table 23 ............................... 10 Logic Low Output Voltages Parameter, Table 15 .......................... 8 Changes to Table 29 ........................................................................ 12 Change to Logic High Output Voltages Parameter and Logic Low Output Voltages Parameter, Table 18 .......................... 9 2/2012—Rev. B to Rev. C Change to Logic High Output Voltages Parameter and Created Hyperlink for Safety and Regulatory Approvals Logic Low Output Voltages Parameter, Table 21 ........................ 10 Entry in Features Section ................................................................. 1 Change to Logic High Output Voltages Parameter and Change to PC Board Layout Section ............................................ 16 Logic Low Output Voltages Parameter, Table 24 ........................ 11 11/2011—Rev. A to Rev. B 7/2015—Rev. D to Rev. E Changes to Features Section, Applications Section, and Changed ADuM120x to ADuM1200/ADuM1201 ... Throughout General Descriptions Section .......................................................... 1 Changes to Logic High Output Voltages Parameter, Table 3 ...... 4 Changes to Specifications Section .................................................. 3 Changes to Logic High Output Voltages Parameter, Table 6 ...... 5 Changes to Table 29 ........................................................................ 12 Change to Logic Low Input Threshold Parameter, Table 9 ......... 6 Changes to Ambient Operating Temperature Maximum Change to Logic Low Input Threshold Parameter, Table 12 ....... 7 Value, Table 30 ................................................................................. 13 Changes to Logic High Output Voltages Parameter, Table 15 .... 8 Changes to V Pin Descriptions ............................................... 14 Changes to Logic High Output Voltages Parameter, Table 18 .... 9 DD1 Changes to Figure 9, Figure 10, Figure 11 Captions .................. 15 Change to Logic Low Input Threshold Parameter, Table 21 ..... 10 Changes to Ordering Guide .......................................................... 20 Change to Logic Low Input Threshold Parameter, Table 24 ..... 11 Added Automotive Products Section ........................................... 20 Changes to Table 26 and Table 27 ................................................. 12 Changes to Ordering Guide ........................................................... 21 6/2007—Rev. 0 to Rev. A Updated VDE Certification Throughout ....................................... 1 Changes to Features, General Description, and Note 1 ............... 1 Changes to Regulatory Information Section ............................... 10 Changes to DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics Section ................................................ 11 Added Table 10 ................................................................................ 12 Added Insulation Lifetime Section ............................................... 17 7/2006—Revision 0: Initial Version Rev. F | Page 3 of 24

ADuM3200/ADuM3201 Data Sheet SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V, 105°C OPERATION All typical specifications are at T = 25°C, V = V = 5 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 4.5 V ≤ V ≤ 5.5 V, 4.5 V ≤ V ≤ 5.5 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 1. A Grade B Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 20 150 20 50 20 45 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 40 3 3 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 100 15 15 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 15 15 ns PSKOD Output Rise/Fall Time t /t 10 2.5 2.5 ns 10% to 90% R F Table 2. 1 Mbps—A Grade, 10 Mbps—B Grade and B Grade, and C Grade C Grade 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT ADuM3200 I 1.3 1.8 3.5 4.6 7.7 10.0 mA No load DD1 I 1.0 1.6 2.0 2.8 3.8 4.9 mA No load DD2 ADuM3201 I 1.1 1.6 3.1 4.2 6.9 8.9 mA No load DD1 I 1.3 1.9 3.1 4.0 6.1 8.3 mA No load DD2 Table 3. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.4 0.8 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.5 0.6 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.19 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.05 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.2 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 4 of 24

Data Sheet ADuM3200/ADuM3201 ELECTRICAL CHARACTERISTICS—3.3 V, 105°C OPERATION All typical specifications are at T = 25°C, V = V = 3.3 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 3.0 V ≤ V ≤ 3.6 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 4. A Grade B Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 20 150 20 60 20 55 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD ADuM3200 40 3 3 ns |t − t | PLH PHL ADuM3201 40 4 4 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 100 22 16 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 22 16 ns PSKOD Output Rise/Fall Time t /t 3.0 3.0 3.0 ns 10% to 90% R F Table 5. 1 Mbps—A Grade, 10 Mbps—B Grade and B Grade, and C Grade C Grade 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT ADuM3200 I 0.8 1.3 2.2 3.2 4.8 6.4 mA No load DD1 I 0.7 1.0 1.3 1.7 2.3 3.0 mA No load DD2 ADuM3201 I 0.7 1.3 1.9 2.5 4.1 5.3 mA No load DD1 I 0.8 1.6 1.9 2.5 3.7 5.1 mA No load DD2 Table 6. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.3 0.5 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.3 0.5 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.10 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.03 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.1 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 5 of 24

ADuM3200/ADuM3201 Data Sheet ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V, 105°C OPERATION All typical specifications are at T = 25°C, V = 5 V, V = 3.3 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 4.5 V ≤ V ≤ 5.5 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF, and CMOS signal levels, unless otherwise noted. L Table 7. A Grade B Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 15 150 15 55 15 50 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 40 3 3 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 50 22 15 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 22 15 ns PSKOD Output Rise/Fall Time t /t 3.0 3.0 3.0 ns 10% to 90% R F Table 8. 1 Mbps—A Grade, 10 Mbps—B Grade and B Grade, and C Grade C Grade 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT ADuM3200 I 1.3 1.8 3.5 4.6 7.7 10.0 mA No load DD1 I 0.7 1.0 1.3 1.7 2.3 3.0 mA No load DD2 ADuM3201 I 1.1 1.6 3.1 4.2 6.9 8.9 mA No load DD1 I 0.8 1.6 1.9 2.5 3.7 5.1 mA No load DD2 Table 9. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.4 0.8 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.3 0.5 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.19 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.03 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.2 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 6 of 24

Data Sheet ADuM3200/ADuM3201 ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V, 105°C OPERATION All typical specifications are at T = 25°C, V = 3.3 V, V = 5.0 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 3.0 V ≤ V ≤ 3.6 V, 4.5 V ≤ V ≤ 5.5 V, and −40°C ≤ T ≤ +105°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 10. A Grade B Grade C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 15 150 15 55 15 50 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD ADuM3200 40 3 3 ns |t − t | PLH PHL ADuM3201 40 4 4 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 50 22 15 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 22 15 ns PSKOD Output Rise/Fall Time t /t 2.5 2.5 2.5 ns 10% to 90% R F Table 11. 1 Mbps—A Grade, 10 Mbps—B Grade and B Grade, and C Grade C Grade 25 Mbps—C Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT ADuM3200 I 0.8 1.3 2.2 3.2 4.8 6.4 mA No load DD1 I 1.0 1.6 2.0 2.8 3.8 4.9 mA No load DD2 ADuM3201 I 0.7 1.3 1.9 2.5 4.1 5.3 mA No load DD1 I 1.3 1.9 3.1 4.0 6.1 8.3 mA No load DD2 Table 12. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0. 1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.3 0.5 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.5 0.6 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.10 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.05 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.1 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 7 of 24

ADuM3200/ADuM3201 Data Sheet ELECTRICAL CHARACTERISTICS—5 V, 125°C OPERATION All typical specifications are at T = 25°C, V = V = 5 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 4.5 V ≤ V ≤ 5.5 V, 4.5 V ≤ V ≤ 5.5 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 13. WA Grade WB Grade WC Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 20 150 20 50 20 45 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 40 3 3 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 100 15 15 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 15 15 ns PSKOD Output Rise/Fall Time t /t 2.5 2.5 2.5 ns 10% to 90% R F Table 14. 1 Mbps—WA Grade, WB Grade, and WC 10 Mbps—WB Grade 25 Mbps—WC Grade and WC Grade Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Comments SUPPLY CURRENT ADuM3200 I 1.3 2.0 3.5 4.6 7.7 10.0 mA No load DD1 I 1.0 1.6 1.7 2.8 3.1 3.9 mA No load DD2 ADuM3201 I 1.1 1.5 2.6 3.4 5.3 6.8 mA No load DD1 I 1.3 1.8 3.1 4.0 6.4 8.3 mA No load DD2 Table 15. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.4 0.8 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.5 0.6 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.19 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.05 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.2 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 8 of 24

Data Sheet ADuM3200/ADuM3201 ELECTRICAL CHARACTERISTICS—3.3 V, 125°C OPERATION All typical specifications are at T = 25°C, V = V = 3.3 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 3.0 V ≤ V ≤ 3.6 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 16. WA Grade WB Grade WC Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 20 150 20 60 20 55 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD ADuM3200 40 3 3 ns |t − t | PLH PHL ADuM3201 40 4 4 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 100 22 16 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 22 16 ns PSKOD Output Rise/Fall Time t /t 3.0 3.0 3.0 ns 10% to 90% R F Table 17. 1 Mbps—WA Grade, WB Grade, and WC 10 Mbps—WB Grade 25 Mbps—WC Grade and WC Grade Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Comments SUPPLY CURRENT ADuM3200 I 0.8 1.3 2.0 3.2 4.3 6.4 mA No load DD1 I 0.7 1.0 1.1 1.7 1.8 2.4 mA No load DD2 ADuM3201 I 0.7 1.3 1.5 2.1 3.0 4.2 mA No load DD1 I 0.8 1.6 1.9 2.4 3.6 5.1 mA No load DD2 Table 18. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.3 0.5 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.3 0.5 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.10 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.03 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.1 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 9 of 24

ADuM3200/ADuM3201 Data Sheet ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V, 125°C OPERATION All typical specifications are at T = 25°C, V = 5 V, V = 3.3 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 4.5 V ≤ V ≤ 5.5 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 19. WA Grade WB Grade WC Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 15 150 15 55 15 50 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD 40 3 3 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 50 22 15 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 22 15 ns PSKOD Output Rise/Fall Time t /t 3.0 3.0 3.0 ns 10% to 90% R F Table 20. 1 Mbps—WA Grade, WB Grade, and WC 10 Mbps—WB Grade 25 Mbps—WC Grade and WC Grade Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Comments SUPPLY CURRENT ADuM3200 I 1.3 2.0 3.5 4.6 7.7 10.0 mA No load DD1 I 0.7 1.0 1.1 1.7 1.8 2.4 mA No load DD2 ADuM3201 I 1.1 1.5 2.6 3.4 5.3 6.8 mA No load DD1 I 0.8 1.6 1.9 2.4 3.6 5.1 mA No load DD2 Table 21. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.4 0.8 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.3 0.5 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.19 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.03 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.2 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 10 of 24

Data Sheet ADuM3200/ADuM3201 ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V, 125°C OPERATION All typical specifications are at T = 25°C, V = 3.3 V, V = 5.0 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operation range: 3.0 V ≤ V ≤ 3.6 V, 4.5 V ≤ V ≤ 5.5 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF and CMOS signal levels, unless otherwise noted. L Table 22. WA Grade WB Grade WC Grade Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 1 10 25 Mbps Within PWD limit Propagation Delay t , t 15 150 15 55 15 50 ns 50% input to 50% output PHL PLH Pulse Width Distortion PWD ADuM3200 40 3 3 ns |t − t | PLH PHL ADuM3201 40 4 4 ns |t − t | PLH PHL Change vs. Temperature 6 5 5 ps/°C Pulse Width PW 1000 100 40 ns Within PWD limit Propagation Delay Skew t 50 22 15 ns Between any two units PSK Channel Matching Codirectional t 50 3 3 ns PSKCD Opposing-Direction t 50 22 15 ns PSKOD Output Rise/Fall Time t /t 2.5 2.5 2.5 ns 10% to 90% R F Table 23. 1 Mbps—WA Grade, WB Grade, and WC 10 Mbps—WB Grade 25 Mbps—WC Grade and WC Grade Grade Test Conditions/ Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Comments SUPPLY CURRENT ADuM3200 I 0.8 1.3 2.0 3.2 4.3 6.4 mA No load DD1 I 1.0 1.6 1.7 2.8 3.1 3.9 mA No load DD2 ADuM3201 I 0.7 1.3 1.5 2.1 3.0 4.2 mA No load DD1 I 1.3 1.8 3.1 4.0 6.4 8.3 mA No load DD2 Table 24. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Logic High Input Threshold V 0.7 V V IH DDx Logic Low Input Threshold V 0.3 V V IL DDx Logic High Output Voltages V V − 0.1 V V I = −20 µA, V = V OH DDx DDx Ox Ix IxH V − 0.5 V − 0.2 V I = −3.2 mA, V = V DDx DDx Ox Ix IxH Logic Low Output Voltages V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.2 0.4 V I = 3.2 mA, V = V Ox Ix IxL Input Current per Channel I −10 +0.01 +10 µA 0 V ≤ V ≤ V I Ix DDX Supply Current per Channel Quiescent Input Supply Current I 0.3 0.5 mA V = V = 0 V DDI(Q) IA IB Quiescent Output Supply Current I 0.5 0.6 mA V = V = 0 V DDO(Q) IA IB Dynamic Input Supply Current I 0.10 mA/Mbps DDI(D) Dynamic Output Supply Current I 0.05 mA/Mbps DDO(D) AC SPECIFICATIONS Common-Mode Transient Immunity1 |CM| 25 35 kV/µs V = V , V = 1000 V, Ix DDX CM transient magnitude = 800 V Refresh Rate f 1.1 Mbps r 1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 11 of 24

ADuM3200/ADuM3201 Data Sheet PACKAGE CHARACTERISTICS Table 25. Parameter Symbol Min Typ Max Unit Test Conditions/Comments Resistance (Input to Output)1 R 1012 Ω I-O Capacitance (Input to Output)1 C 1.0 pF f = 1 MHz I-O Input Capacitance C 4.0 pF I IC Junction-to-Case Thermal Resistance, Side 1 θ 46 °C/W Thermocouple located at center JCI of package underside IC Junction-to-Case Thermal Resistance, Side 2 θ 41 °C/W JCO 1 The device is considered a 2-terminal device; Pin 1, Pin 2, Pin 3, and Pin 4 are shorted together, and Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together. REGULATORY INFORMATION The ADuM3200/ADuM3201 devices are approved by the organizations listed in Table 26. Refer to Table 31 and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 26. UL CSA CQC VDE Recognized Under Approved under CSA Component Approved under Certified according to UL 1577 Component Acceptance Notice 5A CQC11-471543-2012 DIN V VDE V 0884-10 (VDE V 0884-10): 2006-122 Recognition Program1 Single/Basic 2500 V rms Basic insulation per CSA 60950-1-03 Basic insulation per Reinforced insulation, 560 V peak Isolation Voltage and IEC 60950-1, 400 V rms GB4943.1-2011, (566 V peak) maximum working voltage, 400 V rms (588 V peak) functional insulation per maximum working CSA 60950-1-03 and IEC 60950-1, voltage, tropical climate, 800 V rms (1131 V peak) maximum altitude ≤ 5000 meters working voltage File E214100 File 205078 File CQC14001117250 File 2471900-4880-0001 1 In accordance with UL 1577, each ADuM3200/ADuM3201 is proof-tested by applying an insulation test voltage ≥3000 V rms for 1 second (current leakage detection limit = 5 µA). 2 In accordance with DIN V VDE V 0884-10, each ADuM3200/ADuM3201 is proof-tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection limit = 5 pC). An asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval. INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 27. Parameter Symbol Value Unit Test Conditions/Comments Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration Minimum External Air Gap (Clearance) L(I01) 4.90 min mm Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage) L(I02) 4.01 min mm Measured from input terminals to output terminals, shortest distance path along body Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1 Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1) Rev. F | Page 12 of 24

Data Sheet ADuM3200/ADuM3201 DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS These isolators are suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working voltage. Table 28. Description Test Conditions/Comments Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms I to IV For Rated Mains Voltage ≤ 300 V rms I to III For Rated Mains Voltage ≤ 400 V rms I to II Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage V 560 V peak IORM Input-to-Output Test Voltage, Method B1 V × 1.875 = V , 100% production test, t = 1 sec, V 1050 V peak IORM PR m PR partial discharge < 5 pC Input-to-Output Test Voltage, Method A V × 1.6 = V , t = 60 sec, partial discharge < 5 pC V IORM PR m PR After Environmental Tests Subgroup 1 896 V peak After Input and/or Safety Test Subgroup 2 V × 1.2 = V , t = 60 sec, partial discharge < 5 pC 672 V peak IORM PR m and Subgroup 3 Highest Allowable Overvoltage Transient overvoltage, t = 10 seconds V 4000 V peak TR TR Safety-Limiting Values Maximum value allowed in the event of a failure (see Figure 3) Case Temperature T 150 °C S Side 1 Current I 160 mA S1 Side 2 Current I 170 mA S2 Insulation Resistance at T V = 500 V R >109 Ω S IO S 200 RECOMMENDED OPERATING CONDITIONS 180 Table 29. A) 160 m Parameter Symbol Min Max Unit T ( 140 EN SIDE #1 SIDE #2 Operating Temperature TA RR 120 ADuM3200A/ADuM3201A −40 +105 °C U G C 100 ADuM3200B/ADuM3201B −40 +105 °C N MITI 80 ADuM3200C/ADuM3201C −40 +105 °C LI ADuM3200WA/ADuM3201WA −40 +125 °C TY- 60 ADuM3200WB/ADuM3201WB −40 +125 °C E AF 40 ADuM3200WC/ADuM3201WC −40 +125 °C S 20 Supply Voltages1 VDD1, VDD2 ADuM3200A/ADuM3201A 3.0 5.5 V 00 50CASE TEMP1E0R0ATURE (°C)150 200 05927-003 AADDuuMM33220000BC//AADDuuMM33220011BC 33..00 55..55 VV Figure 3. Thermal Derating Curve, Dependence of Safety-Limiting Values ADuM3200WA/ADuM3201WA 3.0 5.5 V on Case Temperature, per DIN V VDE V 0884-10 ADuM3200WB/ADuM3201WB 3.0 5.5 V ADuM3200WC/ADuM3201WC 3.0 5.5 V Maximum Input Signal Rise and 1.0 ms Fall Times 1 All voltages are relative to their respective ground. See the DC Correctness and Magnetic Field Immunity section for information on immunity to external magnetic fields. Rev. F | Page 13 of 24

ADuM3200/ADuM3201 Data Sheet ABSOLUTE MAXIMUM RATINGS Ambient temperature = 25°C, unless otherwise noted. Stresses at or above those listed under Absolute Maximum Table 30. Ratings may cause permanent damage to the product. This is a Parameter Rating stress rating only; functional operation of the product at these Storage Temperature (T ) −55°C to +150°C or any other conditions above those indicated in the operational ST Ambient Operating Temperature (T) −40°C to +125°C section of this specification is not implied. Operation beyond A Supply Voltages (V , V )1 −0.5 V to +7.0 V the maximum operating conditions for extended periods may DD1 DD2 Input Voltage (V , V )1, 2 −0.5 V to V + 0.5 V affect product reliability. IA IB DDI Output Voltage (VOA, VOB)1, 2 −0.5 V to VDDO + 0.5 V ESD CAUTION Average Output Current, per Pin (I )3 −22 mA to +22 mA O Common-Mode Transients −100 kV/µs to +100 kV/µs (CM, CM )4 L H 1 All voltages are relative to their respective ground. 2 VDDI and VDDO refer to the supply voltages on the input and output sides of a given channel, respectively. 3 See Figure 3 for maximum rated current values for various temperatures. 4 Refers to common-mode transients across the insulation barrier. Common- mode transients exceeding the Absolute Maximum Ratings can cause latch-up or permanent damage. Table 31. Maximum Continuous Working Voltage1 Parameter Max Unit Constraint AC Voltage, Bipolar Waveform 565 V peak 50-year minimum lifetime AC Voltage, Unipolar Waveform Functional Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1 Basic Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 DC Voltage Functional Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1 Basic Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Table 32. ADuM3200 Truth Table (Positive Logic) V Input V Input V State V State V Output V Output Notes IA IB DD1 DD2 OA OB H H Powered Powered H H L L Powered Powered L L H L Powered Powered H L L H Powered Powered L H X X Unpowered Powered H H Outputs return to the input state within 1 µs of V power restoration. DDI X X Powered Unpowered Indeterminate Indeterminate Outputs return to the input state within 1 µs of V power restoration. DDO Table 33. ADuM3201 Truth Table (Positive Logic) V Input V Input V State V State V Output V Output Notes IA IB DD1 DD2 OA OB H H Powered Powered H H L L Powered Powered L L H L Powered Powered H L L H Powered Powered L H X X Unpowered Powered Indeterminate H Outputs return to the input state within 1 µs of V power restoration. DDI X X Powered Unpowered H Indeterminate Outputs return to the input state within 1 µs of V power restoration. DDO Rev. F | Page 14 of 24

Data Sheet ADuM3200/ADuM3201 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD1 1 8 VDD2 VIA 2 ADuM3200 7 VOA GNVDIB1 43 (NToOt Pto V SIEcWale) 56 VGONBD2 05927-004 Figure 4. ADuM3200 Pin Configuration Table 34. ADuM3200 Pin Function Descriptions Pin No. Mnemonic Description 1 V Supply Voltage for Isolator Side 1. DD1 2 V Logic Input A. IA 3 V Logic Input B. IB 4 GND Ground 1. Ground reference for Isolator Side 1. 1 5 GND Ground 2. Ground reference for Isolator Side 2. 2 6 V Logic Output B. OB 7 V Logic Output A. OA 8 V Supply Voltage for Isolator Side 2. DD2 VDD1 1 8 VDD2 VOA 2 ADuM3201 7 VIA GNVDIB1 43 (NToOt Pto V SIEcWale) 65 VGONBD2 05927-005 Figure 5. ADuM3201 Pin Configuration Table 35. ADuM3201 Pin Function Descriptions Pin No. Mnemonic Description 1 V Supply Voltage for Isolator Side 1. DD1 2 V Logic Output A. OA 3 V Logic Input B. IB 4 GND Ground 1. Ground reference for Isolator Side 1. 1 5 GND Ground 2. Ground reference for Isolator Side 2. 2 6 V Logic Output B. OB 7 V Logic Input A. IA 8 V Supply Voltage for Isolator Side 2. DD2 Rev. F | Page 15 of 24

ADuM3200/ADuM3201 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 10 20 8 15 A) m EL ( 6 A) N m HAN NT ( 10 C E RENT/ 4 CURR 5V R 5V CU 5 2 3V 3V 00 10DATA RATE (Mbps)20 30 05927-006 00 10DATA RATE (Mbps)20 30 05927-009 Figure 6. Typical Input Supply Current per Channel vs. Data Rate Figure 9. Typical ADuM3200 IDD1 Supply Current vs. Data Rate for 5 V and 3 V Operation for 5 V and 3 V Operation 4 4 A) 3 3 m EL ( A) 5V N m HAN 2 NT ( 2 C E RENT/ 5V CURR R 3V CU 1 1 3V 00 10DATA RATE (Mbps)20 30 05927-007 00 10DATA RATE (Mbps)20 30 05927-010 Figure 7. Typical Output Supply Current per Channel vs. Data Rate Figure 10. Typical ADuM3200 IDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation (No Output Load) for 5 V and 3 V Operation 4 10 8 3 A) m NEL ( mA) 6 AN 2 T ( H N RENT/C 5V CURRE 4 5V R U 1 C 2 3V 3V 00 10DATA RATE (Mbps)20 30 05927-008 00 10DATA RATE (Mbps)20 30 05927-011 Figure 8. Typical Output Supply Current per Channel vs. Data Rate Figure 11. Typical ADuM3201 IDD1 or IDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation (15 pF Output Load) for 5 V and 3 V Operation Rev. F | Page 16 of 24

Data Sheet ADuM3200/ADuM3201 APPLICATION INFORMATION PC BOARD LAYOUT Channel-to-channel matching refers to the maximum amount that the propagation delay differs between channels within a The ADuM3200/ADuM3201 digital isolators require no single ADuM3200/ADuM3201 component. external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and Propagation delay skew refers to the maximum amount that output supply pins. The capacitor value must be between the propagation delay differs between multiple ADuM3200/ 0.01 μF and 0.1 μF. The total lead length between both ends ADuM3201 components operating under the same conditions. of the capacitor and the input power supply pin must not DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY exceed 20 mm. See the AN-1109 Application Note for board Positive and negative logic transitions at the isolator input layout guidelines. cause narrow (~1 ns) pulses to be sent to the decoder via the SYSTEM-LEVEL ESD CONSIDERATIONS AND transformer. The decoder is bistable and is therefore either set ENHANCEMENTS or reset by the pulses, indicating input logic transitions. In the System-level ESD reliability (for example, per IEC 61000-4-x) absence of logic transitions of more than ~1 μs at the input, a is highly dependent on system design which varies widely by periodic set of refresh pulses indicative of the correct input state application. The ADuM3200/ADuM3201 incorporate many are sent to ensure dc correctness at the output. If the decoder enhancements to make ESD reliability less dependent on system receives no internal pulses for more than about 5 μs, the input design. The enhancements include: side is assumed to be unpowered or nonfunctional, in which case, the isolator output is forced to a default state (see Table 32  ESD protection cells added to all input/output interfaces. and Table 33) by the watchdog timer circuit.  Key metal trace resistances reduced using wider geometry and paralleling of lines with vias. The ADuM3200/ADuM3201 are extremely immune to external magnetic fields. The limitation on the ADuM3200/ADuM3201  The SCR effect inherent in CMOS devices minimized by magnetic field immunity is set by the condition in which induced use of guarding and isolation technique between PMOS voltage in the transformer receiving coil is sufficiently large to and NMOS devices. either falsely set or reset the decoder. The following analysis defines  Areas of high electric field concentration eliminated using the conditions under which this can occur. The 3 V operating 45° corners on metal traces. condition of the ADuM3200/ADuM3201 is examined because  Supply pin overvoltage prevented with larger ESD clamps it represents the most susceptible mode of operation. between each supply pin and the respective ground. The pulses at the transformer output have an amplitude greater While the ADuM3200/ADuM3201 improve system-level than 1.0 V. The decoder has a sensing threshold at about 0.5 V, ESD reliability, they are no substitute for a robust system-level therefore establishing a 0.5 V margin in which induced voltages design. See the AN-793 Application Notes, ESD/Latch-Up can be tolerated. The voltage induced across the receiving coil is Considerations with iCoupler Isolation Product, for detailed given by recommendations on board layout and system-level design. V = (−dβ/dt) ∑π r2, n = 1, 2,…, N n PROPAGATION DELAY-RELATED PARAMETERS where: Propagation delay is a parameter that describes the time it takes β is the magnetic flux density (gauss). a logic signal to propagate through a component. The propagation N is the number of turns in the receiving coil. delay to a logic low output can differ from the propagation r is the radius of the nth turn in the receiving coil (cm). n delay to a logic high. INPUT (VIx) 50% tPLH tPHL OUTPUT (VOx) 50% 05927-012 Figure 12. Propagation Delay Parameters Pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the input signal timing is preserved. Rev. F | Page 17 of 24

ADuM3200/ADuM3201 Data Sheet Given the geometry of the receiving coil in the ADuM3200/ The preceding magnetic flux density values correspond to ADuM3201 and an imposed requirement that the induced specific current magnitudes at given distances away from the voltage is at most 50% of the 0.5 V margin at the decoder, a ADuM3200/ADuM3201 transformers. Figure 14 expresses maximum allowable magnetic field is calculated, as shown in these allowable current magnitudes as a function of frequency Figure 13. for selected distances. As seen, the ADuM3200/ADuM3201 are 100 extremely immune and can be affected only by extremely large X currents operated at high frequency and very close to the com- U FL ponent. For the 1 MHz example, one must place a 0.5 kA current C 10 TI 5 mm away from the ADuM3200/ADuM3201 to affect the E GNs) component operation. ALLOWABLE MADENSITY (kgaus0.11 ENT (kA)1010000 DISTANCE = 1m M RR U U M 0.01 C XI E 10 A L M B A DISTANCE = 100mm W 0.0011k 10kMAGNETI1C0 0FkIELD FREQ1MUENCY (Hz1)0M 100M 05927-013 M ALLO 1 DISTANCE = 5mm U Figure 13. Maximum Allowable External Magnetic Flux Density M XI 0.1 A For example, at a magnetic field frequency of 1 MHz, the M maximum allowable magnetic field of 0.2 kgauss induces a 0.01 vseonltsaigneg othf r0e.2sh5o Vld a at nthde d roeecse invoint gc acuosiel. aT fhaius litsy aobuotuptu 5t 0tr%an osfi ttihoen . 1k 10MkAGNET1IC0 0FkIELD FRE1QMUENCY (H1z0)M 100M 05927-014 Similarly, if such an event occurs during a transmitted pulse Figure 14. Maximum Allowable Current for Various Current-to-ADuM3200/ADuM3201 Spacings (and had the worst-case polarity), it reduces the received pulse from >1.0 V to 0.75 V—still well above the 0.5 V sensing threshold Note that at combinations of strong magnetic fields and high of the decoder. frequencies, any loops formed by printed circuit board traces could induce sufficiently large error voltages to trigger the threshold of succeeding circuitry. Care must be taken in the layout of such traces to avoid this possibility. Rev. F | Page 18 of 24

Data Sheet ADuM3200/ADuM3201 POWER CONSUMPTION The values shown in Table 31 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition, and The supply current at a given channel of the ADuM3200/ the maximum CSA/VDE approved working voltages. In many ADuM3201 isolator is a function of the supply voltage, the cases, the approved working voltage is higher than the 50-year channel data rate, and the channel output load. service life voltage. Operation at these high working voltages For each input channel, the supply current is given by can lead to shortened insulation life. I = I f ≤ 0.5f DDI DDI (Q) r The insulation lifetime of the ADuM3200/ADuM3201 depends I = I × (2f − f) + I f > 0.5f on the voltage waveform type imposed across the isolation barrier. DDI DDI (D) r DDI (Q) r The iCoupler insulation structure degrades at different rates For each output channel, the supply current is given by depending on whether the waveform is bipolar ac, unipolar ac, or I = I f ≤ 0.5f DDO DDO (Q) r dc. Figure 15, Figure 16, and Figure 17 illustrate these different I = (I + (0.5 × 10−3) × CV ) × (2f − f) + I isolation voltage waveforms. DDO DDO (D) L DDO r DDO (Q) f > 0.5f r A bipolar ac voltage environment is the most stringent. The where: goal of a 50-year operating lifetime under the ac bipolar I , I are the input and output dynamic supply currents condition determines the Analog Devices recommended DDI (D) DDO (D) per channel (mA/Mbps). maximum working voltage. C is the output load capacitance (pF). L In the case of unipolar ac or dc voltage, the stress on the insulation V is the output supply voltage (V). DDO is significantly lower. This allows operation at higher working f is the input logic signal frequency (MHz, half of the input data voltages while still achieving a 50-year service life. The working rate, NRZ signaling). voltages listed in Table 31 can be applied while maintaining the f is the input stage refresh rate (Mbps). r 50-year minimum lifetime, provided that the voltage conforms I , I are the specified input and output quiescent DDI (Q) DDO (Q) to either the unipolar ac or dc voltage cases. Any cross-insulation supply currents (mA). voltage waveform that does not conform to Figure 16 or Figure 17 To calculate the total I and I supply current, the supply must be treated as a bipolar ac waveform and the peak voltage DD1 DD2 currents for each input and output channel corresponding to must be limited to the 50-year lifetime voltage value listed in I and I are calculated and totaled. Figure 6 provides per- Table 31. DD1 DD2 channel input supply currents as a function of data rate. Note that the voltage presented in Figure 16 is shown as sinusoi- Figure 7 and Figure 8 provide per-channel output supply dal for illustration purposes only. It is meant to represent any currents as a function of data rate for an unloaded output voltage waveform varying between 0 V and some limiting value. condition and for a 15 pF output condition, respectively. The limiting value can be positive or negative, but the voltage Figure 9 through Figure 11 provide total I and I cannot cross 0 V. DD1 DD2 supply current as a function of data rate for ADuM3200 RATED PEAK VOLTAGE and ADuM3201 channel configurations. INSULATION LIFETIME 0V 05927-015 All insulation structures eventually break down when subjected to Figure 15. Bipolar AC Waveform voltage stress over a sufficiently long period. The rate of insulation RATED PEAK VOLTAGE degradation depends upon the characteristics of the voltage wpearvfeofromrmed a bpyp ltiheed raecgruolsast othrye aingseunlcaiteios,n A. Inna laodgd Ditieovnic teos tchaer rteiessti nogu t 0V 05927-016 an extensive set of evaluations to determine the lifetime of the Figure 16. Unipolar AC Waveform insulation structure within the ADuM3200/ADuM3201. RATED PEAK VOLTAGE lAevneallso hg iDgheevri ctehsa pne trhfoe rrmatse dac ccoenletrinatueodu lsi fwe otersktiinngg vuoslitnagg ev.o Altcacgeel - 0V 05927-017 eration factors for several operating conditions are determined. Figure 17. DC Waveform These factors allow calculation of the time to failure at the actual working voltage. Rev. F | Page 19 of 24

ADuM3200/ADuM3201 Data Sheet OUTLINE DIMENSIONS 5.00(0.1968) 4.80(0.1890) 8 5 4.00(0.1574) 6.20(0.2441) 3.80(0.1497) 1 4 5.80(0.2284) 1.27(0.0500) 0.50(0.0196) BSC 1.75(0.0688) 0.25(0.0099) 45° 0.25(0.0098) 1.35(0.0532) 8° 0.10(0.0040) 0° COPLANARITY 0.51(0.0201) 0.10 SEATING 0.31(0.0122) 0.25(0.0098) 10..2470((00..00510507)) PLANE 0.17(0.0067) COMPLIANTTOJEDECSTANDARDSMS-012-AA C(RINOEFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIAORRNOESUNANORDETEDAIN-POMPFRIFLOLMPIMIRLELIATIMTEEERTFSEO;RIRNECUQHSUEDIVIINMAELDENENSSTIIOGSNNFS.OR 012407-A Figure 18. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters (inches) Rev. F | Page 20 of 24

Data Sheet ADuM3200/ADuM3201 ORDERING GUIDE Number Number Maximum Maximum Maximum of Inputs, of Inputs, Data Rate Propagation Pulse Width Temperature Package Model1, 2 VDD1 Side VDD2 Side (Mbps) Delay, 5 V (ns) Distortion (ns) Range (°C) Package Description Option ADuM3200ARZ 2 0 1 150 40 −40 to +105 8-Lead SOIC_N R-8 ADuM3200ARZ-RL7 2 0 1 150 40 −40 to +105 8-Lead SOIC_N R-8 ADuM3200BRZ 2 0 10 50 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3200BRZ-RL7 2 0 10 50 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3200CRZ 2 0 25 45 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3200CRZ-RL7 2 0 25 45 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3200WARZ 2 0 1 150 40 −40 to +125 8-Lead SOIC_N R-8 ADuM3200WARZ-RL7 2 0 1 150 40 −40 to +125 8-Lead SOIC_N R-8 ADuM3200WBRZ 2 0 10 50 3 −40 to +125 8-Lead SOIC_N R-8 ADuM3200WBRZ-RL7 2 0 10 50 3 −40 to +125 8-Lead SOIC_N R-8 ADuM3200WCRZ 2 0 25 45 3 −40 to +125 8-Lead SOIC_N R-8 ADuM3200WCRZ-RL7 2 0 25 45 3 −40 to +125 8-Lead SOIC_N R-8 ADuM3201ARZ 1 1 1 150 40 −40 to +105 8-Lead SOIC_N R-8 ADuM3201ARZ-RL7 1 1 1 150 40 −40 to +105 8-Lead SOIC_N R-8 ADuM3201BRZ 1 1 10 50 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3201BRZ-RL7 1 1 10 50 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3201CRZ 1 1 25 45 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3201CRZ-RL7 1 1 25 45 3 −40 to +105 8-Lead SOIC_N R-8 ADuM3201WARZ 1 1 1 150 40 −40 to +125 8-Lead SOIC_N R-8 ADuM3201WARZ-RL7 1 1 1 150 40 −40 to +125 8-Lead SOIC_N R-8 ADuM3201WBRZ 1 1 10 50 3 −40 to +125 8-Lead SOIC_N R-8 ADuM3201WBRZ-RL7 1 1 10 50 3 −40 to +125 8-Lead SOIC_N R-8 ADuM3201WCRZ 1 1 25 45 3 −40 to +125 8-Lead SOIC_N R-8 ADuM3201WCRZ-RL7 1 1 25 45 3 −40 to +125 8-Lead SOIC_N R-8 1 Z = RoHS Compliant Part. 2 W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The ADuM3200W/ADuM3201W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. Rev. F | Page 21 of 24

ADuM3200/ADuM3201 Data Sheet NOTES Rev. F | Page 22 of 24

Data Sheet ADuM3200/ADuM3201 NOTES Rev. F | Page 23 of 24

ADuM3200/ADuM3201 Data Sheet NOTES ©2006–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05927-0-5/16(F) Rev. F | Page 24 of 24

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADUM3201BRZ-RL7 ADUM3200CRZ-RL7 ADUM3201ARZ ADUM3200CRZ ADUM3201BRZ ADUM3201CRZ-RL7 ADUM3201CRZ ADUM3200BRZ ADUM3200ARZ ADUM3200BRZ-RL7 ADUM3201ARZ-RL7 ADUM3200ARZ-RL7 ADUM3200TRZ-EP ADUM3200TRZ-EP-RL7 ADUM3200WCRZ ADUM3201WARZ-RL7 ADUM3200WCRZ-RL7 ADUM3201WARZ ADUM3200WBRZ-RL7 ADUM3201WCRZ ADUM3201WCRZ-RL7 ADUM3200WARZ-RL7 ADUM3200WARZ ADUM3200WBRZ ADUM3201WBRZ ADUM3201WBRZ-RL7 ADUM3201TRZ-EP ADUM3201TRZ-EP-RL7