数量阶梯 | 香港交货 | 国内含税 |
+xxxx | $xxxx | ¥xxxx |
查看当月历史价格
查看今年历史价格
ADUM1446ARQZ产品简介:
ICGOO电子元器件商城为您提供ADUM1446ARQZ由Analog设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 ADUM1446ARQZ价格参考。AnalogADUM1446ARQZ封装/规格:数字隔离器, 通用 数字隔离器 2500Vrms 4 通道 2Mbps 25kV/µs CMTI 16-SSOP(0.154",3.90mm 宽)。您可以下载ADUM1446ARQZ参考资料、Datasheet数据手册功能说明书,资料中有ADUM1446ARQZ 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | |
ChannelType | 单向 |
描述 | IC DGTL ISOLATOR QUAD 16QSOP数字隔离器 Micro-power Quad-CH Digital Isolator |
产品分类 | |
IsolatedPower | 无 |
品牌 | Analog Devices |
产品手册 | |
产品图片 | |
产品系列 | 接口 IC,数字隔离器,Analog Devices ADuM1446ARQZ- |
数据手册 | |
产品型号 | ADuM1446ARQZ |
PulseWidthDistortion(Max) | 8ns |
rohs | 无铅 / 符合限制有害物质指令(RoHS)规范要求 |
上升/下降时间(典型值) | 2ns, 2ns |
产品种类 | |
传播延迟tpLH/tpHL(最大值) | 180ns, 180ns |
传播延迟时间 | 80 ns |
供应商器件封装 | 16-QSOP |
共模瞬态抗扰度(最小值) | 25kV/µs |
功率耗散 | 1.64 W |
包装 | 管件 |
商标 | Analog Devices |
安装风格 | SMD/SMT |
封装 | Tube |
封装/外壳 | 16-SSOP(0.154",3.90mm 宽) |
封装/箱体 | QSOP-16 |
工作温度 | -40°C ~ 125°C |
工厂包装数量 | 98 |
技术 | 磁耦合 |
数据速率 | 2Mbps |
最大功率耗散 | 1.64 W |
最大工作温度 | + 125 C |
最大数据速率 | 2 Mb/s |
最小工作温度 | - 40 C |
标准包装 | 98 |
特色产品 | http://www.digikey.cn/product-highlights/zh/adum144x-lowpower-digital-isolators/51357http://www.digikey.cn/product-highlights/cn/zh/analog-devices-select-q1-2014-products/4139 |
电压-电源 | 2.25 V ~ 3.6 V |
电压-隔离 | 2500Vrms |
电源电压-最大 | 3.6 V |
电源电压-最小 | 2.25 V |
电源电流 | 672 uA |
类型 | General Purpose |
绝缘电压 | 2.5 kVrms |
脉宽失真(最大) | 8ns |
视频文件 | http://www.digikey.cn/classic/video.aspx?PlayerID=1364138032001&width=640&height=505&videoID=3036277845001 |
输入-输入侧1/输入侧2 | 3/1 |
通道数 | 4 |
通道数量 | 4 Channel |
通道类型 | 单向 |
隔离式电源 | 无 |
Micropower Quad-Channel Digital Isolators Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 FEATURES FUNCTIONAL BLOCK DIAGRAMS Ultralow power operation VDD1 1 ADuM144x QSOP 16VDD2 3.3 V operation (typical) GND1 2 15GND2 5.6 μA per channel quiescent current, refresh enabled VIA 3 ENCODE DECODE 14VOA 0.3 μA per channel quiescent current, refresh disabled VIB 4 ENCODE DECODE 13VOB 148 μA/Mbps per channel typical dynamic current VIC/VOC 5 ENCODE DECODE 12VOC/VIC 2.5 V operation (typical) VID/VOD 6 ENCODE DECODE 11VOD/VID 30..11 μμAA ppeerr cchhaannnneell qquuiieesscceenntt ccuurrrreenntt,, rreeffrreesshh denisaabblleedd GNEND11 87 190EGNN2D2 11845-002 Figure 1. 117 μA/Mbps per channel typical dynamic current Small, 16-lead QSOP and 20-Lead SSOP VDD1 1 ADuM144x 20VDD2 Bidirectional communication GND1 2 19GND2 Up to 2 Mbps data rate (NRZ) VIA 3 ENCODE DECODE 18VOA High temperature operation: 125°C VIB 4 ENCODE DECODE 17VOB High common-mode transient immunity: >25 kV/μs VIC/VOC 5 ENCODE DECODE 16VOC/VIC Safety and regulatory approvals VID/VOD 6 ENCODE DECODE 15VOD/VID EN1 7 14EN2 UL 1577 component recognition program NIC 8 13NIC 2500 V rms for 1 minute per UL 1577 QSOP package 3750V rms for 1 minute per UL 1577 SSOP package GNNDIC1190 1121NGINCD2 11845-102 CSA Component Acceptance Notice 5A Figure 2. VDE certificate of conformity freeing almost 70% of board space compared to isolators packages DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 in wide body SOIC packages. V = 565 V QSOP package IORM PEAK The devices withstand high isolation voltages and meet regulatory V = 849 V SSOP package IORM PEAK requirements, such as UL and CSA standards. In addition to the IECEx and ATEX intrinsic safety space savings, the ADuM1440/ADuM1441/ADuM1442/ Sira 0518 II 1G Ex ia IIC Ga ADuM1445/ADuM1446/ADuM1447 operate with supplies as APPLICATIONS low as 2.25 V. General-purpose, low power multichannel isolation Despite the low power consumption, all models of the ADuM1440/ 1 MHz, low power peripheral interface (SPI) ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 4 mA to 20 mA loop process controls provide low, pulse width distortion at <8 ns. In addition, every GENERAL DESCRIPTION model has an input glitch filter to protect against extraneous The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ noise disturbances. ADuM1446/ADuM14471 are micropower, 4-channel digital 1000 isolators based on the Analog Devices, Inc., iCoupler® technology. Combining high speed, complementary metal oxide semiconductor A) (CMOS) and monolithic air core transformer technologies, L (µ100 E these isolation components provide outstanding performance N N A characteristics superior to the alternatives, such as optocoupler CH R 10 devices. As shown in Figure 3, in standard operating mode, T PE ENx = 0 wlehsse nth EaNn x1 =0 0μ A(in. Wterhneanl r EefNres =h e1n (aibnlteedr)n, atlh ree cfurersrhen dt ipsaerb lcehda)n, nthele is URREN 1 ENx = 1 x C current per channel drops to less than 1 μA. TAhDeu AMD1u4M461/A44D0u/AMD1u4M471 f4a4m1i/lAy Dofu qMu1a4d4 22./5A kDVu dMig1i4ta4l5 i/s olation 0.10.1 1 DA10TA RATE (k1b0p0s) 1000 10000 11845-001 devices are packaged in a small 16-lead QSOP and 20-lead SSOP, Figure 3. Typical Total Supply Current per Channel (VDDx = 3.3 V) 1 Protected by U.S. Patents 5,952,849, 6,873,065, 7,075,329, 6,262,600. Other patents pending. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2013–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Intrinsic Safety ............................................................................ 11 Applications ....................................................................................... 1 Absolute Maximum Ratings ......................................................... 13 General Description ......................................................................... 1 ESD Caution................................................................................ 13 Functional Block Diagrams ............................................................. 1 Pin Configurations and Function Descriptions ......................... 14 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 17 Specifications ..................................................................................... 3 Applications Information .............................................................. 20 Electrical Characteristics—3.3 V Operation ............................ 3 PCB Layout ................................................................................. 20 Electrical Characteristics—2.5 V Operation ............................ 5 Propagation Delay-Related Parameters ................................... 20 Electrical Characteristics—V = 3.3 V, V = 2.5 V DC Correctness ............................................................................ 20 DD1 DD2 Operation ....................................................................................... 7 Magnetic Field Immunity ............................................................. 21 Electrical Characteristics—V = 2.5 V, V = 3.3 V DD1 DD2 Power Consumption .................................................................. 22 Operation ....................................................................................... 8 Insulation Lifetime ..................................................................... 22 Package Characteristics ............................................................... 9 Outline Dimensions ....................................................................... 24 Regulatory Information ............................................................... 9 Ordering Guide .......................................................................... 25 Insulation and Safety Related Specifications .......................... 10 DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Insulation Characteristics ............................................................................ 10 REVISION HISTORY 3/2014—Rev. 0 to Rev. A 1/2017—Rev. D to Rev. E Added SSOP Package ......................................................... Universal Changes to Features Section............................................................ 1 Changes to Features Section, Added Figure 2, Changes to Table 12 .......................................................................... 9 Renumbered Sequentially ................................................................ 1 Added Intrinsic Safety Section, Table 16; Renumbered Sequentially, Changes to Output Voltage Logic High Parameter, Table 3 ........ 4 and Table 17 ..................................................................................... 11 Added Table 15, Renumbered Sequentially; Changes to Figure 4 ............................................................................................ 11 4/2015—Rev. C to Rev. D Change to Supply Voltages (V , V ) Parameter, Table 17 ........ 12 Change to General Description Section ........................................ 1 DD1 DD2 Added Figure 6; Changes to Table 20 .......................................... 13 Added Figure 8; Changes to Table 21 .......................................... 14 4/2015—Rev. B to Rev. C Added Figure 10, Changes to Table 22 ........................................ 15 Changes to Regulatory Information Section ................................ 9 Added Figure 30 ............................................................................. 19 Changes to Power Consumption Section; Added Table 23 ...... 21 3/2015—Rev. A to Rev. B Added Figure 27 ............................................................................. 23 Changes to Features Section and Figure 3 ..................................... 1 Changes to Ordering Guide .......................................................... 24 Changes to Table 12 .......................................................................... 9 Changes to Table 13 and Table 14 ................................................ 10 10/2013—Revision 0: Initial Version Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 24 Rev. E | Page 2 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—3.3 V OPERATION All typical specifications are at T = 25°C, V = V = 3.3 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operating range of 3.0 V ≤ V ≤ 3.6 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. Switching specifications DD1 DD2 A are tested with C = 15 pF, and CMOS signal levels, unless otherwise noted. L Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within pulse-width distortion (PWD) limit Propagation Delay t , t 80 180 ns 50% input to 50% output PHL PLH Change vs. Temperature 200 ps/°C Minimum Pulse Width PW 500 ns Within PWD limit Pulse-Width Distortion PWD 8 ns |t − t | PLH PHL Propagation Delay Skew1 t 10 ns PSK Channel Matching Codirectional t 10 ns PSKCD Opposing Direction t 15 ns PSKOD 1 tPSK is the magnitude of the worst-case difference in tPHL and tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1440/ADuM1445 I 732 1000 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 492 750 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1441/ADuM1446 I 672 900 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 552 900 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1442/ADuM1447 I 612 900 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 612 900 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL Rev. E | Page 3 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet Table 3. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Threshold Logic High V 0.7 V 1 V IH DDx Logic Low V 0.3 V 1 V IL DDx Output Voltages Logic High V V 1 − 0.1 3.3 V I = −20 µA, V = V OH DDx OUTx Ix IxH V 1 − 0.4 3.1 V I = −4 mA, V = V DDx OUTx Ix IxH Logic Low V 0.0 0.1 V I = 20 µA, V = V OL OUTx Ix IxL 0.2 0.4 V I = 4 mA, V = V OUTx Ix IxL Input Current per Channel I −1 +0.01 +1 µA 0 V ≤ V ≤ V 1 I Ix DDx Input Switching Thresholds Positive Threshold Voltage V 1.8 V T+ Negative Going Threshold V 1.2 V T− Input Hysteresis ΔV 0.6 V T Undervoltage Lockout, V or V UVLO 1.5 V DD1 DD2 Supply Current per Channel Quiescent Current Input Supply I 4.8 10 µA EN low DDI (Q) X Output Supply I 0.8 3.3 µA EN low DDO (Q) X Input (Refresh Off) I 0.12 µA EN high DDI (Q) X Output (Refresh Off) I 0.13 µA EN high DDO (Q) X Dynamic Supply Current Input I 88 µA/Mbps DDI (D) Output I 60 µA/Mbps DDO (D) AC SPECIFICATIONS Output Rise Time/Fall Time t /t 2 ns 10% to 90% R F Common-Mode Transient Immunity2 |CM| 25 40 kV/µs V = V 1, V = 1000 V, Ix DDx CM transient magnitude = 800 V Refresh Rate f 14 kbps r 1 VDDx = VDD1 or VDD2. 2 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDDx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. E | Page 4 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 ELECTRICAL CHARACTERISTICS—2.5 V OPERATION All typical specifications are at T = 25°C, V = V = 2.5 V. Minimum/maximum specifications apply over the entire recommended A DD1 DD2 operating range of 2.25 V ≤ V ≤ 2.75 V, 2.25 V ≤ V ≤ 2.75 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. Switching DD1 DD2 A specifications are tested with C = 15 pF, and CMOS signal levels, unless otherwise noted. L Table 4. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within PWD limit Propagation Delay t , t 112 180 ns 50% input to 50% output PHL PLH Change vs. Temperature 280 ps/°C Pulse-Width Distortion PWD 12 ns |t − t | PLH PHL Minimum Pulse Width PW 500 ns Within PWD limit Propagation Delay Skew1 t 10 ns PSK Channel Matching Codirectional t 10 ns PSKCD Opposing Direction t 30 ns PSKOD 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Table 5. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1440/ADuM1445 I 623 800 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 337 500 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1441/ADuM1446 I 552 750 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 409 750 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1442/ADuM1447 I 480 750 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 480 750 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL Rev. E | Page 5 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet Table 6. For All Models Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Threshold Logic High V 0.7 V 1 V IH DDx Logic Low V 0.3 V 1 V IL DDx Output Voltages Logic High V V 1 − 0.1 2.5 V I = −20 µA, V = V OH DDx Ox Ix IxH V 1 − 0.4 2.35 V I = −4 mA, V = V DDx Ox Ix IxH Logic Low V 0.0 0.1 V I = 20 µA, V = V OL Ox Ix IxL 0.1 0.4 V I = 4 mA, V = V Ox Ix IxL Input Current per Channel I −1 +0.01 +1 µA 0 V ≤ V ≤ V 1 I Ix DDx Input Switching Thresholds Positive Threshold Voltage V 1.5 V T+ Negative Going Threshold V 1.0 V T− Input Hysteresis ΔV 0.5 V T Undervoltage Lockout, V or V UVLO 1.5 V DD1 DD2 Supply Current per Channel Quiescent Current Input Supply I 2.6 3.3 µA EN low DDI (Q) X Output Supply I 0.5 1.8 µA EN low DDO (Q) X Input (Refresh Off) I 0.05 µA EN high DDI (Q) X Output (Refresh Off) I 0.05 µA EN high DDO (Q) X Dynamic Supply Current Input I 76 µA/Mbps DDI (D) Output I 41 µA/Mbps DDO (D) AC SPECIFICATIONS Output Rise Time/Fall Time t /t 2 ns 10% to 90% R F Common-Mode Transient Immunity2 |CM| 25 40 kV/µs V = V 1, V = 1000 V, Ix DDx CM transient magnitude = 800 V Refresh Rate f 14 kbps r 1 VDDx = VDD1 or VDD2. 2 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VOUT > 0.8 VDDx. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. E | Page 6 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 ELECTRICAL CHARACTERISTICS—V = 3.3 V, V = 2.5 V OPERATION DD1 DD2 All typical specifications are at T = 25°C, V = 3.3 V, and.V = 2.5 V. Minimum/maximum specifications apply over the entire A DD1 DD2 recommended operating range of 3.0 V ≤ V ≤ 3.6 V, 2.25 V ≤ V ≤ 2.75 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. DD1 DD2 A Switching specifications are tested with C = 15 pF, and CMOS signal levels, unless otherwise noted. L For dc specifications and ac specifications, see Table 3 for Side 1 and see Table 6 for Side 2. Table 7. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within PWD limit Propagation Delay Side 1 to Side 2 t , t 84 180 ns 50% input to 50% output PHL PLH Side 2 to Side 1 t , t 120 180 ns 50% input to 50% output PHL PLH Change vs. Temperature 280 ps/°C Pulse-Width Distortion PWD 12 ns |t − t | PLH PHL Pulse Width PW 500 ns Within PWD limit Propagation Delay Skew1 t 10 ns PSK Channel Matching Codirectional t 10 ns PSKCD Opposing Direction t 60 ns PSKOD 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Table 8. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1440/ADuM1445 I 732 1000 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 337 750 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1441/ADuM1446 I 672 900 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 409 750 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1442/ADuM1447 I 612 900 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 480 750 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL Rev. E | Page 7 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet ELECTRICAL CHARACTERISTICS—V = 2.5 V, V = 3.3 V OPERATION DD1 DD2 All typical specifications are at T = 25°C, V = 2.5, and V = 3.3 V. Minimum/maximum specifications apply over the entire A DD1 DD2 recommended operating range of 2.25 V ≤ V ≤ 2.75 V, 3.0 V ≤ V ≤ 3.6 V, and −40°C ≤ T ≤ +125°C, unless otherwise noted. DD1 DD2 A Switching specifications are tested with C = 15 pF, and CMOS signal levels, unless otherwise noted. L For dc specifications and ac specifications, see Table 6 for Side 1 and see Table 3 for Side 2. Table 9. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Data Rate 2 Mbps Within PWD limit Propagation Delay Side 1 to Side 2 t t 120 180 ns 50% input to 50% output PHL, PLH Side 2 to Side 1 t t 84 180 ns 50% input to 50% output PHL, PLH Change vs. Temperature 200 ps/°C Pulse-Width Distortion PWD 12 ns |t − t | PLH PHL Pulse Width PW 500 ns Within PWD limit Propagation Delay Skew1 t 10 ns PSK Channel Matching Codirectional t 10 ns PSKCD Opposing Direction t 60 ns PSKOD 1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Table 10. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SUPPLY CURRENT 2 Mbps, no load ADuM1440/ADuM1445 I 623 1000 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 492 750 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1441/ADuM1446 I 552 750 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 552 900 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL ADuM1442/ADuM1447 I 480 750 µA EN = 0 V, V = V , V = 0 V DD1 X IH DD IL I 612 900 µA EN = 0 V, V = V , V = 0 V DD2 X IH DD IL Rev. E | Page 8 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 PACKAGE CHARACTERISTICS Table 11. Parameter Symbol Min Typ Max Unit Test Conditions/Comments Resistance (Input-to-Output)1 R 1013 Ω I-O Capacitance (Input-to-Output)1 C 2 pF f = 1 MHz I-O Input Capacitance2 C 4.0 pF I IC Junction-to-Ambient Thermal θ 76 °C/W Thermocouple located at center of package underside JA Resistance (QSOP) IC Junction-to-Ambient Thermal θ 50.5 °C/W Thermocouple located at center of package underside JA Resistance (SSOP) 1 The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together. 2 Input capacitance is from any input data pin to ground. REGULATORY INFORMATION See Table 20 and the Insulation Lifetime section for the recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 12. Safety Certifications UL CSA VDE CSA/Sira Recognized Under UL Approved under CSA Certified according to Certified for use in intrinsic 1577 Component Component Acceptance DIN V VDE V 0884-10 safety (IS) to IS applications Recognition Program1 Notice 5A (VDE V 0884-10):2006-122 under ATEX and IECEx Single Protection CSA 60950-1-07+A1+A2 and QSOP package: ATEX: EN 60079-0:2012+A11:2013 IEC 60950-1 second edition reinforced insulation, and EN 60079-11:2012 +A1+A2 565 V QSOP package PEAK 2500 V RMS Isolation QSOP package: basic SSOP package: IECEx: IEC 60079-0:2011 Edition 6 Voltage (RQ-16 Only) insulation, 310 V rms reinforced insulation, and IEC 60079-11:2011 Edition 6 maximum working voltage 849 V SSOP package PEAK 3750 V RMS Isolation SSOP package: basic insulation II 1G Ex ia IIC Ga Voltage (RS-20 Only) at 510 V rms (721 VPEAK) maximum working voltage and IEC 60601-1 Edition 3.1 250 V (1 means of patient protection (MOPP)); reinforced insulation at 255 V rms (360 V ) maximum PEAK working voltage File E214100 File 205078 File 2471900-4880-0001 File 70013932 1 In accordance with UL 1577, each ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 is proof tested by applying an insulation test voltage and measuring leakage during final production testing. QSOP package devices are tested at ≥3000 V rms for 1 sec with a current leakage detection limit = 5 μA. SSOP package devices are tested at ≥4500 V rms for 1 sec with a current leakage detection limit = 10 μA. 2 In accordance with DIN V VDE V 0884-10, each ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 is proof tested by applying an insulation test voltage ≥1059 VPEAK for 1 second (partial discharge detection limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-10 approval. Rev. E | Page 9 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet INSULATION AND SAFETY RELATED SPECIFICATIONS Table 13. Parameter Symbol Value Unit Test Conditions/Comments Rated Dielectric Insulation Voltage (RQ-16) 2500 V rms 1-minute duration Rated Dielectric Insulation Voltage (RS-20) 3750 V rms 1-minute duration Minimum External Tracking and Air Gap, RQ-16 (Creepage L(I02) 3.1 mm min Measured from input terminals to output and Clearance) terminals, shortest distance path along package body Minimum Clearance in the Plane of the Printed Circuit L(I01) 3.8 mm min Measured from input terminals to output Board, RQ-16 (PCB Clearance) terminals, shortest distance through air, line of sight, in the PCB mounting plane Minimum External Tracking and Air Gap, RS-20 (Creepage L(I01) 5.1 mm min Measured from input terminals to output and Clearance) terminals, shortest distance path along package body Minimum Clearance in the Plane of the Printed Circuit L(I02) 5.1 mm min Measured from input terminals to output Board, RS-20 (PCB Clearance) terminals, shortest distance through air, line of sight, in the PCB mounting plane Minimum Internal Gap (Internal Clearance) 0.017 mm min Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1 Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1) DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 INSULATION CHARACTERISTICS These isolators are suitable for reinforced electrical isolation within the safety limit data only. Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marked on packages denotes DIN V VDE V 0884-10 approval. Table 14. 16-Lead QSOP (RQ-16) Description Test Conditions/Comments Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms I to IV For Rated Mains Voltage ≤ 300 V rms I to III For Rated Mains Voltage ≤ 400 V rms I to II Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage V 565 V IORM PEAK Input-to-Output Test Voltage, Method b1 V × 1.875 = V , 100% production test, V 1059 V IORM pd(m) pd(m) PEAK t = t = 1 sec, partial discharge < 5 pC ini m Input-to-Output Test Voltage, Method a After Environmental Tests Subgroup 1 V × 1.5 = V , t = 60 sec, t = 10 sec, V 847 V IORM pd(m) ini m pd(m) PEAK partial discharge < 5 pC After Input and/or Safety Test Subgroup 2 V × 1.2 = V , t = 60 sec, t = 10 sec, V 678 V IORM pd(m) ini m pd(m) PEAK and Subgroup 3 partial discharge < 5 pC Highest Allowable Overvoltage V 4000 V IOTM PEAK Surge Isolation Voltage V = 10 kV, 1.2 µs rise time, 50 µs, 50% fall time V 6250 V PEAK IOSM PEAK Safety Limiting Values Maximum value allowed in the event of a failure (see Figure 4) Case Temperature T 150 °C S Total Power Dissipation at 25°C I 1.64 W S1 Insulation Resistance at T V = 500 V R >109 Ω S IO S Rev. E | Page 10 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Table 15. 20-Lead SSOP (RS-20) Description Conditions Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms I to IV For Rated Mains Voltage ≤ 300 V rms I to IV For Rated Mains Voltage ≤ 400 V rms I to III Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage V 849 V IORM PEAK Input-to-Output Test Voltage, Method b1 V × 1.875 = V , 100% production test, t = t = V 1592 V IORM pd(m) ini m pd(m) PEAK 1 sec, partial discharge < 5 pC Input-to-Output Test Voltage, Method a After Environmental Tests Subgroup 1 V × 1.5 = V , t = 60 sec, t = 10 sec, partial V 1273 V IORM pd(m) ini m pd(m) PEAK discharge < 5 pC After Input and/or Safety Test Subgroup 2 V × 1.2 = V ,t = 60 sec, t = 10 sec, partial V 1018 V IORM pd(m) ini m pd(m) PEAK and Subgroup 3 discharge < 5 pC Highest Allowable Overvoltage V 6000 V IOTM PEAK Surge Isolation Voltage V = 10 kV, 1.2 µs rise time, 50µs, 50% fall time V 6000 V PEAK IOSM PEAK Safety Limiting Values Maximum value allowed in the event of a failure (see Figure 4) Case Temperature T 150 °C S Total Power Dissipation at 25°C I 2.5 W S1 Insulation Resistance at T V = 500 V R >109 Ω S IO S INTRINSIC SAFETY The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 support intrinsic safety for IS to IS applications under IEC 60079-11, and carry ATEX and IECEx certifications. These devices do not currently support IS to non IS galvanic isolation applications due to the minimum insulation requirements of IEC60079-11. Product Conformity Certificate Sira 16ATEX2265U and IECEx SIR 16.0091U Special Conditions for Safe Use These components are certified to comply with IEC 60079-11:2011. When one of these components is used in equipment, the component is to be fitted on a PCB inside a suitable enclosure and recertified as equipment. The creepage and clearance distances across the isolating component have been evaluated, but the distances to other circuitry remain the responsibility of the user of the certified equipment. This assembly is an isolating component between separate intrinsically safe circuits. It is recommended that the assembly be connected to suitably certified intrinsically safe circuits considering the entity parameters in Table 16. Table 16. IS Entity Parameters Package Type Entity Parameters Side 11 Entity Parameters Side 2 16-Lead QSOP U = 42 V, I = 275 mA, P = 1.3W, L = 0, C = 4pF U = 42 V, I = 275 mA, P = 1.3W, L = 0, C = 4pF i i i i i i i i i i 20-Lead SSOP U = 42 V, I = 275 mA, P = 1.3W, L = 0, C = 4pF U = 42 V, I = 275 mA, P = 1.3W. L = 0, C = 4pF i i i i i i i i i i 1 Li is defined as input inductance, Ci is input capacitance, Pi is input power, Ui is input voltage, and Ii is input current. The components (for example, digital isolators) being certified have the following safety ratings listed in Table 17. The temperature class is determined based on Table 17. Table 17. Temperature Class Information Maximum Component Package Type Maximum Power Side 1 (W) Maximum Power Side 2 (W) Temperature (°C) Ambient Temperature (°C) 16-Lead QSOP 1.3 1.3 189.8 −40°C to +85°C 20-Lead SSOP 1.3 1.3 218 −40°C to +85°C Rev. E | Page 11 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet 3.0 Recommended Operating Conditions SSOP20 Table 18. 2.5 W) Parameter Symbol Value ER (2.0 Operating Temperature TA −40°C to +125°C W Supply Voltages1 V , V 2.25 V to 3.6 V PO QSOP16 DD1 DD2 G Input Signal Rise and Fall Times 1.0 ms N1.5 TI MI 1 All voltages are relative to their respective grounds. See the DC Correctness E LI1.0 section for information on immunity to external magnetic fields. F SA 0.5 00 50AMBIENT TEM10P0ERATURE(°C1)50 200 11845-003 Figure 4. Thermal Derating Curve, Dependence of Safety-Limiting Values with Case Temperature per DIN V VDE V 0884-10 Rev. E | Page 12 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 20. Maximum Continuous Working Voltage1 Parameter Value Constraint Table 19. AC Voltage Parameter Rating 60 Hz Bipolar Waveform 565 V 50-year minimum lifetime Supply Voltages (V , V ) −0.5 V to +5 V PEAK DD1 DD2 60 Hz Unipolar Waveform Input Voltages (V , V ) −0.5 V to V + 0.5 V IA IB DDI Basic Insulation 975 V 50-year minimum lifetime PEAK Output Voltages (V , V ) −0.5 V to V + 0.5 V OA OB DD2 DC Voltage Average Output Current per Pin1 Basic Insulation 975 V 50-year minimum lifetime PEAK Side 1 (I ) −10 mA to +10 mA O1 Side 2 (I ) −10 mA to +10 mA 1 Refers to continuous voltage magnitude imposed across the isolation O2 barrier. See the Insulation Lifetime section for more details. Common-Mode Transients2 −100 kV/µs to +100 kV/µs ESD CAUTION Storage Temperature (T ) Range −65°C to +150°C ST Ambient Operating Temperature −40°C to +125°C (T ) Range A 1 See Figure 4 for maximum safety power values for various temperatures. 2 Refers to common-mode transients across the insulation barrier. Common-mode transients exceeding the absolute maximum ratings can cause latch-up or permanent damage. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Table 21. Truth Table (Positive Logic) for all Models V Input1, 2 V State3 V State4 EN Input1 V Output1 Description Ix DDI DDO x Ox H Powered Powered L H Normal operation; data is high and refresh is enabled. L Powered Powered L L Normal operation; data is low and refresh is enabled. H Powered Powered H H Output is high, and refresh is disabled. L Powered Powered H L5 Output is low, and refresh is disabled. L Unpowered Powered L Default Input unpowered. Outputs are in the default state, high for ADuM1440, ADuM1441, and ADuM1442, and low ADuM1445, ADuM1446, and ADuM1447. Outputs return to input state within 150 µs of V power restoration. See the pin function DDI descriptions (Table 22 through Table 24) for more details. L Unpowered Powered H Hold Input unpowered. Outputs are the last state before input power is shut down. X Powered Unpowered X Z Output unpowered. Output pins are in high impedance state. Outputs return to input state within 34 µs of V power DDO restoration. See the pin function descriptions (Table 22 through Table 24) for more details. 1 H = high, L = low, X = don’t care, and Z = high impedance. 2 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). 3 VDDI refers to the power supply on the input side of a given channel (A, B, C, or D). 4 VDDO refers to the power supply on the output side of a given channel (A, B, C, or D). 5 Low input must follow a falling edge; otherwise, it can be in the default low state. Rev. E | Page 13 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD1 1 16 VDD2 VDD1 1 20 VDD2 GND11 2 15 GND22 GND11 2 19 GND22 VIA 3 ADuM1440/ 14 VOA VIA 3 18 VOA VIB 4 ADuM1445 13 VOB VIB 4 ADuM1440/ 17 VOB VIC 5 (NToOt Pto V SIEcaWle) 12 VOC VIC 5 ADuM1445 16 VOC VID 6 11 VOD VID 6 TOP VIEW 15 VOD EN1 7 10 EN2 EN1 7 (Not to Scale) 14 EN2 GND11 8 9 GND22 NIC 8 13 NIC NIC 9 12 NIC 1PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. CONNECTING BOTH GND11 10 11 GND22 2PTBIOON T G9H NA TDNO1D IG SP NIRNDE 21C 5IOS A MRRMEECE IONNDTMEEMRDEN.NADLELDY. CONNECTED. CONNECTING 11845-004 NIC = NOT INTERNALLY CONNECTED. 1PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED. 2 PCCIOONNN 1NN1EE ACCNTTDIINN PGGIN BB 1OO9TT AHHR TTEOO I NGGTNNEDDR12N IISSA LRRLEEYCC COOOMMNMMNEEENNCDDTEEEDDD... 11845-104 Figure 5. ADuM1440/ADuM1445 QSOP Pin Configuration Figure 6. ADuM1440/ADuM1445 SSOP Pin Configuration Table 22. ADuM1440/ADuM1445 Pin Function Descriptions1 QSOP SSOP Pin No.2 Pin No. Mnemonic Description 1 1 V Supply Voltage for Isolator Side 1 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01 DD1 µF to 0.1 µF range between V (Pin 1) and GND (Pin 2). DD1 1 2, 8 2, 10 GND Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting 1 both to GND is recommended. 1 3 3 V Logic Input A. IA 4 4 V Logic Input B. IB 5 5 V Logic Input C. IC 6 3 V Logic Input D. ID 7 7 EN Refresh/Watchdog Enable 1. Connecting Pin 7 to GND enables input/output refresh and 1 1 watchdog functionality for Side 1, supporting standard iCoupler operation. Tying Pin 7 to V DD1 disables refresh and watchdog functionality for lowest power operation, see the Applications Information section for a detailed description of this mode. EN and EN must be set to the same 1 2 logic state. 9, 15 11, 19 GND Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and 2 connecting both to GND is recommended. 2 10 14 EN Refresh/Watchdog Enable 2. Connecting Pin 10 to GND enables input/output refresh and 2 2 watchdog functionality for Side 2, supporting standard iCoupler operation. Tying Pin 10 to V DD2 disables refresh and watchdog functionality for lowest power operation, see the Applications Information section for a detailed description of this mode. EN and EN must be set to the same 1 2 logic state. 11 15 V Logic Output D. OD 12 16 V Logic Output C. OC 13 17 V Logic Output B. OB 14 18 V Logic Output A. OA 16 20 V Supply Voltage for Isolator Side 2 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01 DD2 µF to 0.1 µF range between V (Pin 16) and GND (Pin 15). DD2 2 N/A 8, 9, 12, 13 NC No Connect. Do not connect to this pin. 1 Reference the AN-1109 Application Note for specific layout guidelines. 2 N/A = not applicable. Rev. E | Page 14 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 VDD1 1 16 VDD2 VDD1 1 20 VDD2 GND11 2 15 GND22 GND11 2 19 GND22 VIA 3 ADuM1441/ 14 VOA VIA 3 18 VOA VIB 4 ADuM1446 13 VOB VIB 4 ADuM1441/ 17 VOB VIC 5 (NToOt Pto V SIEcaWle) 12 VOC VIC 5 ADuM1446 16 VOC VOD 6 11 VID VOD 6 TOP VIEW 15 VID EN1 7 10 EN2 EN1 7 (Not to Scale) 14 EN2 GND11 8 9 GND22 NIC 8 13 NIC NIC 9 12 NIC 1PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. CONNECTING BOTH GND11 10 11 GND22 2PTBIOON T G9H NA TDNO1D IG SP NIRNDE 21C 5IOS A MRRMEECE IONNDTMEEMRDEN.NADLELDY. CONNECTED. CONNECTING 11845-005 1PIN 2 ANNICD =P INNO 1T0 IANRTEE RINNTAELRLNYA CLOLNYN CEOCNTNEEDC.TED. 2 PCCIOONNN 1NN1EE ACCNTTDIINN PGGIN BB 1OO9TT AHHR TTEOO I NGGTNNEDDR12N IISSA LRRLEEYCC COOOMMNMMNEEENNCDDTEEEDDD... 11845-108 Figure 8. ADuM1441/ADuM1446 SSOP Pin Configuration Figure 7. ADuM1441/ADuM1446 QSOP Pin Configuration Table 23. ADuM1441/ADuM1446 Pin Function Descriptions1 QSOP SSOP Pin No. 2 Pin No. Mnemonic Description 1 1 V Supply Voltage for Isolator Side 1 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01 DD1 µF to 0.1 µF range between V (Pin 1) and GND (Pin 2). DD1 1 2, 8 2, 10 GND Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting 1 both to GND is recommended. 1 3 3 V Logic Input A. IA 4 4 V Logic Input B. IB 5 5 V Logic Input C. IC 6 3 V Logic Output D. OD 7 7 EN Refresh/Watchdog Enable 1. Connecting Pin 7 to GND enables input/output refresh and 1 1 watchdog functionality for Side 1, supporting standard iCoupler operation. Tying Pin 7 to V DD1 disables refresh and watchdog functionality for lowest power operation, see the Applications Information section for a detailed description of this mode. EN and EN must be set to the same 1 2 logic state. 9, 15 11, 19 GND Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and 2 connecting both to GND is recommended. 2 10 14 EN Refresh/Watchdog Enable 2. Connecting Pin 10 to GND enables input/output refresh and 2 2 watchdog functionality for Side 2, supporting standard iCoupler operation. Tying Pin 10 to V DD2 disables refresh and watchdog functionality for lowest power operation, see the Applications Information section for a detailed description of this mode. EN and EN must be set to the same 1 2 logic state. 11 15 V Logic Input D. ID 12 16 V Logic Output C. OC 13 17 V Logic Output B. OB 14 18 V Logic Output A. OA 16 20 V Supply Voltage for Isolator Side 2 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01 DD2 µF to 0.1 µF range between V (Pin 16) and GND (Pin 15). DD2 2 N/A 8, 9, 12, 13 NC No Connect. Do not connect to this pin. 1 Reference the AN-1109 Application Note for specific layout guidelines. 2 N/A = not applicable. Rev. E | Page 15 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet VDD1 1 16 VDD2 VDD1 1 20 VDD2 GND11 2 15 GND22 GND11 2 19 GND22 VIA 3 ADuM1442/ 14 VOA VIA 3 18 VOA VIB 4 ADuM1447 13 VOB VIB 4 ADuM1442/ 17 VOB VOC 5 (NToOt Pto V SIEcaWle) 12 VIC VOC 5 ADuM1447 16 VIC VOD 6 11 VID VOD 6 TOP VIEW 15 VID EN1 7 10 EN2 EN1 7 (Not to Scale) 14 EN2 GND11 8 9 GND22 NIC 8 13 NIC NIC 9 12 NIC 1PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. CONNECTING BOTH GND11 10 11 GND22 2PTBIOON T G9H NA TDNO1D IG SP NIRNDE 21C 5IOS A MRRMEECE IONNDTMEEMRDEN.NADLELDY. CONNECTED. CONNECTING 11845-006 NIC = NOT INTERNALLY CONNECTED. 1PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED. 2 PCCIOONNN 1NN1EE ACCNTTDIINN PGGIN BB 1OO9TT AHHR TTEOO I NGGTNNEDDR12N IISSA LRRLEEYCC COOOMMNMMNEEENNCDDTEEEDDD... 11845-110 Figure 9. ADuM1442/ADuM1447 QSOP Pin Configuration Figure 10. ADuM1442/ADuM1447 SSOP Pin Configuration Table 24. ADuM1442/ADuM1447 Pin Function Descriptions1 QSOP SSOP Pin No. 2 Pin No. Mnemonic Description 1 1 V Supply Voltage for Isolator Side 1 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01 DD1 µF to 0.1 µF range between V (Pin 1) and GND (Pin 2). DD1 1 2, 8 2, 10 GND Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting 1 both to GND is recommended. 1 3 3 V Logic Input A. IA 4 4 V Logic Input B. IB 5 5 V Logic Output C. OC 6 3 V Logic Output D. OD 7 7 EN Refresh/Watchdog Enable 1. Connecting Pin 7 to GND enables input/output refresh and 1 1 watchdog functionality for Side 1, supporting standard iCoupler operation. Tying Pin 7 to V DD1 disables refresh and watchdog functionality for lowest power operation, see the Applications Information section for detailed description of this mode. EN and EN must be set to the same 1 2 logic state. 9, 15 11, 19 GND Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and 2 connecting both to GND is recommended. 2 10 14 EN Refresh/Watchdog Enable 2. Connecting Pin 10 to GND enables input/output refresh and 2 2 watchdog functionality for Side 2, supporting standard iCoupler operation. Tying Pin 10 to V DD2 disables refresh and watchdog functionality for lowest power operation, see the Applications Information section for a detailed description of this mode. EN and EN must be set to the same 1 2 logic state. 11 15 V Logic Input D. ID 12 16 V Logic Input C. IC 13 17 V Logic Output B. OB 14 18 V Logic Output A. OA 16 20 V Supply Voltage for Isolator Side 2 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01 DD2 µF to 0.1 µF range between V (Pin 16) and GND (Pin 15). DD2 2 N/A 8, 9, 12, 13 NC No Connect. Do not connect to this pin. 1 Reference the AN-1109 Application Note for specific layout guidelines. 2 N/A = not applicable. Rev. E | Page 16 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 TYPICAL PERFORMANCE CHARACTERISTICS 350 140 ON PER INPUT (µA)223050000 1105050 20 40 N PER OUTPUT (µA)11028000 0240 20 40 PTI TIO M P U150 M 60 S U N S O N NT C100 T CO 40 E N R E UR 50 RR 20 C U VDDx INPUT CURRENT C VDDx OUTPUT CURRENT 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-007 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-010 Figure 11. Current Consumption per Input vs. Data Rate for 2.5 V, Figure 14. Current Consumption per Output vs. Data Rate for 3.3 V, ENx = Low Operation ENx = Low Operation 90 160 UT (µA) 80 T (µA)140 1.0 UTP 70 4 NPU120 0.5 TION PER O 5600 020 20 40 PTION PER I10800 00 5 10 MP 40 UM U S S N 60 ON 30 CO NT C 20 ENT 40 E R R R UR 10 CU 20 C VDDx OUTPUT CURRENT VDDx INPUT CURRENT 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-008 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-011 Figure 12. Current Consumption per Output vs. Data Rate for 2.5 V, Figure 15. Current Consumption per Input vs. Data Rate for 2.5 V, ENx = Low Operation ENx = High Operation 400 90 T (µA)350 15 UT (µA) 80 1.0 PTION PER INPU223050000 10050 20 40 TION PER OUTP 567000 0.500 5 10 UM MP 40 S U N150 S CO ON 30 ENT 100 NT C 20 R E R R CU 50 UR 10 C VDDx INPUT CURRENT VDDx OUTPUT CURRENT 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-009 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-012 Figure 13. Current Consumption per Input vs. Data Rate for 3.3 V, Figure 16. Current Consumption per Output vs. Data Rate for 2.5 V, ENx = Low Operation ENx = High Operation Rev. E | Page 17 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet 200 300 FALLING A)180 RISING µ T ( 1.0 250 U160 P N 0.5 N PER I112400 00 5 10 T (µA)200 O N MPTI100 URRE150 ONSU 80 CDDx100 C 60 I T N RRE 40 50 U C 20 VDDx INPUT CURRENT 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-013 00 0.5 D1A.0TA INPUT1 .V5OLTAGE2 .(0V) 2.5 3.0 11845-016 Figure 17. Current Consumption per Input vs. Data Rate for VDDX = 3.3 V, Figure 20. IDDx Current per Input vs. Data Input Voltage for VDDx = 2.5 V ENx = High Operation 140 10 A) µ 9 UT (120 1.0 A) P µ 8 UT 0.5 L ( N PER O10800 00 5 10 CHANNE 67 TIO NT/ 5 P E SUM 60 URR 4 N C CO 40 LY 3 RRENT 20 SUPP 2 U 1 C OUTPUT VDDx OUTPUT CURRENT INPUT 00 500 DATA R1A0T00E (kbps) 1500 2000 11845-014 0–40 –20 0 20TEMP4E0RATU6R0E (°C8)0 100 120 140 11845-117 Figure 18. Current Consumption per Output vs. Data Rate for VDDx = 3.3 V, Figure 21. Typical Input and Output Supply Current per Channel vs. ENx = High Operation Temperature for VDDx = 2.5 V, Data Rate = 100 kbps 600 10 FALLING RISING 9 500 A) µ 8 L ( T (µA)400 HANNE 67 N C URRE300 RENT/ 5 I CDDx200 LY CUR 34 P P U 2 100 S 1 OUTPUT INPUT 00 1 DATA INPUT2 VOLTAGE (V) 3 4 11845-015 0–40 –20 0 20TEMP4E0RATU6R0E (°C8)0 100 120 140 11845-118 SFigure 19. Typical IDDx Current per Input vs. Figure 22. Typical Input and Output Supply Current per Channel vs. Data Input Voltage for VDDx = 3.3 V Temperature for VDDx = 3.3 V, Data Rate = 100 kbps Rev. E | Page 18 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 100 120 90 µA) 80 100 NNEL ( 70 TH (ns) 80 A D CH 60 WI T/ R N 50 E 60 URRE 40 H FILT PPLY C 30 GLITC 40 U 20 S 20 10 OUTPUT INPUT 0–40 –20 0 20TEMP4E0RATU6R0E (°C8)0 100 120 140 11845-119 02.0 2.5 TRANSMIT3T.0ER VDDx (V) 3.5 4.0 11845-017 Figure 23. Typical Input and Output Supply Current per Channel vs. Figure 26. Typical Glitch Filter Operation Threshold Temperature for VDDx = 2.5 V, Data Rate = 1000 kbps 100 140 90 120 A) µ 80 L ( NE 70 µs)100 AN D ( H 60 O C RI 80 T/ E N 50 P URRE 40 RESH 60 LY C 30 REF 40 P P U 20 S 20 10 OUTPUT VDDx = 2.5V INPUT VDDx = 3.3V 0–40 –20 0 20TEMP4E0RATU6R0E (°C8)0 100 120 140 11845-120 0–40 –20 0 20TEMP4E0RATU6R0E (°C8)0 100 120 140 11845-122 Figure 24. Typical Input and Output Supply Current per Channel vs. Figure 27. Typical Refresh Period vs. Temperature for Temperature for VDDx = 3.3 V, Data Rate = 1000 kbps 3.3 V and 2.5 V Operation 140 120 120 100 s) LAY (n100 D (µs) 80 ROPAGATION DE 468000 REFRESH PERIO 4600 P 20 20 VDDx = 2.5V VDDx = 3.3V 0–40 –20 0 20TEMP4E0RATU6R0E (°C8)0 100 120 140 11845-121 02.0 2.5 VDDx VO3L.0TAGE (V) 3.5 4.0 11845-123 Figure 25. Typical Propagation Delay vs. Temperature for Figure 28. Typical Refresh Period vs. VDDX Voltage VDDx = 3.3 V or VDDx = 2.5 V Rev. E | Page 19 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet APPLICATIONS INFORMATION PCB LAYOUT INPUT(VIx) 50% The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ tPLH tPHL ADuM1446/ADuM1447 digital isolators require no external interface circuitry for the logic interfaces. Power supply bypassing OUTPUT(VOx) 50% 11845-019 is strongly recommended at both input and output supply pins: Figure 31. Propagation Delay Parameters V and V (see Figure 29). Choose a capacitor value between DD1 DD2 Pulse width distortion is the maximum difference between 0.01 µF and 0.1 µF. The total lead length between both ends of the these two propagation delay values and an indication of how capacitor and the input power supply pin must not exceed 20 mm. accurately the timing of the input signal is preserved. Using proper PCB design choices, the ADuM1440/ADuM1441/ Channel-to-channel matching is the maximum amount of time ADuM1442/ADuM1445/ADuM1446/ADuM1447 readily meets the propagation delay differs between channels within a single CISPR 22 Class A (and FCC Class A) emissions standards, as ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ well as the more stringent CISPR 22 Class B (and FCC Class B) ADuM1447 component. standards in an unshielded environment. Refer to the AN-1109 Application Note, Recommendations for Control of Radiated Propagation delay skew is the maximum amount of time the Emissions with iCoupler Devices, for PCB-related EMI mitigation propagation delay differs between multiple ADuM1440/ techniques, including board layout and stack-up issues. ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 components operating under the same conditions. VDD1 VDD2 GND1 GND2 In edge-based systems, it is critical to reject pulses that are too VIA VOA VIB VOB short to be handled by the encode and decode circuits. The VIC/VOC VOC/VIC ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ VIDG/VNEODND11 VEGONND2D/V2ID 11845-018 AthDe ugMlit1ch44 f7il tiemr polpemereantitn ag gthlirtcehsh foilltde.r T toh irse tjhecrte sphuolslde sd leepsse nthdasn o n Figure 29. Recommended Printed Circuit Board Layout, QSOP the operating voltage, as shown in Figure 26. Any pulse shorter VDD1 VDD2 than the glitch filter does not pass to the output. When the refresh GND1 GND2 circuit is enabled, pulses that match the glitch filter width have a VIA VOA VIB VOB small probability of being stretched until corrected by the next VVIICD//VVOOCD VVOOCD//VVIICD refresh cycle, or by the next valid data through that channel. To NC/CTRL1 CTRL2 avoid issues with pulse stretching, observe the minimum pulse GNENNDC11 NNGCCN/DE2N2 11845-126 wDiCd tChO reRqRuiEreCmTeNnEtsS lSis ted in the switching specifications. Figure 30. Recommended Printed Circuit Board Layout, SSOP Standard Operating Mode For applications involving high common-mode transients, it is Positive and negative logic transitions at the isolator input cause important to minimize board coupling across the isolation barrier. narrow (~1 ns) pulses to be sent to the decoder using the Furthermore, design the board layout so that any coupling that transformer. The decoder is bistable and is, therefore, either set does occur equally affects all pins on a given component side. or reset by the pulses, indicating input logic transitions. When Failure to ensure this can cause voltage differentials between refresh and watchdog functions are enabled by pulling EN and 1 pins exceeding the absolute maximum ratings of the device, EN low, in the absence of logic transitions at the input for more 2 thereby leading to latch-up or permanent damage. than ~140 µs, a periodic set of refresh pulses indicative of the PROPAGATION DELAY-RELATED PARAMETERS correct input state is sent to ensure dc correctness at the output. If These products are optimized for minimum power consumption the decoder receives no internal pulses of more than approximately by eliminating as many internal bias currents as possible. As a 200 µs, the input side is assumed unpowered or nonfunctional, result, the timing characteristics are more sensitive to operating in which case, the isolator watchdog circuit forces the output to voltage and temperature than in standard iCoupler products. a default state. The default state is either high as in the ADuM1440, Refer to Figure 21 through Figure 28 for the expected variation ADuM1441, and ADuM1442 versions, or low as in the ADuM1445, of these parameters. ADuM1446, and ADuM1447 versions. Propagation delay is a parameter defined as the time it takes a logic signal to propagate through a component. The input-to- output propagation delay time for a high-to-low transition can differ from the propagation delay time of a low-to-high transition. Rev. E | Page 20 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Low Power Operating Mode The pulses at the transformer output have an amplitude greater than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ establishing a 0.5 V margin in which induced voltages can be ADuM1446/ADuM1447 allow the refresh and watchdog tolerated. The voltage induced across the receiving coil is given by functions to be disabled by pulling EN and EN to logic high for 1 2 the lowest power consumption. These control pins must be set to V = (−dβ/dt) ∑ π r2; n = 1, 2, … , N n the same value on each side of the component for proper operation. where: In this mode, the current consumption of the chip drops to the β is magnetic flux density (gauss). microamp range. However, be careful when using this mode r is the radius of the nth turn in the receiving coil (cm). n because dc correctness is no longer guaranteed at startup. For N is the number of turns in the receiving coil. example, if the following sequence of events occurs: Given the geometry of the receiving coil in the ADuM1440/ 1. Power is applied to Side 1 ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 2. A high level is asserted on the VIA input and an imposed requirement that the induced voltage be, at most, 3. Power is applied to Side 2 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field at a given frequency can be calculated. The result The high on V is not automatically transferred to the Side 2 IA is shown in Figure 32. V , and there can be a level mismatch that is not corrected until a OA transition occurs at V . After power is stable on each side and a s) 1000 IA s u transition occurs on the input of the channel, that channel’s input ga k and output state is correctly matched. This contingency can be X( 100 U L addressed in several ways, such as sending dummy data, or toggling F C refresh on for a short period to force synchronization after turn on. TI 10 E N G Recommended Input Voltage for Low Power Operation A M 1 E The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ BL A ADuM1446/ADuM1447 implement Schmitt trigger input buffers W 0.1 O so that the devices operate cleanly in low data rate or noisy LL A environments. Schmitt triggers allow a small amount of shoot M 0.01 U M through current when their input voltage is not approximate to XI A beioththe rs lVigDhDtxl yo ro Gn NwDhexn le ivneplsu.t T vhoilsta igs ebse acraeu isne tthhee mtwiod dtrlea nosfi sthtoer ssu aprep ly M 0.0011k 10MkAGNETIC1 F00IEkLD FREQ1UMENCY (Hz1)0M 100M 11845-020 range. For many digital devices, this leakage is not a large portion Figure 32. Maximum Allowable External Magnetic Flux Density of the total supply current and may not be noticed; however, in For example, at a magnetic field frequency of 1 MHz, the the ultralow power ADuM1440/ADuM1441/ADuM1442/ maximum allowable magnetic field of 0.5 kgauss induces a ADuM1445/ADuM1446/ADuM1447, this leakage can be larger voltage of 0.25 V at the receiving coil. This is about 50% of the than the total operating current of the device and cannot be sensing threshold and does not cause a faulty output transition. ignored. Similarly, if such an event occurred during a transmitted pulse To achieve optimum power consumption with the ADuM1440/ (and was of the worst-case polarity), it would reduce the received ADuM1441/ADuM1442/ADuM1445/ADuM1446/ ADuM1447, pulse from >1.0 V to 0.75 V, still well above the 0.5 V sensing always drive the inputs as near to V or GND levels as possible. threshold of the decoder. DDx x Figure 19 and Figure 20 illustrate the shoot through leakage of The preceding magnetic flux density values correspond to specific an input; therefore, whereas the logic thresholds of the input are current magnitudes at given distances from the ADuM1440/ standard CMOS levels, optimum power performance is achieved ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 when the input logic levels are driven within 0.5 V of either transformers. Figure 33 shows these allowable current magnitudes VDDx or GNDx levels. as a function of frequency for selected distances. As shown, the MAGNETIC FIELD IMMUNITY ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ ADuM1447 are extremely immune and can be affected only by The magnetic field immunity of the ADuM1440/ADuM1441/ extremely large currents operating at a high frequency very near ADuM1442/ADuM1445/ADuM1446/ADuM1447 is determined to the component. For the 1 MHz example noted previously, a by the changing magnetic field, which induces a voltage in the 1.2 kA current would have to be placed 5 mm away from the receiving coil of the transformer large enough to either falsely ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ set or reset the decoder. The following analysis defines the ADuM1447 to affect the operation of the component. conditions under which this can occur. The 3.3 V operating condition of the ADuM1440/ADuM1441/ADuM1442/ ADuM1445/ADuM1446/ADuM1447 is examined because it represents the most typical mode of operation. Rev. E | Page 21 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet 1000 The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ ADuM1446/ADuM1447 devices are intended to operate at an A) T(k 100 ultralow current. This is achieved by operating the part at a low N E average data rate, either by bursting data at high speed at a low R R U duty factor or by running low bit rates. If data is burst at high C 10 LE data rates, the part sits quiescent for the majority of the time, at B WA low data rates, the power consumption approaches the LO 1 quiescent power consumption. Table 25 shows the typical L A M current for an input and output channel pair as well as the total U XIM 0.1 power dissipated for that channel. The total power is summed MA DISTANCE = 5mm across both sides of the device, so the power is being drawn DISTANCE = 100mm DISTANCE = 1m from two different supplies. However, it shows how the power 0.011k 1M0kAGNETIC1 F00IEkLD FREQ1UMENCY (Hz1)0M 100M 11845-021 depends on the VDD values and the state of the refresh. Figure 33. Maximum Allowable Current for Various Current-to-ADuM1440/ Table 25. Typical Total Power Dissipation Per Channel ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Spacings Typical Input Typical Output Note that at combinations of strong magnetic field and high State of Channel Channel frequency, any loops formed by PCB traces can induce error Refresh V I V I Power/Ch DDI DDI(Q) DDO DDO(Q) voltages sufficiently large enough to trigger the thresholds of Enabled 2.5 V 2.6 µA 2.5 V 0.5 µA 7.8 µW succeeding circuitry. Take care in the layout of such traces to 3.3 V 4.8 µA 3.3 V 0.8 µA 18.5 µW avoid this possibility. Disabled 2.5 V 0.05 µA 2.5 V 0.05 µA 0.3 µW POWER CONSUMPTION 3.3 V 0.12 µA 3.3 V 0.13 µA 0.8 µW The supply current at a given channel of the ADuM1440/ ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 INSULATION LIFETIME isolator is a function of the supply voltage, the data rate of the All insulation structures eventually break down when subjected channel, and the output load of the channel. to voltage stress over a sufficiently long period. The rate of For each input channel, the supply current is given by insulation degradation is dependent on the characteristics of the IDDI = IDDI (Q) f ≤ 0.5 fr voltage waveform applied across the insulation. In addition to the testing performed by the regulatory agencies, Analog Devices I = I × (2f − f) + I f > 0.5 f DDI DDI (D) r DDI (Q) r carries out an extensive set of evaluations to determine the For each output channel, the supply current is given by lifetime of the insulation structure within the ADuM1440/ IDDO = IDDO (Q) f ≤ 0.5 fr ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447. IDDO = (IDDO (D) + (0.5 × 10−3) × CL × VDDO) × (2f − fr) + IDDO (Q) Analog Devices performs accelerated life testing using voltage levels f > 0.5 fr higher than the rated continuous working voltage. Acceleration where: factors for several operating conditions are determined. These I , I are the input and output dynamic supply currents factors allow calculation of the time to failure at the actual DDI (D) DDO (D) per channel (mA/Mbps). working voltage. The values shown in Table 20 summarize the peak voltage for 50 years of service life for a bipolar ac operating I , I are the specified input and output quiescent DDI (Q) DDO (Q) condition and the maximum CSA approved working voltages. supply currents (mA). In many cases, the approved working voltage is higher than the f is the input logic signal frequency (MHz); it is half the input 50-year service life voltage. Operation at these high working data rate, expressed in units of Mbps. voltages can lead to shortened insulation life, in some cases. f is the input stage refresh rate (Mbps). r CL is the output load capacitance (pF). The insulation lifetime of the ADuM1440/ADuM1441/ VDDO is the output supply voltage (V). ADuM1442/ADuM1445/ADuM1446/ADuM1447 depends on the voltage waveform type imposed across the isolation barrier. To calculate the total V and V supply current, the supply DD1 DD2 The iCoupler insulation structure degrades at different rates currents for each input and output channel corresponding to depending on whether the waveform is bipolar ac, unipolar ac, V and V are calculated and totaled. Figure 11 through DD1 DD2 or dc. Figure 34, Figure 35, and Figure 36 illustrate these Figure 18 show per channel supply currents as a function of different isolation voltage waveforms. data rate for an unloaded output condition. Bipolar ac voltage is the most stringent environment. The goal of a 50-year operating lifetime under the ac bipolar condition determines the Analog Devices recommended maximum working voltage. Rev. E | Page 22 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 In the case of unipolar ac or dc voltage, the stress on the insulation RATED PEAK VOLTAGE is significantly lower. This allows operation at higher working vvoollttaaggeess wlishteilde isnti lTl aabclhei e2v0i ncagn a b5e0 a-ypepalrie sde rwvhiciele l imfea. iTnhtaei nwinorgk tihneg 0V 11845-022 Figure 34. Bipolar AC Waveform 50-year minimum lifetime provided the voltage conforms to either the unipolar ac or dc voltage case. Treat any cross-insulation RATED PEAK VOLTAGE vaos lata bgiep wolaavre afocr wma tvheafto drmoe,s a nnodt lciomnifto irtms p teoa Fki gvuorltea g3e5 toor tFhieg u5r0e- y3e6a r 0V 11845-023 lifetime voltage value listed in Table 20. Figure 35. Unipolar AC Waveform Note that the voltage presented in Figure 35 is shown as sinusoidal RATED PEAK VOLTAGE for illustration purposes only. It is meant to represent any voltage wlimavietifnogr mva vluaer ycianng bbee tpwoeseitniv 0e Vor a nnedg astoimvee, bliumt itthine gv ovaltlaugee. Tcahnen ot 0V 11845-024 Figure 36. DC Waveform cross 0 V. Rev. E | Page 23 of 25
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 Data Sheet OUTLINE DIMENSIONS 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 16 9 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 0.244 (6.20) 1 8 0.236 (5.99) 0.228 (5.79) 0.010 (0.25) 0.020 (0.51) 0.065 (1.65) 0.069 (1.75) 0.006 (0.15) 0.010 (0.25) 0.049 (1.25) 0.053 (1.35) 0.010 (0.25) CO0P.0L0A4 N(0A.1R0I)TY 0.02B5S (C0.64) 0.012 (0.30) SPLEAATNIENG 80°° 0.050 (1.27) 0R.E0F41 (1.04) 0.004 (0.10) 0.016 (0.41) 0.008 (0.20) COMPLIANTTO JEDEC STANDARDS MO-137-AB C(RINEOFNPEATRRREOENNLCLTEIHN EOGSN EDLSIYM)AEANNRDSEI AORRNOESU NANORDEET DAIN-PO IPFNRFCO HINPECRSHI;A METEQIL UFLIOIVMRAE LUTEESNRET DISNI M FDOEERNSSIGIONN.S 09-12-2014-A Figure 37. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches and (millimeters) 7.50 7.20 6.90 20 11 5.60 5.30 5.00 8.20 7.80 1 7.40 10 1.85 0.25 2.00 MAX 1.75 0.09 1.65 COPLA0N.0A5R MITIYN 0.65 BSC 00..3282 SPLEAATNIENG 840°°° 000...975555 0.10 COMPLIANTTO JEDEC STANDARDS MO-150-AE 060106-A Figure 38. 20-Lead Shrink Small Outline Package [SSOP] (RS-20) Dimensions shown in millimeters Rev. E | Page 24 of 25
Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 ORDERING GUIDE Number Number Maximum Default Maximum of Inputs, of Inputs, Data Rate Output Propagation Temperature Package Package Model1, 2 V Side V Side (Mbps) State Delay, 3.3 V (ns) Range Description Option DD1 DD2 ADuM1440ARQZ 4 0 2 High 180 −40°C to +125°C 16-Lead QSOP RQ-16 ADuM1441ARQZ 3 1 2 High 180 −40°C to +125°C 16-Lead QSOP RQ-16 ADuM1442ARQZ 2 2 2 High 180 −40°C to +125°C 16-Lead QSOP RQ-16 ADuM1445ARQZ 4 0 2 Low 180 −40°C to +125°C 16-Lead QSOP RQ-16 ADuM1446ARQZ 3 1 2 Low 180 −40°C to +125°C 16-Lead QSOP RQ-16 ADuM1447ARQZ 2 2 2 Low 180 −40°C to +125°C 16-Lead QSOP RQ-16 ADuM1440ARSZ 4 0 2 High 180 −40°C to +125°C 20-Lead SSOP RS-20 ADuM1441ARSZ 3 1 2 High 180 −40°C to +125°C 20-Lead SSOP RS-20 ADuM1442ARSZ 2 2 2 High 180 −40°C to +125°C 20-Lead SSOP RS-20 ADuM1445ARSZ 4 0 2 Low 180 −40°C to +125°C 20-Lead SSOP RS-20 ADuM1446ARSZ 3 1 2 Low 180 −40°C to +125°C 20-Lead SSOP RS-20 ADuM1447ARSZ 2 2 2 Low 180 −40°C to +125°C 20-Lead SSOP RS-20 EVAL-ADUM1441EBZ Evaluation Board 1 Z = RoHS Compliant Part. 2 Tape and reel is available. The addition of the –RL7 suffix indicates that the product is shipped on 7” tape and reel. ©2013–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11845-0-1/17(E) Rev. E | Page 25 of 25
Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADUM1440ARQZ ADUM1442ARQZ ADUM1441ARQZ ADUM1446ARQZ ADUM1447ARQZ ADUM1445ARQZ EVAL-ADUM1441EBZ ADUM1445ARSZ ADUM1441ARQZ-RL7 ADUM1441ARSZ ADUM1445ARQZ-RL7 ADUM1446ARSZ ADUM1442ARSZ-RL7 ADUM1440ARSZ-RL7 ADUM1447ARSZ-RL7 ADUM1442ARSZ ADUM1447ARSZ ADUM1441ARSZ-RL7 ADUM1447ARQZ-RL7 ADUM1440ARSZ ADUM1446ARSZ-RL7 ADUM1446ARQZ-RL7 ADUM1440ARQZ-RL7 ADUM1442ARQZ-RL7 ADUM1445ARSZ-RL7