±1°C Accurate, 12-Bit Digital Temperature Sensor Data Sheet ADT75 FEATURES PRODUCT HIGHLIGHTS 12-bit temperature-to-digital converter 1. On-chip temperature sensor allows an accurate measurement B grade accuracy ±1.0°C from 0°C to 70°C of the ambient temperature. The measurable temperature A grade accuracy ±2.0°C from −25°C to +100°C range is −55°C to +125°C. SMBus/I2C-compatible interface 2. Supply voltage is 2.7 V to 5.5 V. Operation from −55°C to +125°C 3. Space-saving, 8-lead MSOP and 8-lead SOIC. Operation from 2.7 V to 5.5 V 4. Temperature accuracy is ±1°C maximum. Overtemperature indicator 5. Temperature resolution is 0.0625°C. Shutdown mode for low power consumption 6. Shutdown mode reduces the current consumption to Power consumption 79 µW typically at 3.3 V 3 µA typical. Small, low cost 8-lead MSOP in Pb-Sn and Pb-free packages 7. Connect up to eight ADT75s to a single SMBus/I2C bus. Standard 8-lead SOIC Pb-free package APPLICATIONS Isolated sensors Environmental control systems Computer thermal monitoring Thermal protection Industrial process control Power-system monitors Hand-held applications FUNCTIONAL BLOCK DIAGRAM VDD 8 DIGITAL 12-BIT COMPARATOR 3 OS/ALERT DECIMATOR LPF TEMPERATURE SENSOR 1-BIT TEMPERATURE SENSOR + REGISTER – CONFIGURATION REFERENCE Σ-Δ REGISTER 1-BIT DAC THYST SETPOINT REGISTER CLKAND TIMING GENERATION POINTER TORSE SGEITSPTOERINT REGISTER A0 7 1 SDA A1 6 SMBus/I2C INTERFACE 2 SCL A2 5 GN4D 05326-001 Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 © 2005–2012 Analog Devices, Inc. All rights reserved.

ADT75 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Functional Description .............................................................. 10 Applications ....................................................................................... 1 Temperature Data Format ......................................................... 11 Product Highlights ........................................................................... 1 One-Shot Mode .......................................................................... 12 Functional Block Diagram .............................................................. 1 Fault Queue ................................................................................. 12 Revision History ............................................................................... 2 Registers ....................................................................................... 13 General Description ......................................................................... 3 Serial Interface ............................................................................ 16 Specifications ..................................................................................... 4 Writing Data ............................................................................... 17 A Grade .......................................................................................... 4 Reading Data ............................................................................... 18 B Grade .......................................................................................... 5 OS/Alert Output OverTemperature Modes ............................ 19 Timing Specifications and Diagram .......................................... 6 SMBus Alert ................................................................................ 20 Absolute Maximum Ratings ............................................................ 7 Applications Information .............................................................. 21 ESD Caution .................................................................................. 7 Thermal Response Time ........................................................... 21 Pin Configuration and Function Descriptions ............................. 8 Self-Heating Effects .................................................................... 21 Typical Performance Characteristics ............................................. 9 Supply Decoupling ..................................................................... 21 Theory of Operation ...................................................................... 10 Temperature Monitoring ........................................................... 22 Circuit Information .................................................................... 10 Outline Dimensions ....................................................................... 23 Converter Details........................................................................ 10 Ordering Guide .......................................................................... 24 REVISION HISTORY 8/12—Rev. A to Rev. B 9/10—Rev. 0 to Rev. A Changed 3 V to 2.7 V, Features Section and 3 V to 2.7 V, Changes to Figure 1 ........................................................................... 1 Product Highlights Section ............................................................. 1 Updated Outline Dimensions ....................................................... 23 Changed 3 V to 2.7 V, General Description Section .................... 3 Changes to Ordering Guide .......................................................... 23 Changed 3 V to 2.7 V, A Grade Section and 3 V to 2.7 V, Table 1 .... 4 10/05—Revision 0: Initial Version Changed 3 V to 2.7 V, B Grade Section and 3 V to 2.7 V, Table 2 .... 5 Changed 3 V to 2.7 V, Table 5 .................................................................... 8 Changes to Figure 7 and Figure 8 ................................................... 9 Rev. B | Page 2 of 24

Data Sheet ADT75 GENERAL DESCRIPTION The ADT75 is a complete temperature monitoring system in The ADT75 offers a shutdown mode that powers down the 8-lead MSOP and SOIC packages. It contains a band gap device, and this mode gives a shutdown current of typically 3 µA. temperature sensor and a 12-bit analog-to-digital converter The ADT75 is rated for operation over the −55°C to +125°C (ADC) to monitor and digitize the temperature to a resolution temperature range. of 0.0625°C. The ADT75 is pin and register compatible with the The A0, A1, and A2 pins are available for address selection. The LM75 and AD7416. OS/ALERT pin is an open-drain output that becomes active when The ADT75 is guaranteed to operate at supply voltages from temperature exceeds a programmable limit. The OS/ALERT pin 2.7 V to 5.5 V. Operating at 3.3 V, the average supply current is can operate in either comparator or interrupt mode. typically 200 µA. Rev. B | Page 3 of 24

ADT75 Data Sheet SPECIFICATIONS A GRADE T = T to T , V = 2.7 V to 5.5 V. All specifications for −55°C to +125°C, unless otherwise noted. A MIN MAX DD Table 1. Parameter Min Typ Max Unit Test Conditions/Comments TEMPERATURE SENSOR AND ADC Accuracy at V = 2.7 V to 5.5 V ±2 °C T = −25°C to +100°C DD A ±3 °C T = −55°C to +100°C A Accuracy at V = 2.7 V to 3.6 V ±3 °C T = 100°C to 125°C DD A Accuracy at V = 4.5 V to 5.5 V ±2 °C T = 100°C to 125°C DD A ADC Resolution 12 Bits Temperature Resolution 0.0625 °C Temperature Conversion Time 60 ms Update Rate 100 ms Conversion started every 100 ms Long Term Drift 0.08 °C Drift over 10 years, if part is operated at 55°C Temperature Hysteresis 0.03 °C Temperature cycle = 25°C to 125°C to 25°C OS/ALERT OUTPUT (OPEN DRAIN) Output Low Voltage, V 0.4 V I = 3 mA OL OL Pin Capacitance 10 pF High Output Leakage Current, I 0.1 5 µA OS/ALERT pin pulled up to 5.5 V OH R Resistance (Low Output) 15 Ω Supply and temperature dependent ON DIGITAL INPUTS Input Current ±1 µA V = 0 V to V IN DD Input Low Voltage, V 0.3 × V V IL DD Input High Voltage, V 0.7 × V V IH DD SCL, SDA Glitch Rejection 50 ns Input filtering suppresses noise spikes of less than 50 ns Pin Capacitance 3 10 pF DIGITAL OUTPUT (OPEN DRAIN) Output High Current, I 1 mA V = 5 V OH OH Output Low Voltage, V 0.4 V I = 3 mA OL OL Output High Voltage, V 0.7 × V V OH DD Output Capacitance, C 3 10 pF OUT POWER REQUIREMENTS Supply Voltage 2.7 5.5 V Supply Current at 3.3 V 350 500 µA Peak current while converting and I2C interface inactive Supply Current at 5.0 V 380 525 µA Peak current while converting and I2C interface inactive Average Current at 3.3 V 200 µA Part converting and I2C interface inactive Average Current at 5.0 V 225 µA Part converting and I2C interface inactive Shutdown Mode at 3.3 V 3 8 µA Supply current in shutdown mode Shutdown Mode at 5.0 V 5.5 12 µA Supply current in shutdown mode Average Power Dissipation 798.6 µW V = 3.3 V, normal mode at 25°C DD 1 SPS 78.6 µW Average power dissipated for V = 3.3 V, DD shutdown mode at 25°C 140 µW Average power dissipated for V = 5.0 V, DD shutdown mode at 25°C Rev. B | Page 4 of 24

Data Sheet ADT75 B GRADE T = T to T , V = 2.7 V to 5.5 V. All specifications for −55°C to +125°C, unless otherwise noted. A MIN MAX DD Table 2. Parameter Min Typ Max Unit Test Conditions/Comments TEMPERATURE SENSOR AND ADC Accuracy at V = 2.7 V to 5.5 V ±1 °C T = 0°C to +70°C DD A ±2 °C T = −25°C to +100°C A ±3 °C T = −55°C to +100°C A Accuracy at V = 2.7 V to 3.6 V ±3 °C T = 100°C to 125°C DD A Accuracy at V = 4.5 V to 5.5 V ±2 °C T = 100°C to 125°C DD A ADC Resolution 12 bits Temperature Resolution 0.0625 °C Temperature Conversion Time 60 ms Update Rate 100 ms Conversion started every 100 ms Long Term Drift 0.08 °C Drift over 10 years, if part is operated at 55°C Temperature Hysteresis 0.03 °C Temperature cycle = 25°C to 125°C to 25°C OS/ALERT OUTPUT (OPEN DRAIN) Output Low Voltage, V 0.4 V I = 3 mA OL OL Pin Capacitance 10 pF High Output Leakage Current, I 0.1 5 µA OS/ALERT pin pulled up to 5.5 V OH R Resistance (Low Output) 15 Ω Supply and temperature dependent ON DIGITAL INPUTS Input Current ±1 µA V = 0 V to V IN DD Input Low Voltage, V 0.3 × V V IL DD Input High Voltage, V 0.7 × V V IH DD SCL, SDA Glitch Rejection 50 ns Input filtering suppresses noise spikes of less than 50 ns Pin Capacitance 3 10 pF DIGITAL OUTPUT (OPEN DRAIN) Output High Current, I 1 mA V = 5 V OH OH Output Low Voltage, V 0.4 V I = 3 mA OL OL Output High Voltage, V 0.7 × V V OH DD Output Capacitance, C 3 10 pF OUT POWER REQUIREMENTS Supply Voltage 2.7 5.5 V Supply Current at 3.3 V 350 500 µA Peak current while converting and I2C interface inactive Supply Current at 5.0 V 380 525 µA Peak current while converting and I2C interface inactive Average Current at 3.3 V 200 µA Part converting and I2C interface inactive Average Current at 5.0 V 225 µA Part converting and I2C interface inactive Shutdown Mode at 3.3 V 3 8 µA Supply current in shutdown mode Shutdown Mode at 5.0 V 5.5 12 µA Supply current in shutdown mode Average Power Dissipation 798.6 µW V = 3.3 V, normal mode at 25°C DD 1 SPS 78.6 µW Average power dissipated for V = 3.3 V, DD shutdown mode at 25°C 140 µW Average power dissipated for V = 5.0 V, DD shutdown mode at 25°C Rev. B | Page 5 of 24

ADT75 Data Sheet TIMING SPECIFICATIONS AND DIAGRAM Measure the SDA and SCL timing with the input filters turned on to meet the fast mode I2C specification. Switching off the input filters improves the transfer rate but has a negative effect on the EMC behavior of the part. T = T to T , V = 2.7 V to 5.5 V, unless otherwise noted. A MIN MAX DD Table 3. Parameter1 Min Typ Max Unit Test Conditions/Comments Serial Clock Period, t 2.5 µs Fast mode I2C. See Figure 2 1 Data In Setup Time to SCL High, t 50 ns See Figure 2 2 Data Out Stable After SCL Low, t 0 0.92 ns Fast mode I2C. See Figure 2 3 Data Out Stable After SCL Low, t 0 3.452 µs Standard mode I2C. See Figure 2 3 SDA Low Setup Time to SCL Low (Start Condition), t 50 ns See Figure 2 4 SDA High Hold Time After SCL High (Stop Condition), t 50 ns See Figure 2 5 SDA and SCL Rise Time, t 300 ns Fast mode I2C. See Figure 2 6 SDA and SCL Rise Time, t 1000 ns Standard mode I2C. See Figure 2 6 SDA and SCL Fall Time, t 300 ns See Figure 2 7 Capacitive Load for each Bus Line, C 400 pF B 1 Guaranteed by design and characterization; not production tested. 2 This time has to be met only if the master does not stretch the low period of the SCL signal. t1 SCL t4 t2 t5 SDA DATA IN t3 DATA SODUAT t7 t6 05326-002 Figure 2. SMBus/I2C Timing Diagram Rev. B | Page 6 of 24

Data Sheet ADT75 ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings Table 4. may cause permanent damage to the device. This is a stress Parameter Rating rating only; functional operation of the device at these or any V to GND –0.3 V to +7 V DD other conditions above those indicated in the operational SDA Input Voltage to GND –0.3 V to V + 0.3 V DD section of this specification is not implied. Exposure to absolute SDA Output Voltage to GND –0.3 V to V + 0.3 V DD maximum rating conditions for extended periods may affect SCL Input Voltage to GND –0.3 V to V + 0.3 V DD device reliability. OS/ALERT Output Voltage to GND –0.3 V to V + 0.3 V DD Operating Temperature Range –55°C to +150°C 1.2 Storage Temperature Range –65°C to +160°C s) Maximum Junction Temperature, TJMAX 150.7°C Watt 1.0 8-Lead MSOP (RM-8) N ( O Power Dissipation1, 2 WMAX = (TJMAX − TA)/θJA ATI 0.8 Thermal Impedance3 SIP S θJA, Junction-to-Ambient (Still Air) 205.9°C/W R DI 0.6 θ , Junction-to-Case 43.74°C/W E JC W O 8-Lead SOIC (R-8) P 0.4 M Power Dissipation1, 2 W = (T − T )/θ U MAX JMAX A JA M Thermal Impedance3 AXI 0.2 θθJA,, JJuunnccttiioonn--ttoo--CAamseb ient (Still Air) 15567°C°C/W/W M 0 MAXPD=3.4mWAT150°C 05326-003 JC 5000000000000000000000 554321 123456789012345 IR Reflow Soldering –––––– TEMPERATURE (°C) 111111 Peak Temperature 220°C (0°C/5°C) Figure 3. MSOP Maximum Power Dissipation vs. Ambient Temperature Time at Peak Temperature 10 sec to 20 sec Ramp-Up Rate 3°C/sec maximum ESD CAUTION Ramp-Down Rate –6°C/sec maximum Time 25°C to Peak Temperature 6 minutes maximum IR Reflow Soldering (Pb-Free Package) Peak Temperature 260°C (+0°C) Time at Peak Temperature 20 sec to 40 sec Ramp-Up Rate 3°C/sec maximum Ramp-Down Rate –6°C/sec maximum Time 25°C to Peak Temperature 8 minutes maximum 1 Values relate to package being used on a standard 2-layer PCB. This gives a worst case θ and θ . Refer to Figure 3 for a plot of maximum power JA JC dissipation vs. ambient temperature (T). A 2 T = ambient temperature. A 3 Junction-to-case resistance is applicable to components featuring a preferential flow direction, for example, components mounted on a heat sink. Junction-to-ambient resistance is more useful for air-cooled, PCB- mounted components. Rev. B | Page 7 of 24

ADT75 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SDA 1 8 VDD ADT75 SCL 2 7 A0 TOP VIEW OS/ALGENRDT 34 (Not to Scale) 65 AA12 05326-004 Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 SDA SMBus/I2C Serial Data Input/Output. Serial data that is loaded into and read from the ADT75 registers is provided on this pin. Open-drain configuration; needs a pull-up resistor. 2 SCL Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock in and clock out data to and from any register of the ADT75. Open-drain configuration; needs a pull-up resistor. 3 OS/ALERT Over- and Undertemperature Indicator. Default power as an OS pin. Open-drain configuration; needs a pull-up resistor. 4 GND Analog and Digital Ground. 5 A2 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to GND or V . DD 6 A1 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to GND or V . DD 7 A0 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to GND or V . DD 8 V Positive Supply Voltage, 2.7 V to 5.5 V. Decouple the supply to ground. DD Rev. B | Page 8 of 24

Data Sheet ADT75 TYPICAL PERFORMANCE CHARACTERISTICS 1.0 7 TA = 30°C 0.8 6 0.6 C) A) °OR ( 0.4 VDD = 3.3V NT (µ 5 ERR 0.2 RRE 4 RE 0 CU U N T W 3 ERA –0.2 VDD = 5V DO TEMP –0.4 SHUT 2 –0.6 1 ––01..80–55 –35 –15 5TEMP2E5RATU4R5E (°C6)5 85 105 12505326-023 02.6 3.1 3S.6UPPLY V4O.1LTAGE (4V.6) 5.1 5.6 05326-026 Figure 5. Temperature Accuracy at 3.3 V and 5 V Figure 8. Shutdown Current vs. Supply Voltage at 30°C 500 0.05 CONVERTING @ 5.5V TA = 25°C 450 0.04 A 0.1µF CAPACITOR IS CONNECTED AT THE VDD PIN. CONVERTING @ 3.3V 400 0.03 µA) 350 °R (C) 0.02 VDD = 5V± 10% SUPPLY CURRENT ( 322105050000 AVERAGE @A V5E.5RVAGE @ 3.3V TEMPERATURE ERRO ––000...0001012 100 –0.03 500 05326-024 ––00..0045 VDD = 3.3V± 10% 05326-027 –55 –35 –15 5 25 45 65 85 105 125 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 TEMPERATURE (°C) SUPPLY RIPPLE FREQUENCY (MHz) Figure 6. Operating Supply Current vs. Temperature Figure 9. Temperature Accuracy vs. Supply Ripple Frequency 240 0.025 TA = 30°C 235 0.020 A) RENT (µ 222350 °OR (C) 00..001150 R R MSOP PACKAGE U R 0.005 C 220 E Y E L R 0 E SUPP 221105 ERATU –0.005 AG MP –0.010 SOIC PACKAGE R E E 205 T V –0.015 A 1290502.6 3.1 3S.6UPPLY V4O.1LTAGE (4V.6) 5.1 5.6 05326-025 ––00..0022050 2 REC4OVERY 6TIME AT 825°C (Ho1u0rs) 12 1405326-028 Figure 7. Average Operating Supply Current vs. Supply Voltage at 30°C Figure 10. Response to Thermal Shock Rev. B | Page 9 of 24

ADT75 Data Sheet THEORY OF OPERATION CIRCUIT INFORMATION FUNCTIONAL DESCRIPTION The ADT75 is a 12-bit digital temperature sensor with the 12th The conversion clock for the part is generated internally. No bit acting as the sign bit. An on-board temperature sensor generates external clock is required except when reading from and writing to a voltage precisely proportional to absolute temperature that is the serial port. In normal mode, the internal clock oscillator runs compared to an internal voltage reference and input to a precision an automatic conversion sequence. During this automatic digital modulator. Overall accuracy for the ADT75 A Grade is conversion sequence, a conversion is initiated every 100 ms. ±2°C from −25°C to +100°C and accuracy for the ADT75 B At this time, the part powers up its analog circuitry and performs Grade is ±1°C from 0°C to +70°C. Both grades have excellent a temperature conversion. transducer linearity. The serial interface is SMBus /I2C- compatible This temperature conversion typically takes 60 ms, after which time and the open-drain output of the ADT75 is capable of sinking 3 mA. the analog circuitry of the part automatically shuts down. The analog The on-board temperature sensor has excellent accuracy and circuitry powers up again 40 ms later, when the 100 ms timer times linearity over the entire rated temperature range without needing out and the next conversion begins. The result of the most recent correction or calibration by the user. temperature conversion is always available in the temperature value register because the SMBus/I2C circuitry never shuts down. The sensor output is digitized by a first-order Σ-Δ modulator, also known as the charge balance type ADC. This type of converter The ADT75 can be placed in shutdown mode via the configuration uses time-domain oversampling and a high accuracy comparator to register, in which case the on-chip oscillator is shut down and deliver 12 bits of effective accuracy in an extremely compact circuit. no further conversions are initiated until the ADT75 is taken out of shutdown mode. The ADT75 can be taken out of shutdown mode CONVERTER DETAILS by writing 0 to Bit D0 in the configuration register. The ADT75 The ∑-∆ modulator consists of an input sampler, a summing typically takes 1.7 ms to come out of shutdown mode. The network, an integrator, a comparator, and a 1-bit DAC. Similar conversion result from the last conversion prior to shutdown can to the voltage-to-frequency converter, this architecture creates a still be read from the ADT75 even when it is in shutdown mode. negative feedback loop and minimizes the integrator output by In normal conversion mode, the internal clock oscillator is reset changing the duty cycle of the comparator output in response to after every read or write operation. This causes the device to start a input voltage changes. The comparator samples the output of the temperature conversion, the result of which is typically available integrator at a much higher rate than the input sampling frequency; 60 ms later. Similarly, when the part is taken out of shutdown this is called oversampling. Oversampling spreads the quantization mode, the internal clock oscillator is started and a conversion is noise over a much wider band than that of the input signal, initiated. improving overall noise performance and increasing accuracy. The conversion result is typically available 60 ms later. Reading Σ-∆MODULATOR from the device before a conversion is complete causes the INTEGRATOR COMPARATOR ADT75 to stop converting; the part starts again when serial VOLTAGE REF + AND VPTAT communication is finished. This read operation provides the – previous conversion result. 1-BIT DAC The measured temperature value is compared with a high temperature limit, stored in the 16-bit T read/write register and OS GECNLEORCAKTOR LPFF IDLTIGEIRTAL1-B1IT2-BITTERMEPVGEAIRLSUATETEURRE 05326-011 twOhrSei/t Ahe yrLseEtgeRirsTetes pri.si I ntf e itmsh aepc metirveaaattsueurdre.e Tldim hviasitl uO, seSt eo/AxrceLedEe diRnsT tt hhpeeins 1e i 6sli -mpbriiott sgT rtHahYmeSnTm rtehaabed le/ Figure 11. First-Order Σ-Δ Modulator for mode and polarity via the configuration register. The modulated output of the comparator is encoded using a circuit technique that results in SMBus/I2C temperature data. Rev. B | Page 10 of 24

Data Sheet ADT75 Configuration register functions consist of Table 6. 12-Bit Temperature Data Format Digital Output (Binary) • Switching between normal operation and full power-down. Temperature DB15 to DB4 Digital Output (Hex) • Switching between comparator and interrupt event modes. −55°C 1100 1001 0000 0xC90 • Setting the OS/ALERT pin active polarity. −50°C 1100 1110 0000 0xCE0 • Setting the number of faults that activate the OS/ALERT pin. −25°C 1110 0111 0000 0xE70 • Enabling the one-shot mode. −0.0625°C 1111 1111 1111 0xFFF • Enabling the SMBus alert function mode on the 0°C 0000 0000 0000 0x000 OS/ALERT pin. +0.0625°C 0000 0000 0001 0x001 +10°C 0000 1010 0000 0x0A0 TEMPERATURE DATA FORMAT +25°C 0001 1001 0000 0x190 One LSB of the ADC corresponds to 0.0625°C. The ADC can +50°C 0011 0010 0000 0x320 +75°C 0100 1011 0000 0x4B0 theoretically measure a temperature range of 255°C (−128°C to +127°C ), but the ADT75 is guaranteed to measure a low value +100°C 0110 0100 0000 0x640 temperature limit of −55°C to a high value temperature limit of +125°C 0111 1101 0000 0x7D0 +125°C. The temperature measurement result is stored in the Temperature Conversion Formulas 16-bit temperature value register and is compared with the high 12-Bit Temperature Data Format temperature limit stored in the T setpoint register and the OS hysteresis limit in the THYST setpoint register. • Positive Temperature = ADC Code(d)/16 Temperature data in the temperature value register, the T • Negative Temperature = (ADC Code(d)1− 4096)/16, or OS setpoint register and the T setpoint register, is represented Negative Temperature = (ADC Code(d)2 – 2048)/16 HYST by a 12-bit twos complement word. The MSB is the temperature 9-Bit Temperature Data Format sign bit. The four LSBs, Bit DB0 to Bit DB3, are not part of the temperature conversion result and are always 0s. Table 6 shows • Positive Temperature = ADC Code(d)/2 the temperature data format without Bit DB0 to Bit DB3. • Negative Temperature = (ADC Code(d)3 – 512)/2, or Negative Temperature = (ADC Code(d)4 – 256)/2 Reading back the temperature from the temperature value register requires a 2-byte read unless only a 1°C (8-bit) resolution 8-Bit Temperature Data Format is required, then a 1-byte read is required. Designers that use a 9-bit temperature data format can still use the ADT75 by ignoring • Positive Temperature = ADC Code(d) the last three LSBs of the 12-bit temperature value. These three • Negative Temperature = ADC Code(d)5 – 256, or Negative LSBs are Bit D4 to Bit D6 in Table 6. Temperature = ADC Code(d)6 – 128 Bit DB7 (sign bit) is removed from the ADC code. 1 For ADC code, use all 12 bits of the data byte, including the sign bit. 2 For ADC code, Bit DB11 (sign bit) is removed from the ADC code. 3 For ADC code, use all 9 bits of the data byte, including the sign bit. 4 Bit DB8 (sign bit) is removed from the ADC code. 5 For the ADC code, use all 8 bits of the data byte, including the sign bit. 6 Bit DB7 (sign bit) is removed from the ADC code. Rev. B | Page 11 of 24

ADT75 Data Sheet ONE-SHOT MODE TEMPERATURE 82°C Setting Bit D5 of the configuration register enables the one-shot 81°C mode. When this mode is enabled, the ADT75 goes immediately 80°C TOS into shutdown mode and the current consumption is reduced to 79°C typically 3 µA when V is 3.3 V and 5.5 µA when V is 5 V. A 78°C DD DD one-shot temperature measurement is initiated when Address 0x04 77°C is written to the address pointer register, which is writing to the 76°C one-shot register. The ADT75 powers up, does a temperature 75°C THYST conversion, and powers down again. 74°C 73°C Wait for a minimum of 60 ms after writing to the one-shot register before reading back the temperature. This time ensures the ADT75 OS/ALERT PIN (COMPARATOR MODE) has time to power up and do a conversion. Reading back from the POLARITY = ACTIVE LOW one-shot register, Address 0x04, gives the resultant temperature OS/ALERT PIN conversion. Reading from the temperature value register also (INTERRUPT MODE) POLARITY = ACTIVE LOW gives the same temperature value. OS/ALERT PIN When either of the overtemperature detection modes is selected, a (COMPARATOR MODE) POLARITY = ACTIVE HIGH write to the one-shot register, Address 0x04, causes the OS/ALERT OS/ALERT PIN pin to go active if the temperature exceeds the overtemperature (INTERRUPT MODE) POLARITY = ACTIVE HIGH limits. Refer to Figure 12 for more information on one-shot OS/ALERT pin operation. TIME READ1 READ1 READ1 Note: In the interrupt mode, a read from any register resets the WRITE TO WRITE TO WRITE TO OS/ALERT pin after it is activated by a write to the one-shot 0x04 REG.2 0x04 REG.2 0x04 REG.2 register. In the comparator mode, once the temperature drops 1READ FROM ANY REGISTER. below the value in the THYST register, a write to the one-shot 2TOAHCNETERI-VSEEH I.SO T TAH RI6SE0 ImGSI sSD DTUEEERL TA AOYN TBDHE TETH WCEOE ONESNV/E AWRLRSEIIRTOITNN P GTI NITM OGE O.THINEG 05326-022 register resets the OS/ALERT pin. Figure 12. One-Shot OS/ALERT Pin Operation The one-shot mode is useful when one of the circuit design FAULT QUEUE priorities is to reduce power consumption. Bit D3 and Bit D4 of the configuration register are used to set up a fault queue. Up to six faults are provided to prevent false tripping of the OS/ALERT pin when the ADT75 is used in a noisy temperature environment. The number of faults set in the queue must occur consecutively to set the OS/ALERT output. Rev. B | Page 12 of 24

Data Sheet ADT75 REGISTERS Address Pointer Register The ADT75 contains six registers: four are data registers, one is This 8-bit write only register stores an address that points to one the address pointer register, and the final register is the one-shot of the four data registers and selects the one-shot mode. P0 and register. The configuration register is the only data register that P1 select the data register to which subsequent data bytes are is 8 bits wide while the rest are 16 bits wide. The temperature written to or read from. P0, P1, and P2 are used to select the value register is the only data register that is read only. Both a read one-shot mode by writing 04h to this register. A zero should be and write can be performed on the rest of the data registers and written to the rest of the bits. on the one-shot register. On power-up, the address pointer register is loaded with 0x00 and points to the temperature value register. Table 8. Address Pointer Register P7 P6 P5 P4 P3 P2 P1 P0 Table 7. ADT75 Registers Default Settings at 0 0 0 0 0 0 0 0 Pointer Address Name Power-On Default Power-Up 0x00 Temperature value 0x00 0x01 Configuration 0x00 Table 9. Register Addresses 0x02 T setpoint 0x4B00 (75°C) P2 P1 P0 Register Selected HYST 0x03 T setpoint 0x5000 (80°C) 0 0 0 Temperature value OS 0x04 One-shot 0xXX 0 0 1 Configuration 0 1 0 T setpoint HYST 0 1 1 T setpoint OS 1 0 0 One-shot mode Rev. B | Page 13 of 24

ADT75 Data Sheet Temperature Value Register Configuration Register This 16-bit read only register stores the temperature measured This 8-bit read/write register stores various configuration modes by the internal temperature sensor. The temperature is stored in for the ADT75. These modes are shutdown, overtemperature twos complement format with the MSB being the temperature interrupt, one-shot, SMBus alert function enable, OS/ALERT pin polarity, and overtemperature fault queues. See Table 10. sign bit. When reading from this register, the eight MSBs (Bit D15 to Bit D8) are read first and then the eight LSBs (Bit D7 to Bit D0) are read. The control register settings are the default settings on power up. MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 0 0 N/A1 N/A1 N/A1 N/A1 1 N/A = not applicable. Table 10. Bit Configuration Mode Default Setting at Power-Up D7 OS/SMBus alert 0 D6 Reserved 0 D5 One-shot 0 D4 Fault queue 0 D3 Fault queue 0 D2 OS/ALERT pin polarity 0 D1 Cmp/Int 0 D0 Shutdown 0 Rev. B | Page 14 of 24

Data Sheet ADT75 Table 11. Bit Function D0 Shutdown Bit. Setting this bit to 1 puts the ADT75 into shutdown mode. All circuitry except the SMBus/I2C interface is powered Shutdown down. To power up the part again, write 0 to this bit. D1 This bit selects between comparator and interrupt mode. Cmp/Int D1 Over Temperature Interrupt Modes 0 Comparator mode 1 Interrupt mode D2 This bit selects the output polarity of the OS/ALERT pin. OS/ALERT D2 OS/ALERT Pin Polarity 0 Active low 1 Active high D4:D3 These two bits set the number of overtemperature faults that occur before setting the OS/ALERT pin. This helps to avoid false Fault triggering due to temperature noise. Queue D [4:3] Overtemperature Fault Queue 00 1 fault (default) 01 2 faults 10 4 faults 11 6 faults D5 One-shot Mode. Setting this bit puts the part into one-shot mode. In this mode, the part is normally powered down until a One-Shot 0x04 is written to the address pointer register; then a conversion is performed, and the part returns to power down. D5 One-Shot Mode 0 Normal mode; powered up and converting every 100 ms 1 One-shot mode D6 Reserved. Write 0 to this bit. Reserved D7 Interrupt Mode Only. Enable SMBus alert function mode. This bit can enable the ADT75 to support the SMBus alert function OS/SMBus when the interrupt mode is selected (D1 = 1). Alert D7 OS/SMBus Alert Mode Mode 0 Disable SMBus alert function. The OS/ALERT pin behaves as an OS pin when this bit status is selected. 1 Enable SMBus alert function. T Setpoint Register HYST This 16-bit read/write register stores the temperature hysteresis limit for the two interrupt modes. The temperature limit is stored in twos complement format with the MSB being the temperature sign bit. When reading from this register the eight MSBs are read first and then the eight LSBs are read. The default setting has the T limit at 75°C. The control register settings are the default settings on power up. HYST MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 0 1 1 0 0 0 0 N/A1 N/A1 N/A1 N/A1 1 N/A = not applicable. T Setpoint Register OS This 16-bit read/write register stores the overtemperature limit value for the two interrupt modes. The temperature limit is stored in twos complement format with the MSB being the temperature sign bit. When reading from this register, the eight MSBs are read first and then the eight LSBs are read. The default setting has the T limit at 80°C. The control register settings are the default settings on power up. OS MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 1 0 0 0 0 0 0 0 0 N/A1 N/A1 N/A1 N/A1 1 N/A = not applicable. Rev. B | Page 15 of 24

ADT75 Data Sheet SERIAL INTERFACE The serial bus protocol operates as follows: Control of the ADT75 is carried out via the SMBus/I2C-compatible 1. The master initiates data transfer by establishing a start serial interface. The ADT75 is connected to this bus as a slave condition, defined as a high to low transition on the serial and is under the control of a master device. data line SDA, while the serial clock line SCL remains high. Figure 13 shows a typical SMBus/I2C interface connection. This indicates that an address/data stream is going to follow. All slave peripherals connected to the serial bus PULL-UP PULL-UP VDD VDD VDD respond to the start condition and shift in the next eight bits, consisting of a 7-bit address (MSB first) plus a 10kΩ 10kΩ 10kΩ read/write (R/W) bit. The R/W bit determines whether ADT75 0.1µF data is written to, or read from, the slave device. OS/ALERT SCL 2. The peripheral with the address corresponding to the A0 SDA transmitted address responds by pulling the data line low AA21 GND SMBus/I2CADDRESS=1001000 05326-012 dasu trhineg a tchken loowwl epdegreio bdit b. Aeflol roet htheer ndienvtihce csl oocnk t phue lbseu,s k nnooww n Figure 13. Typical SMBus/I2C Interface Connection remain idle while the selected device waits for data to be Serial Bus Address read from or written to it. If the R/W bit is a zero then the master writes to the slave device. If the R/W bit is a one Like all SMBus/I2C-compatible devices, the ADT75 has a 7-bit then the master reads from the slave device. serial address. The four MSBs of this address for the ADT75 are 3. Data is sent over the serial bus in sequences of nine clock set to 1001. Pin A2, Pin A1, and Pin A0 set the three LSBs. These pulses, eight bits of data followed by an acknowledge bit pins can be configured two ways, low and high, to give eight from the receiver of data. Transitions on the data line must different address options. Table 12 shows the different bus address occur during the low period of the clock signal and remain options available. Recommended pull-up resistor value on the stable during the high period, as a low to high transition SDA and SCL lines is 10 kΩ. when the clock is high can be interpreted as a stop signal. 4. When all data bytes have been read or written, stop Table 12. SMBus/I2C Bus Address Options conditions are established. In write mode, the master pulls Binary the data line high during the 10th clock pulse to assert a A6 A5 A4 A3 A2 A1 A0 Hex stop condition. In read mode, the master device pulls the 1 0 0 1 0 0 0 0x48 data line high during the low period before the ninth clock 1 0 0 1 0 0 1 0x49 pulse. This is known as no acknowledge. The master takes 1 0 0 1 0 1 0 0x4A the data line low during the low period before the 10th 1 0 0 1 0 1 1 0x4B clock pulse, then high during the 10th clock pulse to assert 1 0 0 1 1 0 0 0x4C a stop condition. 1 0 0 1 1 0 1 0x4D 1 0 0 1 1 1 0 0x4E Any number of bytes of data can be transferred over the serial 1 0 0 1 1 1 1 0x4F bus in one operation. However, it is not possible to mix read and write in one operation because the type of operation is The ADT75 is designed with a SMBus/I2C timeout. The determined at the beginning and cannot subsequently be SMBus/I2C interface times out after 75 ms to 325 ms of no changed without starting a new operation. activity on the SDA line. After this timeout, the ADT75 resets the SDA line back to its idle state (SDA set to high impedance) The I2C address set up by the three address pins is not latched and wait for the next start condition. by the device until after this address has been sent twice. On the eighth SCL cycle of the second valid communication, the serial bus address is latched in. This is the SCL cycle directly after the device has seen its own I2C serial bus address. Any subsequent changes on this pin has no effect on the I2C serial bus address. Rev. B | Page 16 of 24

Data Sheet ADT75 WRITING DATA Writing Data to a Register Depending on the register being written to, there are two different The configuration register is 8-bits wide so only one byte of data writes for the ADT75. can be written to this register. Writing a single byte of data to the configuration register consists of the serial bus address, the Writing to the Address Pointer Register for a data register address written to the address pointer register, Subsequent Read followed by the data byte written to the selected data register. To read data from a particular register, the address pointer register This is shown in Figure 15. The T register and the T register HYST OS must contain the address of that register. If it does not, the correct are each 16-bits wide, so two data bytes can be written into these address must be written to the address pointer register by registers. Writing two bytes of data to either one of these performing a single-byte write operation, as shown in Figure 14. registers consists of the serial bus address, the data register The write operation consists of the serial bus address followed address written to the address pointer register, followed by the by the address pointer byte. No data is written to any of the data two data bytes written to the selected data register. This is shown registers. A read operation is then performed to read the register. in Figure 16. If more than the required number of data bytes is written to a register then the register ignores these extra data bytes. To write to a different register, another start or repeated start is required. 1 9 1 9 SCL SDA 1 0 0 1 A1 A2 A0 R/W P7 P6 P5 P4 P3 P2 P1 P0 START BY ACK. BY ACK. BY STOP BY MASTER ADT75 ADT75 MASTER SERIALF BRBUAYSMT EEA D1DRESS ADDRESS POIFNRTAEMR ER 2EGISTER BYTE 05326-013 Figure 14. Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation 1 9 1 9 SCL SDA 1 0 0 1 A2 A1 A0 R/W P7 P6 P5 P4 P3 P2 P1 P0 START BY ACK. BY ACK. BY MASTER ADT75 ADT75 FRAME 1 FRAME 2 SERIAL BUS ADDRESS BYTE ADDRESS POINTER REGISTER BYTE 1 9 SCL (CONTINUED) SDA (CONTINUED) D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY STOP BY ADT75 MASTER DFARTAAM BEY T3E 05326-014 Figure 15. Writing to the Address Pointer Register Followed by a Single Byte of Data to the Configuration Register Rev. B | Page 17 of 24

ADT75 Data Sheet 1 9 1 9 SCL SDA 1 0 0 1 A2 A1 A0 R/W P7 P6 P5 P4 P3 P2 P1 P0 START BY ACK. BY ACK. BY MASTER ADT75 ADT75 FRAME 1 FRAME 2 SERIAL BUS ADDRESS BYTE ADDRESS POINTER REGISTER BYTE 1 9 1 9 SCL (CONTINUED) SDA (CONTINUED) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ACK. BY STOP BY ADT75 ADT75 MASTER DFARTAAM BEY T3E DFARTAAM BEY T4E 05326-015 Figure 16. Writing to the Address Pointer Register Followed by Two Bytes of Data to Either T or T Registers HYST OS 1 9 1 9 SCL SDA 1 0 0 1 A1 A2 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 START BY ACK. BY NO ACK. BY STOP BY MASTER ADT75 MASTER MASTER SERIALF BRBUAYSMT EEA D1DRESS DATA BYTE FRRFEORGAMIMS CTEOE 2NRFIGURATION 05326-016 Figure 17. Reading Back Data from the Configuration Register 1 9 1 9 SCL SDA 1 0 0 1 A2 A1 A0 R/W D15 D14 D13 D12 D11 D10 D9 D8 START BY ACK. BY ACK. BY MASTER ADT75 MASTER FRAME 1 FRAME 2 SERIAL BUS ADDRESS BYTE MSB DATA BYTE FROM TEMPERATURE VALUE REGISTER 1 9 SCL (CONTINUED) SDA (CONTINUED) D7 D6 D5 D4 D3 D2 D1 D0 NO ACK. BY STOP BY MASTER MASTER LSB DATA BYTEFR FARMOEM 3 TEMPERATURE 05326-017 VALUE REGISTER Figure 18. Reading Back Data from the Temperature Value Register READING DATA write to the address pointer register to set up the relevant register address. Thus, block reads are not possible, that is, there is no I2C Reading data from the ADT75 is done in a one data byte operation auto-increment. If the address pointer register has previously been for the configuration register and a two data byte operation for set up with the address of the register that is going to receive a the temperature value register, T register, and the T setpoint HYST OS read command then there is no need to repeat a write operation register. Reading back the contents of the configuration register to set up the register address again. is shown in Figure 17. Reading back the contents of the temperature value register is shown in Figure 18. Reading back from any register first requires a single-byte write operation to the address pointer register to set up the register address of the register that is going to be read from. To read from another register, execute another Rev. B | Page 18 of 24

Data Sheet ADT75 OS/ALERT OUTPUT OVERTEMPERATURE MODES Interrupt Mode The ADT75 has two overtemperature modes, comparator mode In the interrupt mode, the OS/ALERT pin goes inactive when and interrupt mode. The OS/ALERT pin defaults on power up any ADT75 register is read. The OS/ALERT pin can only return as an OS pin; the comparator mode is the default power up to active status if the temperature measured is below the limit overtemperature mode. The OS/ALERT output pin becomes stored in the T setpoint register. Once the OS/ALERT pin is HYST active when the temperature measured exceeds the temperature reset, it goes active again only when the temperature has gone limit stored in the T setpoint register. How this pin reacts after above the T limit. The OS/ALERT pin can also be reset by a OS OS this event depends on the overtemperature mode selected. SMBus alert response address (ARA) when this pin has been selected as a SMBus alert pin. More information is given in the Comparator Mode SMBUS Alert section. In the comparator mode, the OS/ALERT pin returns to its Figure 19 illustrates the comparator and interrupt modes with inactive status when the temperature measured drops below the both pin polarity settings. Placing the ADT75 into shutdown limit stored in the T setpoint register. Putting the ADT75 HYST mode resets the OS/ALERT pin in the interrupt mode. into shutdown mode does not reset the OS/ALERT state in comparator mode. TEMPERATURE 82°C 81°C 80°C TOS 79°C 78°C 77°C 76°C 75°C THYST 74°C 73°C OS/ALERT PIN (COMPARATOR MODE) POLARITY = ACTIVE LOW OS/ALERT PIN (INTERRUPT MODE) POLARITY = ACTIVE LOW OS/ALERT PIN (COMPARATOR MODE) POLARITY = ACTIVE HIGH OS/ALERT PIN (INTERRUPT MODE) POLARITY = ACTIVE HIGH READ READ READ TIME 05326-018 Figure 19. OS/ALERT Output Temperature Response Diagram Rev. B | Page 19 of 24

ADT75 Data Sheet SMBus ALERT 1. SMBALERT is pulled low. 2. Master initiates a read operation and sends the SMBus alert The OS/ALERT pin can behave as a SMBus alert pin when the response address (ARA = 0001 100). This reserved SMBus/ SMBus alert function is enabled by setting Bit D7 in the I2C address must not be used as a specific device address. configuration register. The interrupt mode must also be selected 3. The device whose SMBus alert output is low responds to the (Bit D1 in the configuration register). The OS/ALERT pin is an SMBus alert response address and the master reads its device open-drain output and requires a pull-up to V . Several SMBus DD address. As the device address is seven bits long, the ADT75’s alert outputs can be wire-AND’ed together, so that the common LSB is free to be used as an indicator as to which temperature line goes low if one or more of the SMBus alert outputs goes limit was exceeded. The LSB is high if the temperature is low. The polarity of the OS/ALERT pin must be set for active greater than or equal to T , and the LSB is low if the low for a number of outputs to be wire-AND’ed together. OS temperature is less than T . The address of the device HYST The OS/ALERT output can operate as a SMBALERT function. is now known and it can be interrogated in the usual way. 4. If more than one devices’ SMBus alert output is low, the one Slave devices on the SMBus normally cannot signal to the master with the lowest device address has priority, which is in that they want to talk, but the SMBALERT function allows them to accordance with normal SMBus specifications. do so. SMBALERT is used in conjunction with the SMBus general call address. Once the ADT75 has responded to the SMBus alert response One or more SMBus alert outputs can be connected to a common address, it resets its SMBus alert output. If the SMBALERT line SMBALERT line connected to the master. When the SMBALERT remains low, the master sends the ARA again. It continues to do line is pulled low by one of the devices, the following procedure this until all devices whose SMBALERT outputs were low have occurs as shown in Figure 20. responded. MREACSETIEVRES MREACSETIEVRES DEVICE ACK MAASCTKER MNAASCTEKR SMBALERT SMBALERT START ALERATD DRRESEPSOSNSE RD ACK DEVICE ADDRESS ANCOK STOP START ALERATD DRRESEPSOSNSE RD ACK ADDEDVRIECSES ACK PEC ANCOK STOP MAARCSAOT AMENRMD AS RENENDADDS DITESV IACDED SREENSDSS 05326-019 MAARCSAOT AMENRMD AS RENENDADDS DITESV IACDED SREENSDSS DITESV IPCEEC S DEANTDAS 05326-020 Figure 20. ADT75 Responds to SMBALERT ARA Figure 21. ADT75 Responds to SMBALERT ARA with Packet Error Checking (PEC) Rev. B | Page 20 of 24

Data Sheet ADT75 APPLICATIONS INFORMATION THERMAL RESPONSE TIME SUPPLY DECOUPLING The time required for a temperature sensor to settle to a specified Decouple the ADT75 with a 0.1 µF ceramic capacitor between accuracy is a function of the thermal mass of the sensor and the V and GND. This is particularly important when the ADT75 DD thermal conductivity between the sensor and the object being is mounted remotely from the power supply. Precision analog sensed. Thermal mass is often considered equivalent to capacitance. products, such as the ADT75, require a well-filtered power Thermal conductivity is commonly specified using the symbol source. Because the ADT75 operates from a single supply, it Q, and can be thought of as thermal resistance. It is commonly may seem convenient to tap into the digital logic power supply. specified in units of degrees per watt of power transferred across However, the logic supply is often a switch mode design, which the thermal joint. Thus, the time required for the ADT75 to generates noise in the 20 kHz to 1 MHz range. In addition, fast settle to the desired accuracy is dependent on the package logic gates can generate glitches hundreds of mV in amplitude selected, the thermal contact established in that particular due to wiring resistance and inductance. application, and the equivalent power of the heat source. In most If possible, power the ADT75 directly from the system power applications, it is best to determine empirically the settling time. supply. This arrangement, shown in Figure 22, isolates the SELF-HEATING EFFECTS analog section from the logic switching transients. Even if a separate power supply trace is not available, generous supply The temperature measurement accuracy of the ADT75 may be bypassing reduces supply line induced errors. Local supply degraded in some applications due to self-heating. Errors can be bypassing consisting of a 0.1 µF ceramic capacitor is critical for introduced from the quiescent dissipation and power dissipated the temperature accuracy specifications to be achieved. Place this when converting. The magnitude of these temperature errors is decoupling capacitor as close as possible to the ADT75 V pin. dependent on the thermal conductivity of the ADT75 package, DD the mounting technique, and the effects of airflow. At 25°C, static TTL/CMOS dissipation in the ADT75 is typically 798.6 µW operating at 3.3 V. LOGIC In the 8-lead MSOP package mounted in free air, this accounts CIRCUITS 0.1µF ADT75 for a temperature increase due to self-heating of ΔT = P × θ = 798.6 µW × 205.9°C/W = 0.16°C DISS JA Ikte ipst r teoc oam mmineinmduemd ,t hbaetc cauursree int th daiss sai pparotepdo trhtiroonuaglh e ftfheec td oenv itchee b e SPUOPWPELRY 05326-021 temperature error. Figure 22. Use Separate Traces to Reduce Power Supply Noise Using the power-down mode can reduce the current dissipated through the ADT75 subsequently reducing the self-heating effect. When the ADT75 is in power-down mode and operating at 25°C, static dissipation in the ADT75 is typically 78.6 µW with V = DD 3.3 V and the power-up/conversion rate is 1 SPS (sample per second). In the 8-lead MSOP package mounted in free air, this accounts for a temperature increase due to self-heating of ΔT = P × θ = 78.6 µW × 205.9°C/W = 0.016°C DISS JA Rev. B | Page 21 of 24

ADT75 Data Sheet TEMPERATURE MONITORING Once the thermal impedance is determined, the temperature of the heat source can be inferred from the ADT75 output. As The ADT75 is ideal for monitoring the thermal environment much as 60% of the heat transferred from the heat source to the within electronic equipment. For example, the surface-mounted thermal sensor on the ADT75 die is discharged via the copper package accurately reflects the exact thermal conditions that tracks, the package pins, and the bond pads. Of the pins on the affect nearby integrated circuits. ADT75, the GND pin transfers most of the heat. Therefore, to The ADT75 measures and converts the temperature at the measure the temperature of a heat source it is recommended surface of its own semiconductor chip. When the ADT75 is that the thermal resistance between the ADT75 GND pin and used to measure the temperature of a nearby heat source, the the GND of the heat source is reduced as much as possible. thermal impedance between the heat source and the ADT75 For example, use the ADT75’s unique properties to monitor a must be considered. Often, a thermocouple or other temperature high-power dissipation microprocessor. The ADT75 device, in a sensor is used to measure the temperature of the source, while surface-mounted package, is mounted directly beneath the the temperature is monitored by reading back from the ADT75 microprocessor’s pin grid array (PGA) package. The ADT75 temperature value register. produces a linear temperature output while needing only two I/O pins and requiring no external characterization. Rev. B | Page 22 of 24

Data Sheet ADT75 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 2.80 1 4 PIN1 IDENTIFIER 0.65BSC 0.95 15°MAX 0.85 1.10MAX 0.75 0.80 CO00P..10L550A.1N0ARICTOYMPLIANT00..T4205OJEDECSTA60°°NDARDS00M..20O39-187-AA 00..5450 10-07-2009-B Figure 23. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00(0.1968) 4.80(0.1890) 8 5 4.00(0.1574) 6.20(0.2441) 3.80(0.1497) 1 4 5.80(0.2284) 1.27B(0S.C0500) 1.75(0.0688) 00..5205((00..00109969)) 45° 0.25(0.0098) 1.35(0.0532) 8° 0.10(0.0040) 0° COPLANARITY 0.51(0.0201) 0.10 SEATING 0.31(0.0122) 0.25(0.0098) 10..2470((00..00510507)) PLANE 0.17(0.0067) COMPLIANTTOJEDECSTANDARDSMS-012-AA C(RINOEFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIAORRNOESUNANORDETEDAIN-POMPFRIFLOLMPIMIRLELIATIMTEEERTFSEO;RIRNECUQHSUEDIVIINMAELDENENSSTIIOGSNNFS.OR 012407-A Figure 24. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. B | Page 23 of 24

ADT75 Data Sheet ORDERING GUIDE Model1 Temperature Range Temperature Accuracy2, 3 Package Description Package Option Branding ADT75ARMZ –55°C to +125°C ±2°C 8-Lead MSOP RM-8 T5B ADT75ARMZ-REEL7 –55°C to +125°C ±2°C 8-Lead MSOP RM-8 T5B ADT75ARMZ-REEL –55°C to +125°C ±2°C 8-Lead MSOP RM-8 T5B ADT75ARZ –55°C to +125°C ±2°C 8-Lead SOIC_N R-8 ADT75ARZ-REEL7 –55°C to +125°C ±2°C 8-Lead SOIC_N R-8 ADT75ARZ-REEL –55°C to +125°C ±2°C 8-Lead SOIC_N R-8 ADT75BRMZ –55°C to +125°C ±1°C 8-Lead MSOP RM-8 T5C ADT75BRMZ-REEL7 –55°C to +125°C ±1°C 8-Lead MSOP RM-8 T5C ADT75BRMZ-REEL –55°C to +125°C ±1°C 8-Lead MSOP RM-8 T5C EVAL-ADT75EBZ Evaluation Board 1 Z = RoHS Compliant Part. 2 A grade temperature accuracy is over the −25°C to +100°C temperature range. 3 B grade temperature accuracy is over the 0°C to 70°C temperature range. I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2005–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05326-0-8/12(B) Rev. B | Page 24 of 24

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADT75ARMZ-REEL EVAL-ADT75EBZ ADT75BRMZ ADT75ARZ ADT75BRMZ-REEL ADT75ARMZ ADT75BRMZ- REEL7 ADT75ARZ-REEL ADT75ARMZ-REEL7 ADT75ARZ-REEL7