1 A/1.5 A/2 A Synchronous, Step-Down DC-to-DC Converters Data Sheet ADP2105/ADP2106/ADP2107 FEATURES GENERAL DESCRIPTION Extremely high 97% efficiency The ADP2105/ADP2106/ADP2107 are low quiescent current, Ultralow quiescent current: 20 μA synchronous, step-down dc-to-dc converters in a compact 4 mm × 1.2 MHz switching frequency 4 mm LFCSP package. At medium to high load currents, these 0.1 μA shutdown supply current devices use a current mode, constant frequency pulse-width Maximum load current modulation (PWM) control scheme for excellent stability and ADP2105: 1 A transient response. To ensure the longest battery life in portable ADP2106: 1.5 A applications, the ADP2105/ADP2106/ADP2107 use a pulse ADP2107: 2 A frequency modulation (PFM) control scheme under light load Input voltage: 2.7 V to 5.5 V conditions that reduces switching frequency to save power. Output voltage: 0.8 V to V IN The ADP2105/ADP2106/ADP2107 run from input voltages of Maximum duty cycle: 100% 2.7 V to 5.5 V, allowing single Li+/Li− polymer cell, multiple Smoothly transitions into low dropout (LDO) mode alkaline/NiMH cells, PCMCIA, and other standard power sources. Internal synchronous rectifier The output voltage of ADP2105/ADP2106/ADP2107 is adjustable Small 16-lead 4 mm × 4 mm LFCSP package from 0.8 V to the input voltage (indicated by ADJ), whereas the Optimized for small ceramic output capacitors ADP2105/ADP2106/ADP2107 are available in preset output Enable/shutdown logic input voltage options of 3.3 V, 1.8 V, 1.5 V, and 1.2 V (indicated by x.x V). Undervoltage lockout Each of these variations is available in three maximum current Soft start levels: 1 A (ADP2105), 1.5 A (ADP2106), and 2 A (ADP2107). Supported by ADIsimPower™ design tool The power switch and synchronous rectifier are integrated for APPLICATIONS minimal external part count and high efficiency. During logic Mobile handsets controlled shutdown, the input is disconnected from the output, PDAs and palmtop computers and it draws less than 0.1 µA from the input source. Other key Telecommunication/networking equipment features include undervoltage lockout to prevent deep battery Set top boxes discharge and programmable soft start to limit inrush current at Audio/video consumer electronics startup. TYPICAL OPERATING CIRCUIT 100 0.1μF 10Ω VIN INPUT VOLTAGE = 2.7V TO 5.5V VIN = 3.3V VIN = 3.6V VOUT = 2.5V 95 10μF FB %) 16 15 14 13 Y ( 90 ON FB GND IN PWIN1 NC OFF 1 EN LX212 OUTPUT VOLTAGE = 2.5V CIE VIN = 5V 2μH FFI 85 E 2 GND PGND 11 ADP2107-ADJ 85kΩ 10μF 4.7μF 3 GND LX110 80 FB 4 GCNOD5MP S6S AG7ND PNW8CIN2 9 VIN10μF40kΩ 0A TLOO A2AD 750 200 400 600 800 1000 1200 1400 1600 1800 200006079-001 1nF LOAD CURRENT (mA) 70kΩ Figure 2. Efficiency vs. Load Current for the ADP2107 with VOUT = 2.5 V 120pF NC = NO CONNECT 06079-002 Figure 1. Circuit Configuration of ADP2107 with VOUT = 2.5 V Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADP2105/ADP2106/ADP2107 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 External Component Selection ................................................ 17 Applications ....................................................................................... 1 Setting the Output Voltage ........................................................ 17 General Description ......................................................................... 1 Inductor Selection ...................................................................... 18 Typical Operating Circuit ................................................................ 1 Output Capacitor Selection....................................................... 19 Revision History ............................................................................... 3 Input Capacitor Selection .......................................................... 20 Functional Block Diagram .............................................................. 4 Input Filter ................................................................................... 20 Specifications ..................................................................................... 5 Soft Start Period .......................................................................... 20 Absolute Maximum Ratings ............................................................ 7 Loop Compensation .................................................................. 20 Thermal Resistance ...................................................................... 7 Bode Plots .................................................................................... 21 Boundary Condition .................................................................... 7 Load Transient Response .......................................................... 22 ESD Caution .................................................................................. 7 Efficiency Considerations ......................................................... 24 Pin Configuration and Function Descriptions ............................. 8 Thermal Considerations ............................................................ 24 Typical Performance Characteristics ............................................. 9 Design Example .............................................................................. 26 Theory of Operation ...................................................................... 15 External Component Recommendations .................................... 27 Control Scheme .......................................................................... 15 Circuit Board Layout Recommendations ................................... 29 PWM Mode Operation .............................................................. 15 Evaluation Board ............................................................................ 30 PFM Mode Operation ................................................................ 15 Evaluation Board Schematic for ADP2107 (1.8 V) ............... 30 Pulse-Skipping Threshold ......................................................... 15 Recommended PCB Board Layout (Evaluation Board Layout) ......................................................................................... 30 100% Duty Cycle Operation (LDO Mode) ............................. 15 Application Circuits ....................................................................... 32 Slope Compensation .................................................................. 16 Outline Dimensions ....................................................................... 34 Design Features ........................................................................... 16 Ordering Guide .......................................................................... 34 Applications Information .............................................................. 17 Rev. E | Page 2 of 36

Data Sheet ADP2105/ADP2106/ADP2107 REVISION HISTORY 3/07—Rev. 0 to Rev. A Updated Format ................................................................. Universal 4/16—Rev. D to Rev. E Changes to Output Characteristics and Changed LFCSP_VQ to LFCSP ................................... Throughout LX (Switch Node) Characteristics Sections ................................... 3 Change to Figure 4 ............................................................................ 8 Changes to Typical Performance Characteristics Section ........... 7 Updated Outline Dimensions ........................................................ 34 Changes to Load Transient Response Section ............................. 21 Changes to Ordering Guide ........................................................... 34 7/06—Revision 0: Initial Version 8/12—Rev. C to Rev. D Change to Features Section .............................................................. 1 Added Exposed Pad Notation to Pin Configuration and Function Description Section .......................................................... 7 Added ADIsimPower Design Tool Section ................................. 16 Updated Outline Dimensions ........................................................ 33 9/08—Rev. B to Rev. C Changes to Table Summary Statement ........................................... 4 Changes to LX Minimum On-Time Parameter, Table 1 .............. 5 7/08—Rev. A to Rev. B Changes to General Description Section ....................................... 1 Changes to Figure 3 ........................................................................... 3 Changes to Table 1 ............................................................................ 4 Changes to Table 2 ............................................................................ 6 Changes to Figure 4 ........................................................................... 7 Changes to Table 4 ............................................................................ 7 Changes to Figure 26 ...................................................................... 11 Changes to Figure 31 Through Figure 34 .................................... 12 Changes to Figure 35 ...................................................................... 13 Changes to PMW Mode Operation Section and Pulse Skipping Threshold Section ........................................................................... 14 Changes to Slope Compensation Section .................................... 15 Changes to Setting the Output Voltage Section ......................... 16 Changes to Figure 37 ...................................................................... 16 Changes to Inductor Selection Section ........................................ 17 Changes to Input Capacitor Selection Section ............................ 18 Changes to Figure 47 through Figure 52 ...................................... 21 Changes to Transition Losses Section and Thermal Considerations Section ................................................................... 22 Changes to Table 11 ........................................................................ 25 Changes to Circuit Board Layout Recommendations Section..27 Changes to Table 12 ........................................................................ 26 Changes to Figure 53 ...................................................................... 28 Changes to Figure 56 Through Figure 57 .................................... 30 Changes to Figure 58 Through Figure 59 .................................... 31 Changes to Outline Dimensions ................................................... 33 Rev. E | Page 3 of 36

ADP2105/ADP2106/ADP2107 Data Sheet FUNCTIONAL BLOCK DIAGRAM COMP 5 14 IN SOFT REFERENCE 9 PWIN2 SS 6 START 0.8V CURRENT SENSE AMPLIFIER 13 PWIN1 FB 16 FB 16 GM ERROR AMP CURRENT PWM/ LIMIT AGND 7 PFM CONTROL FOR PRESET VOLTAGE GND 2 OPTIONS ONLY DRAINVDER ANTI- 10 LX1 GND 3 SHOOT THROUGH 12 LX2 SLOPE GND 4 COMPENSATION NC 8 GND 15 OSCILLATOR ZERO CROSS COMPARATOR THERMAL 11 PGND EN 1 SHUTDOWN 06079-037 Figure 3. Rev. E | Page 4 of 36

Data Sheet ADP2105/ADP2106/ADP2107 SPECIFICATIONS V = 3.6 V at T = 25°C, unless otherwise noted.1 IN A Table 1. Parameter Min Typ Max Unit Test Conditions/Comments INPUT CHARACTERISTICS Input Voltage Range 2.7 5.5 V −40°C ≤ T ≤ +125°C J Undervoltage Lockout Threshold 2.4 V V rising IN 2.2 2.6 V V rising, −40°C ≤ T ≤ +125°C IN J 2.2 V V falling IN 2.0 2.5 V V falling, −40°C ≤ T ≤ +125°C IN J Undervoltage Lockout Hysteresis2 200 mV V falling IN OUTPUT CHARACTERISTICS Output Regulation Voltage 3.267 3.3 3.333 V 3.3 V, load = 10 mA 3.3 V 3.3 V, VIN = 3.6 V to 5.5 V, no load to full load 3.201 3.399 V 3.3 V, V = 3.6 V to 5.5 V, no load to full load, IN −40°C ≤ T ≤ +125°C J 1.782 1.8 1.818 V 1.8 V, load = 10 mA 1.8 V 1.8 V, V = 2.7 V to 5.5 V, no load to full load IN 1.746 1.854 V 1.8 V, V = 2.7 V to 5.5 V, no load to full load, IN −40°C ≤ T ≤ +125°C J 1.485 1.5 1.515 V 1.5, load = 10 mA 1.5 V ADP210x-1.5 V, VIN = 2.7 V to 5.5 V, no load to full load 1.455 1.545 V ADP210x-1.5 V, V = 2.7 V to 5.5 V, no load to full load, IN −40°C ≤ T ≤ +125°C J 1.188 1.2 1.212 V 1.2 V, load = 10 mA 1.2 V 1.2 V, V = 2.7 V to 5.5 V, no load to full load IN 1.164 1.236 V 1.2 V, V = 2.7 V to 5.5 V, no load to full load, IN −40°C ≤ T ≤ +125°C J Load Regulation 0.4 %/A ADP2105 0.5 %/A ADP2106 0.6 %/A ADP2107 Line Regulation3 0.1 0.33 %/V ADP2105, measured in servo loop 0.1 0.3 %/V ADP2106 and ADP2107, measured in servo loop Output Voltage Range 0.8 V V ADJ IN FEEDBACK CHARACTERISTICS FB Regulation Voltage 0.8 V ADJ 0.784 0.816 V ADJ, −40°C ≤ T ≤ +125°C J FB Bias Current −0.1 +0.1 µA ADJ, −40°C ≤ T ≤ +125°C J 3 µA 1.2 V output voltage 6 µA 1.2 V output voltage, −40°C ≤ T ≤ +125°C J 4 µA 1.5 V output voltage 8 µA 1.5 V output voltage, −40°C ≤ T ≤ +125°C J 5 µA 1.8 V output voltage 10 µA 1.8 V output voltage, −40°C ≤ T ≤ +125°C J 10 µA 3.3 V output voltage 20 µA 3.3 V output voltage, −40°C ≤ T ≤ +125°C J Rev. E | Page 5 of 36

ADP2105/ADP2106/ADP2107 Data Sheet Parameter Min Typ Max Unit Test Conditions/Comments INPUT CURRENT CHARACTERISTICS IN Operating Current 20 µA ADP2105/ADP2106/ADP2107 (ADJ), V = 0.9 V FB 30 µA ADP2105/ADP2106/ADP2107 (ADJ), V = 0.9 V, −40°C ≤ T ≤ FB J +125°C 20 µA ADP2105/ADP2106/ADP2107 (x.x V) output voltage 10% above regulation voltage 30 µA ADP2105/ADP2106/ADP2107 (x.x V) output voltage 10% above regulation voltage, −40°C ≤ T ≤ +125°C J IN Shutdown Current4 0.1 1 µA V = 0 V EN LX (SWITCH) NODE CHARACTERISTICS LX On Resistance4 190 mΩ P-channel switch, ADP2105 270 mΩ P-channel switch, ADP2105, −40°C ≤ T ≤ +125°C J 100 mΩ P-channel switch, ADP2106 and ADP2107 165 mΩ P-channel switch, ADP2106 and ADP2107, −40°C ≤ T ≤ +125°C J 160 mΩ N-channel synchronous rectifier, ADP2105 230 mΩ N-channel synchronous rectifier, ADP2105, −40°C ≤ T ≤ +125°C J 90 mΩ N-channel synchronous rectifier, ADP2106 and ADP2107 140 mΩ N-channel synchronous rectifier, ADP2106 and ADP2107, −40°C ≤ T ≤ +125°C J LX Leakage Current4, 5 0.1 1 µA V = 5.5 V, V = 0 V, 5.5 V IN LX LX Peak Current Limit5 2.9 A P-channel switch, ADP2107 2.6 3.3 A P-channel switch, ADP2107, −40°C ≤ T ≤ +125°C J 2.25 A P-channel switch, ADP2106 2.0 2.6 A P-channel switch, ADP2106, −40°C ≤ T ≤ +125°C J 1.5 A P-channel switch, ADP2105 1.3 1.8 A P-channel switch, ADP2105, −40°C ≤ T ≤ +125°C J LX Minimum On-Time 110 ns In PWM mode of operation, −40°C ≤ T ≤ +125°C J ENABLE CHARACTERISTICS EN Input High Voltage 2 V V = 2.7 V to 5.5 V, −40°C ≤ T ≤ +125°C IN J EN Input Low Voltage 0.4 V V = 2.7 V to 5.5 V, −40°C ≤ T ≤ +125°C IN J EN Input Leakage Current −0.1 µA V = 5.5 V, V = 0 V, 5.5 V IN EN −1 +1 µA V = 5.5 V, V = 0 V, 5.5 V, −40°C ≤ T ≤ +125°C IN EN J OSCILLATOR FREQUENCY 1.2 MHz V = 2.7 V to 5.5 V IN 1 1.4 MHz V = 2.7 V to 5.5 V, −40°C ≤ T ≤ +125°C IN J SOFT START PERIOD 750 1000 1200 µs C = 1 nF SS THERMAL CHARACTERISTICS Thermal Shutdown Threshold 140 °C Thermal Shutdown Hysteresis 40 °C COMPENSATOR 50 µA/V TRANSCONDUCTANCE (g ) m CURRENT SENSE AMPLIFIER GAIN (G )2 1.875 A/V ADP2105 CS 2.8125 A/V ADP2106 3.625 A/V ADP2107 1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Typical values are at TA = 25°C. 2 Guaranteed by design. 3 The ADP2105/ADP2106/ADP2107 line regulation was measured in a servo loop on the automated test equipment that adjusts the feedback voltage to achieve a specific COMP voltage. 4 All LX (switch) node characteristics are guaranteed only when the LX1 pin and LX2 pin are tied together. 5 These specifications are guaranteed from −40°C to +85°C. Rev. E | Page 6 of 36

Data Sheet ADP2105/ADP2106/ADP2107 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Rating θ is specified for the worst-case conditions, that is, a device JA IN, EN, SS, COMP, FB to AGND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. LX1, LX2 to PGND −0.3 V to (V + 0.3 V) IN Table 3. Thermal Resistance PWIN1, PWIN2 to PGND −0.3 V to +6 V Package Type θ Unit PGND to AGND −0.3 V to +0.3 V JA 16-Lead LFCSP 40 °C/W GND to AGND −0.3 V to +0.3 V Maximum Power Dissipation 1 W PWIN1, PWIN2 to IN −0.3 V to +0.3 V Operating Junction Temperature Range −40°C to +125°C BOUNDARY CONDITION Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020 Natural convection, 4-layer board, exposed pad soldered to the PCB. ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. E | Page 7 of 36

ADP2105/ADP2106/ADP2107 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 FB GND IN PWIN 6 5 4 3 1 1 1 1 EN 1 12 LX2 GND 2 ADP2105/ 11 PGND ADP2106/ GND 3 10 LX1 ADP2107 GND 4 TOP VIEW 9 PWIN2 5 6 7 8 P S D C M S N N O G C A NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 2 . TETHHXETE ERERMXNAPAOLL SD GEISDRS OPIPUAANDTD SI OPHNLO.AUNLED UBNED SEORLNDEEARTEHD T THOE AICN FOR 06079-003 Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 EN Enable Input. Drive EN high to turn on the device. Drive EN low to turn off the device and reduce the input current to 0.1 µA. 2, 3, 4, 15 GND Test Pins. These pins are used for internal testing and are not ground return pins. These pins are to be tied to the AGND plane as close as possible to the ADP2105/ADP2106/ADP2107. 5 COMP Feedback Loop Compensation Node. COMP is the output of the internal transconductance error amplifier. Place a series RC network from COMP to AGND to compensate the converter. See the Loop Compensation section. 6 SS Soft Start Input. Place a capacitor from SS to AGND to set the soft start period. A 1 nF capacitor sets a 1 ms soft start period. 7 AGND Analog Ground. Connect the ground of the compensation components, the soft start capacitor, and the voltage divider on the FB pin to the AGND pin as close as possible to the ADP2105/ ADP2106/ADP2107. The AGND is also to be connected to the exposed pad of ADP2105/ADP2106/ADP2107. 8 NC No Connect. This is not internally connected and can be connected to other pins or left unconnected. 9, 13 PWIN2, Power Source Inputs. The source of the PFET high-side switch. Bypass each PWIN pin to the nearest PGND plane with a PWIN1 4.7 µF or greater capacitor as close as possible to the ADP2105/ADP2106/ ADP2107. See the Input Capacitor Selection section. 10, 12 LX1, LX2 Switch Outputs. The drain of the P-channel power switch and N-channel synchronous rectifier. These pins are to be tied together and connected to the output LC filter between LX and the output voltage. 11 PGND Power Ground. Connect the ground return of all input and output capacitors to the PGND pin using a power ground plane as close as possible to the ADP2105/ADP2106/ADP2107. The PGND is then to be connected to the exposed pad of the ADP2105/ADP2106/ADP2107. 14 IN Power Input. The power source for the ADP2105/ADP2106/ADP2107 internal circuitry. Connect IN and PWIN1 with a 10 Ω resistor as close as possible to the ADP2105/ADP2106/ADP2107. Bypass IN to AGND with a 0.1 µF or greater capacitor. See the Input Filter section. 16 FB Output Voltage Sense or Feedback Input. For fixed output versions, connect to the output voltage. For adjustable versions, FB is the input to the error amplifier. Drive FB through a resistive voltage divider to set the output voltage. The FB regulation voltage is 0.8 V. EP Exposed Pad. The exposed pad should be soldered to an external ground plane underneath the IC for thermal dissipation. Rev. E | Page 8 of 36

Data Sheet ADP2105/ADP2106/ADP2107 TYPICAL PERFORMANCE CHARACTERISTICS 100 100 95 95 VIN = 2.7V VIN = 3.6V 90 VIN = 2.7V 90 VIN = 3.6V %) 85 %) Y ( Y ( 85 ENC 80 ENC VIN = 4.2V FICI VIN = 4.2V FICI 80 VIN = 5.5V F 75 F E E VIN = 5.5V 75 70 6650 IDTNACD R=U :2C 65T0°OmCRΩ: SD14, 2.5µH 06079-084 7605 IDTNACD R=U :2C 95T3°OmCRΩ: SD3814, 3.3µH 06079-086 1 10 100 1000 1 10 100 1000 LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 5. Efficiency—ADP2105 (1.2 V Output) Figure 8. Efficiency—ADP2105 (1.8 V Output) 100 100 VIN = 3.6V 95 95 90 VIN = 4.2V VIN = 5.5V 9805 VIN = 3.6V VIN = 2.7V CY (%) 85 CY (%) 80 VIN = 4.2V CIEN 80 CIEN 75 EFFI 75 EFFI 70 VIN = 5.5V 65 70 60 6650 IDTNACD R=U :2C 45T3°OmCRΩ: CDRH5D18, 4.1μH 06079-085 5505 IDTNACD R=U :2C 25T8°OmCRΩ: D62LCB, 2µH 06079-008 1 10 100 1000 1 10 100 1k 10k LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 6. Efficiency—ADP2105 (3.3 V Output) Figure 9. Efficiency—ADP2106 (1.2 V Output) 100 100 VIN = 3.6V 95 95 90 90 VIN = 2.7V 85 85 CY (%) 80 VIN = 4.2V CY (%) 80 VIN = 4.2V VIN = 5.5V CIEN 75 VIN = 5.5V CIEN 75 EFFI 70 EFFI 70 65 65 60 60 5550 IDTNACD R=U :2C 25T8°OmCRΩ: D62LCB, 2µH 06079-062 5550 VIN = 3.6V IDTNACD R=U :2C 45T7°OmCRΩ: D62LCB, 3.3µH 06079-053 1 10 100 1k 10k 1 10 100 1k 10k LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 7. Efficiency—ADP2106 (1.8 V Output) Figure 10. Efficiency—ADP2106 (3.3 V Output) Rev. E | Page 9 of 36

ADP2105/ADP2106/ADP2107 Data Sheet 100 100 VIN = 3.6V 95 95 VIN = 2.7V 90 VIN = 2.7V 90 85 VIN = 3.6V 85 %) %) VIN = 4.2V Y ( 80 Y ( 80 ENC 75 VIN = 4.2V ENC 75 VIN = 5.5V CI CI FFI 70 FFI 70 E VIN = 5.5V E 65 65 60 60 5550 IDTNACD R=U :2C 35T7°OmCRΩ: SD12, 1.2µH 06079-010 5550 IDTNACD R=U :2C 25T1°OmCRΩ: D62LCB, 1.5µH 06079-063 1 10 100 1k 10k 1 10 100 1k 10k LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 11. Efficiency—ADP2107 (1.2 V) Figure 14. Efficiency—ADP2107 (1.8 V) 100 1.23 2.7V, –40°C 2.7V, +25°C 2.7V, +125°C 3.6V, –40°C 3.6V, +25°C 3.6V, +125°C 95 5.5V, –40°C 5.5V, +25°C 5.5V, +125°C 1.22 90 %) 85 VIN = 5.5V GE (V) 1.21 FFICIENCY ( 877050 VIN = 4.2V PUT VOLTA 1.20 E UT 1.19 65 O VIN = 3.6V 60 1.18 5550 IDTNACD R=U :2C 15T3°OmCRΩ: CDRH5D28, 2.5µH 06079-054 1.17 06079-082 1 10 100 1k 10k 0.01 0.1 1 10 100 1k 10k LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 12. Efficiency—ADP2107 (3.3 V) Figure 15. Output Voltage Accuracy—ADP2107 (1.2 V) 1.85 3.38 3.6V, –40°C 3.6V, +25°C 3.6V, +125°C 5.5V, –40°C 5.5V, +25°C 5.5V, +125°C 3.36 1.83 3.34 V) V) E ( E ( G G 3.32 A 1.81 A T T L L O O 3.30 V V T T PU 1.79 PU 3.28 T T U U O O 3.26 1.77 2.7V, –40°C 2.7V, +25°C 2.7V, +125°C 1.75 53..56VV,, ––4400°°CC 53..56VV,, ++2255°°CC 35..65VV,, ++112255°°CC 06079-064 33..2242 06079-081 0.1 1 10 100 1k 10k 0.01 0.1 1 10 100 1k 10k LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 13. Output Voltage Accuracy—ADP2107 (1.8 V) Figure 16. Output Voltage Accuracy—ADP2107 (3.3 V) Rev. E | Page 10 of 36

Data Sheet ADP2105/ADP2106/ADP2107 10k 190 180 A) 1k mΩ)170 T (µ CE (160 N N RE +25°C TA PMOS POWER SWITCH R S150 SCENT CU 100 –40°C H ON RESI114300 E C QUI 10 WIT120 NMOS SYNCHRONOUS RECTIFIER S 1 +125°C 06079-016 111000 06079-093 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 17. Quiescent Current vs. Input Voltage Figure 20. Switch On Resistance vs. Input Voltage—ADP2105 0.802 120 PMOS POWER SWITCH 0.801 100 Ω) E (V)0.800 CE (m 80 G N A A LT0.799 ST K VO RESI 60 NMOS SYNCHRONOUS RECTIFIER C0.798 N A O DB H 40 E C FE0.797 WIT S 20 00..779956 06079-017 0 TA = 25°C 06079-018 –40 –20 0 20 40 60 80 100 120125 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 TEMPERATURE (°C) INPUT VOLTAGE (V) Figure 18. Feedback Voltage vs. Temperature Figure 21. Switch On Resistance vs. Input Voltage—ADP2106 and ADP2107 1.75 1260 1.70 1250 1.65 Hz) T (A)1.60 CY (k1240 MI N NT LI1.55 ADP2105 (1A) EQUE1230 +125°C E1.50 R R F PEAK CUR11..4450 WITCHING 11222100 –40°C +25°C 1.35 S 1200 11..3205 TA = 25°C 06079-073 1190 06079-021 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 19. Peak Current Limit of ADP2105 Figure 22. Switching Frequency vs. Input Voltage Rev. E | Page 11 of 36

ADP2105/ADP2106/ADP2107 Data Sheet 2.35 LX (SWITCH) NODE 2.30 2.25 3 A) T ( 2.20 ADP2106 (1.5A) MI LI 2.15 INDUCTOR CURRENT NT ∆: 260mV E 2.10 @: 3.26V R R U 2.05 C K A 2.00 PE 1 1.95 OUTPUT VOLTAGE 11..8905 TA = 25°C 06079-072 4 06079-074 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 CH1 1V M 10µs A CH1 1.78V CH3 5V CH4 1AΩ T 45.8% INPUT VOLTAGE (V) Figure 23. Peak Current Limit of ADP2106 Figure 26. Short-Circuit Response at Output 3.00 135 A) 2.95 T (m 120 A) 2.90 RREN 105 PEAK CURRENT LIMIT ( 22222.....8877650505 ADP2107 (2A) PPING THRESHOLD CU 97640505 VOUT =V O1.U8TV = 1.2V VOUT = 2.5V 2.60 SKI 30 E- 22..5550 TA = 25°C 06079-071 PULS 150 TA = 25°C 06079-066 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 24. Peak Current Limit of ADP2107 Figure 27. Pulse-Skipping Threshold vs. Input Voltage for ADP2105 150 195 mA) 135 mA) 180 ENT ( 120 ENT ( 165 VOUT = 1.2V R R 150 R R LD CU 10950 VOUT = 1.2V LD CU 113250 VOUT = 1.8V O O H H 105 ES 75 ES R R 90 H H NG T 60 VOUT = 1.8V VOUT = 2.5V NG T 75 VOUT = 2.5V PI 45 PI 60 P P SKI 30 SKI 45 E- E- 30 PULS 150 TA = 25°C 06079-067 PULS 150 TA = 25°C 06079-068 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure 25. Pulse-Skipping Threshold vs. Input Voltage for ADP2106 Figure 28. Pulse-Skipping Threshold vs. Input Voltage for ADP2107 Rev. E | Page 12 of 36

Data Sheet ADP2105/ADP2106/ADP2107 190 180 Ω)170 m CE (160 N 3 A PMOS POWER SWITCH ST150 SI E LX (SWITCH) NODE R140 ON 1 H 130 OUTPUT VOLTAGE (AC-COUPLED) C WIT120 NMOS SYNCHRONOUS RECTIFIER S 111000 06079-093 4 INDUCTOR CURRENT 06079-033 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 CH1 50mV M 400ns A CH3 3.88V INPUT VOLTAGE (V) CH3 2V CH4 200mAΩ T 17.4% Figure 29. Switch On Resistance vs. Temperature—ADP2105 Figure 32. DCM Mode of Operation at Light Load (100 mA) 140 LX (SWITCH) NODE 120 Ω) m PMOS POWER SWITCH E ( 100 NC 3 A T 80 S SI E NMOS SYNCHRONOUS RECTIFIER N R 60 1 O TCH 40 OUTPUT VOLTAGE (AC-COUPLED) WI S 200 06079-083 4 CH1 20mV INDUCTORM C U2µRsRENT A CH3 1.84V 06079-034 –40 –20 0 20 40 60 80 100 120 CH3 2V CH4 1AΩ T 13.4% JUNCTION TEMPERATURE (°C) Figure 30. Switch On Resistance vs. Temperature—ADP2106 and ADP2107 Figure 33. Minimum Off Time Control at Dropout LX (SWITCH) NODE LX (SWITCH) NODE 3 3 1 1 OUTPUT VOLTAGE (AC-COUPLED) OUTPUT VOLTAGE (AC-COUPLED) 4 INDUCTOR CURRENT 06079-030 4 INDUCTOR CURRENT 06079-031 CH1 50mV M 2µs A CH3 3.88V CH1 20mV M 1µs A CH3 3.88V CH3 2V CH4 200mAΩ T 6% CH3 2V CH4 1AΩ T 17.4% Figure 31. PFM Mode of Operation at Very Light Load (10 mA) Figure 34. PWM Mode of Operation at Medium/Heavy Load (1.5 A) Rev. E | Page 13 of 36

ADP2105/ADP2106/ADP2107 Data Sheet LX (SWITCH) NODE ENABLE VOLTAGE 3 3 OUTPUT VOLTAGE CF= RH3EA36QN.U6NkEEHNLz C3Y ∆@:: 22..8866AA INDUCTOR CURRENT 1 OUTPUT VOLTAGE INDUCTOR CURRENT 1 4 06079-032 4 06079-035 CH1 1V M 4µs A CH3 1.8V CH1 1V M 400µs A CH1 1.84V CH3 5V CH4 1AΩ T 45% CH3 5V CH4 500mAΩ T 20.2% Figure 35. Current Limit Behavior of ADP2107 (Frequency Foldback) Figure 36. Startup and Shutdown Waveform (CSS = 1 nF → SS Time = 1 ms) Rev. E | Page 14 of 36

Data Sheet ADP2105/ADP2106/ADP2107 THEORY OF OPERATION The ADP2105/ADP2106/ADP2107 are step-down, dc-to-dc PFM MODE OPERATION converters that use a fixed frequency, peak current mode archi- The ADP2105/ADP2106/ADP2107 smoothly transition to the tecture with an integrated high-side switch and low-side synchron- variable frequency PFM mode of operation when the load current ous rectifier. The high 1.2 MHz switching frequency and tiny decreases below the pulse skipping threshold current, switching 16-lead, 4 mm × 4 mm LFCSP package allow for a small step- only as necessary to maintain the output voltage within regulation. down dc-to-dc converter solution. The integrated high-side switch When the output voltage dips below regulation, the ADP2105/ (P-channel MOSFET) and synchronous rectifier (N-channel ADP2106/ADP2107 enter PWM mode for a few oscillator cycles MOSFET) yield high efficiency at medium to heavy loads. Light to increase the output voltage back to regulation. During the wait load efficiency is improved by smoothly transitioning to variable time between bursts, both power switches are off, and the output frequency PFM mode. capacitor supplies all the load current. Because the output voltage The ADP2105/ADP2106/ADP2107 (ADJ) operate with an input dips and recovers occasionally, the output voltage ripple in this voltage from 2.7 V to 5.5 V and regulate an output voltage down to mode is larger than the ripple in the PWM mode of operation. 0.8 V. The ADP2105/ADP2106/ADP2107 are also available with PULSE-SKIPPING THRESHOLD preset output voltage options of 3.3 V, 1.8 V, 1.5 V, and 1.2 V. The output current at which the ADP2105/ADP2106/ADP2107 CONTROL SCHEME transition from variable frequency PFM control to fixed frequency The ADP2105/ADP2106/ADP2107 operate with a fixed PWM control is called the pulse-skipping threshold. The pulse- frequency, peak current mode PWM control architecture at skipping threshold is optimized for excellent efficiency over all medium to high loads for high efficiency, but shift to a variable load currents. The variation of pulse-skipping threshold with frequency PFM control scheme at light loads for lower quies- input voltage and output voltage is shown in Figure 25, Figure 27, cent current. When operating in fixed frequency PWM mode, and Figure 28. the duty cycle of the integrated switches is adjusted to regulate 100% DUTY CYCLE OPERATION (LDO MODE) the output voltage, but when operating in PFM mode at light As the input voltage drops, approaching the output voltage, the loads, the switching frequency is adjusted to regulate the output ADP2105/ADP2106/ADP2107 smoothly transition to 100% duty voltage. cycle, maintaining the P-channel MOSFET switch-on continuously. The ADP2105/ADP2106/ADP2107 operate in the PWM mode This allows the ADP2105/ADP2106/ADP2107 to regulate the only when the load current is greater than the pulse-skipping output voltage until the drop in input voltage forces the P-channel threshold current. At load currents below this value, the converter MOSFET switch to enter dropout, as shown in the following smoothly transitions to the PFM mode of operation. equation: PWM MODE OPERATION V = I × (R + DCR ) + V IN(MIN) OUT DS(ON) − P IND OUT(NOM) In PWM mode, the ADP2105/ADP2106/ADP2107 operate at a The ADP2105/ADP2106/ADP2107 achieve 100% duty cycle fixed frequency of 1.2 MHz set by an internal oscillator. At the operation by stretching the P-channel MOSFET switch-on time start of each oscillator cycle, the P-channel MOSFET switch is if the inductor current does not reach the peak inductor current turned on, putting a positive voltage across the inductor. Current level by the end of the clock cycle. When this happens, the oscil- in the inductor increases until the current sense signal crosses lator remains off until the inductor current reaches the peak the peak inductor current level that turns off the P-channel inductor current level, at which time the switch is turned off and MOSFET switch and turns on the N-channel MOSFET synchro- the synchronous rectifier is turned on for a fixed off time. At nous rectifier. This puts a negative voltage across the inductor, the end of the fixed off time, another cycle is initiated. As the causing the inductor current to decrease. The synchronous ADP2105/ADP2106/ADP2107 approach dropout, the switching rectifier stays on for the remainder of the cycle, unless the frequency decreases gradually to smoothly transition to 100% inductor current reaches zero, which causes the zero-crossing duty cycle operation. comparator to turn off the N-channel MOSFET. The peak inductor current is set by the voltage on the COMP pin. The COMP pin is the output of a transconductance error amplifier that compares the feedback voltage with an internal 0.8 V reference. Rev. E | Page 15 of 36

ADP2105/ADP2106/ADP2107 Data Sheet SLOPE COMPENSATION Short-Circuit Protection Slope compensation stabilizes the internal current control loop The ADP2105/ADP2106/ADP2107 include frequency foldback of the ADP2105/ADP2106/ADP2107 when operating beyond to prevent output current runaway on a hard short. When the 50% duty cycle to prevent subharmonic oscillations. It is imple- voltage at the feedback pin falls below 0.3 V, indicating the possi- mented by summing a fixed, scaled voltage ramp to the current bility of a hard short at the output, the switching frequency is sense signal during the on-time of the P-channel MOSFET switch. reduced to 1/4 of the internal oscillator frequency. The reduction in the switching frequency results in more time for the inductor to The slope compensation ramp value determines the minimum discharge, preventing a runaway of output current. inductor that can prevent subharmonic oscillations at a given output voltage. For slope compensation ramp values, see Table 5. Undervoltage Lockout (UVLO) For more information see the Inductor Selection section. To protect against deep battery discharge, UVLO circuitry is integrated on the ADP2105/ADP2106/ADP2107. If the input Table 5. Slope Compensation Ramp Values voltage drops below the 2.2 V UVLO threshold, the ADP2105/ Device Slope Compensation Ramp Values ADP2106/ADP2107 shut down, and both the power switch and ADP2105 0.72 A/µs synchronous rectifier turn off. When the voltage again rises above ADP2106 1.07 A/µs the UVLO threshold, the soft start period is initiated, and the ADP2107 1.38 A/µs device is enabled. Thermal Protection DESIGN FEATURES Enable/Shutdown In the event that the ADP2105/ADP2106/ADP2107 junction temperatures rise above 140°C, the thermal shutdown circuit turns Drive EN high to turn on the ADP2105/ADP2106/ADP2107. off the converter. Extreme junction temperatures can be the result Drive EN low to turn off the ADP2105/ADP2106/ADP2107, of high current operation, poor circuit board design, and/or high reducing the input current below 0.1 µA. To force the ADP2105/ ambient temperature. A 40°C hysteresis is included so that when ADP2106/ADP2107 to automatically start when input power is thermal shutdown occurs, the ADP2105/ADP2106/ ADP2107 applied, connect EN to IN. When shut down, the ADP2105/ do not return to operation until the on-chip temperature drops ADP2106/ADP2107 discharge the soft start capacitor, causing a below 100°C. When coming out of thermal shutdown, soft start new soft start cycle every time they are re-enabled. is initiated. Synchronous Rectification Soft Start In addition to the P-channel MOSFET switch, the ADP2105/ The ADP2105/ADP2106/ADP2107 include soft start circuitry ADP2106/ADP2107 include an integrated N-channel MOSFET to limit the output voltage rise time to reduce inrush current at synchronous rectifier. The synchronous rectifier improves effi- startup. To set the soft start period, connect the soft start capacitor ciency, especially at low output voltage, and reduces cost and (C ) from SS to AGND. When the ADP2105/ADP2106/ADP2107 board space by eliminating the need for an external rectifier. SS are disabled, or if the input voltage is below the undervoltage Current Limit lockout threshold, C is internally discharged. When the SS The ADP2105/ADP2106/ADP2107 have protection circuitry to ADP2105/ADP2106/ADP2107 are enabled, C is charged through SS limit the direction and amount of current flowing through the an internal 0.8 µA current source, causing the voltage at SS to rise power switch and synchronous rectifier. The positive current linearly. The output voltage rises linearly with the voltage at SS. limit on the power switch limits the amount of current that can flow from the input to the output, and the negative current limit on the synchronous rectifier prevents the inductor current from reversing direction and flowing out of the load. Rev. E | Page 16 of 36

Data Sheet ADP2105/ADP2106/ADP2107 APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL SETTING THE OUTPUT VOLTAGE The ADP2105/ADP2106/ADP2107 is supported by The output voltage of ADP2105/ADP2106/ADP2107 (ADJ) is ADIsimPower design tool set. ADIsimPower is a collection externally set by a resistive voltage divider from the output voltage of tools that produce complete power designs optimized for a to FB. The ratio of the resistive voltage divider sets the output specific design goal. The tools enable the user to generate a voltage, and the absolute value of those resistors sets the divider full schematic, bill of materials, and calculate performance in string current. For lower divider string currents, the small 10 nA minutes. ADIsimPower can optimize designs for cost, area, (0.1 μA maximum) FB bias current is to be taken into account efficiency, and parts count while taking into consideration the when calculating resistor values. The FB bias current can be operating conditions and limitations of the IC and all real external ignored for a higher divider string current, but this degrades components. For more information about ADIsimPower design efficiency at very light loads. tools, refer to www.analog.com/ADIsimPower. The tool set is To limit output voltage accuracy degradation due to FB bias available from this website, and users can also request an current to less than 0.05% (0.5% maximum), ensure that the unpopulated board through the tool. divider string current is greater than 20 μA. To calculate the EXTERNAL COMPONENT SELECTION desired resistor values, first determine the value of the bottom divider string resistor (R ) using the following equation: The external component selection for the ADP2105/ADP2106/ BOT ADP2107 application circuits shown in Figure 37 and Figure 38 V R  FB depend on input voltage, output voltage, and load current BOT I STRING requirements. Additionally, trade-offs between performance where: parameters like efficiency and transient response can be made V = 0.8 V, the internal reference. FB by varying the choice of external components. I is the resistor divider string current. STRING 0.1μF 10Ω VIN INPUT VOLTAGE = 2.7V TO 5.5V CIN1 VOUT 16 15 14 13 ON FB GND IN PWIN1 OFF 1 EN LX212 OUTPUT VOLTAGE = 1.2V, 1.5V, 1.8V, 3.3V L VOUT 2 GND ADP2105/ PGND 11 ADP2106/ COUT 3 GND ADP2107 LX110 LOAD VIN 4 GND PWIN2 9 COMP SS AGND NC CIN2 5 6 7 8 RCOMP CSS CCOMP NC = NO CONNECT 06079-065 Figure 37. Typical Applications Circuit for Fixed Output Voltage Options of ADP2105/ADP2106/ADP2107(x.x V) Rev. E | Page 17 of 36

ADP2105/ADP2106/ADP2107 Data Sheet 0.1μF 10Ω VIN INPUT VOLTAGE = 2.7V TO 5.5V CIN1 FB 16 15 14 13 ON FB GND IN PWIN1 OFF 1 EN LX212 OUTPUT VOLTAGE L = 0.8V TO VIN 2 GND ADP2105/ PGND 11 3 GND AADDPP22110067/ LX110 RTOP COUT LOAD VIN FB 4 GND PWIN2 9 COMP SS AGND NC CIN2 RBOT 5 6 7 8 RCOMP CSS CCOMP NC = NO CONNECT 06079-038 Figure 38. Typical Applications Circuit for Adjustable Output Voltage Option of ADP2105/ADP2106/ADP2107 (ADJ) When R is determined, calculate the value of the top resistor For the ADP2105 BOT (R ) by using the following equation: TOP L > (1.12 µH/V) × V OUT R =R VOUT −VFB For the ADP2106 TOP BOT VFB  L > (0.83 µH/V) × VOUT The ADP2105/ADP2106/ADP2107(x.x V) include the resistive For the ADP2107 voltage divider internally, reducing the external circuitry required. L > (0.66 µH/V) × V OUT For improved load regulation, connect the FB to the output voltage as close as possible to the load. Inductors 4.7 µH or larger are not recommended because they may cause instability in discontinuous conduction mode under INDUCTOR SELECTION light load conditions. It is also important that the inductor be The high switching frequency of ADP2105/ADP2106/ADP2107 capable of handling the maximum peak inductor current (I ) PK allows minimal output voltage ripple even with small inductors. determined by the following equation: The sizing of the inductor is a trade-off between efficiency and ∆I  transient response. A small inductor leads to larger inductor I =I + L current ripple that provides excellent transient response but PK LOAD(MAX)  2  degrades efficiency. Due to the high switching frequency of Table 6. Minimum Inductor Value for Common Output ADP2105/ADP2106/ADP2107, shielded ferrite core inductors Voltage Options for the ADP2105 (1 A) are recommended for their low core losses and low electromagnetic V IN interference (EMI). V 2.7 V 3.6 V 4.2 V 5.5 V OUT As a guideline, the inductor peak-to-peak current ripple (ΔI) is 1.2 V 1.67 µH 2.00 µH 2.14 µH 2.35 µH L typically set to 1/3 of the maximum load current for optimal 1.5 V 1.68 µH 2.19 µH 2.41 µH 2.73 µH transient response and efficiency, as shown in the following 1.8 V 2.02 µH 2.25 µH 2.57 µH 3.03 µH equations: 2.5 V 2.80 µH 2.80 µH 2.80 µH 3.41 µH 3.3 V 3.70 µH 3.70 µH 3.70 µH 3.70 µH V ×(V −V ) I ∆I = OUT IN OUT ≈ LOAD(MAX) L VIN × fSW ×L 3 Table 7. Minimum Inductor Value for Common Output 2.5×V ×(V −V ) Voltage Options for the ADP2106 (1.5 A) ⇒LIDEAL = VOU×TI IN OUT μH VIN IN LOAD(MAX) V 2.7 V 3.6 V 4.2 V 5.5 V OUT where fSW is the switching frequency (1.2 MHz). 1.2 V 1.11 µH 2.33 µH 2.43 µH 1.56 µH The ADP2105/ADP2106/ADP2107 use slope compensation in 1.5 V 1.25 µH 1.46 µH 1.61 µH 1.82 µH the current control loop to prevent subharmonic oscillations 1.8 V 1.49 µH 1.50 µH 1.71 µH 2.02 µH when operating beyond 50% duty cycle. The fixed slope compen- 2.5 V 2.08 µH 2.08 µH 2.08 µH 2.27 µH sation limits the minimum inductor value as a function of 3.3 V 2.74 µH 2.74 µH 2.74 µH 2.74 µH output voltage. Rev. E | Page 18 of 36

Data Sheet ADP2105/ADP2106/ADP2107 18 Table 8. Minimum Inductor Value for Common Output 17 %) 16 Voltage Options for the ADP2107 (2 A) E ( 15 V AG 14 IN LT 13 VOUT 2.7 V 3.6 V 4.2 V 5.5 V VO 12 T 11 1.2 V 0.83 µH 1.00 µH 1.07 µH 1.17 µH U P 10 T 1.5 V 0.99 µH 1.09 µH 1.21 µH 1.36 µH U 9 O 1.8 V 1.19 µH 1.19 µH 1.29 µH 1.51 µH OF 87 2.5 V 1.65 µH 1.65 µH 1.65 µH 1.70 µH OT 6 3.3 V 2.18 µH 2.18 µH 2.18 µH 2.18 µH RSHO 54 E 3 V TAaDbPle2 190. I6n/AduDcPto2r1 0R7e commendations for the ADP2105/ O 210 06079-070 15 20 25 30 35 40 45 50 55 60 65 70 Small-Sized Inductors Large-Sized Inductors Vendor (< 5 mm × 5 mm) (> 5 mm × 5 mm) OUTPUT CAPACITOR × OUTPUT VOLTAGE (μC) Figure 39. Percentage Overshoot for a 1 A Load Transient Response vs. Sumida CDRH2D14, 3D16, CDRH4D18, 4D22, Output Capacitor × Output Voltage 3D28 4D28, 5D18, 6D12 Toko 1069AS-DB3018, D52LC, D518LC, For example, if the desired 1 A load transient response (overshoot) 1098AS-DE2812, D62LCB is 5% for an output voltage of 2.5 V, then from Figure 39 1070AS-DB3020 Output Capacitor × Output Voltage = 50 μC Coilcraft LPS3015, LPS4012, DO1605T DO3314 50μC ⇒OutputCapacitor= ≈20μF Cooper SD3110, SD3112, SD10, SD12, SD14, SD52 2.5 Bussmann SD3114, SD3118, SD3812, SD3814 The ADP2105/ADP2106/ADP2107 have been designed for operation with small ceramic output capacitors that have low OUTPUT CAPACITOR SELECTION ESR and ESL. Therefore, they are comfortably able to meet tight output voltage ripple specifications. X5R or X7R dielectrics are The output capacitor selection affects both the output voltage ripple recommended with a voltage rating of 6.3 V or 10 V. Y5V and Z5U and the loop dynamics of the converter. For a given loop crossover dielectrics are not recommended, due to their poor temperature frequency (the frequency at which the loop gain drops to 0 dB), the and dc bias characteristics. Table 10 shows a list of recommended maximum voltage transient excursion (overshoot) is inversely MLCC capacitors from Murata and Taiyo Yuden. proportional to the value of the output capacitor. Therefore, larger output capacitors result in improved load transient response. To When choosing output capacitors, it is also important to minimize the effects of the dc-to-dc converter switching, the cross- account for the loss of capacitance due to output voltage dc bias. over frequency of the compensation loop must be less than 1/10 Figure 40 shows the loss of capacitance due to output voltage dc of the switching frequency. Higher crossover frequency leads to bias for three X5R MLCC capacitors from Murata. faster settling time for a load transient response, but it can also 20 cause ringing due to poor phase margin. Lower crossover frequency helps to provide stable operation but needs large output 0 capacitors to achieve competitive overshoot specifications. %) E ( Therefore, the optimal crossover frequency for the control loop of G –20 N A 1 ADP2105/ADP2106/ADP2107 is 80 kHz, 1/15 of the switching H C fthreeq mueanxicmy.u Fmor o au tcpruots svoovltearg fer eeqxucuenrsciyo no fd 8u0r iknHg za, 1F iAg ulorea d3 9tr ashnosiwens t, ANCE –40 3 2 T as the product of the output voltage and the output capacitor is ACI –60 P A varied. Choose the output capacitor based on the desired load C transient response and target output voltage. –1–0800 123412.027µµµFFF 000888000555 XXX555RRR MMMUUURRRAAATTTAAA GGGRRRMMM222111BBBRRR666101AJA214207665MKK 06079-060 0 2 4 6 VOLTAGE (VDC) Figure 40. Percentage Drop-In Capacitance vs. DC Bias for Ceramic Capacitors (Information Provided by Murata Corporation) Rev. E | Page 19 of 36

ADP2105/ADP2106/ADP2107 Data Sheet For example, to get 20 μF output capacitance at an output voltage LOOP COMPENSATION of 2.5 V, based on Figure 40, as well as to give some margin for The ADP2105/ADP2106/ADP2107 utilize a transconductance temperature variance, a 22 μF and a 10 μF capacitor are to be error amplifier to compensate the external voltage loop. The used in parallel to ensure that the output capacitance is sufficient open loop transfer function at angular frequency (s) is given by under all conditions for stable behavior. Z (s)V  Table 10. Recommended Input and Output Capacitor H(s)G G  COMP  REF  Selection for the ADP2105/ADP2106/ADP2107 m CS sCOUT VOUT  Vendor where: Capacitor Murata Taiyo Yuden V is the internal reference voltage (0.8 V). REF 4.7 μF, 10 V GRM21BR61A475K LMK212BJ475KG V is the nominal output voltage. OUT X5R 0805 Z (s) is the impedance of the compensation network at the COMP 10 μF, 10 V GRM21BR61A106K LMK212BJ106KG angular frequency. X5R 0805 C is the output capacitor. OUT 22 μF, 6.3 V GRM21BR60J226M JMK212BJ226MG g is the transconductance of the error amplifier (50 μA/V m X5R 0805 nominal). INPUT CAPACITOR SELECTION G is the effective transconductance of the current loop. CS The input capacitor reduces input voltage ripple caused by the G = 1.875 A/V for the ADP2105. CS switch currents on the PWIN pins. Place the input capacitors as G = 2.8125 A/V for the ADP2106. CS close as possible to the PWIN pins. Select an input capacitor G = 3.625 A/V for the ADP2107. CS capable of withstanding the rms input current for the maximum The transconductance error amplifier drives the compensation load current in your application. network that consists of a resistor (R ) and capacitor (C ) COMP COMP For the ADP2105, it is recommended that each PWIN pin be connected in series to form a pole and a zero, as shown in the bypassed with a 4.7 μF or larger input capacitor. For the ADP2106, following equation: bypass each PWIN pin with a 10 μF and a 4.7 μF capacitor, and  1  1sR C  for the ADP2107, bypass each PWIN pin with a 10 μF capacitor. Z (s)R   COMP COMP  As with the output capacitor, a low ESR ceramic capacitor is COMP  COMP sCCOMP   sCCOMP  recommended to minimize input voltage ripple. X5R or X7R At the crossover frequency, the gain of the open loop transfer dielectrics are recommended, with a voltage rating of 6.3 V or function is unity. For the compensation network impedance at 10 V. Y5V and Z5U dielectrics are not recommended due to the crossover frequency, this yields the following equation: their poor temperature and dc bias characteristics. Refer to (2π)F C V  Table 10 for input capacitor recommendations. Z (F ) CROSS OUT OUT  INPUT FILTER COMP CROSS  GmGCS  VREF  where: The IN pin is the power source for the ADP2105/ADP2106/ F = 80 kHz, the crossover frequency of the loop. ADP2107 internal circuitry, including the voltage reference and CROSS C V is determined from the Output Capacitor Selection current sense amplifier that are sensitive to power supply noise. OUT OUT section. To prevent high frequency switching noise on the PWIN pins from corrupting the internal circuitry of the ADP2105/ADP2106/ To ensure that there is sufficient phase margin at the crossover ADP2107, a low-pass RC filter must be placed between the IN frequency, place the compensator zero at 1/4 of the crossover pin and the PWIN1 pin. The suggested input filter consists of a frequency, as shown in the following equation: small 0.1 μF ceramic capacitor placed between IN and AGND and F  a 10 Ω resistor placed between IN and PWIN1. This forms a (2π) CROSS R C 1  4  COMP COMP 150 kHz low-pass filter between PWIN1 and IN that prevents any Solving the three equations in this section simultaneously yields high frequency noise on PWIN1 from coupling into the IN pin. the value for the compensation resistor and compensation SOFT START PERIOD capacitor, as shown in the following equation: To set the soft start period, connect a soft start capacitor (C ) from SS (2π)F C V  SS to AGND. The soft start period varies linearly with the size R 0.8 CROSS  OUT OUT  of the soft start capacitor, as shown in the following equation: COMP  GmGCS  VREF  T = C × 109 ms 2 SS SS C  For a soft start period of 1 ms, a 1 nF capacitor must be COMP πFCROSSRCOMP connected between SS and AGND. Rev. E | Page 20 of 36

Data Sheet ADP2105/ADP2106/ADP2107 BODE PLOTS 60 ADP2106 60 ADP2105 50 50 40 LOOP GAIN 0 40 LOOP GAIN 0 LOOP GAIN (dB) –132100000 OILNOULPAOTUPDOTU PCVT UPO VRHLORATLEASTNEGATEG ==E 1 5=A.5 1V.8V FRECQRUOENSSCMOYA VR=PE GH8RA7INkS H=Ez 48° 4911503850 LOOP PHASE (Degrees) LOOP GAIN (dB) –132100000 OINUPTUPTLU VOTO OVLPOT PLATHGAAEGS =EE 5=.5 1V.2V FRECQRUOESNMSCAOYRP V=GHE AI7RN9S k=EH 4z9° 4911503850 LOOP PHASE (Degrees) –20 INDUCTOR = 2.2µH (LPS4012) LOAD CURRENT = 1A OUTPUT CAPACITOR = 22µF + 22µF –20 INDUCTOR = 3.3µH (SD3814) –30 COMPENSATION RESISTOR = 180kΩ OUTPUT CAPACITOR = 22µF + 22µF + 4.7µF COMPENSATION CAPACITOR = 56pF –30 COMPENSATION RESISTOR = 267kΩ –40 COMPENSATION CAPACITOR = 39pF 1 10 100 300 –40 FREQUENCY (kHz) 1 10 100 300 N1 . O E5T%XET SOEVRENRASLH COOOMTP FOONRE NAT 1SA WLOERAED CTHROANSESNIE NFOT.R A 06079-055 N1.O ETXETSERNAL COFMRPEOQNUEENNTCSY W (kEHRzE) CHOSEN FOR A 06079-058 5% OVERSHOOT FOR A 1A LOAD TRANSIENT. Figure 41. ADP2106 Bode Plot at VIN = 5.5 V, VOUT = 1.8 V and Load = 1 A Figure 44. ADP2105 Bode Plot at VIN = 5.5 V, VOUT = 1.2 V and Load = 1 A 60 60 ADP2106 ADP2107 50 50 40 LOOP GAIN 0 40 LOOP GAIN 0 LOOP GAIN (dB) –132100000 OINUPTUPTLU VOTO OVLPOT LPATHGAAEGS =EE 3=.6 1V.8V FRECQRUOENSSCOYM V=EA 8RRP3GHkHAINzS =E 52° 4911503850 LOOP PHASE (Degrees) LOOP GAIN (dB) –132100000 OINUPTUPTU VTO VLLOOTLAOTGPA EPG =HE A 5=SV 2E.5V FRECQRUOENSSCMOYA V=REP 7GRH6AIkNHS =Ez 65° 4911503850 LOOP PHASE (Degrees) LOAD CURRENT = 1A LOAD CURRENT = 1A –20 INDUCTOR = 2.2µH (LPS4012) –20 INDUCTOR = 2µH (D62LCB) OUTPUT CAPACITOR = 22µF + 22µF OUTPUT CAPACITOR = 10µF + 4.7µF –30 COMPENSATION RESISTOR = 180kΩ –30 COMPENSATION RESISTOR = 70kΩ COMPENSATION CAPACITOR = 56pF COMPENSATION CAPACITOR = 120pF –40 –40 1 10 100 300 1 10 100 300 N1 . O E5T%XET SOEVRENRASLH COOOFMTRP EFOQONURE ENANT 1CSAY W L(kOEHRAzED) CTHROANSESNIE NFOT.R A 06079-056 N1 . O E1T0XE%TSE ORVNEARLS CHOOFMORPTEO FQNOUEREN NATC S1Y AW ( LkEHORzAE)D C THROASNESNI EFNOTR. A 06079-059 Figure 42. ADP2106 Bode Plot at VIN = 3.6 V, VOUT = 1.8 V, and Load = 1 A Figure 45. ADP2107 Bode Plot at VIN = 5 V, VOUT = 2.5 V and Load = 1 A 60 60 ADP2105 ADP2107 50 50 LOOP GAIN 40 0 40 LOOP GAIN 0 LOOP GAIN (dB) –132100000 OINUPTULPTOU OVTOP V LPOTHLAATGSAEEG =E 3=. 61V.2V FRECQRUOENSSCMOYA V=RPE G7HR1AINkSH =Ez 51° 4911503850 LOOP PHASE (Degrees) LOOP GAIN (dB) –132100000 OINUPTUPTU VTO LVLOOTOLATPGA EPG H=EA 5=SV E3.3V FRECQRUOENSSCOY VM=E A6R7RPkGHHAIzNS =E 70° 4911503850 LOOP PHASE (Degrees) LOAD CURRENT = 1A LOAD CURRENT = 1A –20 INDUCTOR = 3.3µH (SD3814) –20 INDUCTOR = 2.5µH (CDRH5D28) OUTPUT CAPACITOR = 22µF + 22µF + 4.7µF OUTPUT CAPACITOR = 10µF + 4.7µF –30 COMPENSATION RESISTOR = 267kΩ –30 COMPENSATION RESISTOR = 70kΩ COMPENSATION CAPACITOR = 39pF COMPENSATION CAPACITOR = 120pF –40 –40 1 10 100 300 1 10 100 300 FREQUENCY (kHz) FREQUENCY (kHz) N1.O ETXETSERNAL COMPONENTS WERE CHOSEN FOR A 06079-057 N1.O ETXETSERNAL COMPONENTS WERE CHOSEN FOR A 06079-069 5% OVERSHOOT FOR A 1A LOAD TRANSIENT. 10% OVERSHOOT FOR A 1A LOAD TRANSIENT. Figure 43. ADP2105 Bode Plot at VIN = 3.6 V, VOUT = 1.2 V, and Load = 1 A Figure 46. ADP2107 Bode Plot at VIN = 5 V, VOUT = 3.3 V, and Load = 1 A Rev. E | Page 21 of 36

ADP2105/ADP2106/ADP2107 Data Sheet LOAD TRANSIENT RESPONSE T T OUTPUT CURRENT OUTPUT CURRENT 3 3 OUTPUT VOLTAGE (AC-COUPLED) OUTPUT VOLTAGE (AC-COUPLED) 2 2 1 1 LX NODE (SWITCH NODE) LX NODE (SWITCH NODE) CH1 2.00V CH2 100mV~ M 20.0µs A CH3 700mA CH1 2.00V CH2 200mV~ M 20.0µs A CH3 700mA CH3 1.00A Ω T 10.00% CH3 1.00A Ω T 10.00% OUTPUT CAPACITOR: 22µF + 22µF + 4.7µF OUTPUT CAPACITOR: 22µF + 4.7µF ICCNOODMMUPPCEETNNOSSRAA: TTSIIDOO1NN4 ,CR 2AE.5SPµIASHCTIOTOR:R 2: 7309kpΩF 06079-087 ICCNOODMMUPPCEETNNOSSRAA: TTCIIDOORNNH RC5EADSP18IAS,C T4IO.T1ORµ:HR 2: 7309kpΩF 06079-089 Figure 47. 1 A Load Transient Response for ADP2105-1.2 Figure 49. 1 A Load Transient Response for ADP2105-3.3 with External Components Chosen for 5% Overshoot with External Components Chosen for 5% Overshoot T OUTPUT CURRENT 3 T OUTPUT CURRENT 3 2 OUTPUT VOLTAGE (AC-COUPLED) OUTPUT VOLTAGE (AC-COUPLED) 2 1 LX NODE (SWITCH NODE) 1 CH1 2.00V CH2 100mV~ M 20.0µs A CH3 700mA LX NODE (SWITCH NODE) CH3 1.00A Ω T 10.00% CH1 2.00V CH2 100mV~ M 20.0µs A CH3 700mA OUTPUT CAPACITOR: 22µF + 22µF CH3 1.00A Ω T 10.00% ICCNOODMMUPPCEETNNOSSRAA: TTSIIDOO3NN8 1CR4AE, SP3I.AS3CµTIHOTOR:R 2: 7309kpΩF 06079-088 OICCNOOUDMMTUPPPCUEETTNNO SSCRAAA: TTPSIIADOOC1NN4I T,RC O2EA.R5SPµ:IA SH2CT2IµOTFOR +:R 1:4 3.8752µkpFΩF 06079-090 Figure 48. 1 A Load Transient Response for ADP2105-1.8 Figure 50. 1 A Load Transient Response for ADP2105-1.2 with External Components Chosen for 5% Overshoot with External Components Chosen for 10% Overshoot Rev. E | Page 22 of 36

Data Sheet ADP2105/ADP2106/ADP2107 T T OUTPUT CURRENT OUTPUT CURRENT 3 3 OUTPUT VOLTAGE (AC-COUPLED) OUTPUT VOLTAGE (AC-COUPLED) 2 2 1 1 LX NODE (SWITCH NODE) LX NODE (SWITCH NODE) CH1 2.00V CH2 100mV~ M 20.0µs A CH3 700mA CH1 2.00V CH2 200mV~ M 20.0µs A CH3 700mA CH3 1.00A Ω T 10.00% CH3 1.00A Ω T 10.00% OUTPUT CAPACITOR: 10µF + 10µF OUTPUT CAPACITOR: 10µF + 4.7µF ICCNOODMMUPPCEETNNOSSRAA: TTSIIDOO3NN8 1RC4EA, SP3IA.S3CµTIHOTOR:R 1: 3852kpΩF 06079-091 ICCNOODMMUPPCEETNNOSSRAA: TTCIIDOORNNH RC5EADSP18IAS,C T4IO.T1ORµ:HR 1: 3852kpΩF 06079-092 Figure 51. 1 A Load Transient Response for ADP2105-1.8 Figure 52. 1 A Load Transient Response for ADP2105-3.3 with External Components Chosen for 10% Overshoot with External Components Chosen for 10% Overshoot Rev. E | Page 23 of 36

ADP2105/ADP2106/ADP2107 Data Sheet Transition Losses EFFICIENCY CONSIDERATIONS Transition losses occur because the P-channel MOSFET power Efficiency is the ratio of output power to input power. The high switch cannot turn on or turn off instantaneously. At the middle of efficiency of the ADP2105/ADP2106/ADP2107 has two distinct an LX (switch) node transition, the power switch is providing all advantages. First, only a small amount of power is lost in the dc- the inductor current, while the source to drain voltage of the to-dc converter package that reduces thermal constraints. Second, power switch is half the input voltage, resulting in power loss. the high efficiency delivers the maximum output power for the Transition losses increase with load current and input voltage given input power, extending battery life in portable applications. and occur twice for each switching cycle. There are four major sources of power loss in dc-to-dc The amount of power loss can be calculated by converters like the ADP2105/ADP2106/ADP2107: V • Power switch conduction losses P = IN ×I ×(t +t )×f TRAN 2 OUT ON OFF SW • Inductor losses • Switching losses where tON and tOFF are the rise time and fall time of the LX • Transition losses (switch) node, and are both approximately 3 ns. THERMAL CONSIDERATIONS Power Switch Conduction Losses In most applications, the ADP2105/ADP2106/ADP2107 do not Power switch conduction losses are caused by the flow of output dissipate a lot of heat due to their high efficiency. However, in current through the P-channel power switch and the N-channel applications with high ambient temperature, low supply voltage, synchronous rectifier, which have internal resistances (R ) DS(ON) and high duty cycle, the heat dissipated in the package is large associated with them. The amount of power loss can be approxi- enough that it can cause the junction temperature of the die to mated by exceed the maximum junction temperature of 125°C. Once the PSW − COND = [RDS(ON) − P × D + RDS(ON) − N × (1 − D)] × IOUT2 junction temperature exceeds 140°C, the converter goes into where D = V /V . thermal shutdown. To prevent any permanent damage it recovers OUT IN only after the junction temperature has decreased below 100°C. The internal resistance of the power switches increases with Therefore, thermal analysis for the chosen application solution temperature but decreases with higher input voltage. Figure 20 is very important to guarantee reliable performance over all and Figure 21 show the change in R vs. input voltage, DS(ON) conditions. whereas Figure 29 and Figure 30 show the change in R vs. DS(ON) temperature for both power devices. The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the Inductor Losses package due to the power dissipation, as shown in the following Inductor conduction losses are caused by the flow of current equation: through the inductor, which has an internal resistance (DCR) T = T + T associated with it. Larger sized inductors have smaller DCR, J A R which can improve inductor conduction losses. where: T is the junction temperature. Inductor core losses are related to the magnetic permeability of J T is the ambient temperature. the core material. Because the ADP2105/ADP2106/ADP2107 A T is the rise in temperature of the package due to the power are high switching frequency dc-to-dc converters, shielded ferrite R dissipation in the package. core material is recommended for the low core losses and low EMI. The rise in temperature of the package is directly proportional The total amount of inductor power loss can be calculated by to the power dissipation in the package. The proportionality P = DCR × I 2 + Core Losses L OUT constant for this relationship is defined as the thermal resistance Switching Losses from the junction of the die to the ambient temperature, as shown in the following equation: Switching losses are associated with the current drawn by the driver to turn on and turn off the power devices at the T = θ × P R JA D switching frequency. Each time a power device gate is turned on where: and turned off, the driver transfers a charge ΔQ from the input T is the rise in temperature of the package. R supply to the gate and then from the gate to ground. P is the power dissipation in the package. D The amount of power loss can by calculated by θ is the thermal resistance from the junction of the die to the JA P = (C + C ) × V 2 × f ambient temperature of the package. SW GATE − P GATE − N IN SW where: (C + C ) ≈ 600 pF. GATE − P GATE − N f = 1.2 MHz, the switching frequency. SW Rev. E | Page 24 of 36

Data Sheet ADP2105/ADP2106/ADP2107 For example, in an application where the ADP2107(1.8 V) is The θ for the LFCSP package is 40°C/W, as shown in Table 3. JA used with an input voltage of 3.6 V, a load current of 2 A, and a Therefore, the rise in temperature of the package due to power maximum ambient temperature of 85°C, at a load current of 2 A, dissipation is the most significant contributor of power dissipation in the dc-to- T = θ × P = 40°C/W × 0.40 W = 16°C R JA D dc converter package is the conduction loss of the power switches. The junction temperature of the converter is Using the graph of switch on resistance vs. temperature (see Figure 30), as well as the equation of power loss given in the T = T + T = 85°C + 16°C = 101°C J A R Power Switch Conduction Losses section, the power dissipation Because the junction temperature of the converter is below the in the package can be calculated by the following: maximum junction temperature of 125°C, this application operates P = [R × D + R × (1 − D)] × I 2 = reliably from a thermal point of view. SW − COND DS(ON) − P DS(ON) − N OUT [109 mΩ × 0.5 + 90 mΩ × 0.5] × (2 A)2 ≈ 400 mW Rev. E | Page 25 of 36

ADP2105/ADP2106/ADP2107 Data Sheet DESIGN EXAMPLE Consider an application with the following specifications: 4. The closest standard inductor value is 2.2 μH. The maximum rms current of the inductor is to be greater than 1.2 A, and • Input Voltage = 3.6 V to 4.2 V. the saturation current of the inductor is to be greater than • Output Voltage = 2 V. 2 A. One inductor that meets these criteria is the LPS4012- • Typical Output Current = 600 mA. 2.2 μH from Coilcraft. • Maximum Output Current = 1.2 A. 5. Choose the output capacitor based on the transient response • Soft Start Time = 2 ms. requirements. The worst-case load transient is 1.2 A, for Overshoot ≤ 100 mV under all load transient conditions. which the overshoot must be less than 100 mV, which is 5% 1. Choose the dc-to-dc converter that satisfies the maximum of the output voltage. For a 1 A load transient, the overshoot output current requirement. Because the maximum output must be less than 4% of the output voltage, then from current for this application is 1.2 A, the ADP2106 with a Figure 39: maximum output current of 1.5 A is ideal for this Output Capacitor × Output Voltage = 60 μC application. 60μC 2. See whether the output voltage desired is available as a ⇒OutputCapacitor= ≈30μF fixed output voltage option. Because 2 V is not one of the 2.0V fixed output voltage options available, choose the adjustable Taking into account the loss of capacitance due to dc bias, as version of ADP2106. shown in Figure 40, two 22 μF X5R MLCC capacitors from 3. The first step in external component selection for an Murata (GRM21BR60J226M) are sufficient for this adjustable version converter is to calculate the resistance of application. the resistive voltage divider that sets the output voltage. 6. Because the ADP2106 is being used in this application, the V 0.8V input capacitors are 10 μF and 4.7 μF X5R Murata capacitors RBOT = I FB = 20μA =40kΩ (GRM21BR61A106K and GRM21BR61A475K). STRING 7. The input filter consists of a small 0.1 μF ceramic capacitor V −V  2V−0.8V placed between IN and AGND and a 10 Ω resistor placed RTOP =RBOT OUVTFB FB=40kΩ × 0.8V =60kΩ 8. bCehtowoeseen a I Nso fatn sdta PrtW caINpa1c.i tor of 2 nF to achieve a soft start Calculate the minimum inductor value as follows: time of 2 ms. For the ADP2106: 9. Calculate the compensation resistor and capacitor as L > (0.83 μH/V) × VOUT follows: ⇒ L > 0.83 μH/V × 2 V N⇒ex tL, c>a l1c.u66la tμeH th e ideal inductor value that sets the RCOMP =0.8(2Gπ)FGCROSS COVUTVOUT  = m CS REF inductor peak-to-peak current ripple (ΔI ) to 1/3 of the L  (2π)×80kHz 30μF×2V maximum load current at the maximum input voltage as 0.8  =215kΩ follows: 50μA/V×2.8125A/V 0.8V  2.5×V ×(V −V ) 2 2 L = OUT IN OUT μH= C = = =39pF IDEAL V ×I COMP πF R π×80kHz×215kΩ IN LOAD(MAX) CROSS COMP 2.5×2×(4.2−2) μH=2.18μH 4.2×1.2 Rev. E | Page 26 of 36

Data Sheet ADP2105/ADP2106/ADP2107 EXTERNAL COMPONENT RECOMMENDATIONS For popular output voltage options at 80 kHz crossover frequency with 10% overshoot for a 1 A load transient (refer to Figure 37 and Figure 38). Table 11. Recommended External Components Device V (V) C 1 (μF) C 1 (μF) C 2 (μF) L (μH) R (kΩ) C (pF) R 3 (kΩ) R 3 (kΩ) OUT IN1 IN2 OUT COMP COMP TOP BOT ADP2105 (ADJ) 0.9 4.7 4.7 22 + 10 2.0 135 82 5 40 ADP2105 (ADJ) 1.2 4.7 4.7 22 + 4.7 2.5 135 82 20 40 ADP2105 (ADJ) 1.5 4.7 4.7 10 + 10 3.0 135 82 35 40 ADP2105 (ADJ) 1.8 4.7 4.7 10 + 10 3.3 135 82 50 40 ADP2105 (ADJ) 2.5 4.7 4.7 10 + 4.7 3.6 135 82 85 40 ADP2105 (ADJ) 3.3 4.7 4.7 10 + 4.7 4.1 135 82 125 40 ADP2106 (ADJ) 0.9 4.7 10 22 + 10 1.5 90 100 5 40 ADP2106 (ADJ) 1.2 4.7 10 22 + 4.7 1.8 90 100 20 40 ADP2106 (ADJ) 1.5 4.7 10 10 + 10 2.0 90 100 35 40 ADP2106 (ADJ) 1.8 4.7 10 10 + 10 2.2 90 100 50 40 ADP2106 (ADJ) 2.5 4.7 10 10 + 4.7 2.5 90 100 85 40 ADP2106 (ADJ) 3.3 4.7 10 10 + 4.7 3.0 90 100 125 40 ADP2107 (ADJ) 0.9 10 10 22 + 10 1.2 70 120 5 40 ADP2107 (ADJ) 1.2 10 10 22 + 4.7 1.5 70 120 20 40 ADP2107 (ADJ) 1.5 10 10 10 + 10 1.5 70 120 35 40 ADP2107 (ADJ) 1.8 10 10 10 + 10 1.8 70 120 50 40 ADP2107 (ADJ) 2.5 10 10 10 + 4.7 1.8 70 120 85 40 ADP2107 (ADJ) 3.3 10 10 10 + 4.7 2.5 70 120 125 40 ADP2105-1.2 1.2 4.7 4.7 22 + 4.7 2.5 135 82 N/A N/A ADP2105-1.5 1.5 4.7 4.7 10 + 10 3.0 135 82 N/A N/A ADP2105-1.8 1.8 4.7 4.7 10 + 10 3.3 135 82 N/A N/A ADP2105-3.3 3.3 4.7 4.7 10 + 4.7 4.1 135 82 N/A N/A ADP2106-1.2 1.2 4.7 10 22 + 4.7 1.8 90 100 N/A N/A ADP2106-1.5 1.5 4.7 10 10 + 10 2.0 90 100 N/A N/A ADP2106-1.8 1.8 4.7 10 10 + 10 2.2 90 100 N/A N/A ADP2106-3.3 3.3 4.7 10 10 + 4.7 3.0 90 100 N/A N/A ADP2107-1.2 1.2 10 10 22 + 4.7 1.5 70 120 N/A N/A ADP2107-1.5 1.5 10 10 10 + 10 1.5 70 120 N/A N/A ADP2107-1.8 1.8 10 10 10 + 10 1.8 70 120 N/A N/A ADP2107-3.3 3.3 10 10 10 + 4.7 2.5 70 120 N/A N/A 1 4.7 μF 0805 X5R 10 V Murata—GRM21BR61A475KA73L. 10 μF 0805 X5R 10 V Murata—GRM21BR61A106KE19L. 2 4.7 μF 0805 X5R 10 V Murata—GRM21BR61A475KA73L. 10 μF 0805 X5R 10 V Murata—GRM21BR61A106KE19L. 22 μF 0805 X5R 6.3 V Murata—GRM21BR60J226ME39L. 3 0.5% accuracy resistor. Rev. E | Page 27 of 36

ADP2105/ADP2106/ADP2107 Data Sheet For popular output voltage options at 80 kHz crossover frequency with 5% overshoot for a 1 A load transient (refer to Figure 37 and Figure 38). Table 12. Recommended External Components Device V (V) C 1 (μF) C 1 (μF) C 2 (μF) L (μH) R (kΩ) C (pF) R 3 (kΩ) R 3(kΩ) OUT IN1 IN2 OUT COMP COMP TOP BOT ADP2105 (ADJ) 0.9 4.7 4.7 22 + 22 + 22 2.0 270 39 5 40 ADP2105 (ADJ) 1.2 4.7 4.7 22 + 22 + 4.7 2.5 270 39 20 40 ADP2105 (ADJ) 1.5 4.7 4.7 22 + 22 3.0 270 39 35 40 ADP2105 (ADJ) 1.8 4.7 4.7 22 + 22 3.3 270 39 50 40 ADP2105 (ADJ) 2.5 4.7 4.7 22 + 10 3.6 270 39 85 40 ADP2105 (ADJ) 3.3 4.7 4.7 22 + 4.7 4.1 270 39 125 40 ADP2106 (ADJ) 0.9 4.7 10 22 + 22 + 22 1.5 180 56 5 40 ADP2106 (ADJ) 1.2 4.7 10 22 + 22 + 4.7 1.8 180 56 20 40 ADP2106 (ADJ) 1.5 4.7 10 22 + 22 2.0 180 56 35 40 ADP2106 (ADJ) 1.8 4.7 10 22 + 22 2.2 180 56 50 40 ADP2106 (ADJ) 2.5 4.7 10 22 + 10 2.5 180 56 85 40 ADP2106 (ADJ) 3.3 4.7 10 22 + 4.7 3.0 180 56 125 40 ADP2107 (ADJ) 0.9 10 10 22 + 22 + 22 1.2 140 68 5 40 ADP2107 (ADJ) 1.2 10 10 22 + 22 + 4.7 1.5 140 68 20 40 ADP2107 (ADJ) 1.5 10 10 22 + 22 1.5 140 68 35 40 ADP2107 (ADJ) 1.8 10 10 22 + 22 1.8 140 68 50 40 ADP2107 (ADJ) 2.5 10 10 22 + 10 1.8 140 68 85 40 ADP2107 (ADJ) 3.3 10 10 22 + 4.7 2.5 140 68 125 40 ADP2105-1.2 1.2 4.7 4.7 22 + 22 + 4.7 2.5 270 39 N/A N/A ADP2105-1.5 1.5 4.7 4.7 22 + 22 3.0 270 39 N/A N/A ADP2105-1.8 1.8 4.7 4.7 22 + 22 3.3 270 39 N/A N/A ADP2105-3.3 3.3 4.7 4.7 22 + 4.7 4.1 270 39 N/A N/A ADP2106-1.2 1.2 4.7 10 22 + 22 + 4.7 1.8 180 56 N/A N/A ADP2106-1.5 1.5 4.7 10 22 + 22 2.0 180 56 N/A N/A ADP2106-1.8 1.8 4.7 10 22 + 22 2.2 180 56 N/A N/A ADP2106-3.3 3.3 4.7 10 22 + 4.7 3.0 180 56 N/A N/A ADP2107-1.2 1.2 10 10 22 + 22 + 4.7 1.5 140 68 N/A N/A ADP2107-1.5 1.5 10 10 22 + 22 1.5 140 68 N/A N/A ADP2107-1.8 1.8 10 10 22 + 22 1.8 140 68 N/A N/A ADP2107-3.3 3.3 10 10 22 + 4.7 2.5 140 68 N/A N/A 1 4.7μF 0805 X5R 10V Murata—GRM21BR61A475KA73L. 10μF 0805 X5R 10V Murata—GRM21BR61A106KE19L. 2 4.7μF 0805 X5R 10V Murata—GRM21BR61A475KA73L. 10μF 0805 X5R 10V Murata—GRM21BR61A106KE19L. 22μF 0805 X5R 6.3V Murata—GRM21BR60J226ME39L. 3 0.5% accuracy resistor. Rev. E | Page 28 of 36

Data Sheet ADP2105/ADP2106/ADP2107 CIRCUIT BOARD LAYOUT RECOMMENDATIONS Good circuit board layout is essential to obtaining the best • Make the high current path from the PGND pin through L performance from the ADP2105/ADP2106/ADP2107. Poor and C back to the PGND plane as short as possible. To OUT circuit layout degrades the output ripple, as well as the accomplish this, ensure that the PGND pin is tied to the electromagnetic interference (EMI) and electromagnetic PGND plane as close as possible to the input and output compatibility (EMC) performance. capacitors. Figure 54 and Figure 55 show the ideal circuit board layout for • The feedback resistor divider network is to be placed as the ADP2105/ADP2106/ADP2107 to achieve the highest close as possible to the FB pin to prevent noise pickup. The performance. Refer to the following guidelines if adjustments to length of trace connecting the top of the feedback resistor the suggested layout are needed: divider to the output is to be as short as possible while • Use separate analog and power ground planes. Connect the keeping away from the high current traces and the LX (switch) node that can lead to noise pickup. An analog ground reference of sensitive analog circuitry (such as ground plane is to be placed on either side of the FB trace compensation and output voltage divider components) to to reduce noise pickup. For the low fixed voltage options analog ground; connect the ground reference of power (1.2 V and 1.5 V), poor routing of the OUT_SENSE trace components (such as input and output capacitors) to power can lead to noise pickup, adversely affecting load regulation. ground. In addition, connect both the ground planes to the This can be fixed by placing a 1 nF bypass capacitor close to exposed pad of the ADP2105/ADP2106/ADP2107. the FB pin. • For each PWIN pin, place an input capacitor as close to the • The placement and routing of the compensation components PWIN pin as possible and connect the other end to the closest are critical for proper behavior of the ADP2105/ADP2106/ power ground plane. ADP2107. The compensation components are to be placed • Place the 0.1 μF, 10 Ω low-pass input filter between the IN as close to the COMP pin as possible. It is advisable to use pin and the PWIN1 pin, as close to the IN pin as possible. 0402-sized compensation components for closer placement, • Ensure that the high current loops are as short and as wide leading to smaller parasitics. Surround the compensation as possible. Make the high current path from C through components with an analog ground plane to prevent noise IN L, C , and the PGND plane back to C as short as possible. pickup. The metal layer under the compensation components OUT IN To accomplish this, ensure that the input and output is to be the analog ground plane. capacitors share a common PGND plane. Rev. E | Page 29 of 36

ADP2105/ADP2106/ADP2107 Data Sheet EVALUATION BOARD EVALUATION BOARD SCHEMATIC FOR ADP2107 (1.8 V) 0.C17µF 1R03Ω VCC INPUT VOLTAGE = 2.7V TO 5.5V VCC VIN C1 10µF1 OUT GND J1 U1 16 15 14 13 FB GND IN PWIN1 1 EN LX212 EN 100kRΩ2 2 GND ADP2107-1.8PGND 11 2Lµ1H2 OUTPUT VOLTAGE = 1.8V, 2A 1 2 3 GND LX110 VOUT VCC R4 C3 C4 4 GND PWIN2 9 OUT 0Ω 22µF1 22µF1 COMP SS AGND PADDLE NC C2 GND 10µF1 5 6 7 8 R5 NS R1 140kΩ C6 C5 1MURATA X5R 0805 68pF 1nF NC = NO CONNECT 2 212μ02μμHFF I::N GGDRRUMMCT2211OBBRRR D66106AJ22L120C66BMK TEEO3199KLLO 06079-044 Figure 53. Evaluation Board Schematic of the ADP2107-1.8 (Bold Traces are High Current Paths) RECOMMENDED PCB LAYOUT (EVALUATION BOARD LAYOUT) JUMPER TO ENABLE ENABLE VIN GROUND 100kΩ PULL-DOWN INPUT GROUND INPUT CAPACITOR CONNECT THE GROUND RETURN OF POWER GROUND ALL POWER COMPONENTS SUCH AS PLANE INPUT AND OUTPUT CAPACITORS TO THE POWER GROUND PLANE. PLACE THE FEEDBACK RESISTORSAS CLOSETO THE FB PINAS POSSIBLE. OUTPUT CAPACITOR RTOPRBOT CIN COUT LX OUTPUT ADP2105/ADP2106/ADP2107 PGND INDUCTOR (L) VOUT LX RCOMP CCOMP CIN COUT PLACE THE COMPENSATION CSS OUTPUT CAPACITOR COMPONENTS AS CLOSE TO THE COMP PIN AS POSSIBLE. ANALOG GROUND PLANE POWER GROUND CONNECT THE GROUND RETURN OFALL SENSITIVEANALOG CIRCUITRY SUCHAS COMPENSATIONAND OUTPUT VOLTAGE DIVIDERTO THEANALOG GROUND PLANE. INPUT CAPACITOR 06079-045 Figure 54. Recommended Layout of Top Layer of ADP2105/ADP2106/ADP2107 Rev. E | Page 30 of 36

Data Sheet ADP2105/ADP2106/ADP2107 ENABLE VIN GND GND ANALOG GROUND PLANE POWER GROUND PLANE INPUT VOLTAGE PLANE CONNECTING THE TWO PWIN PINSAS CLOSE AS POSSIBLE. CONNECT THE EXPOSEDPAD OF VIN VOUT THEADP2105/ADP2106/ADP2107 CONNECT THE PGND PIN TO A LARGE GROUND PLANETO TO THE POWER GROUND AID POWER DISSIPATION. PLANEAS CLOSETO THE ADP2105/ADP2106/ADP2107 AS POSSIBLE. FEEDBACK TRACE: THIS TRACE CONNECTS THETOP OF THE PRCLUEASRCIRSEET NITVTHE IT SVR OTARLCTAEACSGEEAA SDS IPVFOAIDSRESRAIBW OLANEY TT FOHR EPO RFMBE T VPHEINEN TTL OXN ONTIHOSEDE E OPAUICNTKPDUU HPT.I.GH 06079-046 Figure 55. Recommended Layout of Bottom Layer of ADP2105/ADP2106/ADP2107 Rev. E | Page 31 of 36

ADP2105/ADP2106/ADP2107 Data Sheet APPLICATION CIRCUITS 0.1μF 10Ω VIN INPUT VOLTAGE = 5V 10μF1 VOUT 16 15 14 13 ON FB GND IN PWIN1 OFF 1 EN LX212 2.5μH2 VOUT OUTPUT VOLTAGE = 3.3V 2 GND PGND 11 ADP2107-3.3 10μF1 4.7μF1 LOAD 3 GND LX110 0A TO 2A VIN 4 GND PWIN2 9 10μF1 1MURATA X5R 0805 COMP SS AGND NC 10μF: GRM21BR61A106KE19L 5 6 7 8 4.7μF: GRM21BR61A475KA73L 1nF 2SUMIDA CDRH5D28: 2.5μH 70kΩ NOTES 120pF 1. NC = NO CONNECT. 2 . ECFXOHTORE SARE N1NAA F LLO OCROA ADM P1T0OR%NA ENONSVTIEESRN SWTH.EOROET 06079-047 Figure 56. Application Circuit—VIN = 5 V, VOUT = 3.3 V, Load = 0 A to 2 A 0.1μF 10Ω VIN INPUT VOLTAGE = 3.6V 10μF1 VOUT 16 15 14 13 ON FB GND IN PWIN1 OFF 1 EN LX212 1.5μH2 VOUT OUTPUT VOLTAGE = 1.5V 2 GND PGND 11 ADP2107-1.5 22μF1 22μF1 LOAD 3 GND LX110 0A TO 2A VIN 4 GND PWIN2 9 10μF1 1MURATA X5R 0805 COMP SS AGND NC 10μF: GRM21BR61A106KE19L 5 6 7 8 22μF: GRM21BR60J226ME39L 2TOKO D62LCB OR COILCRAFT LPS4012 1nF 140kΩ NOTES 68pF 1. NC = NO CONNECT. 2 . ECFXOHTORE SARE N1NAA F LLO OCROA ADM P5T%OR NAOENVNSETIERSNS WTH.OEORET 06079-048 Figure 57. Application Circuit—VIN = 3.6 V, VOUT = 1.5 V, Load = 0 A to 2 A 0.1μF 10Ω VIN INPUT VOLTAGE = 2.7V TO 4.2V 4.7μF1 VOUT 16 15 14 13 ON FB GND IN PWIN1 OFF 1 EN LX212 2.7μH2 VOUT OUTPUT VOLTAGE = 1.8V 2 GND PGND 11 ADP2105-1.8 22μF1 22μF1 LOAD 3 GND LX110 0A TO 1A VIN 4 GND PWIN2 9 4.7μF1 1MURATA X5R 0805 COMP SS AGND NC 4.7μF: GRM21BR61A475KA73L 5 6 7 8 22μF: GRM21BR60J226ME39L 1nF 2TOKO 1098AS-DE2812: 2.7μH 270kΩ NOTES 39pF 1. NC = NO CONNECT. 2 . ECFXOHTORE SARE N1NAA F LLO OCROA ADM P5T%OR NAOENVNSETIERSNS WTH.OEORET 06079-049 Figure 58. Application Circuit—VIN = Li-Ion Battery, VOUT = 1.8 V, Load = 0 A to 1 A Rev. E | Page 32 of 36

Data Sheet ADP2105/ADP2106/ADP2107 0.1μF 10Ω VIN INPUT VOLTAGE = 2.7V TO 4.2V 4.7μF1 VOUT 16 15 14 13 ON FB GND IN PWIN1 OFF 1 EN LX212 2.4μH2 VOUT OUTPUT VOLTAGE = 1.2V 2 GND PGND 11 ADP2105-1.2 22μF1 4.7μF1 LOAD 3 GND LX110 0A TO 1A VIN 4 GND PWIN2 9 4.7μF1 1MURATA X5R 0805 COMP SS AGND NC 4.7μF: GRM21BR61A475KA73L 5 6 7 8 22μF: GRM21BR60J226ME39L 1nF 2TOKO 1069AS-DB3018HCT OR 135kΩ TOKO 1070AS-DB3020HCT 82pF NOTES 1. NC = NO CONNECT. 2 . ECFXOHTORE SARE N1NAA F LLO OCROA ADM P1T0OR%NA ENONSVTIEESRN SWTH.EOROET 06079-050 Figure 59. Application Circuit—VIN = Li-Ion Battery, VOUT = 1.2 V, Load = 0 A to 1 A 0.1μF 10Ω VIN INPUT VOLTAGE = 5V 10μF1 FB 16 15 14 13 ON FB GND IN PWIN1 OFF 1 EN LX212 2.5μH2 OUTPUT VOLTAGE = 2.5V 2 GND PGND 11 ADP2106-ADJ 85kΩ 10μF1 22μF1 LOAD 3 GND LX110 0A TO 1.5A FB VIN 4 GND PWIN2 9 40kΩ 4.7μF1 COMP SS AGND NC 5 6 7 8 1MURATA X5R 0805 1nF 180kΩ 4.7μF: GRM21BR61A475KA73L 10μF: GRM21BR61A106KE19L 56pF 22μF: GRM21BR60J226ME39L 2COILTRONICS SD14: 2.5μH NOTES 1. NC = NO CONNECT. 2 . ECFXOHTORE SARE N1NAA F LLO OCROA ADM P5T%OR NAOENVNSETIERSNS WTH.OEORET 06079-051 Figure 60. Application Circuit—VIN = 5 V, VOUT = 2.5 V, Load = 0 A to 1.5 A Rev. E | Page 33 of 36

ADP2105/ADP2106/ADP2107 Data Sheet OUTLINE DIMENSIONS 4.10 0.35 4.00 SQ 0.30 PIN 1 3.90 0.25 INDICATOR PIN 1 0.65 13 16 INDICATOR BSC 12 1 *2.40 EXPPAODSED 2.35 SQ 2.30 9 4 0.50 8 5 0.25 MIN TOP VIEW 0.40 BOTTOM VIEW 0.30 0.80 FOR PROPER CONNECTION OF 0.75 THE EXPOSED PAD, REFER TO 0.05 MAX THE PIN CONFIGURATION AND 0.70 0.02 NOM FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COPLANARITY SEATING 0.08 PKG-000000 PLANE *CWOITMHP ELIXACNETPTTOIOJNE D0T.EO2C0 T RSHETEFA ENXDPAORSDESD M POA-D2.20-WGGC-3 07-21-2015-B Figure 61. 16-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm × 4 mm Body and 0.75 mm Package Height (CP-16-20) Dimensions shown in millimeters ORDERING GUIDE Output Temperature Model1 Current Range Output Voltage Package Description Package Option ADP2105ACPZ-1.2-R7 1 A −40°C to +125°C 1.2 V 16-Lead LFCSP CP-16-20 ADP2105ACPZ-1.5-R7 1 A −40°C to +125°C 1.5 V 16-Lead LFCSP CP-16-20 ADP2105ACPZ-1.8-R7 1 A −40°C to +125°C 1.8 V 16-Lead LFCSP CP-16-20 ADP2105ACPZ-3.3-R7 1 A −40°C to +125°C 3.3 V 16-Lead LFCSP CP-16-20 ADP2105ACPZ-R7 1 A −40°C to +125°C ADJ 16-Lead LFCSP CP-16-20 ADP2106ACPZ-1.2-R7 1.5 A −40°C to +125°C 1.2 V 16-Lead LFCSP CP-16-20 ADP2106ACPZ-1.5-R7 1.5 A −40°C to +125°C 1.5 V 16-Lead LFCSP CP-16-20 ADP2106ACPZ-1.8-R7 1.5 A −40°C to +125°C 1.8 V 16-Lead LFCSP CP-16-20 ADP2106ACPZ-3.3-R7 1.5 A −40°C to +125°C 3.3 V 16-Lead LFCSP CP-16-20 ADP2106ACPZ-R7 1.5 A −40°C to +125°C ADJ 16-Lead LFCSP CP-16-20 ADP2107ACPZ-1.2-R7 2 A −40°C to +125°C 1.2 V 16-Lead LFCSP CP-16-20 ADP2107ACPZ-1.5-R7 2 A −40°C to +125°C 1.5 V 16-Lead LFCSP CP-16-20 ADP2107ACPZ-1.8-R7 2 A −40°C to +125°C 1.8 V 16-Lead LFCSP CP-16-20 ADP2107ACPZ-3.3-R7 2 A −40°C to +125°C 3.3 V 16-Lead LFCSP CP-16-20 ADP2107ACPZ-R7 2 A −40°C to +125°C ADJ 16-Lead LFCSP CP-16-20 ADP2105-1.8-EVALZ 1.8 V Evaluation Board ADP2105-EVALZ Adjustable, but set to 2.5 V Evaluation Board ADP2106-1.8-EVALZ 1.8 V Evaluation Board ADP2106-EVALZ Adjustable, but set to 2.5 V Evaluation Board ADP2107-1.8-EVALZ 1.8 V Evaluation Board ADP2107-EVALZ Adjustable, but set to 2.5 V Evaluation Board 1 Z = RoHS Compliant Part. Rev. E | Page 34 of 36

Data Sheet ADP2105/ADP2106/ADP2107 NOTES Rev. E | Page 35 of 36

ADP2105/ADP2106/ADP2107 Data Sheet NOTES ©2006–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06079-0-3/16(E) Rev. E | Page 36 of 36