500 mA, Low Dropout, CMOS Linear Regulator ADP1715/ADP1716 FEATURES TYPICAL APPLICATION CIRCUITS Maximum output current: 500 mA ADP1715 Input voltage range: 2.5 V to 5.5 V Low shutdown current: <1 μA 1 EN GND 8 Low dropout voltage: VIN = 5V 2 IN GND 7 2.2µF 3 OUT GND 6 250 mV @ 500 mA load Ini5ti0a lm aVcc @ur 1a0c0y :m ±1A% lo ad VOUT = 3.3V 2.2µF 140nFSS GND 5 06110-001 Accuracy over line, load, and temperature: ±3% Figure 1. ADP1715 with Fixed Output Voltage, 3.3 V 16 fixed output voltage options with soft start: 0.75 V to 3.3 V (ADP1715) ADP1715 ADJUSTABLE Adjustable output voltage option: 0.8 V to 5.0 V 1 EN GND 8 (ADP1715 Adjustable) VIN = 5V 2 IN GND 7 16 fixed output voltage options with tracking: 2.2µF 3 OUT GND 6 0.75 V to 3.3 V (ADP1716) VOUT = 0.8(1 + R1/R2) R1 4 ADJ GND 5 SExtacbelllee wnti tlho asdm/alilnl e2 .t2ra μnFs cieenrat mreiscp oountspeu t capacitor 2.2µF R2 06110-002 Current limit and thermal overload protection Figure 2. ADP1715 with Adjustable Output Voltage, 0.8 V to 5.0 V Logic controlled enable 8-lead thermally enhanced MSOP package ADP1716 VOUT (V) APPLICATIONS 1 EN GND 8 3 Notebook computers VIN = 5V 2 IN GND 7 2 2.2µF 3 OUT GND 6 Memory components Telecommunications equipment VOUT 4 TRK GND 5 1 Network equipment 2.2µF VTRK = 0VTO 5V 0 1 V2TRK3 (V4) 5 06110-003 DSP/FPGA/μP supplies Figure 3. ADP1716 with Output Voltage Tracking Instrumentation equipment/data acquisition systems GENERAL DESCRIPTION between 0.75 V and 3.3 V; the adjustable output voltage can The ADP1715/ADP1716 are low dropout, CMOS linear be set to any value between 0.8 V and 5.0 V by an external regulators that operate from 2.5 V to 5.5 V and provide up to voltage divider connected from OUT to ADJ. The variable 500 mA of output current. Using an advanced proprietary soft start uses an external capacitor at SS to control the architecture, they provide high power supply rejection and output voltage ramp. Tracking limits the output voltage to achieve excellent line and load transient response with just a the at-or-below voltage at the TRK pin. small 2.2 μF ceramic output capacitor. The ADP1715/ADP1716 are available in 8-lead thermally Three versions of this part are available, one with fixed enhanced MSOP packages, making them not only a very output voltage options and variable soft start (ADP1715), compact solution but also providing excellent thermal one with adjustable output voltage and fixed soft start performance for applications requiring up to 500 mA of output (ADP1715 Adjustable), and one with voltage tracking in current in a small, low profile footprint. fixed output voltage options (ADP1716). The fixed output voltage options are internally set to one of sixteen values Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.

ADP1715/ADP1716 TABLE OF CONTENTS Features..............................................................................................1 Track Mode (ADP1716)............................................................11 Applications.......................................................................................1 Enable Feature............................................................................11 Typical Application Circuits............................................................1 Application Information................................................................12 General Description.........................................................................1 Capacitor Selection....................................................................12 Revision History...............................................................................2 Current Limit and Thermal Overload Protection.................12 Specifications.....................................................................................3 Thermal Considerations............................................................12 Absolute Maximum Ratings............................................................4 Printed Circuit Board Layout Considerations.......................15 Thermal Resistance......................................................................4 Outline Dimensions.......................................................................16 ESD Caution..................................................................................4 Ordering Guide..........................................................................17 Pin Configurations and Function Descriptions...........................5 Typical Performance Characteristics.............................................6 Theory of Operation......................................................................10 Soft-Start Function (ADP1715)................................................10 Adjustable Output Voltage (ADP1715 Adjustable)...............11 REVISION HISTORY 9/06—Rev. 0: Initial Version Rev. 0 | Page 2 of 20

ADP1715/ADP1716 SPECIFICATIONS V = (V + 0.5 V) or 2.5 V (whichever is greater), I = 10 mA, C = C = 2.2 μF, T = 25°C, unless otherwise noted. IN OUT OUT IN OUT A Table 1. Parameter Symbol Conditions Min Typ Max Unit INPUT VOLTAGE RANGE VIN TJ = –40°C to +125°C 2.5 5.5 V OPERATING SUPPLY CURRENT IGND IOUT = 100 μA 65 μA IOUT = 100 μA, TJ = –40°C to +125°C 100 μA IOUT = 100 mA 160 μA IOUT = 100 mA, TJ = –40°C to +125°C 220 μA 100 μA < IOUT < 500 mA, TJ = –40°C to +125°C 650 μA SHUTDOWN CURRENT IGND-SD EN = GND 0.1 μA EN = GND, TJ = –40°C to +125°C 1.0 μA FIXED OUTPUT VOLTAGE ACCURACY VOUT IOUT = 10 mA –1 +1 % (ADP1715 and ADP1716 ONLY) IOUT = 10 mA to 500 mA –2 +2 % 100 μA < IOUT < 500 mA, TJ = –40°C to +125°C –3 +3 % ADJUSTABLE OUTPUT VOLTAGE VOUT IOUT = 10 mA 0.792 0.8 0.808 V ACCURACY (ADP1715 ADJUSTABLE)1 IOUT = 10 mA to 500 mA 0.784 0.816 V 100 μA < IOUT < 500 mA, TJ = –40°C to +125°C 0.776 0.824 V LINE REGULATION ∆VOUT/∆VIN VIN = (VOUT + 0.5 V) to 5.5 V, TJ = –40°C to +125°C –0.15 +0.15 %/V LOAD REGULATION2 ∆VOUT/∆IOUT IOUT = 10 mA to 500 mA 0.002 %/mA IOUT = 10 mA to 500 mA, TJ = –40°C to +125°C 0.004 %/mA DROPOUT VOLTAGE3 VDROPOUT IOUT = 100 mA, VOUT ≥ 3.3 V 50 mV IOUT = 100 mA, VOUT ≥ 3.3 V, TJ = –40°C to +125°C 100 mV IOUT = 500 mA, VOUT ≥ 3.3 V 250 300 mV IOUT = 500 mA, VOUT ≥ 3.3 V, TJ = –40°C to +125°C 400 mV IOUT = 100 mA, 2.5 V ≤ VOUT < 3.3 V 60 mV IOUT = 100 mA, 2.5 V ≤ VOUT < 3.3 V, TJ = –40°C to +125°C 100 mV IOUT = 500 mA, 2.5 V ≤ VOUT < 3.3 V 320 400 mV IOUT = 500 mA, 2.5 V ≤ VOUT < 3.3 V, TJ = –40°C to +125°C 500 mV START-UP TIME4 TSTART-UP ADP1715 Adjustable and ADP1716 100 μs ADP1715 with External Soft Start CSS = 10 nF 7.3 ms CURRENT LIMIT THRESHOLD5 ILIMIT 550 750 1200 mA THERMAL SHUTDOWN THRESHOLD TSSD TJ rising 150 °C THERMAL SHUTDOWN HYSTERESIS TSSD-HYS 15 °C SOFT-START SOURCE CURRENT SSI-SOURCE SS = GND 0.7 1.2 1.7 μA (ADP1715 WITH EXTERNAL SOFT START) VOUT to VTRK ACCURACY VTRK-ERROR 0 V ≤ VTRK ≤ (0.5 × VOUT(NOM)), VOUT(NOM) ≤ 1.8 V, TJ = –40°C to +125°C –50 +50 mV (ADP1716) 0 V ≤ VTRK ≤ (0.5 × VOUT(NOM)), VOUT(NOM) > 1.8 V, TJ = –40°C to +125°C –100 +100 mV EN INPUT LOGIC HIGH VIH 2.5 V ≤ VIN ≤ 5.5 V 1.8 V EN INPUT LOGIC LOW VIL 2.5 V ≤ VIN ≤ 5.5 V 0.4 V EN INPUT LEAKAGE CURRENT VI-LEAKAGE EN = IN or GND 0.1 1 μA ADJ INPUT BIAS CURRENT ADJI-BIAS 30 100 nA (ADP1715 ADJUSTABLE) OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, VOUT = 0.75 V 125 μVrms 10 Hz to 100 kHz, VOUT = 3.3 V 450 μVrms POWER SUPPLY REJECTION RATIO PSRR 1 kHz, VOUT = 0.75 V 67 dB 1 kHz, VOUT = 3.3 V 53 dB 1 Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of resistors used. 2 Based on an end-point calculation using 10 mA and 500 mA loads. See Figure 8 for typical load regulation performance for loads less than 10 mA. 3 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.5 V. 4 Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value. 5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V. Rev. 0 | Page 3 of 20

ADP1715/ADP1716 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Rating θJA is specified for the worst-case conditions, that is, a device IN to GND –0.3 V to +6 V soldered in a circuit board for surface-mount packages. OUT to GND –0.3 V to IN EN to GND –0.3 V to +6 V Table 3. Thermal Resistance SS/ADJ/TRK to GND –0.3 V to +6 V Package Type θJA Unit Storage Temperature Range –65°C to +150°C 8-Lead MSOP 118 °C/W Operating Junction Temperature Range –40°C to +125°C Soldering Conditions JEDEC J-STD-020 ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 20

ADP1715/ADP1716 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS EN 1 8 GND EN 1 8 GND EN 1 8 GND ADP1715 ADP1715 IN 2 FIXED 7 GND IN 2 ADJUSTABLE 7 GND IN 2 ADP1716 7 GND OSUST 34 (NToOt Pto V SIEcaWle) 65 GGNNDD 06110-004 OAUDTJ 34 (NToOt Pto V SIEcaWle) 65 GGNNDD 06110-005 OTRUKT 34 (NToOt Pto V SIEcaWle) 65 GGNNDD 06110-006 Figure 4. 8-Lead MSOP (RM-Suffix) Figure 5. 8-Lead MSOP (RM-Suffix) Figure 6. 8-Lead MSOP (RM-Suffix) Table 4. Pin Function Descriptions ADP1715 ADP1715 Fixed Adjustable ADP1716 Pin No. Pin No. Pin No. Mnemonic Description 1 1 1 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. 2 2 2 IN Regulator Input Supply. Bypass IN to GND with a 2.2 μF or greater capacitor. 3 3 3 OUT Regulated Output Voltage. Bypass OUT to GND with a 2.2 μF or greater capacitor. 4 SS Soft Start. A capacitor connected to this pin determines the soft-start time. 4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 4 TRK Track. The output will follow the voltage placed on the TRK pin. (See the Theory of Operation section for a more detailed description.) 5, 6, 7, 8 5, 6, 7, 8 5, 6, 7, 8 GND Ground. Rev. 0 | Page 5 of 20

ADP1715/ADP1716 TYPICAL PERFORMANCE CHARACTERISTICS V = 3.8 V, I = 10 mA, C = 2.2 μF, C = 2.2 μF, T = 25°C, unless otherwise noted. IN OUT IN OUT A 3.364 500 3.354 450 3.344 3.334 400 ILOAD = 500mA (V)OUT 3333....233390124444 ILOAD = 100µA ILOAD = 10mA ILOAD = 100mA (µA)ND 332505000 ILOAD = 3I6L0OmADA = 250mA V G 3.284 I 200 ILOAD = 100mA 3.274 ILOAD = 500mA 150 3.264 ILOAD = 360mA 100 ILOAD = 10mA 3.254 33..223444 ILOAD = 250mA 06110-007 500 ILOAD = 100µA 06110-010 –40 –5 25 85 125 –40 –5 25 85 125 TJ (°C) TJ (°C) Figure 7. Output Voltage vs. Junction Temperature Figure 10. Ground Current vs. Junction Temperature 3.325 500 450 3.315 400 350 3.305 300 V) A) (UT 3.295 (µD 250 O N V G I 200 3.285 150 100 3.275 3.265 06110-008 5000 06110-011 0.1 1 10 100 1000 0.1 1 10 100 1000 ILOAD (mA) ILOAD (mA) Figure 8. Output Voltage vs. Load Current Figure 11. Ground Current vs. Load Current 3.325 600 3.315 500 ILOAD = 100µA 3.305 400 ILOAD = 500mA V (V)OUT 3.295 ILOAD = 1I0LmOAAD = 100mA (µA)GND 300 ILOADI L=O 3A6D0 m= A250mA ILOAD = 250mA I 3.285 200 ILOAD = 100mA 3.275 ILOAD = 500mA ILOAD = 360mA 100 ILOAD = 10mA 3.265 06110-009 0 ILOAD = 100µA 06110-012 3.3 3.8 4.3 4.8 5.3 3.3 3.8 4.3 4.8 5.3 VIN (V) VIN (V) Figure 9. Output Voltage vs. Input Voltage Figure 12. Ground Current vs. Input Voltage Rev. 0 | Page 6 of 20

ADP1715/ADP1716 350 300 mV) 250 5V/DIV 1 SOWUTITPCUHT SLIOGANDA LF RTOOM C H25AmNAG ETO 475mA (UT 200 O P O 150 R VD DIV VOUT 100 V/ 2 m 0 5 5000.1 1 10 100 100006110-013 VCVCIOIONNUU ==TT 52==V. 232µ..32FVµF 06110-034 ILOAD (mA) TIME (10µs/DIV) Figure 13. Dropout Voltage vs. Load Current Figure 16. Load Transient Response 3.35 3.30 3.25 V 3.20 5V/DI 1 SOWUTITPCUHT SLIOGANDA LF RTOOM C H25AmNAG ETO 475mA V) (UT 3.15 O V 3.10 ILOAD = 100µA DIV VOUT 3.05 IILLOOAADD == 11000mmAA 50mV/ 2 ILOAD = 250mA 23..90503.2 3.3 IILL3OO.4AADD == 356000mmAA 3.5 3.606110-014 VCVCIOIONNUU ==TT 5=2=V2 32µ.2F3µVF 06110-035 VIN (V) TIME (10µs/DIV) Figure 14. Output Voltage vs. Input Voltage (in Dropout) Figure 17. Load Transient Response 700 ILOAD = 600 500mA 500 ILOAD = 360mA VIN STEP FROM 4V TO 5V I (µA)GND 430000 ILOAD = I2L5O0AmDA = 2V/DIV 1 VOUT 100mA 200 ILOAD = V/DIV 2 10003.20 IL1O30.A02Dµ5 A= 3.3010mA3.35 3.40 3.45 3.50 3.55 3.6006110-015 20m VCVCILIOIOONNUUA ==TTD 52===V. 2325µ..032F0VµmFA 06110-036 VIN (V) TIME (100µs/DIV) Figure 15. Ground Current vs. Input Voltage (in Dropout) Figure 18. Line Transient Response Rev. 0 | Page 7 of 20

ADP1715/ADP1716 18 0 VRIPPLE = 50mV p-p 16 –10 VIN = 5V VOUT = 0.75V 14 –20 COUT = 2.2µF ILOAD = 10mA ms) 12 –30 MP-UP TIME ( 108 PSRR (dB) –––456000 A 6 R –70 4 –80 02 06110-018 –1–0900 06110-020 0 5 10 15 20 25 10 100 1k 10k 100k 1M 10M CSS (nF) FREQUENCY (Hz) Figure 19. Output Voltage Ramp-Up Time vs. Soft-Start Capacitor Value Figure 21. Power Supply Rejection Ratio vs. Frequency 0 0 VRIPPLE = 50mV p-p VRIPPLE = 50mV p-p –10 VIN = 5V –10 VIN = 5V VOUT = 0.75V VOUT = 0.75V –20 COUT = 2.2µF –20 COUT = 2.2µF ILOAD = 100µA ILOAD = 100mA –30 –30 B) –40 B) –40 d d R ( –50 R ( –50 R R S S P –60 P –60 –70 –70 –80 –80 –1–0900 06110-037 –1–0900 06110-038 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. Power Supply Rejection Ratio vs. Frequency Figure 22. Power Supply Rejection Ratio vs. Frequency Rev. 0 | Page 8 of 20

ADP1715/ADP1716 0 0 VRIPPLE = 50mV p-p VRIPPLE = 50mV p-p –10 VIN = 5V –10 VIN = 5V VOUT = 3.3V VOUT = 3.3V –20 CILOOUATD == 21.020µµFA –20 CILOOUATD == 21.020µmFA –30 –30 dB) –40 dB) –40 R ( R ( SR –50 SR –50 P P –60 –60 –70 –70 ––8900 06110-039 ––8900 06110-040 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. Power Supply Rejection Ratio vs. Frequency Figure 25. Power Supply Rejection Ratio vs. Frequency 0 VRIPPLE = 50mV p-p –10 VIN = 5V VOUT = 3.3V –20 CILOOUATD == 21.02mµFA –30 dB) –40 R ( SR –50 P –60 –70 ––8900 06110-019 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 24. Power Supply Rejection Ratio vs. Frequency Rev. 0 | Page 9 of 20

ADP1715/ADP1716 THEORY OF OPERATION connect a small ceramic capacitor from SS to GND. Upon The ADP1715/ADP1716 are low dropout, CMOS linear startup, a 1.2 μA current source charges this capacitor. The regulators that use an advanced, proprietary architecture to ADP1715 start-up output voltage is limited by the voltage at SS, provide high power supply rejection ratio (PSRR) and excellent providing a smooth ramp up to the nominal output voltage. The line and load transient response with just a small 2.2 μF ceramic soft-start time is calculated by output capacitor. Both devices operate from a 2.5 V to 5.5 V input rail and provide up to 500 mA of output current. Supply T = V ×(C /I ) (1) SS REF SS SS current in shutdown mode is typically 100 nA. where: T is the soft-start period. SS IN OUT V is the 0.8 V reference voltage. REF C is the soft-start capacitance from SS to GND. SS I is the current sourced from SS (1.2 μA). SS CURRENT LIMIT THERMAL PROTECT When the ADP1715 is disabled (using EN), the soft-start capacitor is discharged to GND through an internal 100 Ω resistor. SHUTDOWN SS/ ADJ/ EN REFERENCE SOFT TRK EN START GND 06110-021 Figure 26. Internal Block Diagram V V/DI 1 Internally, the ADP1715/ADP1716 consist of a reference, an 2 error amplifier, a feedback voltage divider, and a PMOS pass OUT transistor. Output current is delivered via the PMOS pass VIN = 5V device, which is controlled by the error amplifier. The error V VOUT = 3.3V avmoltpalgifei efrr ocmom tphea roeus ttphuet r aenfedr eanmcpe lvifoieltsa tghee w diitfhfe trheen cfeee. dIfb tahcek 1V/DI 2 ICCLOSOSUA TD= ==2 225n.02F0µmFA 06110-041 feedback voltage is lower than the reference voltage, the gate of TIME (4ms/DIV) Figure 27. OUT Ramp-Up with External Soft-Start Capacitor the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is The ADP1715 adjustable version and the ADP1716 have no higher than the reference voltage, the gate of the PMOS device pins for soft start, so the function is switched to an internal soft- is pulled higher, allowing less current to pass and decreasing the start capacitor. This sets the soft-start ramp-up period to output voltage. approximately 24 μs. For the worst-case output voltage of 5 V, using the suggested 2.2 μF output capacitor, the resulting input The ADP1715 is available in two versions, one with fixed output inrush current is approximately 460 mA, which is less than the voltage options and one with an adjustable output voltage. The maximum 500 mA load current. fixed output voltage options are set internally to one of sixteen values between 0.75 V and 3.3 V, using an internal feedback network. The adjustable output voltage can be set to between 0.8 V and 5.0 V by an external voltage divider connected from EN OUT to ADJ. The fixed output version of ADP1715 allows for connection of an external soft-start capacitor, which controls the output voltage ramp during startup. The ADP1716 features V a track pin and is available with fixed output voltage options. All V/DI 1 devices are controlled by an enable pin (EN). 2 SOFT-START FUNCTION (ADP1715) Fpsoorfortv asiptdaperslti caisa p tuirosoengfsru atlhm faomtr rareebqdlueu iscroien fatg- csiotnanrruttr sfohul lnceucdtr isrotenanr.t t Puurppo,o gtnhra esm tAamrDtuaPbp1l e7a 1n5d 1V/DIV 2 OUT IVVCLIOOONUUA=TTD5===V121..062mVµFA 06110-042 TIME(20µs/DIV) for providing voltage sequencing. To implement soft start, Figure 28. OUT Ramp-Up with Internal Soft-Start Rev. 0 | Page 10 of 20

ADP1715/ADP1716 ADJUSTABLE OUTPUT VOLTAGE ENABLE FEATURE (ADP1715 ADJUSTABLE) The ADP1715/ADP1716 use the EN pin to enable and disable The ADP1715 adjustable version can have its output voltage the OUT pin under normal operating conditions. As shown in set over a 0.8 V to 5.0 V range. The output voltage is set by Figure 30, when a rising voltage on EN crosses the active connecting a resistive voltage divider from OUT to ADJ. The threshold, OUT turns on. When a falling voltage on EN crosses output voltage is calculated using the equation the inactive threshold, OUT turns off. V = 0.8 V (1 + R1/R2) (2) OUT where: R1 is the resistor from OUT to ADJ. R2 is the resistor from ADJ to GND. V) EN The maximum bias current into ADJ is 100 nA, so for less V/DI m than 0.5% error due to the bias current, use values less than 0 0 60 kΩ for R2. H2 (5 1 OUT C TRACK MODE (ADP1716) CH1, VVIONU =T 5=V 1.6V TFihgeu rAeD 2P9,1 i7f1 t6h ein vcolultdagese aa ptrpalciekdin agt tmhoe dTeR fKea ptuinre i.s A less ssh tohwann tihne CILOOUATD == 21.02mµFA 06110-043 TIME (1ms/DIV) nominal output voltage, OUT is equal to the voltage at TRK. Figure 30. ADP1715 Adjustable Typical EN Pin Operation Otherwise, OUT regulates to its nominal output value. 4 As can be seen, the EN pin has hysteresis built in. This prevents on/off oscillations that can occur due to noise on the EN pin as it passes through the threshold points. 3 The EN pin active/inactive thresholds are derived from the IN V) voltage. Therefore, these thresholds vary with changing input (UT 2 voltage. Figure 31 shows typical EN active/inactive thresholds O V when the input voltage varies from 2.5 V to 5.5 V. 1.4 1 1.3 0 06110-047 DS (V) 1.2 EN ACTIVE 0 1 2 3 4 5 L 1.1 O VTRK (V) ESH 1.0 HYSTERESIS R Figure 29. ADP1716 Output Voltage vs. Tracking Voltage H with Nominal Output Voltage Set to 3 V N T 0.9 E AL 0.8 For example, consider an ADP1716 with a nominal output PIC voltage of 3 V. If the voltage applied to its TRK pin is greater TY 0.7 EN INACTIVE tthhea nv o3l tVa,g Oe UapTp lmieadi ntota TinRsK a inso rmedinucael do ubtepluotw v 3o lVta, gOe UofT 3 t rVa.c Ikf s 00..56 06110-044 this voltage. OUT can track the TRK pin voltage from the 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 nominal value all the way down to 0 V. A voltage divider is VIN (V) Figure 31. Typical EN Pin Thresholds vs. Input Voltage present from TRK to the error amplifier input with a divider ratio equal to the divider from OUT to the error amplifier. This sets the output voltage equal to the tracking voltage. Both divider ratios are set by post-package trim, depending on the desired output voltage. Rev. 0 | Page 11 of 20

ADP1715/ADP1716 APPLICATION INFORMATION CAPACITOR SELECTION Input and Output Capacitor Properties Output Capacitor Any good quality ceramic capacitors can be used with the The ADP1715/ADP1716 are designed for operation with small, ADP1715/ADP1716, as long as they meet the minimum space-saving ceramic capacitors, but they will function with most capacitance and maximum ESR requirements. Ceramic commonly used capacitors as long as care is taken about the capacitors are manufactured with a variety of dielectrics, each effective series resistance (ESR) value. The ESR of the output with different behavior over temperature and applied voltage. capacitor affects stability of the LDO control loop. A minimum of Capacitors must have a dielectric adequate to ensure the 2.2 μF capacitance with an ESR of 500 mΩ or less is recommended minimum capacitance over the necessary temperature range to ensure stability of the ADP1715/ADP1716. Transient response and dc bias conditions. X5R or X7R dielectrics with a voltage to changes in load current is also affected by output capacitance. rating of 6.3 V or 10 V are recommended. Y5V and Z5U Using a larger value of output capacitance improves the transient dielectrics are not recommended, due to their poor temperature response of the ADP1715/ADP1716 to large changes in load and dc bias characteristics. current. Figure 32 and Figure 33 show the transient responses for CURRENT LIMIT AND THERMAL OVERLOAD output capacitance values of 2.2 μF and 22 μF. PROTECTION The ADP1715/ADP1716 are protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP1715/ADP1716 are designed to SWITCH SIGNAL TO CHANGE OUTPUT LOAD FROM 25mA TO 475mA current limit when the output load reaches 750 mA (typical). When the output load exceeds 750 mA, the output voltage is V DI 2V/ 1 reduced to maintain a constant current limit. V 2 Thermal overload protection is included, which limits the DI V/ junction temperature to a maximum of 150°C (typical). Under 20m VOUT VIN = 5V extreme conditions (that is, high ambient temperature and CVCOIONUU =TT =2=. 232µ..32FVµF 06110-045 paboowveer 1d5i0ss°iCp,a ttihoen o) uwtphuent i tsh teu rjunnedct oiofnf, treemdupceirnagt uthree sotuartptsu tto rise TIME (2µs/DIV) current to zero. When the junction temperature drops below Figure 32. Output Transient Response 135°C, the output is turned on again and output current is restored to its nominal value. Consider the case where a hard short from OUT to ground occurs. At first the ADP1715/ADP1716 will current limit, so SWITCH SIGNAL TO CHANGE that only 750 mA is conducted into the short. If self heating of OUTPUT LOAD FROM 25mA TO 475mA the junction is great enough to cause its temperature to rise DIV above 150°C, thermal shutdown will activate, turning off the 2V/ 1 output and reducing the output current to zero. As the junction temperature cools and drops below 135°C, the output V 2 V/DI turns on and conducts 750 mA into the short, again causing 0m VOUT the junction temperature to rise above 150°C. This thermal 2 VIN = 5V VOUT = 3.3V oscillation between 135°C and 150°C causes a current CCIONU =T 2=2 2µ2FµF 06110-046 oass ctihllea tsihoonr tb reetmweaeinns 7 a5t0 t hmeA o uatnpdu 0t. mA that continues as long TIME (2µs/DIV) Figure 33. Output Transient Response Current and thermal limit protections are intended to protect Input Bypass Capacitor the device against accidental overload conditions. For reliable operation, device power dissipation should be externally limited Connecting a 2.2 μF capacitor from the IN pin to GND reduces so junction temperatures do not exceed 125°C. the circuit sensitivity to printed circuit board (PCB) layout, especially when long input traces, or high source impedance, is THERMAL CONSIDERATIONS encountered. If greater than 2.2 μF of output capacitance is To guarantee reliable operation, the junction temperature of the required, the input capacitor should be increased to match it. ADP1715/ADP1716 should not exceed 125°C. To ensure the junction temperature stays below this maximum value, the user Rev. 0 | Page 12 of 20

ADP1715/ADP1716 should be aware of the parameters that contribute to junction 140 DO NOT OPERATE ABOVE THIS POINT temperature changes. These parameters include ambient 120 temperature, power dissipation in the power device, and thermal MAX TJ resistances between the junction and ambient air (θJA). The θJA 100 number is dependent on the package assembly compounds used and the amount of copper to which the GND pins of the package C) 80 are soldered to on the PCB. Table 5 shows typical θJA values of the T (°J 60 8-lead thermally enhanced MSOP package for various PCB copper sizes. 40 Table 5. 20 Copper Size (mm2) θJA (°C/W) 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-022 01 118 0 1 2 3 4 5 100 99 VIN – VOUT (V) 300 77 Figure 34. 700 mm2 of PCB Copper, TA = 25°C 500 75 140 700 74 DO NOT OPERATE ABOVE THIS POINT 1 Device soldered to minimum size pin traces. 120 MAX TJ 100 The junction temperature of the ADP1715/ADP1716 can be calculated from the following equation: 80 C) TJ = TA + (PD × θJA) (3) T (°J 60 where: 40 T is the ambient temperature. A PD is PthD e= p [o(wVeINr –d iVssOiUpTa)t ×io InL OinAD t]h +e (dVieIN, g×i vIeGnND b) y (4) 200 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-023 0 1 2 3 4 5 where: VIN – VOUT (V) Figure 35. 300 mm2 of PCB Copper, TA = 25°C I is the load current. LOAD 140 I is ground current. GND DO NOT OPERATE ABOVE THIS POINT V and V are input and output voltages, respectively. IN OUT 120 MAX TJ Power dissipation due to ground current is quite small and can 100 be ignored. Therefore, the junction temperature equation simplifies to the following: 80 C) TJ = TA + {[(VIN – VOUT) × ILOAD] × θJA} (5) T (°J 60 As shown in Equation 5, for a given ambient temperature, input 40 to output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to 20 efonlslouwrei nthge f ijguunrcetsio snh otewm jupenrcattiuorne t demoepse nroattu rries ec aalbcouvlea t1io2n5s° Cfo. rT he 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-024 0 1 2 3 4 5 different ambient temperatures, load currents, V to V IN OUT VIN – VOUT (V) differentials, and areas of PCB copper. Figure 36. 100 mm2 of PCB Copper, TA = 25°C Rev. 0 | Page 13 of 20

ADP1715/ADP1716 140 140 DO NOT OPERATE ABOVE THIS POINT DO NOT OPERATE ABOVE THIS POINT 120 120 MAX TJ MAX TJ 100 100 80 80 C) C) T (°J 60 T (°J 60 40 40 20 20 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-025 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-028 0 1 2 3 4 5 0 1 2 3 4 5 VIN – VOUT (V) VIN – VOUT (V) Figure 37. 0 mm2 of PCB Copper, TA = 25°C Figure 40. 100 mm2 of PCB Copper, TA = 50°C 140 140 DO NOT OPERATE ABOVE THIS POINT DO NOT OPERATE ABOVE THIS POINT 120 120 MAX TJ MAX TJ 100 100 80 80 C) C) T (°J 60 T (°J 60 40 40 20 20 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-026 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-029 0 1 2 3 4 5 0 1 2 3 4 5 VIN – VOUT (V) VIN – VOUT (V) Figure 38. 700 mm2 of PCB Copper, TA = 50°C Figure 41. 0 mm2 of PCB Copper, TA = 50°C 140 140 DO NOT OPERATE ABOVE THIS POINT DO NOT OPERATE ABOVE THIS POINT 120 120 MAX TJ MAX TJ 100 100 80 80 C) C) T (°J 60 T (°J 60 40 40 20 20 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-027 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-030 0 1 2 3 4 5 0 1 2 3 4 5 VIN – VOUT (V) VIN – VOUT (V) Figure 39. 300 mm2 of PCB Copper, TA = 50°C Figure 42. 700 mm2 of PCB Copper, TA = 85°C Rev. 0 | Page 14 of 20

ADP1715/ADP1716 140 PRINTED CIRCUIT BOARD LAYOUT DO NOT OPERATE ABOVE THIS POINT CONSIDERATIONS 120 MAX TJ The 8-lead MSOP package has the four GND pins fused together 100 internally, which enhances its thermal characteristics. Heat dissipation from the package is increased by connecting as much 80 C) copper as possible to the four GND pins of the ADP1715/ T (°J 60 ADP1716. From Table 5 it can be seen that a point of diminishing returns eventually is reached, beyond which an 40 increase in the copper size does not yield additional heat dissipation benefits. 20 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-031 Figure 46 shows a typical layout for the ADP1715/ADP1716. 0 1 2 3 4 5 The four GND pins are connected to a large copper pad. If a VIN – VOUT (V) second layer is available, multiple vias can be used to connect Figure 43. 300 mm2 of PCB Copper, TA = 85°C them, increasing the overall copper area. The input capacitor should be placed as close as possible to the IN and GND pins. 140 The output capacitor should be placed as close as possible to the DO NOT OPERATE ABOVE THIS POINT 120 OUT and GND pins. 0603 or 0402 size capacitors and resistors MAX TJ should be used to achieve the smallest possible footprint 100 solution on boards where area is limited. 80 T (°C)J 60 GND (TOP) 40 20 00 11m0mAA1 5100m0mAA2 235600mm3AA (LOA5D00 C4mUARRENT) 506110-032 C1 AADDPP11771156/ C2 VIN – VOUT (V) Figure 44. 100 mm2 of PCB Copper, TA = 85°C IN OUT 140 DO NOT OPERATE ABOVE THIS POINT 120 MAX TJ 100 R1 80 C) C3 R2 T (°J 60 EN 40 GND (BOTTOM) 06110-048 Figure 46. Example PCB Layout 20 0 11m0mAA 5100m0mAA 235600mmAA (LOA5D00 CmUARRENT) 06110-033 0 1 2 3 4 5 VIN – VOUT (V) Figure 45. 0 mm2 of PCB Copper, TA = 85°C Rev. 0 | Page 15 of 20

ADP1715/ADP1716 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 2.80 1 4 PIN 1 0.65 BSC 0.95 0.85 1.10 MAX 0.75 0.80 0.15 0.38 0.23 8° 0.60 0.00 0.22 0.08 0° 0.40 COPLANARITY SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 47. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions show in millimeters Rev. 0 | Page 16 of 20

ADP1715/ADP1716 ORDERING GUIDE Output Voltage Package Package Model Temperature Range (V) Description Option Branding ADP1715ARMZ-0.75R71 –40°C to +125°C 0.75 8-Lead MSOP RM-8 L29 ADP1715ARMZ-0.8-R71 –40°C to +125°C 0.80 8-Lead MSOP RM-8 L2A ADP1715ARMZ-0.85R71 –40°C to +125°C 0.85 8-Lead MSOP RM-8 L2C ADP1715ARMZ-0.9-R71 –40°C to +125°C 0.90 8-Lead MSOP RM-8 L2D ADP1715ARMZ-0.95R71 –40°C to +125°C 0.95 8-Lead MSOP RM-8 L2E ADP1715ARMZ-1.0-R71 –40°C to +125°C 1.00 8-Lead MSOP RM-8 L2F ADP1715ARMZ-1.05R71 –40°C to +125°C 1.05 8-Lead MSOP RM-8 L2G ADP1715ARMZ-1.1-R71 –40°C to +125°C 1.10 8-Lead MSOP RM-8 L2H ADP1715ARMZ-1.15R71 –40°C to +125°C 1.15 8-Lead MSOP RM-8 L2J ADP1715ARMZ-1.2-R71 –40°C to +125°C 1.20 8-Lead MSOP RM-8 L2K ADP1715ARMZ-1.3-R71 –40°C to +125°C 1.30 8-Lead MSOP RM-8 L32 ADP1715ARMZ-1.5-R71 –40°C to +125°C 1.50 8-Lead MSOP RM-8 L2L ADP1715ARMZ-1.8-R71 –40°C to +125°C 1.80 8-Lead MSOP RM-8 L3R ADP1715ARMZ-2.5-R71 –40°C to +125°C 2.50 8-Lead MSOP RM-8 L33 ADP1715ARMZ-3.0-R71 –40°C to +125°C 3.00 8-Lead MSOP RM-8 L34 ADP1715ARMZ-3.3-R71 –40°C to +125°C 3.30 8-Lead MSOP RM-8 L35 ADP1715ARMZ-R71 –40°C to +125°C 0.8 to 5.0 8-Lead MSOP RM-8 L3K ADP1716ARMZ-0.75R71 –40°C to +125°C 0.75 8-Lead MSOP RM-8 L2N ADP1716ARMZ-0.8-R71 –40°C to +125°C 0.80 8-Lead MSOP RM-8 L2P ADP1716ARMZ-0.85R71 –40°C to +125°C 0.85 8-Lead MSOP RM-8 L2Q ADP1716ARMZ-0.9-R71 –40°C to +125°C 0.90 8-Lead MSOP RM-8 L2R ADP1716ARMZ-0.95R71 –40°C to +125°C 0.95 8-Lead MSOP RM-8 L2S ADP1716ARMZ-1.0-R71 –40°C to +125°C 1.00 8-Lead MSOP RM-8 L2T ADP1716ARMZ-1.05R71 –40°C to +125°C 1.05 8-Lead MSOP RM-8 L3D ADP1716ARMZ-1.1-R71 –40°C to +125°C 1.10 8-Lead MSOP RM-8 L2U ADP1716ARMZ-1.15R71 –40°C to +125°C 1.15 8-Lead MSOP RM-8 L2 V ADP1716ARMZ-1.2-R71 –40°C to +125°C 1.20 8-Lead MSOP RM-8 L2W ADP1716ARMZ-1.3-R71 –40°C to +125°C 1.30 8-Lead MSOP RM-8 L2X ADP1716ARMZ-1.5-R71 –40°C to +125°C 1.50 8-Lead MSOP RM-8 L2Y ADP1716ARMZ-1.8-R71 –40°C to +125°C 1.80 8-Lead MSOP RM-8 L31 ADP1716ARMZ-2.5-R71 –40°C to +125°C 2.50 8-Lead MSOP RM-8 L37 ADP1716ARMZ-3.0-R71 –40°C to +125°C 3.00 8-Lead MSOP RM-8 L38 ADP1716ARMZ-3.3-R71 –40°C to +125°C 3.30 8-Lead MSOP RM-8 L39 1 Z = Pb-free part. Rev. 0 | Page 17 of 20

ADP1715/ADP1716 NOTES Rev. 0 | Page 18 of 20

ADP1715/ADP1716 NOTES Rev. 0 | Page 19 of 20

ADP1715/ADP1716 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06110-0-9/06(0) Rev. 0 | Page 20 of 20

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADP1715ARMZ-0.75R7 ADP1715ARMZ-1.3-R7 ADP1715ARMZ-0.8-R7