150 mA, Low Dropout, CMOS Linear Regulator ADP1710/ADP1711 FEATURES TYPICAL APPLICATION CIRCUITS Maximum output current: 150 mA ADP1710 Input voltage range: 2.5 V to 5.5 V VIN = 5V VOUT = 3.3V 1 IN OUT 5 Light load efficient 1µF 1µF I = 35 μA with zero load GND 2 GND I = 40 μA with 100 μA load GND Low shutdown current: <1 μA 3 EN NC 4 LInoiwtia dl raocpcouuratc vyo: l±ta1g%e : 150 mV @ 150 mA load NC = NO CONNECT 06310-001 Figure 1. ADP1710 with Fixed Output Voltage, 3.3 V Accuracy over line, load, and temperature: ±2% Stable with small 1μF ceramic output capacitor ADP1710 ADJUSTABLE 16 fixed output voltage options: 0.75 V to 3.3 V (ADP1710) VIN = 5.5V VOUT = 0.8V(1 + R1/R2) Adjustable output voltage option: 0.8 V to 5.0 V 1 IN OUT 5 (ADP1710 Adjustable) 1µF 1µF 2 GND 16 fixed output voltage options with reference bypass: R1 0.75 V to 3.3 V (ADP1711) 3 EN ADJ 4 High PSRR: 69 dB @ 1 kHz R2 LEoxcwe lnleoniste l:o 4a0d /μlVinReM Stransient response 06310-002 Figure 2. ADP1710 with Adjustable Output Voltage, 0.8 V to 5.0 V Current limit and thermal overload protection Logic controlled enable 5-lead TSOT package ADP1711 VIN = 5V VOUT = 3.3V APPLICATIONS 1 IN OUT 5 1µF Mobile phones 2 GND 1µF Digital camera and audio devices 10nF PPoorstta dbcl-ed acn rdeg bualtatteioryn- powered equipment 3 EN BYP 4 06310-003 Figure 3. ADP1711 with Fixed Output Voltage and Bypass Capacitor, 3.3 V GENERAL DESCRIPTION The ADP1710/ADP1711 are low dropout linear regulators The ADP1710/ADP1711 are optimized for stable operation with that operate from 2.5 V to 5.5 V and provide up to 150 mA of small 1 μF ceramic output capacitors, allowing for good transient output current. Utilizing a novel scaling architecture, ground performance while occupying minimal board space. An enable current drawn is a very low 40 μA, when driving a 100 μA pin controls the output voltage on both devices. There is also an load, making the ADP1710/ADP1711 ideal for battery- under-voltage lockout circuit on both devices, which disables the operated portable equipment. regulator if IN drops below a minimum threshold. The ADP1710 and the ADP1711 are each available in sixteen An internal soft start gives a typical start-up time of 80 μs. fixed output voltage options. The ADP1710 is also available in Short-circuit protection and thermal overload protection an adjustable version, which allows output voltages that range circuits prevent damage to the devices in adverse conditions. from 0.8 V to 5 V via an external divider. The ADP1711 allows Both the ADP1710 and the ADP1711 are available in tiny for a reference bypass capacitor to be connected, which reduces 5­lead TSOT packages, for the smallest footprint solution to all output voltage noise and improves power supply rejection. your power needs. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.

ADP1710/ADP1711 TABLE OF CONTENTS Features..............................................................................................1 Enable Feature...............................................................................8 Applications.......................................................................................1 Undervoltage Lockout (UVLO)..................................................9 Typical Application Circuits............................................................1 Application Information................................................................10 General Description.........................................................................1 Capacitor Selection....................................................................10 Revision History...............................................................................2 Current Limit and Thermal Overload Protection.................10 Specifications.....................................................................................3 Thermal Considerations............................................................11 Absolute Maximum Ratings............................................................4 Printed Circuit Board Layout Considerations.......................12 Thermal Resistance......................................................................4 Outline Dimensions.......................................................................13 ESD Caution..................................................................................4 Ordering Guide..........................................................................14 Pin Configurations and Function Descriptions...........................5 Typical Performance Characteristics.............................................6 Theory of Operation........................................................................8 Adjustable Output Voltage (ADP1710 Adjustable).................8 Bypass Capacitor (ADP1711).....................................................8 REVISION HISTORY 10/06—Revision 0: Initial Version Rev. 0 | Page 2 of 16

ADP1710/ADP1711 SPECIFICATIONS V = (V + 0.5 V) or 2.5 V (whichever is greater), I = 1 mA, C = C = 1 μF, T = 25°C, unless otherwise noted. IN OUT OUT IN OUT A Table 1. Parameter Symbol Conditions Min Typ Max Unit INPUT VOLTAGE RANGE VIN TJ = –40°C to +125°C 2.5 5.5 V OPERATING SUPPLY CURRENT IGND IOUT = 0 μA 35 μA IOUT = 0 μA, TJ = –40°C to +125°C 50 μA IOUT = 100 μA 40 μA IOUT = 100 μA, TJ = –40°C to +125°C 80 μA IOUT = 100 mA 665 μA IOUT = 100 mA, TJ = –40°C to +125°C 860 μA IOUT = 150 mA 1 mA IOUT = 150 mA, TJ = –40°C to +125°C 1.3 mA SHUTDOWN CURRENT IGND-SD EN = GND 0.1 μA EN = GND, TJ = –40°C to +125°C 1.0 μA FIXED OUTPUT VOLTAGE ACCURACY VOUT IOUT = 1 mA –1 +1 % (ADP1710 AND ADP1711) 100 μA < IOUT < 150 mA, TJ = –40°C to +125°C –2 +2 % ADJUSTABLE OUTPUT VOLTAGE VOUT IOUT = 1 mA 0.792 0.8 0.808 V ACCURACY (ADP1710 ADJUSTABLE)1 100 μA < IOUT < 150 mA, TJ = –40°C to +125°C 0.784 0.816 V LINE REGULATION ∆VOUT/∆VIN VIN = (VOUT + 0.5 V) to 5.5 V, TJ = –40°C to +125°C –0.1 +0.1 %/V LOAD REGULATION2 ∆VOUT/∆IOUT IOUT = 10 mA to 150 mA 0.002 %/mA IOUT = 10 mA to 150 mA, TJ = –40°C to +125°C 0.004 %/mA DROPOUT VOLTAGE3 VDROPOUT IOUT = 100 mA, VOUT ≥ 3.0 V 100 mV IOUT = 100 mA, VOUT ≥ 3.0 V, TJ = –40°C to +125°C 175 mV IOUT = 150 mA, VOUT ≥ 3.0 V 150 mV IOUT = 150 mA, VOUT ≥ 3.0 V, TJ = –40°C to +125°C 250 mV IOUT = 100 mA, 2.5 V ≤ VOUT < 3.0 V 120 mV IOUT = 100 mA, 2.5 V ≤ VOUT < 3.0 V, TJ = –40°C to +125°C 200 mV IOUT = 150 mA, 2.5 V ≤ VOUT < 3.0 V 180 mV IOUT = 150 mA, 2.5 V ≤ VOUT < 3.0 V, TJ = –40°C to +125°C 300 mV START-UP TIME4 TSTART-UP ADP1710 80 μs ADP1711 With 10 nF bypass capacitor 100 μs CURRENT LIMIT THRESHOLD5 ILIMIT 180 270 360 mA THERMAL SHUTDOWN THRESHOLD TSSD TJ rising 150 °C THERMAL SHUTDOWN HYSTERESIS TSSD-HYS 15 °C UVLO ACTIVE THRESHOLD UVLOACTIVE VIN falling 1.95 V UVLO INACTIVE THRESHOLD UVLOINACTIVE VIN rising 2.45 V UVLO HYSTERESIS UVLOHYS 250 mV EN INPUT LOGIC HIGH VIH 2.5 V ≤ VIN ≤ 5.5 V 1.8 V EN INPUT LOGIC LOW VIL 2.5 V ≤ VIN ≤ 5.5 V 0.4 V EN INPUT LEAKAGE CURRENT VI-LEAKAGE EN = IN or GND 0.1 1 μA ADJ INPUT BIAS CURRENT (ADP1710 ADJUSTABLE) ADJI-BIAS 30 100 nA OUTPUT NOISE OUTNOISE ADP1710 10 Hz to 100 kHz, VOUT = 3.3 V 330 μVrms ADP1711 10 Hz to 100 kHz, VOUT = 0.75 V, with 10 nF bypass capacitor 40 μVrms POWER SUPPLY REJECTION RATIO PSRR ADP1710 1 kHz, VOUT = 3.3 V 58 dB ADP1711 1 kHz, VOUT = 0.75 V, with 10 nF bypass capacitor 69 dB 1 Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of resistors used. 2 Based on an end-point calculation using 10 mA and 150 mA loads. See Figure 8 for typical load regulation performance for loads less than 10 mA. 3 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.5 V. 4 Start-up time is defined as the time between the rising edge of EN to OUT being at 90% of its nominal value. 5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V. Rev. 0 | Page 3 of 16

ADP1710/ADP1711 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. θ is specified for the worst-case conditions, that is, a device Parameter Rating JA soldered in a circuit board for surface-mount packages. IN to GND –0.3 V to +6 V OUT to GND –0.3 V to IN Table 3. Thermal Resistance EN to GND –0.3 V to +6 V Package Type θ Unit JA ADJ/BYP to GND –0.3 V to +6 V 5-Lead TSOT 170 °C/W Storage Temperature Range –65°C to +150°C Operating Junction Temperature Range –40°C to +125°C Soldering Conditions JEDEC J-STD-020 ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 16

ADP1710/ADP1711 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS IN 1 ADP1710 5 OUT IN 1 ADP1710 5 OUT IN 1 ADP1711 5 OUT FIXED ADJUSTABLE GNEDN N23C (=NT oNOtO Pto CV SOIEcNaWNleE)CT4 NC 06310-004 GNEDN 23 (NToOt Pto V SIEcaWle) 4 ADJ 06310-005 GNEND 23 (NToOt Pto V SIEcaWle) 4 BYP 06310-006 Figure 4. 5-Lead TSOT (UJ-Suffix) Figure 5. 5-Lead TSOT (UJ-Suffix) Figure 6. 5-Lead TSOT (UJ-Suffix) Table 4. Pin Function Descriptions ADP1710 ADP1710 Fixed Adjustable ADP1711 Pin No. Pin No. Pin No. Mnemonic Description 1 1 1 IN Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor. 2 2 2 GND Ground. 3 3 3 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. 4 NC No Connect. 4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 4 BYP Connect a 1 nF or greater capacitor (10 nF is recommended) between BYP and GND to reduce the internal reference noise for low noise applications. 5 5 5 OUT Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor. Rev. 0 | Page 5 of 16

ADP1710/ADP1711 TYPICAL PERFORMANCE CHARACTERISTICS V = 3.8 V, I = 1 mA, C = C = 1 μF, T = 25°C, unless otherwise noted. IN OUT IN OUT A 3.34 1100 3.33 1000 3.32 900 ILOAD = 150mA 3.31 800 ILOAD = 10mA (V)UT 33..3209 ILOADI L=O 1AmD A= 100µA (µA)D 760000 ILOAD = 100mA O 3.28 N 500 V G I 3.27 ILOAD = 50mA 400 ILOAD = 50mA 3.26 300 ILOAD = 100mA 3.25 ILOAD = 150mA 200 ILOAD = 10mA ILOAD = 1mA ILOAD = 100µA 3.24 100 3.23 0 –40 –5 TJ2 (5°C) 85 125 06310-007 –40 –5 TJ2 (5°C) 85 125 06310-010 Figure 7. Output Voltage vs. Junction Temperature Figure 10. Ground Current vs. Junction Temperature 3.32 1100 1000 3.31 900 800 3.30 700 (V)UT 3.29 (µA)D 600 O N 500 V G I 400 3.28 300 3.27 200 100 3.26 0 0.1 1 ILOAD10 (mA) 100 1000 06310-008 0.1 1 ILOAD10 (mA) 100 1000 06310-011 Figure 8. Output Voltage vs. Load Current Figure 11. Ground Current vs. Load Current 3.32 1500 1400 1300 3.31 ILOAD = 100µA ILOAD = 1mA ILOAD = 10mA 1200 1100 3.30 1000 ILOAD = 150mA 900 (V)OUT 3.29 (µA)ND 870000 ILOAD = 100mA V G I 600 3.28 ILOAD = 50mA 500 ILOAD = 100mA 400 ILOAD = 50mA ILOAD = 150mA 300 3.27 200 ILOAD = 10mA ILOAD = 1mA ILOAD = 100µA 100 3.26 0 3.3 3.8 4V.3IN (V) 4.8 5.3 06310-009 3.3 3.8 4V.3IN (V) 4.8 5.3 06310-012 Figure 9. Output Voltage vs. Input Voltage Figure 12. Ground Current vs. Input Voltage Rev. 0 | Page 6 of 16

ADP1710/ADP1711 180 0 VRIPPLE = 50mV 160 –10 VVIONU =T 5=V 0.75V COUT = 1µF 140 –20 120 –30 V) ILOAD = 50mA V (mDROPOUT 10800 PSRR (dB) ––4500 I1L0OmAAD = 60 –60 40 –70 ILOAD = 100µA 20 –80 0 –90 0.1 1 ILOAD10 (mA) 100 1000 06310-013 10 100 1kFREQU1E0NkCY (Hz)100k 1M 10M 06310-016 Figure 13. Dropout Voltage vs. Load Current Figure 16. ADP1711 Power Supply Rejection Ratio vs. Frequency (10 nF Bypass Capacitor) 3.35 0 VRIPPLE = 50mV 3.30 –10 VVIONU =T 5=V 3.3V COUT = 1µF –20 3.25 –30 ILOAD = 50mA 3.20 ILOAD = 10mA (V)UT 3.15 R (dB) –40 VO 3.10 IILLOOAADD == 110m0AµA PSR –50 ILOAD = 10mA –60 3.05 IILLOOAADD == 5100m0mAA –70 ILOAD = 100µA ILOAD = 150mA 3.00 –80 2.95 –90 3.2 3.3 VI3N. 4(V) 3.5 3.6 06310-014 10 100 1kFREQU1E0NkCY (Hz)100k 1M 10M 06310-017 Figure 14. Output Voltage vs. Input Voltage (in Dropout) Figure 17. ADP1710 Power Supply Rejection Ratio vs. Frequency 7 6 5 ILOAD = 150mA A) 4 m (D ILOAD = 100mA GN 3 I ILOAD = 10mA 2 1ILmOAAD = 5IL0OmAAD = 1 ILOAD = 100µA 0 3.20 3.25 3.30 3.35 V3IN.4 (0V) 3.45 3.50 3.55 3.60 06310-015 Figure 15. Ground Current vs. Input Voltage (In Dropout) Rev. 0 | Page 7 of 16

ADP1710/ADP1711 THEORY OF OPERATION The ADP1710/ADP1711 are low dropout, CMOS linear ADJUSTABLE OUTPUT VOLTAGE regulators that use an advanced, proprietary architecture to (ADP1710 ADJUSTABLE) provide high power supply rejection ratio (PSRR) and excellent The ADP1710 adjustable version can have its output voltage line and load transient response with just a small 1 μF ceramic set over a 0.8 V to 5.0 V range. The output voltage is set by output capacitor. Both devices operate from a 2.5 V to 5.5 V connecting a resistive voltage divider from OUT to ADJ. The input rail and provide up to 150 mA of output current. output voltage is calculated using the equation Incorporating a novel scaling architecture, ground current is V = 0.8 V (1 + R1/R2) (1) very low when driving light loads. Ground current in shutdown OUT mode is typically 100 nA. where: R1 is the resistor from OUT to ADJ. R2 is the resistor from ADJ to GND. IN OUT The maximum bias current into ADJ is 100 nA, so for less than 0.5% error due to the bias current, use values less than CURRENT LIMIT 60 kΩ for R2. THERMAL PROTECT + BYPASS CAPACITOR (ADP1711) SHUTDOWN AND UVLO The ADP1711 allows for an external bypass capacitor to be NC/ ADJ/ connected to the internal reference, which reduces output EN BYP REFERENCE voltage noise and improves power supply rejection. A low GND NC = NO CONNECT 06310-018 lmeauksat gbee ccaopnanceitcotre do fb 1e tnwFe eonr gthreea BteYr P(1 a0n ndF G iNs rDec poimnsm. ended) Figure 18. Internal Block Diagram ENABLE FEATURE Internally, the ADP1710/ADP1711 each consist of a reference, The ADP1710/ADP1711 use the EN pin to enable and disable an error amplifier, a feedback voltage divider, and a PMOS pass the OUT pin under normal operating conditions. As shown in transistor. Output current is delivered via the PMOS pass Figure 19, when a rising voltage on EN crosses the active device, which is controlled by the error amplifier. The error threshold, OUT turns on. When a falling voltage on EN crosses amplifier compares the reference voltage with the feedback the inactive threshold, OUT turns off. voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage. V) EN DI The ADP1710 is available in two versions, one with fixed output V/ m 0 voltage options and one with an adjustable output voltage. The 0 5 2 fixed output voltage option is set internally to one of sixteen H2 ( OUT values between 0.75 V and 3.3 V, using an internal feedback H1, C VVIONU =T 5=V 1.6V network. The adjustable output voltage can be set to between 0.8 C CIN = 1µF COUT = 1µF Vto aAnDd J5. .T0h Ve AbyD aPn1 e7x1t1e rins aalv vaiollatbalgee w diitvhid feixre cdo nountepcutet dv ofrltoamge O UT TIME (1ms/DIV) ILOAD = 10mA 06310-019 options and features a bypass pin, which allows an external Figure 19. ADP1710 Adjustable Typical EN Pin Operation capacitor to be connected, which reduces internal reference noise. All devices are controlled by an enable pin (EN). Rev. 0 | Page 8 of 16

ADP1710/ADP1711 As can be seen, the EN pin has hysteresis built in. This prevents UNDERVOLTAGE LOCKOUT (UVLO) on/off oscillations that can occur due to noise on the EN pin as The ADP1710/ADP1711 have an undervoltage lockout circuit, it passes through the threshold points. which monitors the voltage on the IN pin. When the voltage on The EN pin active/inactive thresholds are derived from the IN IN drops below 1.95 V (minimum), the circuit activates, disabling voltage. Therefore, these thresholds vary with changing input the OUT pin. voltage. Figure 20 shows typical EN active/inactive thresholds when the input voltage varies from 2.5 V to 5.5 V. 1.4 1.3 V) 1.2 EN ACTIVE S ( D L 1.1 O H HYSTERESIS ES 1.0 R H N T 0.9 E AL 0.8 C PI TY 0.7 EN INACTIVE 0.6 0.5 2.50 2.75 3.00 3.25 3.50 3.75V4IN.0 (0V)4.25 4.50 4.75 5.00 5.25 5.50 06310-020 Figure 20. Typical EN Pin Thresholds vs. Input Voltage Rev. 0 | Page 9 of 16

ADP1710/ADP1711 APPLICATION INFORMATION CAPACITOR SELECTION Input Bypass Capacitor Output Capacitor Connecting a 1 μF capacitor from IN to GND reduces the circuit sensitivity to printed circuit board (PCB) layout, The ADP1710/ADP1711 are designed for operation with small, especially when long input traces or high source impedance are space-saving ceramic capacitors, but they will function with most encountered. If greater than 1 μF of output capacitance is commonly used capacitors as long as care is taken about the required, the input capacitor should be increased to match it. effective series resistance (ESR) value. The ESR of the output capacitor affects stability of the LDO control loop. A minimum of Input and Output Capacitor Properties 1 μF capacitance with an ESR of 500 mΩ or less is recommended Any good quality ceramic capacitors can be used with the to ensure stability of the ADP1710/ADP1711. Transient response ADP1710/ADP1711, as long as they meet the minimum to changes in load current is also affected by output capacitance. capacitance and maximum ESR requirements. Ceramic Using a larger value of output capacitance improves the transient capacitors are manufactured with a variety of dielectrics, each response of the ADP1710/ADP1711 to large changes in load with different behavior over temperature and applied voltage. current. Figure 21 and Figure 22 show the transient responses for Capacitors must have a dielectric adequate to ensure the output capacitance values of 1 μF and 22 μF, respectively. minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended. Y5V and Z5U dielectrics are not recommended, due to their poor temperature VOUT RESPONSE TO LOAD STEP FROM 7.5mA TO 142.5mA and dc bias characteristics. V CURRENT LIMIT AND THERMAL OVERLOAD DI V/ 1 PROTECTION m 0 1 The ADP1710/ADP1711 are protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP1710/ADP1711 are designed to VVIONU =T 5=V 3.3V current limit when the output load reaches 270 mA (typical). CIN = 1µF When the output load exceeds 270 mA, the output voltage is TIME (4µs/DIV) COUT = 1µF 06310-021 reduced to maintain a constant current limit. Figure 21. Output Transient Response, COUT = 1 μF Thermal overload protection is included, which limits the junction temperature to a maximum of 150°C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature starts to rise above 150°C, the output is turned off, reducing the output VOUT RESPONSE TO LOAD STEP FROM 7.5mA TO 142.5mA current to zero. When the junction temperature drops below 135°C, the output is turned on again and output current is V V/DI 1 restored to its nominal value. m 0 1 Consider the case where a hard short from OUT to ground occurs. At first the ADP1710/ADP1711 current limits, so that only 270 mA is conducted into the short. If self heating of the VIN = 5V junction is great enough to cause its temperature to rise above VOUT = 3.3V CIN = 22µF 150°C, thermal shutdown activates, turning off the output and TIME (4µs/DIV) COUT = 22µF 06310-022 rteemdupceirnagt uthree coouotlpsu atn cdu rdrreonpts t ob ezleorwo .1 A35s °tChe, tjhuen cotuiotpnu t turns on Figure 22. Output Transient Response, COUT = 22 μF and conducts 270 mA into the short, again causing the junction temperature to rise above 150°C. This thermal oscillation between 135°C and 150°C causes a current oscillation between 270 mA and 0 mA, which continues as long as the short remains at the output. Rev. 0 | Page 10 of 16

ADP1710/ADP1711 Current and thermal limit protections are intended to protect 140 MAX T (DO NOT OPERATE ABOVE THIS POINT) the device against accidental overload conditions. For reliable J operation, device power dissipation must be externally limited 120 so junction temperatures do not exceed 125°C. 100 THERMAL CONSIDERATIONS 80 To guarantee reliable operation, the junction temperature of the C) ADP1710/ADP1711 must not exceed 125°C. To ensure the T (°J 60 junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction 40 temperature changes. These parameters include ambient 20 temperature, power dissipation in the power device, and thermal 1mA 30mA 100mA 150mA resistances between the junction and ambient air (θ ). The θ 10mA 80mA 125mA (LOAD CURRENT) JA JA 0 nanudm tbheer aims doeupnetn odfe cnot popne rth teo pwahcikcahg eth aes sGeNmDbl yp icnosm opf othuen dpsa cuksaegde 0.5 1.0 1.5 2.0 VIN2. 5– VOU3T. 0(V) 3.5 4.0 4.5 5.0 06310-023 are soldered on the PCB. Table 5 shows typical θ values of the Figure 23. 500 mm2 of PCB Copper, TA = 25°C JA 5­lead TSOT package for various PCB copper sizes. 140 MAX T (DO NOT OPERATE ABOVE THIS POINT) J Table 5. 120 Copper Size (mm2) θ (°C/W) JA 100 01 170 50 152 80 130000 114364 T (°C)J 60 500 131 40 1 Device soldered to minimum size pin traces. 20 The junction temperature of the ADP1710/ADP1711 can be 1mA 30mA 100mA 150mA calculated from the following equation: 10mA 80mA 125mA (LOAD CURRENT) 0 TJ = TA + (PD × θJA) (2) 0.5 1.0 1.5 2.0 VIN2. 5– VOU3T. 0(V) 3.5 4.0 4.5 5.0 06310-024 where: Figure 24. 100 mm2 of PCB Copper, TA = 25°C T is the ambient temperature. A 140 PD is the power dissipation in the die, given by MAX TJ (DO NOT OPERATE ABOVE THIS POINT) 120 P = [(V – V ) × I ] + (V × I ) (3) D IN OUT LOAD IN GND where: 100 I is the load current. LOAD 80 IVGND a ins dth Ve gro aurne dth ceu irnrepnutt. voltage and output voltage, T (°C)J 60 IN OUT respectively. 40 Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation 20 1mA 30mA 100mA 150mA simplifies to the following: 10mA 80mA 125mA (LOAD CURRENT) 0 As shToJw =n T iAn +E q{[u(aVtIiNo n– V4,O fUoTr) a× g IiLvOeAnD] a ×m θbJiAe}n t temperature, inp(u4t) 0.5 1.0 1.5 2.0 VIN2. 5– VOU3T. 0(V) 3.5 4.0 4.5 5.0 06310-025 to output voltage differential, and continuous load current, Figure 25. 0 mm2 of PCB Copper, TA = 25°C there exists a minimum copper size requirement for the PCB to ensure the junction temperature does not rise above 125°C. The following figures show junction temperature calculations for different ambient temperatures, load currents, V to V IN OUT differentials, and areas of PCB copper. Rev. 0 | Page 11 of 16

ADP1710/ADP1711 140 PRINTED CIRCUIT BOARD LAYOUT MAX T (DO NOT OPERATE ABOVE THIS POINT) J CONSIDERATIONS 120 Heat dissipation from the package can be improved by increasing 100 the amount of copper attached to the pins of the ADP1710/ ADP1711. However, as can be seen from Table 5, a point of C) 80 diminishing returns eventually is reached, beyond which an T (°J 60 increase in the copper size does not yield significant heat dissipation benefits. 40 Place the input capacitor as close as possible to the IN and GND pins. Place the output capacitor as close as possible to the OUT 20 1mA 30mA 100mA 150mA and GND pins. For ADP1711, place the internal reference 10mA 80mA 125mA (LOAD CURRENT) bypass capacitor as close as possible to the BYP pin. Use of 0402 0 0.5 1.0 1.5 2.0 VIN2 .5– VOU3T. 0(V) 3.5 4.0 4.5 5.0 06310-026 opro s0s6ib0l3e sfiozoe tcparpinatc istoolrust aionnd ornes bisotoarrds sa cwhhieevree sa trheae issm liamlleitsetd . Figure 26. 500 mm2 of PCB Copper, TA = 50°C GND (BOTTOM) 140 MAX TJ (DO NOT OPERATE ABOVE THIS POINT) GND (TOP) 120 100 C) 80 ADP1710/ T (°J 60 C1 ADP1711 C2 40 20 IN OUT 1mA 30mA 100mA 150mA 10mA 80mA 125mA (LOAD CURRENT) 0 0.5 1.0 1.5 2.0 VIN2 .5– VOU3T. 0(V) 3.5 4.0 4.5 5.0 06310-027 C3 R1 Figure 27. 100 mm2 of PCB Copper, TA = 50°C EN 140 R2 MAX T (DO NOT OPERATE ABOVE THIS POINT) J 120 06310-029 100 Figure 29. Example PCB Layout 80 C) T (°J 60 40 20 1mA 30mA 100mA 150mA 10mA 80mA 125mA (LOAD CURRENT) 0 0.5 1.0 1.5 2.0 VIN2 .5– VOU3T. 0(V) 3.5 4.0 4.5 5.0 06310-028 Figure 28. 0 mm2 of PCB Copper, TA = 50°C Rev. 0 | Page 12 of 16

ADP1710/ADP1711 OUTLINE DIMENSIONS 2.90 BSC 5 4 1.60 BSC 2.80 BSC 1 2 3 PIN 1 0.95 BSC *0.90 B1.S9C0 0.87 0.84 *1.00 MAX 0.20 0.08 8° 0.10 MAX 0.50 SEATING 4° 0.60 0.30 PLANE 0° 0.45 0.30 *COMPLIANT TO JEDEC STANDARDS MO-193-ABWITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. Figure 30. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions show in millimeters Rev. 0 | Page 13 of 16

ADP1710/ADP1711 ORDERING GUIDE Temperature Output Package Package Model Range Voltage (V) Description Option Branding ADP1710AUJZ-0.75R71 –40°C to +125°C 0.75 5-Lead TSOT UJ-5 L4S ADP1710AUJZ-0.8-R71 –40°C to +125°C 0.80 5-Lead TSOT UJ-5 L0D ADP1710AUJZ-0.85R71 –40°C to +125°C 0.85 5-Lead TSOT UJ-5 L40 ADP1710AUJZ-0.9-R71 –40°C to +125°C 0.90 5-Lead TSOT UJ-5 L41 ADP1710AUJZ-0.95R71 –40°C to +125°C 0.95 5-Lead TSOT UJ-5 L42 ADP1710AUJZ-1.0-R71 –40°C to +125°C 1.00 5-Lead TSOT UJ-5 L0E ADP1710AUJZ-1.05R71 –40°C to +125°C 1.05 5-Lead TSOT UJ-5 L43 ADP1710AUJZ-1.10R71 –40°C to +125°C 1.10 5-Lead TSOT UJ-5 L47 ADP1710AUJZ-1.15R71 –40°C to +125°C 1.15 5-Lead TSOT UJ-5 L44 ADP1710AUJZ-1.2-R71 –40°C to +125°C 1.20 5-Lead TSOT UJ-5 L45 ADP1710AUJZ-1.3-R71 –40°C to +125°C 1.30 5-Lead TSOT UJ-5 L46 ADP1710AUJZ-1.5-R71 –40°C to +125°C 1.50 5-Lead TSOT UJ-5 L0F ADP1710AUJZ-1.8-R71 –40°C to +125°C 1.80 5-Lead TSOT UJ-5 L0G ADP1710AUJZ-2.5-R71 –40°C to +125°C 2.50 5-Lead TSOT UJ-5 L0H ADP1710AUJZ-3.0-R71 –40°C to +125°C 3.00 5-Lead TSOT UJ-5 L0J ADP1710AUJZ-3.3-R71 –40°C to +125°C 3.30 5-Lead TSOT UJ-5 L0K ADP1710AUJZ-R71 –40°C to +125°C 0.8 to 5.0 5-Lead TSOT UJ-5 L0L ADP1711AUJZ-0.75R71 –40°C to +125°C 0.75 5-Lead TSOT UJ-5 L4T ADP1711AUJZ-0.8-R71 –40°C to +125°C 0.80 5-Lead TSOT UJ-5 L0M ADP1711AUJZ-0.85R71 –40°C to +125°C 0.85 5-Lead TSOT UJ-5 L48 ADP1711AUJZ-0.9-R71 –40°C to +125°C 0.90 5-Lead TSOT UJ-5 L49 ADP1711AUJZ-0.95R71 –40°C to +125°C 0.95 5-Lead TSOT UJ-5 L4A ADP1711AUJZ-1.0-R71 –40°C to +125°C 1.00 5-Lead TSOT UJ-5 L0N ADP1711AUJZ-1.05R71 –40°C to +125°C 1.05 5-Lead TSOT UJ-5 L4C ADP1711AUJZ-1.10R71 –40°C to +125°C 1.10 5-Lead TSOT UJ-5 L4G ADP1711AUJZ-1.15R71 –40°C to +125°C 1.15 5-Lead TSOT UJ-5 L4D ADP1711AUJZ-1.2-R71 –40°C to +125°C 1.20 5-Lead TSOT UJ-5 L4E ADP1711AUJZ-1.3-R71 –40°C to +125°C 1.30 5-Lead TSOT UJ-5 L4F ADP1711AUJZ-1.5-R71 –40°C to +125°C 1.50 5-Lead TSOT UJ-5 L0P ADP1711AUJZ-1.8-R71 –40°C to +125°C 1.80 5-Lead TSOT UJ-5 L0Q ADP1711AUJZ-2.5-R71 –40°C to +125°C 2.50 5-Lead TSOT UJ-5 L0R ADP1711AUJZ-3.0-R71 –40°C to +125°C 3.00 5-Lead TSOT UJ-5 L0S ADP1711AUJZ-3.3-R71 –40°C to +125°C 3.30 5-Lead TSOT UJ-5 L0U 1 Z = Pb-free part. Rev. 0 | Page 14 of 16

ADP1710/ADP1711 NOTES Rev. 0 | Page 15 of 16

ADP1710/ADP1711 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06310-0-10/06(0) Rev. 0 | Page 16 of 16