High Speed, Half-Duplex iCoupler Isolated RS-485 Transceiver Data Sheet ADM2486 FEATURES FUNCTIONAL BLOCK DIAGRAM Half-duplex, isolated RS-485 transceiver VDD1 VDD2 PROFIBUS® compliant ANSI EIA/TIA 485-A and ISO 8482: 1987(E) compliant ADM2486 20 Mbps data rate RTS DE 5 V or 3 V operation (VDD1) ON E TI THIRsheiogeclhearmit cveoeadmrl D somhEpu oesttnnda--otmcuwiroscn dou peuit rtt,o prfatauenitlcs -tsiieaonfnet idmemsigunn ity: >25 kV/μs LOGIC SID TPxDV LVANIC ISOLA A BUS SIDE RxD A 50 nodes on bus G B Safety and regulatory approvals RE UCSLA re Ccoomgnpiotinoenn—t A2c5c0e0p Vtarmnsc feo rN 1o tmicien u#t5eA p er UL 1577 GND1 GND2 04604-001 IEC 609501 800 V (basic), 400 V (reinforced) Figure 1. rms rms VDE Certificate of Conformity The ADM2486 driver has an active-high enable feature. The DIN V VDE 0884-10 (VDE V 0884-10): 2006-12 driver differential outputs and the receiver differential inputs V = 560 V peak IORM are connected internally to form a differential input/output port Operating temperature range: −40°C to +85°C that imposes minimal loading on the bus when the driver is Wide body, 16-lead SOIC package disabled or when VDD1 or VDD2 = 0 V. Also provided is an active-high receiver disable feature that causes the receive APPLICATIONS output to enter a high impedance state. Isolated RS-485/RS-422 interfaces PROFIBUS networks The device has current-limiting and thermal shutdown features Industrial field networks to protect against output short circuits and situations where bus Multipoint data transmission systems contention may cause excessive power dissipation. The part is fully specified over the industrial temperature range and is GENERAL DESCRIPTION available in a 16-lead, wide body SOIC package. The ADM2486 differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E). The device employs Analog Devices iCoupler® technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. The logic side of the device is powered with either a 5 V or a 3 V supply, and the bus side uses an isolated 5 V supply. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2004–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADM2486 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Switching Characteristics .............................................................. 11 Applications ....................................................................................... 1 Typical Performance Characteristics ........................................... 12 General Description ......................................................................... 1 Circuit Description......................................................................... 14 Functional Block Diagram .............................................................. 1 Electrical Isolation ...................................................................... 14 Revision History ............................................................................... 2 Truth Tables................................................................................. 14 Specifications ..................................................................................... 3 Power-Up/Power-Down Thresholds ....................................... 14 Timing Specifications ....................................................................... 5 Thermal Shutdown .................................................................... 15 ADM2486 Characteristics ............................................................... 6 Receiver Fail-Safe Inputs ........................................................... 15 Package Characteristics ............................................................... 6 Magnetic Field Immunity .......................................................... 15 Regulatory Information ............................................................... 6 Applications Information .............................................................. 16 Insulation and Safety-Related Specifications ............................ 6 PC Board Layout ........................................................................ 16 VDE 0884-10 Insulation Characteristics ................................... 7 Power_Valid Input ..................................................................... 16 Absolute Maximum Ratings ............................................................ 8 Isolated Power Supply Circuit .................................................. 17 ESD Caution .................................................................................. 8 Outline Dimensions ....................................................................... 18 Pin Configuration and Function Descriptions ............................. 9 Ordering Guide .......................................................................... 18 Test Circuits ..................................................................................... 10 REVISION HISTORY 11/13—Rev. D to Rev. E 3/05—Rev. B to Rev. C Changes to Features Section............................................................ 1 Change to Package Characteristics ................................................. 7 Changes to Table 4 ............................................................................ 6 Changes to Figure 12, Figure 14, and Figure 15 ......................... 11 Changes to VDE 0884-10 Insulation Characteristics Section Change to Power_Valid Input Section ......................................... 16 and Table 6 ......................................................................................... 7 Updated Outline Dimensions ....................................................... 18 1/05—Rev. A to Rev. B Changes to Ordering Guide .......................................................... 18 Added PROFIBUS logo .................................................................... 1 11/04—Rev. 0 to Rev. A 2/06—Rev. C to Rev. D Changes to Figure 1 ........................................................................... 1 Updated Format .................................................................. Universal Changes to Figure 6 ........................................................................ 10 Changes to Table 1 ............................................................................ 3 Added Figure 22 through Figure 25 ............................................. 13 Changes to Table 8 ............................................................................ 9 Updated Outline Dimensions ....................................................... 18 Changes to Figure 22 and Figure 23 ............................................. 13 Changes to Ordering Guide .......................................................... 18 Changes to Table 9 and Table 10 ................................................... 14 Added PC Board Layout Section ................................................. 16 Changes to Isolated Power Supply Circuit Section and Figure 32 .......................................................................................... 17 Rev. E | Page 2 of 20

Data Sheet ADM2486 SPECIFICATIONS 2.7 V ≤ V ≤ 5.5 V, 4.75 V ≤ V ≤ 5.25 V, T = T to T , unless otherwise noted. DD1 DD2 A MIN MAX Table 1. Parameter Min Typ Max Unit Test Conditions/Comments DRIVER Differential Outputs Differential Output Voltage, V 5 V R = ∞, see Figure 3 OD 2.1 5 V R = 50 Ω (RS-422), see Figure 3 2.1 5 V R = 27 Ω (RS-485), see Figure 3 2.1 5 V V = −7 V to +12 V, V ≥ 4.7, TST DD1 see Figure 4 Δ |V | for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 3 OD Common-Mode Output Voltage, V 3 V R = 27 Ω or 50 Ω, see Figure 3 OC Δ |V | for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 3 OC Output Short-Circuit Current, V = High 60 200 mA −7 V ≤ V ≤ +12 V OUT OUT Output Short-Circuit Current, V = Low 60 200 mA −7 V ≤ V ≤ +12 V OUT OUT Driver Enable Output, DE Pin Output High Voltage V − 0.1 V I = 20 µA DD2 ODE V − 0.3 V − 0.1 V I = 1.6 mA DD2 DD2 ODE V − 0.4 V − 0.2 V I = 4 mA DD2 DD2 ODE Output Low Voltage 0.1 V I = −20 µA ODE 0.1 0.3 V I = −1.6 mA ODE 0.2 0.4 V I = −4 mA ODE Logic Inputs Input High Voltage 0.7 V V TxD, RTS, RE, PV DD1 Input Low Voltage 0.25 V V TxD, RTS, RE, PV DD1 CMOS Logic Input Current (TxD, RTS, RE, PV) −10 +0.01 +10 µA TxD, RTS, RE, PV = V or 0 V DD1 RECEIVER Differential Inputs Differential Input Threshold Voltage, V −200 +200 mV −7 V ≤ V ≤ +12 V TH CM Input Hysteresis 70 mV −7 V ≤ V ≤ +12 V CM Input Resistance (A, B) 20 30 kΩ −7 V ≤ V ≤ +12 V CM Input Current (A, B) 0.6 mA V = + 12 V IN −0.35 mA V = −7 V IN RxD Logic Output Output High Voltage V − 0.1 V I = 20 µA, V − V = 0.2 V DD1 OUT A B V − 0.4 V − 0.2 V I = 4 mA, V − V = 0.2 V DD1 DD1 OUT A B Output Low Voltage 0.1 V I = −20 µA, V − V = −0.2 V OUT A B 0.2 0.4 V I = −4 mA, V − V = −0.2 V OUT A B Output Short-Circuit Current 7 85 mA V = GND or V OUT CC Three-State Output Leakage Current ±1 µA 0.4 V ≤ V ≤ 2.4 V OUT POWER SUPPLY CURRENT Logic Side 1.3 mA RTS = 0 V, V = 5.5 V DD1 1.0 mA 2 Mbps, V = 5.5 V, see Figure 5 DD1 4.0 mA 20 Mbps, V = 5.5 V, see Figure 5 DD1 0.8 mA RTS = 0 V, V = 3 V DD1 1.1 mA 2 Mbps, V = 3 V, see Figure 5 DD1 2.1 mA 20 Mbps, V = 3 V, see Figure 5 DD1 Bus Side 3.0 mA RTS = 0 V 43.0 mA 2 Mbps, RTS = V , see Figure 5 DD1 58.0 mA 20 Mbps, RTS = V , see Figure 5 DD1 Rev. E | Page 3 of 20

ADM2486 Data Sheet Parameter Min Typ Max Unit Test Conditions/Comments COMMON-MODE TRANSIENT IMMUNITY1 25 kV/µs V = 1 kV, CM transient magnitude = 800 V HIGH FREQUENCY, COMMON-MODE NOISE IMMUNITY 100 mV V = +5 V, −2 V < V < +7 V, HF TEST2 1 MHz < f < 50 MHz, see Figure 6 TEST 1 Common-mode transient immunity is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. E | Page 4 of 20

Data Sheet ADM2486 TIMING SPECIFICATIONS 2.7 V ≤ V ≤ 5.5 V, 4.75 V ≤ V ≤ 5.25 V, T = T to T , unless otherwise noted. DD1 DD2 A MIN MAX Table 2. Parameter Min Typ Max Unit Test Conditions/Comments DRIVER Maximum Data Rate 20 Mbps Propagation Delay, t , t 25 45 55 ns R = 54 Ω, C = C = 100 pF, see Figure 7 PLH PHL LDIFF L1 L2 RTS-to-DE Propagation Delay 20 35 55 ns See Figure 8 Pulse Width Distortion, t 5 ns R = 54 Ω, C = C = 100 pF, see Figure 7 and Figure 12 PWD LDIFF L1 L2 Switching Skew, t 2 5 ns R = 54 Ω, C = C = 100 pF, see Figure 7 and Figure 12 SKEW LDIFF L1 L2 Rise/Fall Time, t, t 5 15 ns R = 54 Ω, C = C = 100 pF, see Figure 7 and Figure 12 R F LDIFF L1 L2 Enable Time 43 53 ns See Figure 9 and Figure 14 Disable Time 43 55 ns See Figure 9 and Figure 14 Enable Skew, |t − t |, |t − t | 1 3 ns See Figure 9 and Figure 14 AZH BZL AZL BZH Disable Skew, |t − t |, |t − t | 2 5 ns See Figure 9 and Figure 14 AHZ BLZ ALZ BHZ RECEIVER Propagation Delay, t , t 25 45 55 ns C = 15 pF, see Figure 10 and Figure 13 PLH PHL L Differential Skew, t 5 ns C = 15 pF, see Figure 10 and Figure 13 SKEW L Enable Time 3 13 ns R = 1 kΩ, C = 15 pF, see Figure 11 and Figure 15 L L Disable Time 3 13 ns R = 1 kΩ, C = 15 pF, see Figure 11 and Figure 15 L L POWER_VALID INPUT Enable Time 1 2 µs Disable Time 3 5 µs Rev. E | Page 5 of 20

ADM2486 Data Sheet ADM2486 CHARACTERISTICS PACKAGE CHARACTERISTICS Table 3. Parameter Symbol Min Typ Max Unit Test Conditions Resistance (Input-to-Output)1 R 1012 Ω I-O Capacitance (Input-to-Output)1 C 3 pF f = 1 MHz I-O Input Capacitance2 C 4 pF I Input IC Junction-to-Case Thermal Resistance θ 33 °C/W Thermocouple located at center JCI Output IC Junction-to-Case Thermal Resistance θ 28 °C/W of package underside JCO 1 Device considered a 2-terminal device: Pin 1 through Pin 8 shorted together, and Pin 9 through Pin 16 shorted together. 2 Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADM2486 has been approved by the following organizations: Table 4. Organization Approval Type Notes UL Recognized under 1577 component recognition program. File E214100. In accordance with UL1577, each ADM2486 is proof tested by applying an insulation test voltage ≥3000 V for 1 sec (current leakage rms detection limit = 5 μA). CSA Approved under CSA Component Acceptance Notice #5A. File 205078. IEC 609501 800 V (1131 V ) Basic, 400 V (565 V ) reinforced. rms PEAK rms PEAK VDE Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12. In accordance with VDE V 0884-10, each File 2471900-4880-0001. ADM2486 is proof tested by applying an insulation test voltage ≥1050 V for 1 sec PEAK (partial discharge detection limit = 5 pC). INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 5. Parameter Symbol Value Unit Conditions Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration. Minimum External Air Gap (Clearance) L(I01) 7.45 minimum mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(I02) 8.1 minimum mm Measured from input terminals to output terminals, shortest distance along body. Minimum Internal Gap (Internal Clearance) 0.017 minimum mm Insulation distance through insulation. Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1. Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1). Rev. E | Page 6 of 20

Data Sheet ADM2486 VDE 0884-10 INSULATION CHARACTERISTICS This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by means of protective circuits. An asterisk (*) on the physical package denotes VDE V 0884-10 approval for 560 V peak working voltage. Table 6. Description Symbol Characteristic Unit Installation Classification per DIN VDE 0110 for Rated Mains Voltage ≤150 V rms I-IV ≤300 V rms I-II ≤400 V rms I-II Climatic Classification 40/100/21 Pollution Degree (DIN VDE 0110, Table 1) 2 Maximum Working Insulation Voltage V 560 V IORM PEAK Input-to-Output Test Voltage, Method b1 V 1050 V PR PEAK V × 1.875 = V , 100% Production Tested, t = 1 sec, Partial Discharge < 5 pC IORM PR m Input-to-Output Test Voltage, Method a After Environmental Tests, Subgroup 1 V × 1.6 = V , t = 60 sec, Partial Discharge < 5 pC 896 V IORM PR m PEAK After Input and/or Safety Test, Subgroup 2/3 V × 1.2 = V , t = 60 sec, Partial Discharge < 5 pC V 672 V IORM PR m PR PEAK Highest Allowable Overvoltage (Transient Overvoltage, t = 10 sec) V 4000 V tr TR PEAK Safety-Limiting Values (Maximum Value Allowed in the Event of a Failure, see Figure 21) Case Temperature T 150 °C S Input Current I, 265 mA S INPUT Output Current I, 335 mA S OUTPUT Insulation Resistance at T, V = 500 V R >109 Ω S IO S Rev. E | Page 7 of 20

ADM2486 Data Sheet ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. All voltages are relative to Stresses above those listed under Absolute Maximum Ratings A their respective ground. may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any Table 7. other conditions above those indicated in the operational Parameter Rating section of this specification is not implied. Exposure to absolute V −0.5 V to +7 V DD1 maximum rating conditions for extended periods may affect V −0.5 V to +6 V DD2 device reliability. Digital Input Voltage (RTS, RE, TxD) −0.5 V to V + 0.5 V DD1 Digital Output Voltage RxD −0.5 V to V + 0.5 V DD1 ESD CAUTION DE −0.5 V to V + 0.5 V DD2 Driver Output/Receiver Input Voltage −9 V to +14 V Operating Temperature Range −40°C to +85°C Storage Temperature Range −55°C to +150°C Average Output Current per Pin −35 mA to +35 mA θ Thermal Impedance 73°C/W JA Lead Temperature Soldering (10 sec) 260°C Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C Rev. E | Page 8 of 20

Data Sheet ADM2486 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD1 1 16 VDD2 GND11 2 15 GND21 RxD 3 ADM2486 14 NC RE 4 TOP VIEW 13 B RTS 5 (Not to Scale) 12 A TxD 6 11 NC PV 7 10 DE GND11 8 9 GND21 NC = NO CONNECT 1PIN 2AND PIN 8ARE INTERNALLY CONNECTED. EPEIIITNTHH 9EEARRN OODRR P BBINOO 1TT5HHA MMRAAEYY I NBBTEEE UURSSNEEADDL LFFYOO RRC OGGNNNNDDE12C..TED. 04604-003 Figure 2. Pin Configuration Table 8. Pin Function Descriptions Pin No. Mnemonic Description 1 V Power Supply (Logic Side), 3 V or 5 V Supply. Decoupling capacitor to GND required, capacitor value should be DD1 1 between 0.01 µF and 0.1 µF. 2, 8 GND Ground (Logic Side). 1 3 RxD Receiver Output Data. This output is high when (A – B) > 200 mV and low when (A – B) < –200 mV. The output is three-stated when the receiver is disabled, that is, when RE is driven high. 4 RE Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and driving it high disables the receiver. 5 RTS Request to Send Input. Driving this input high enables the driver, and driving it low disables the driver. 6 TxD Transmit Data Input. Data to be transmitted by the driver is applied to this input. 7 PV Power_Valid. Used during power-up and power-down, needs to be tied high when the ADM2486 is operational, see the Applications Information section. 9, 15 GND Ground (Bus Side). 2 10 DE Driver Enable Status Output. This output signals the driver enable or disable status to other devices on the bus. DE is high when the driver is enabled and low when the driver is disabled. 11, 14 NC No Connect. 12 A Noninverting Driver Output/Receiver Input. When the driver is disabled, or when V or V is powered down, DD1 DD2 Pin A is put into a high impedance state to avoid overloading the bus. 13 B Inverting Driver Output/Receiver Input. When the driver is disabled, or when V or V is powered down, DD1 DD2 Pin B is put into a high impedance state to avoid overloading the bus. 16 V Power Supply (Bus Side), 5 V Isolated Supply. Decoupling capacitor to GND required, capacitor value should be DD2 2 between 0.01 µF and 0.1 µF. Rev. E | Page 9 of 20

ADM2486 Data Sheet TEST CIRCUITS R A CL1 VOD RLDIFF R VOC 04604-005 B CL2 04604-007 Figure 3. Driver Voltage Measurement Figure 7. Driver Propagation Delay 375Ω DE 150Ω VOD3 60Ω VTEST RTS N 50pF O Figure 4. Driver Voltage 3M75eΩasurement 04604-006 TxD C ISOLATI NI VA A L RxD A G B DE RTS RE TION 150Ω VDD1 GND1 VDD2 GND2 04604-008 A L TxD SO VDD2 Figure 8. RTS-to-DE Propagation Delay C I VANI A 195Ω VCC RxD GAL B 110Ω A 110Ω RE 195Ω TxD S1 S2 VDD1 GND1 VDD2 GND2 GND2 04604-004 RTS B 50pF VOUT 04604-009 Figure 5. Supply-Current Measurement Test Circuit Figure 9. Driver Enable/Disable A RTS DE VOUT TxD SOLATION VDD2 B RE CL 04604-012 VCM2(.H2Fk)Ω RxD GALVANIC I AB 111905ΩΩ470nF 50Ω110nFFTVEHSFT, +1.5V Figure 10. Receiver Propagation DelayV CC GND2 REENCFAEiBgIVLuVEEDreD1 6. H10i0gnhF FrGeNqDu1encVyD DC2om10m0noFn-MGNoDd2GeN ND12o95isΩe Test Ci5r0cVΩuTEitS2 T22kΩ 04604-010 –1.5VRE ISN1 RE CL VORULT S2 04604-013 Figure 11. Receiver Enable/Disable Rev. E | Page 10 of 20

Data Sheet ADM2486 SWITCHING CHARACTERISTICS VDD1 0.5VDD1 0.5VDD1 0V tPALH tPBHL 0.7VDD1 B tPBLH tPAHL RTS 0.5VDD1 0.5VDD1 VO 1/2VO 0.3VDD1 tZL tLZ A tSKEW tSKEW 2.3V tPWD= |tPALH – tPAHL|, |tPBLH – tPBHL| A,B VOH + 0.5V VOH 90% POINT 90% POINT tZH tHZ VOL AV,O BL 10% POINT tR tF 10% POINT 04604-011 A,B 2.3V VOH – 0.5V VO0HV 04604-021 Figure 12. Driver Propagation Delay, Rise/Fall Timing Figure 14. Driver Enable/Disable Timing 0.7VDD1 0.5VDD1 0.5VDD1 RE A – B 0.3VDD1 0V 0V tZL tLZ tPHL tPHL RxD 1.5V O/P LOW VOH + 0.5V VOH tZH tHZ VOL RxD 1.5V tSKEW= |tPLH – tPHL| 1.5V O/P HIGH VOH VOL04604-019 Rx0DV 1.5V VOH – 0.5V 04604-020 Figure 13. Receiver Propagation Delay Figure 15. Receiver Enable/Disable Timing Rev. E | Page 11 of 20

ADM2486 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1.4 1.2 IDD1_RCVR_ENABLE @ 5.5V A)1.0 m ENT (0.8 IDD2_DE_ENABLE @ 5.5V 1 R R U Y C0.6 L P P 2 SU0.4 0.2 0 –40 TEMPERA2T5URE (°C) 85 04604-029 4 CCHH13 22..0000VV CCHH24 22..0000VV MT 2 0 . 0 n6s.00000nsA CH2 3.12V 04604-025 Figure 16. Unloaded Supply Current vs. Temperature Figure 19. Driver/Receiver Propagation Delay, Low to High (RLDiff = 54 Ω, CL1 = CL2 = 100 pF) 50 RECEIVERtPLH 45 RECEIVERtPHL 40 1 35 s)30 n E (25 M TI20 3 15 10 05 –40 TEMPERA2T5URE (°C) 85 04604-026 4 CCHH13 52..0000VV CCHH24 22..0000VV MT 2 0 . 0 n–s444.400nsA CH1 2.60V 04604-028 Figure 17. Driver Propagation Delay vs. Temperature Figure 20. Driver/Receiver Propagation Delay, High to Low (RLDiff = 54 Ω, CL1 = CL2 = 100 pF) 50 350 DRIVERtBHL 45 DRIVERtALH 300 40 A) m 35 T ( 250 DRIVERtBLH DRIVERtAHL EN SIDE 2 ns)30 URR 200 ME (25 G C TI20 TIN 150 MI SIDE 1 15 Y-LI 100 T E 10 F A S 50 5 0 –40 TEMPERA2T5URE (°C) 85 04604-027 00 50CASE TEMP1E0R0ATURE (°C)150 200 04604-018 Figure 18. Receiver Propagation Delay vs. Temperature Figure 21. Thermal Derating Curve, Dependence of Safety-Limiting Values with Case Temperature per VDE 0884 Rev. E | Page 12 of 20

Data Sheet ADM2486 0 4.78 –5 4.76 mA) V) NT ( –10 GE ( 4.74 OUTPUT CURRE ––2105 AOUTPUT VOLT 44..7702 –25 4.68 –303.00 3.25 3.50 3.O7U5TPU4.T0 0VOL4T.A25GE (4V.5)0 4.75 5.00 5.25 04604-031 4.66–40 –25 –10 T5EMPER20ATURE3 5(°C) 50 65 80 04604-033 Figure 22. Output Current vs. Receiver Output High Voltage Figure 24. Receiver Output High Voltage vs. Temperature IRxD= −4 mA 35 0.32 30 0.30 mA) 25 V) NT ( GE ( 0.28 OUTPUT CURRE 121500 OUTPUT VOLTA 00..2246 0.22 050 0.25 0.50 0.75OU1T.P00UT V1.O25LTA1G.5E0 (V)1.75 2.00 2.25 2.50 04604-032 0.20–40 –25 –10 T5EMPER20ATURE3 5(°C) 50 65 80 04604-034 Figure 23. Output Current vs. Receiver Output Low Voltage Figure 25. Receiver Output Low Voltage vs. Temperature IRxD = –4 mA Rev. E | Page 13 of 20

ADM2486 Data Sheet CIRCUIT DESCRIPTION ELECTRICAL ISOLATION Table 9. Transmitting Supply Status Inputs Outputs1 In the ADM2486, electrical isolation is implemented on the V V RTS TxD A B DE DD1 DD2 logic side of the interface. Therefore, the part has two main On On H H H L H sections: a digital isolation section and a transceiver section On On H L L H H (see Figure 26). Driver input and request-to-send signals, On On L X Z Z L applied to the TxD and RTS pins, respectively, and referenced to On Off X X Z Z L logic ground (GND), are coupled across an isolation barrier to 1 Off On X X Z Z L appear at the transceiver section referenced to isolated ground Off Off X X Z Z L (GND). Similarly, the receiver output, referenced to isolated 2 ground in the transceiver section, is coupled across the isolation 1 The PV pin is tied high. barrier to appear at the RxD pin referenced to logic ground. iCoupler Technology Table 10. Receiving The digital signals are transmitted across the isolation barrier Supply Status Inputs Output1 using iCoupler technology. This technique uses chip-scale VDD1 VDD2 A − B (V) RE RxD transformer windings to couple the digital signals magnetically On On >0.2 L or NC H from one side of the barrier to the other. Digital inputs are On On <−0.2 L or NC L encoded into waveforms that are capable of exciting the primary On On −0.2 < A − B < 0.2 L or NC I transformer winding. At the secondary winding, the induced On On Inputs open L or NC H waveforms are then decoded into the binary value that was On On X H Z originally transmitted. On Off X L or NC H Off On X L or NC H VDD1 VDD2 Off Off X L or NC L ISOLATION BARRIER 1 The PV pin is tied high. A TxD ENCODE DECODE D POWER-UP/POWER-DOWN THRESHOLDS B The power-up/power-down characteristics of the ADM2486 are RTS ENCODE DECODE DE in accordance with the supply thresholds shown in Table 11. Upon power-up, the ADM2486 output signals (A, B, RxD, and RxD DECODE ENCODE R DE) reach their correct state once both supplies have exceeded their thresholds. Upon power-down, the ADM2486 output RE DIGGITNADL1ISOLATION GND2TRANSCEIVER 04604-022 sdirgonpasl sb reelotawin i ttsh peiorw ceorr-rdeocwt snt atther uesnhtoill dat. lWeahste no nthe eo Vf tDhDe1 spuopwpelrie-s Figure 26. ADM2486 Digital Isolation and Transceiver Sections down threshold is crossed, the ADM2486 output signals reach their unpowered states within 4 µs. TRUTH TABLES Table 11. Power-Up/Power-Down Thresholds The truth tables in this section use these abbreviations: Supply Transition Threshold (V) Letter Description V Power-up 2.0 DD1 H High level V Power-down 1.0 DD1 I Indeterminate V Power-up 3.3 DD2 L Low level V Power-down 2.4 DD2 X Irrelevant Z High impedance (off) NC Disconnected Rev. E | Page 14 of 20

Data Sheet ADM2486 100.000 THERMAL SHUTDOWN The ADM2486 contains thermal shutdown circuitry that protects C TI10.000 the part from excessive power dissipation during fault conditions. E Shorting the driver outputs to a low impedance source can result MAGNAUSS) in high driver currents. The thermal sensing circuitry detects E G1.000 Lk ttochhoueeot plidsnur, ctitvsrh eewear hsdoeeru inivtnp ea udr dsti seiae. rt Teetem hrmieps-p eecernirraacatbuutulrietredre uy ao nitfsd a1de 5tre0e stm°ihgCinps i eescdr ora enttoaudc ridhteiie soodanfb. 1alAen4 std0 ht° hdeCe ids. daribevvleeircs e MUMALLOWABFLUX DENSITY (0.100 AXI 0.010 M RECEIVER FAIL-SAFE INPUTS Tlohgeic r ehcigehiv eRrx iDnp ouutt ipnuctl uwdheesn a tfhaeil -Asa afne dfe Bat iunrpeu tthsa at rgeu faloraantitnege so ar 0.0011k 10kMAGNETI1C0 F0kIELD FREQ1MUENCY (Hz1)0M 100M 04604-016 open-circuited. Figure 27. Maximum Allowable External Magnetic Flux Density MAGNETIC FIELD IMMUNITY For example, at a magnetic field frequency of 1 MHz, the Because iCouplers use coreless technology, no magnetic maximum allowable magnetic field of 0.2 kGauss induces a components are present, and the problem of magnetic voltage of 0.25 V at the receiving coil. This is about 50% of the saturation of the core material does not exist. Therefore, sensing threshold and does not cause a faulty output transition. iCouplers have essentially infinite dc field immunity. The Similarly, if such an event occurs during a transmitted pulse and following analysis defines the conditions under which this can is the worst-case polarity, it reduces the received pulse from occur. The ADM2486’s 3 V operating condition is examined >1.0 V to 0.75 V. This is well above the 0.5 V sensing threshold because it represents the most susceptible mode of operation. of the decoder. The limitation on the iCoupler’s ac magnetic field immunity is Figure 28 shows the magnetic flux density values in terms of set by the condition in which the induced error voltage in the more familiar quantities such as maximum allowable current receiving coil (the bottom coil in this case) is made sufficiently flow at given distances away from the ADM2486 transformers. large, either to falsely set or reset the decoder. The voltage 1000.00 induced across the bottom coil is given by −dβ kA) DISTANCE = 1m V = ∑πr2 ; n = 1, 2, …, N T (100.00  dt  n EN RR DISTANCE = 5mm U where if the pulses at the transformer output are greater than E C 10.00 L 1.0 V in amplitude: B A W DISTANCE = 100mm β = magnetic flux density (gauss). LO 1.00 L A M N = number of turns in receiving coil. U M XI 0.10 r = radius of nth turn in receiving coil (cm). A n M Tthheer ed iesc ao d0e.5r Vha ms aa rsgeinns iinng w thhricehsh ionlddu ocfe dab vooultta 0g.e5s V c;a tnh beree fore, 0.011k 10kMAGNETI1C0 F0kIELD FREQ1MUENCY (Hz1)0M 100M 04604-017 tolerated. Figure 28. Maximum Allowable Current for Various Current-to-ADM2486 Spacings Given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the At combinations of strong magnetic field and high frequency, 0.5 V margin at the decoder, a maximum allowable magnetic any loops formed by printed circuit board traces could induce field is calculated as shown in Figure 27. sufficiently large error voltages to trigger the thresholds of succeeding circuitry. Care should be taken in the layout of such traces to avoid this possibility. Rev. E | Page 15 of 20

ADM2486 Data Sheet APPLICATIONS INFORMATION PC BOARD LAYOUT VDD1 The ADM2486 isolated RS-485 transceiver requires no external interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins VDD1 (see Figure 29). Bypass capacitors are most conveniently connected between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16 RESET ADM2486 ADM809Z PV for V . The capacitor value should be between 0.01 µF and 0.1 µF. DD2 The total lead length between both ends of the capacitor and the GND1 input power supply pin should not exceed 20 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9 and Pin 16 should also be considered unless the ground pair on each package side 2.32V 2.32V is connected close to the package. VDD1 2.0V 2.0V VDD1 VDD2 GND1 GND2 tPOR RRRxTDES ADM2486 NBAC RESET 04604-023 TxD NC GNPDV1 DGEND2 04604-002 Figure 30. Driving P V with ADM809Z NC = NO CONNECT VDD1 Figure 29. Recommended Printed Circuit Board Layout In applications involving high common-mode transients, care should be taken to ensure that board coupling across the isola- VDD1 tion barrier is minimized. Furthermore, the board layout should 10kΩ be designed such that any coupling that does occur equally affects all pins on a given component side. Failure to ensure this could RESET ADM2486 ADM809Z PV cause voltage differentials between pins exceeding the device’s 100pF Absolute Maximum Ratings, thereby leading to latch-up or GND1 permanent damage. POWER_VALID INPUT 2.32V 2.32V 2.0V 2.0V To avoid chatter on the A and B outputs caused by slow power- VDD1 up and power-down transients on V (>100 µs/V), the device DD1 features a power_valid (PV) digital input. This pin should be tPOR d2.r0iv Ve,n t hloisw p uinn tsihl oVuDlDd1 bexec dereidvse n2 .h0 iVgh. W. Choennv eVrDsDe1ly i,s u gproeant epro twhearn- RESET 04604-030 down, PV should be driven low before VDD1 reaches 2.0 V (see Figure 31. Driving PV with an Open-Drain Output Figure 30). If the PV pin is driven with an open-drain output, the recommended value for the pull-up resistor is a 10 kΩ resistor, bypassed with a 100 pF capacitor to GND (see Figure 31). 1 The power_valid input can be driven, for example, by the output of a system reset circuit, such as the ADM809Z, which has a threshold voltage of 2.32 V. Rev. E | Page 16 of 20

Data Sheet ADM2486 ISOLATED POWER SUPPLY CIRCUIT The ADM2486 requires isolated power capable of 5 V at up to approximately 75 mA (this current is dependent on the data rate and termination resistors used) to be supplied between the V and the GND pins. DD2 2 A transformer driver circuit with a center-tapped transformer and LDO can be used to generate the isolated 5 V supply, as shown in Figure 32. The center-tapped transformer provides electrical isolation of the 5 V isolated power supply. The primary winding of the transformer is excited with a pair of square waveforms that are 180° out of phase with each other. A pair of Schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. The ADP667 linear voltage regulator provides a regulated 5 V power supply to the ADM2486’s bus-side circuitry (V ). DD2 ISOLATION BARRIER VCC SD103C 5V IN OUT TRANSFORMER VCC 22µF 10µF DRIVER ADP667 78253 SD103C SET GND SHDN VCC ISO 5V 100nF 100nF VDD1 VDD2 ADM2486 GND1 GND2 04604-035 Figure 32. Isolated Power Supply Circuit Rev. E | Page 17 of 20

ADM2486 Data Sheet OUTLINE DIMENSIONS 10.50(0.4134) 10.10(0.3976) 16 9 7.60(0.2992) 7.40(0.2913) 1 8 10.65(0.4193) 10.00(0.3937) 1.27(0.0500) 0.75(0.0295) BSC 2.65(0.1043) 0.25(0.0098) 45° 0.30(0.0118) 2.35(0.0925) 8° 0.10(0.0039) 0° COPLANARITY 0.10 0.51(0.0201) SPLEAATNIENG 0.33(0.0130) 1.27(0.0500) 0.31(0.0122) 0.20(0.0079) 0.40(0.0157) RC(INOEFNPEATRRREOENNLCLTEIHNCEOGOSNDMELISPYM)LAEAIANNRNDSETIAORTRNOOESUJNANEORDDETEEDAICN-POSMPFTRIFALONLMPIDMIRLAELIRATIMTDEEESRTFSMEO;SRIRN-0ECU1QH3SU-EADIVAIINMAELDENENSSTIIOGSNNFS.OR 03-27-2007-B Figure 33. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 Data Rate (Mbps) Temperature Range Package Description Ordering Quantity Package Option ADM2486BRW 20 −40°C to +85°C 16-Lead SOIC_W 47 RW-16 ADM2486BRW-REEL 20 −40°C to +85°C 16-Lead SOIC_W 1,000 RW-16 ADM2486BRWZ 20 −40°C to +85°C 16-Lead SOIC_W 47 RW-16 ADM2486BRWZ-REEL 20 −40°C to +85°C 16-Lead SOIC_W 1,000 RW-16 EVAL-ADM2486EBZ ADM2486 Evaluation Board 1 Z = RoHS Compliant Part. Rev. E | Page 18 of 20

Data Sheet ADM2486 NOTES Rev. E | Page 19 of 20

ADM2486 Data Sheet NOTES ©2004–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04604-0-11/13(E) Rev. E | Page 20 of 20