Half-Duplex, iCoupler Isolated RS-485 Transceiver Data Sheet ADM2483 FEATURES FUNCTIONAL BLOCK DIAGRAM RS-485 transceiver with electrical data isolation VDD1 VDD2 Complies with ANSI TIA/EIA RS-485-A and ISO 8482: 1987(E) ADM2483 500 kbps data rate DE N Slew rate-limited driver outputs TIO A Low power operation: 2.5 mA max TxD OL S Suitable for 5 V or 3 V operations (VDD1) C I High common-mode transient immunity: >25 kV/μs PV ANI True fail-safe receiver inputs RxD ALV A G B 2C5h6a tnteord-efrse oen p bouwse r-up/power-down protection RE 04736-001 Thermal shutdown protection GND1 GND2 Safety and regulatory approvals Figure 1. UL recognition: 2500 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A IEC 60950-1 800 V rms (basic), 400 V rms (reinforced) VDE Certificate of Conformity DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 V = 560 V peak (reinforced) IORM V = 1500 V dc IORM(DC) CQC certification per GB4943.1-2011 Operating temperature range: −40°C to +85°C APPLICATIONS Low power RS-485/RS-422 networks Isolated interfaces Building control networks Multipoint data transmission systems GENERAL DESCRIPTION The ADM2483 differential bus transceiver is an integrated, When the driver is disabled or when V or V = 0 V, this DD1 DD2 galvanically isolated component designed for bidirectional data imposes minimal loading on the bus. An active-high receiver communication on balanced, multipoint bus transmission lines. disable feature, which causes the receive output to enter a high It complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E). impedance state, is provided as well. Using the iCoupler technology from Analog Devices, Inc., the The receiver inputs have a true fail-safe feature that ensures a ADM2483 combines a 3-channel isolator, a three-state differential logic-high receiver output level when the inputs are open or line driver, and a differential input receiver into a single package. shorted. This guarantees that the receiver outputs are in a The logic side of the device is powered with either a 5 V or 3 V known state before communication begins and at the point supply, and the bus side uses a 5 V supply only. when communication ends. The ADM2483 is slew-limited to reduce reflections with Current limiting and thermal shutdown features protect against improperly terminated transmission lines. The controlled slew output short circuits and bus contention situations that might rate limits the data rate to 500 kbps. The device’s input impedance cause excessive power dissipation. The part is fully specified is 96 kΩ, allowing up to 256 transceivers on the bus. Its driver over the industrial temperature range and is available in a has an active-high enable feature. The driver differential outputs 16-lead, wide body SOIC package. and receiver differential inputs are connected internally to form a differential input/output (I/O) port. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2004–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADM2483 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Switching Characteristics .............................................................. 10 Applications ....................................................................................... 1 Typical Performance Characteristics ........................................... 11 Functional Block Diagram .............................................................. 1 Circuit Description......................................................................... 14 General Description ......................................................................... 1 Electrical Isolation ...................................................................... 14 Revision History ............................................................................... 2 Truth Tables................................................................................. 15 Specifications ..................................................................................... 3 Power-Up/Power-Down Characteristics ................................. 15 Timing Specifications ....................................................................... 4 Thermal Shutdown .................................................................... 15 Absolute Maximum Ratings ............................................................ 5 True Fail-Safe Receiver Inputs .................................................. 15 ESD Caution .................................................................................. 5 Magnetic Field Immunity .......................................................... 15 Package Characteristics ............................................................... 6 Applications Information .............................................................. 17 Regulatory Information ............................................................... 6 Power_Valid Input ..................................................................... 17 Insulation and Safety-Related Specifications ............................ 6 Isolated Power Supply Circuit .................................................. 17 DIN V VDE V 0884-10 Insulation Characteristics ................. 7 Outline Dimensions ....................................................................... 18 Pin Configuration and Function Descriptions ............................. 8 Ordering Guide .......................................................................... 18 Test Circuits ....................................................................................... 9 REVISION HISTORY 3/2018—Rev. E to Rev. F 3/2005—Rev. A to Rev. B Changes to Feature Section ............................................................. 1 Change to Features ............................................................................ 1 Changes to Table 4 ............................................................................ 5 Change to Package Characteristics ................................................. 6 Changes to Table 6 and Table 7 ....................................................... 6 Changes to Pin Function Descriptions ........................................... 8 Changes to DIN V VDE V 0884-10 Insulation Characteristics Changes to Figure 9 and Figure 11 ............................................... 10 Section and Table 8 ........................................................................... 7 Change to Power_Valid Input Section ......................................... 17 Changes to Figure 30 ...................................................................... 17 9/2016—Rev. D to Rev. E Changes to Ordering Guide .......................................................... 18 Added Table 4; Renumbered Sequentially .................................... 5 1/2005—Rev. 0 to Rev. A 7/2015—Rev. C to Rev. D Changes to ESD Maximum Rating Specification .......................... 5 Change to Features Section ............................................................. 1 Changes to Table 5 and Table 6 ....................................................... 6 10/2004—Revision 0: Initial Version Changes to Ordering Guide .......................................................... 18 11/2013—Rev. B to Rev. C Changes to Features Section............................................................ 1 Changes to Table 5 ............................................................................ 6 Changes to VDE V 0884-10 Insulation Characteristics Section .... 7 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 Rev. F | Page 2 of 18

Data Sheet ADM2483 SPECIFICATIONS 2.7 V ≤ V ≤ 5.5 V, 4.75 V ≤ V ≤ 5.25 V, T = T to T , unless otherwise noted. DD1 DD2 A MIN MAX Table 1. Parameter Min Typ Max Unit Test Conditions/Comments DRIVER Differential Outputs Differential Output Voltage, V 5 V R = ∞, see Figure 3 OD 2.0 5 V R = 50 Ω (RS-422), see Figure 3 1.5 5 V R = 27 Ω (RS-485), see Figure 3 1.5 5 V V = −7 V to +12 V, V ≥ 4.75, TST DD1 see Figure 4 Δ |V | for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 3 OD Common-Mode Output Voltage, V 3 V R = 27 Ω or 50 Ω, see Figure 3 OC Δ |V | for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 3 OC Output Short-Circuit Current, V = High −250 +250 mA −7 V ≤ V ≤ +12 V OUT OUT Output Short-Circuit Current, V = Low −250 +250 mA −7 V ≤ V ≤ +12 V OUT OUT Logic Inputs Input High Voltage 0.7 V V TxD, DE, RE, PV DD1 Input Low Voltage 0.25 V V TxD, DE, RE, PV DD1 CMOS Logic Input Current (TxD, DE, RE, PV) −10 +0.01 +10 µA TxD, DE, RE, PV = V or 0 V DD1 RECEIVER Differential Inputs Differential Input Threshold Voltage, V −200 −125 −30 mV −7 V ≤ V ≤ +12 V TH CM Input Hysteresis 20 mV −7 V ≤ V ≤ +12 V CM Input Resistance (A, B) 96 150 kΩ −7 V ≤ V ≤ +12 V CM Input Current (A, B) 0.125 mA V = +12 V IN −0.1 mA V = −7 V IN RxD Logic Output Output High Voltage V − 0.1 V I = 20 µA, V − V = 0.2 V DD1 OUT A B V − 0.4 V − 0.2 V I = 4 mA, V − V = 0.2 V DD1 DD1 OUT A B Output Low Voltage 0.1 V I = −20 µA, V − V = −0.2 V OUT A B 0.4 V I = −4 mA, V − V = −0.2 V OUT A B Output Short-Circuit Current 7 85 mA V = GND or V OUT CC Three-State Output Leakage Current ±1 µA 0.4 V ≤ V ≤ 2.4 V OUT POWER SUPPLY CURRENT Logic Side 2.5 mA 4.5 V ≤ V ≤ 5.5 V, outputs unloaded, DD1 RE = 0 V 1.3 mA 2.7 V ≤ V ≤ 3.3 V, outputs unloaded, DD1 RE = 0 V Bus Side 2.0 mA Outputs unloaded, DE = 5 V 1.7 mA Outputs unloaded, DE = 0 V COMMON-MODE TRANSIENT IMMUNITY1 25 kV/µs TxD = V or 0 V, V = 1 kV, DD1 CM transient magnitude = 800 V 1 Common-mode transient immunity is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. Rev. F | Page 3 of 18

ADM2483 Data Sheet TIMING SPECIFICATIONS 2.7 V ≤ V ≤ 5.5 V, 4.75 V ≤ V ≤ 5.25 V, T = T to T , unless otherwise noted. DD1 DD2 A MIN MAX Table 2. Parameter Min Typ Max Unit Test Conditions/Comments DRIVER Maximum Data Rate 500 kbps Propagation Delay, t , t 250 620 ns R = 54 Ω, C = C = 100 pF, see Figure 5 and Figure 9 PLH PHL LDIFF L1 L2 Skew, t 40 ns R = 54 Ω, C = C = 100 pF, see Figure 5 and Figure 9 SKEW LDIFF L1 L2 Rise/Fall Time, t, t 200 600 ns R = 54 Ω, C = C = 100 pF, see Figure 5 and Figure 9 R F LDIFF L1 L2 Enable Time 1050 ns R = 500 Ω, C = 100 pF, see Figure 6 and Figure 11 L L Disable Time 1050 ns R = 500 Ω, C = 15 pF, see Figure 6 and Figure 11 L L RECEIVER Propagation Delay, t , t 400 1050 ns C = 15 pF, see Figure 7 and Figure 10 PLH PHL L Differential Skew, t 250 ns C = 15 pF, see Figure 7 and Figure 10 SKEW L Enable Time 25 70 ns R = 1 kΩ, C = 15 pF, see Figure 8 and Figure 12 L L Disable Time 40 70 ns R = 1 kΩ, C = 15 pF, see Figure 8 and Figure 12 L L POWER VALID INPUT Enable Time 1 2 µs Disable Time 3 5 µs Rev. F | Page 4 of 18

Data Sheet ADM2483 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. All voltages are relative to A Table 4. Maximum Continuous Working Voltage1 their respective ground. Parameter Max Unit Reference Standard AC Voltage Table 3. Bipolar Waveform Parameter Rating Basic Insulation 565 V 50-year minimum lifetime V −0.5 V to +7 V PEAK DD1 Reinforced 565 V 50-year minimum lifetime V −0.5 V to +6 V PEAK DD2 Insulation Digital Input Voltage (DE, RE, TxD) −0.5 V to V + 0.5 V DD1 Unipolar Waveform Digital Output Voltage Basic Insulation 1131 V 50-year minimum lifetime PEAK RxD −0.5 V to V + 0.5 V DD1 Reinforced 1131 V 50-year minimum lifetime PEAK Driver Output/Receiver Input Voltage −9 V to +14 V Insulation ESD Rating: Contact DC Voltage Human Body Model (A, B Pins) ±2 kV Basic Insulation 1517 V Pollution Degree 2, PEAK Operating Temperature Range −40°C to +85°C Material Group I Storage Temperature Range −55°C to +150°C Reinforced 757 V Pollution Degree 2, PEAK Average Output Current per Pin −35 mA to +35 mA Insulation Material Group I θJA Thermal Impedance 73°C/W 1 Refers to continuous voltage magnitude imposed across the isolation Lead Temperature barrier. Soldering (10 sec) 260°C ESD CAUTION Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. F | Page 5 of 18

ADM2483 Data Sheet PACKAGE CHARACTERISTICS Table 5. Parameter Symbol Min Typ Max Unit Test Conditions Resistance (Input-Output)1 R 1012 Ω I-O Capacitance (Input-Output)1 C 3 pF f = 1 MHz I-O Input Capacitance2 C 4 pF I Input IC Junction-to-Case Thermal Resistance θ 33 °C/W Thermocouple located at center of package JCI underside Output IC Junction-to-Case Thermal Resistance θ 28 °C/W Thermocouple located at center of package JCO underside 1 Device considered a 2-terminal device: Pins 1, 2, 3, 4, 5, 6, 7, and 8 shorted together, and Pins 9, 10, 11, 12, 13, 14, 15, and 16 shorted together. 2 Input capacitance is from any input data pin to ground. REGULATORY INFORMATION The ADM2483 has been approved by the following organizations: Table 6. UL1 CSA CQC VDE2 Recognized Under 1577 Approved under CSA Approved Under Certified according to Component Component Acceptance CQC11-471543-2012 DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 Recognition Program Notice 5A IEC 609501 800 V rms Basic insulation per Reinforced insulation, V = 565 V peak, IORM (1131 V ) basic, 400 V rms GB4943.1-2011, 415 V rms V = 1500 V dc PEAK IORM(DC) (565 V ) reinforced (588 V ) maximum working PEAK PEAK voltage, tropical climate, altitude ≤ 5000 meters File E214100 File 205078 File CQC14001114898 File 2471900-4880-0001 1 In accordance with UL1577, each ADM2483 is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current leakage detection limit = 5 µA). 2 In accordance with VDE V 0884-10, each ADM2483 is proof tested by applying an insulation test voltage ≥2813 VPEAK for 1 sec (partial discharge detection limit = 5 pC). INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 7. Parameter Symbol Value Unit Conditions Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration Minimum External Air Gap (Clearance) L(I01) 7.6 min mm Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage) L(I02) 7.6 min mm Measured from input terminals to output terminals, shortest distance along body Minimum Clearance in the Plane of the Printed Circuit L(PCB) 8.1 min mm Board (PCB Clearance) Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >400 or V DIN IEC 112/VDE 0303 Part 11 >600 Isolation Group I or II Material Group (Table 1 in DIN VDE 0110,1/89)1 1 An ampersand (&) on the physical package denotes the CSA attestation of CTI>600 V and isolation of Material Group I. Rev. F | Page 6 of 18

Data Sheet ADM2483 DIN V VDE V 0884-10 INSULATION CHARACTERISTICS This isolator is suitable for reinforced electrical isolation only within this safety limit data. Maintenance of this safety data shall be ensured by means of protective circuits. An asterisk (*) on the physical package denotes DIN V VDE V 0884-10 approval. Table 8. Description Test Conditions/Comments Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤150 V rms I to IV For Rated Mains Voltage ≤300 V rms I to III For Rated Mains Voltage ≤400 V rms I to II Climatic Classification 40/100/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage See Absolute Maximum Ratings1 Reinforced V 560 V IORM PEAK DC (Basic) V 1500 V IORM(DC) DC Input to Output test Voltage, Method b1 V × 1.875 = V , 100% production tested, V 2813 V IORM(DC) pd(m) pd(m) PEAK t = t = 1 sec, partial discharge <5 pC ini m Input-to-Output Test Voltage, Method a After Environmental Tests, Subgroup 1 V × 1.5 = V , t = 60 sec, V 2250 V IORM(DC) pd(m) ini pd(m) PEAK t = 10 sec, partial discharge <5 pC m After Input and/or Safety Test, V × 1.2 = V , t = 60 sec, V 1800 V IORM(DC) pd(m) ini pd(m) PEAK Subgroup 2 and Subgroup 3 t = 10 sec, partial discharge <5 pC m Highest Allowable Overvoltage V 4200 V IOTM PEAK Surge Isolation Voltage Reinforced V = 10 kV V 6250 V PEAK IOSM PEAK Safety-Limiting Values Maximum value allowed in the event of a failure; see Figure 23 Maximum Junction Temperature T 150 °C S Input Current I 265 mA S, INPUT Output Current I 335 mA S, OUTPUT Insulation Resistance at T V = 500 V R >109 Ω S IO S 1 The Absolute Maximum Ratings section places limitations on the device due to 50-year lifetime to 1% failure or due to package restrictions (on maximum continuous working voltage for ac bipolar, ac unipolar, and dc voltages, as well as basic and reinforced insulation). Rev. F | Page 7 of 18

ADM2483 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VDD1 1 16 VDD2 GND11 2 15 GND21 RxD 3 ADM2483 14 NC RE 4 TOP VIEW 13 B DE 5 (Not to Scale) 12 A TxD 6 11 NC PV 7 10 NC GND11 8 9 GND21 NC = NO CONNECT 1PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. EPEIIITNTHH 9EE ARRN OODRR P BBINOO 1TT5HH AMMRAAEYY I NBBTEEE UURSSNEEADDL LFFYOO RRC OGGNNNNDDE12..CTED. 04736-002 Figure 2. Pin Configuration Table 9. Pin Function Descriptions Pin No. Mnemonic Description 1 V Power Supply (Logic Side). DD1 2, 8 GND Ground (Logic Side). 1 3 RxD Receiver Output Data. When enabled, if (A − B) ≥ −30 mV, then RxD = high. If (A − B) ≤ −200 mV, then RxD = low. This is a tristate output when the receiver is disabled, that is, when RE is driven high. 4 RE Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and driving it high disables the receiver. 5 DE Driver Enable Input. Driving the input high enables the driver, and driving it low disables the driver. 6 TxD Transmit Data Input. Data to be transmitted by the driver is applied to this input. 7 PV Power_Valid. Used during power-up and power-down. See the Applications Information section. 9, 15 GND Ground (Bus Side). 2 10, 11, 14 NC No Connect. 12 A Noninverting Driver Output/Receiver Input. When the driver is disabled, or when V or V is DD1 DD2 powered down, Pin A is put into a high impedance state to avoid overloading the bus. 13 B Inverting Driver Output/Receiver Input. When the driver is disabled, or when V or V is powered DD1 DD2 down, Pin B is put into a high impedance state to avoid overloading the bus. 16 V Power Supply (Bus Side). DD2 Rev. F | Page 8 of 18

Data Sheet ADM2483 TEST CIRCUITS VCC A R RL 0V OR 3V S1 S2 VOD R VOC 04736-003 DE IN DE B CVOLUT 04736-006 Figure 3. Driver Voltage Measurement Figure 6. Driver Enable/Disable 375Ω A VOD3 60Ω375Ω VTEST 04736-004 B RE CL VOUT 04736-007 Figure 4. Driver Voltage Measurement Figure 7. Receiver Propagation Delay +1.5V VCC S1 A CL1 –1.5V RL B RLDIFF CL2 04736-005 RE IN RE CVOLUT S2 04736-008 Figure 5. Driver Propagation Delay Figure 8. Receiver Enable/Disable Rev. F | Page 9 of 18

ADM2483 Data Sheet SWITCHING CHARACTERISTICS VDD1 0.5VDD1 0.5VDD1 0.7VDD1 DE 0.5VDD1 0.5VDD1 0V tPLH tPHL 0.3VDD1 B 1/2VO tZL tLZ VO A tSKEW= |tPLH–tPHL| A,B 2.3V VOL + 0.5V VOL VOH 90% POINT 90% POINT tZH tHZ A, B VOH 10% POINT 10% POINT A,B VOH– 0.5V VOL tR tF 04736-009 2.3V 0V 04736-011 Figure 9. Driver Propagation Delay, Rise/Fall Timing Figure 11. Driver Enable/Disable Timing 0.7VDD1 RE 0.5VDD1 0.5VDD1 0.3VDD1 tZL tLZ A– B 0V 0V RxD 1.5V O/P LOW VOL + 0.5V tPLH tPHL VOL tZH tHZ VOH O/P HIGH VOH RxD 1.5V tSKEW= |tPLH–tPHL| 1.5V VOL 04736-010 Rx0DV 1.5V VOH– 0.5V 04736-012 Figure 10. Receiver Propagation Delay Figure 12. Receiver Enable/Disable Timing Rev. F | Page 10 of 18

Data Sheet ADM2483 TYPICAL PERFORMANCE CHARACTERISTICS 1.6 0.32 IDD1_RCVR_ENABLE@ 5.5V 1.4 0.30 1.2 T (mA) 1.0 GE (V) 0.28 N A E T R L R 0.8 O 0.26 U V Y C IDD2_DE_ENABLE @ 5.5V UT L 0.6 P PP UT 0.24 U O S 0.4 0.22 0.02 04736-038 0.20 04736-031 –40 25 85 –40 –25 –10 5 20 35 50 65 80 TEMPERATURE (°C) TEMPERATURE (°C) Figure 13. Unloaded Supply Current vs. Temperature Figure 16. Receiver Output Low Voltage vs. Temperature, I = –4mA 120 4.78 100 4.76 OUTPUT CURRENT (mA) 864000 OUTPUT VOLTAGE (V) 444...777420 20 4.68 0 04736-014 4.66 04736-032 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 –40 –25 –10 5 20 35 50 65 80 OUTPUT VOLTAGE (V) TEMPERATURE (°C) Figure 14. Output Current vs. Driver Output Low Voltage Figure 17. Receiver Output High Voltage vs. Temperature, I = 4 mA 90 –10 80 mA) 70 T (mA) –30 RENT ( 60 N R RE –50 CU 50 T CUR TPUT 40 OUTPU –70 VER OU 30 RI 20 –90 D –110 04736-015 100 04736-013 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT VOLTAGE (V) DIFFERENTIAL OUTPUT VOLTAGE (V) Figure 15. Output Current vs. Driver Output High Voltage Figure 18. Driver Output Current vs. Differential Output Voltage Rev. F | Page 11 of 18

ADM2483 Data Sheet 460 tP_BLH @ VDD1 = VDD2 = 5.0V 440 1 tP_AHL @ VDD1 = VDD2 = 5.0V 420 s) n E ( 400 TIM tVPD_DB1H =L @VDD2 = 5.0V 380 tP_ALH @ 360 VDD1 = VDD2 = 5.0V 2 340 04736-034 4 04736-022 –40 25 85 CH1 5.00V CH2 1.00V M200ns A CH1 3.10V TEMPERATURE (C) CH3 1.00V CH4 5.00V T 1.33600s Figure 19. Driver Propagation Delay vs. Temperature Figure 21. Driver/Receiver Propagation Delay High to Low 800 RCVRPROP HL/VDD1 = VDD2 = 5.0V 700 1 600 500 LRHCV/VRDPDR1 O= PVDD2 = 5.0V s) n E ( 400 M TI 300 200 2 1000 04736-035 4 04736-023 –40 25 85 CH1 5.00V CH2 1.00V M200ns A CH1 3.10V TEMPERATURE (C) CH3 1.00V CH4 5.00V T 360.000ns Figure 20. Receiver Propagation Delay vs. Temperature Figure 22. Driver/Receiver Propagation Delay Low to High Rev. F | Page 12 of 18

Data Sheet ADM2483 350 35 300 30 A) m T ( 250 A) 25 N m RE BUS SIDE T ( R N U 200 E 20 C R MITING 150 UT CUR 15 TY-LI 100 LOGIC SIDE OUTP 10 E F A S 500 04736-024 05 04736-037 0 50 100 150 200 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 CASE TEMPERATURE (°C) OUTPUT VOLTAGE (V) Figure 23. Thermal Derating Curve, Dependence of Safety-Limiting Values Figure 25. Output Current vs. Receiver Output Low Voltage with Case Temperature per VDE V 0884 0 –5 A) m –10 NT ( E R R –15 U C UT TP –20 U O –25 –30 04736-036 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 OUTPUT VOLTAGE (V) Figure 24. Output Current vs. Receiver Output High Voltage Rev. F | Page 13 of 18

ADM2483 Data Sheet CIRCUIT DESCRIPTION ELECTRICAL ISOLATION iCoupler Technology In the ADM2483, electrical isolation is implemented on the The digital signals are transmitted across the isolation barrier logic side of the interface. Therefore, the part has two main using iCoupler technology. This technique uses chip scale trans- sections: a digital isolation section and a transceiver section (see former windings to couple the digital signals magnetically from Figure 26). Driver input and data enable signals, applied to the one side of the barrier to the other. Digital inputs are encoded into TxD and DE pins, respectively, and referenced to logic ground waveforms that are capable of exciting the primary transformer (GND), are coupled across an isolation barrier to appear at the winding. At the secondary winding, the induced waveforms are 1 transceiver section referenced to isolated ground (GND). then decoded into the binary value that was originally transmitted. 2 Similarly, the receiver output, referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the RxD pin referenced to logic ground. VDD1 VDD2 ISOLATION BARRIER A TxD ENCODE DECODE D B DE ENCODE DECODE RxD ENCODE DECODE R RE DIGITAL ISOLATION TRANSCEIVER 04736-025 GND1 GND2 Figure 26. ADM2483 Digital Isolation and Transceiver Sections Rev. F | Page 14 of 18

Data Sheet ADM2483 TRUTH TABLES THERMAL SHUTDOWN The following truth tables use these abbreviations: The ADM2483 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Letter Description Shorting the driver outputs to a low impedance source can result H High level in high driver currents. The thermal sensing circuitry detects L Low level the increase in die temperature under this condition and disables X Irrelevant the driver outputs. This circuitry is designed to disable the Z High impedance (off) driver outputs when a die temperature of 150°C is reached. As NC Disconnected the device cools, the drivers are re-enabled at a temperature of 140°C. Table 10. Transmitting TRUE FAIL-SAFE RECEIVER INPUTS Supply Status Inputs Outputs The receiver inputs have a true fail-safe feature, which ensures VDD1 VDD2 DE TxD A B that the receiver output is high when the inputs are open or On On H H H L shorted. During line-idle conditions, when no driver on the bus On On H L L H is enabled, the voltage across a terminating resistance at the receiver On On L X Z Z input decays to 0 V. With traditional transceivers, receiver input On Off X X Z Z thresholds specified between −200 mV and +200 mV mean that Off On X X Z Z external bias resistors are required on the A and B pins to ensure Off Off X X Z Z that the receiver outputs are in a known state. The true fail-safe receiver input feature eliminates the need for bias resistors by specifying the receiver input threshold between −30 mV and Table 11. Receiving −200 mV. The guaranteed negative threshold means that when Supply Status Inputs Outputs the voltage between A and B decays to 0 V, the receiver output is guaranteed to be high. VDD1 VDD2 A − B (V) RE RxD On On >−0.03 L or NC H MAGNETIC FIELD IMMUNITY On On <−0.2 L or NC L Because iCouplers use a coreless technology, no magnetic −0.2 < A − B < components are present, and the problem of magnetic saturation On On −0.03 L or NC Indeterminate of the core material does not exist. Therefore, iCouplers have On On Inputs open L or NC H essentially infinite dc field immunity. The analysis that follows On On X H Z defines the conditions under which this might occur. The 3 V On Off X L or NC H operating condition of the ADM2483 is examined because it Off On X L or NC H represents the most susceptible mode of operation. Off Off X L or NC L The limitation on the iCoupler’s ac magnetic field immunity is set by the condition in which the induced error voltage in the POWER-UP/POWER-DOWN CHARACTERISTICS receiving coil (the bottom coil in this case) is made sufficiently large, either to falsely set or reset the decoder. The voltage The power-up/power-down characteristics of the ADM2483 are induced across the bottom coil is given by in accordance with the supply thresholds shown in Table 12. Upon power-up, the ADM2483 output signals (A, B, and RxD) V=−dβ∑πr2; n= 1,2,...,N reach their correct state once both supplies exceed their thresholds.  dt  n Upon power-down, the ADM2483 output signals retain their where if the pulses at the transformer output are greater than correct state until at least one of the supplies drops below its 1.0 V in amplitude: power-down threshold. When the VDD1 power-down threshold β= magnetic flux density (gauss) is crossed, the ADM2483 output signals reach their unpowered N= number of turns in receiving coil states within 4 µs. r = radius of nth turn in receiving coil (cm) n Table 12. Power-Up/Power-Down Thresholds The decoder has a sensing threshold of about 0.5 V; therefore, Supply Transition Threshold (V) there is a 0.5 V margin in which induced voltages can be tolerated. V Power-up 2.0 DD1 Given the geometry of the receiving coil and an imposed V Power-down 1.0 DD1 requirement that the induced voltage is, at most, 50% of the V Power-up 3.3 DD2 0.5 V margin at the decoder, a maximum allowable magnetic V Power-down 2.4 DD2 field is calculated, as shown in Figure 27. Rev. F | Page 15 of 18

ADM2483 Data Sheet 100.000 1000.00 A) DISTANCE = 1m C k MUM ALLOWABLE MAGNETIFLUX DENSITY (kGAUSS)1010...001000000 UM ALLOWABLE CURRENT (101010...000000 DISTANDCISET =A 5NmCmE = 100mm AXI 0.010 XIM 0.10 M A 0.001 04736-027 M 0.01 04736-028 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY (Hz) MAGNETIC FIELD FREQUENCY (Hz) Figure 27. Maximum Allowable External Magnetic Flux Density Figure 28. Maximum Allowable Current for Various Current-to-ADM2483 Spacings For example, at a magnetic field frequency of 1 MHz, the maxi- At combinations of strong magnetic field and high frequency, mum allowable magnetic field of 0.2 kGauss induces a voltage any loops formed by printed circuit board traces could induce of 0.25 V at the receiving coil. This is about 50% of the sensing large enough error voltages to trigger the thresholds of succeeding threshold and does not cause a faulty output transition. Similarly, if circuitry. To avoid this possibility, care should be taken in the such an event occurs during a transmitted pulse and is the worst- layout of such traces. case polarity, it reduces the received pulse from >1.0 V to 0.75 V. This is well above the 0.5 V sensing threshold of the decoder. These magnetic flux density values are shown in Figure 28, using more familiar quantities such as maximum allowable current flow, at given distances away from the ADM2483 transformers. Rev. F | Page 16 of 18

Data Sheet ADM2483 APPLICATIONS INFORMATION POWER_VALID INPUT ISOLATED POWER SUPPLY CIRCUIT To avoid chatter on the A and B outputs caused by slow power-up The ADM2483 requires isolated power capable of 5 V at 100 mA and power-down transients on VDD1 (>100 μs/V), the ADM2483 to be supplied between the VDD2 and GND2 pins. If no suitable features a power_valid (PV) digital input. This pin should be integrated power supply is available, a discrete circuit, such as driven low until V exceeds 2.0 V. When V is greater than the one in Figure 30, can be used. A center-tapped transformer DD1 DD1 provides electrical isolation. The primary winding is excited 2.0 V, the pin should be driven high. Conversely, upon power- down, the PV should be driven low before V reaches 2.0 V. with a pair of square waveforms that are 180° out of phase with DD1 each other. A pair of Schottky diodes and a smoothing capacitor The power_valid input can be driven, for example, by the output of are used to create a rectified signal from the secondary winding. a system reset circuit such as the ADM809Z, which has a threshold The ADP667 linear voltage regulator provides a regulated voltage of 2.32 V. power supply to the ADM2483’s bus-side circuitry. VDD1 To create the pair of square waves, a D-type flip-flop with comple- mentary Q/Q outputs is used. The flip-flop can be connected so VDD1 that output Q follows the clock input signal. If no local clock ADM2483 signal is available, a simple digital oscillator can be implemented RESET ADM809Z PV with a hex-inverting Schmitt trigger and a resistor and capacitor. GND1 In this case, values of 3.9 kΩ and 1 nF generate a 364 kHz square wave. A pair of discrete NMOS transistors, switched by the Q/Q flip-flop outputs, conduct current through the center tap of the 2.32V 2.32V VDD1 2.0V 2.0V primary transformer, winding in an alternating fashion. RESET tPOR 04736-029 Figure 29. Driving PV with ADM809Z VCC 100nF ISOLATION 3.9k BARRIER VCC PR CLR BS107A SD103C IN OUT 5V 100nF D Q VCC 22F ADP667 74HC74A BS107A SET GND SHDN CLK Q 74HC14 78253SD103C 1nF VCC VDD1 VDD2 ADM2483 GND1 GND2 04736-030 Figure 30. Isolated Power Supply Circuit Rev. F | Page 17 of 18

ADM2483 Data Sheet OUTLINE DIMENSIONS 10.50(0.4134) 10.10(0.3976) 16 9 7.60(0.2992) 7.40(0.2913) 1 8 10.65(0.4193) 10.00(0.3937) 1.27(0.0500) 0.75(0.0295) BSC 2.65(0.1043) 0.25(0.0098) 45° 0.30(0.0118) 2.35(0.0925) 8° 0.10(0.0039) 0° COPLANARITY 0.10 0.51(0.0201) SPELAATNIENG 0.33(0.0130) 1.27(0.0500) 0.31(0.0122) 0.20(0.0079) 0.40(0.0157) C(RINOEFNPEATRRREOENNLCLTEIHNCEOGOSNDMELISPYM)LAEAIANNRNDSETIAORTRNOOESUJNANEORDDETEEDAICN-POSMPFTRIFALONLMPIDMIRLAELIRATIMTDEEESRTFSMEO;SRIRN-0ECU1QH3SU-EADIVAIINMAELDENENSSTIIOGSNNFS.OR 03-27-2007-B Figure 31. 16-Lead Standard Small Outline Package [SOIC_W] Wide Body (RW-16) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1, 2 Data Rate (kbps) Temperature Range Package Description Package Option ADM2483BRW 500 −40°C to +85°C 16-Lead, Wide Body SOIC_W RW-16 ADM2483BRW-REEL 500 −40°C to +85°C 16-Lead, Wide Body SOIC_W RW-16 ADM2483BRWZ 500 −40°C to +85°C 16-Lead, Wide Body SOIC_W RW-16 ADM2483BRWZ-REEL 500 −40°C to +85°C 16-Lead, Wide Body SOIC_W RW-16 EVAL-ADM2483EBZ ADM2483 Evaluation Board 1 Z = RoHS Compliant Part. 2 -REEL suffix designates a 13-inch (1,000 units) tape-and-reel option. ©2004–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04736-0-3/18(F) Rev. F | Page 18 of 18

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADM2483BRW ADM2483BRWZ-REEL ADM2483BRW-REEL ADM2483BRWZ EVAL-ADM2483EBZ