400 MHz to 2700 MHz ¼ Watt RF Driver Amplifier Data Sheet ADL5320 FEATURES FUNCTIONAL BLOCK DIAGRAM Operation: 400 MHz to 2700 MHz GND Gain of 16.9 dB at 880 MHz (2) OIP3 of 45.0 dBm at 880 MHz ADL5320 P1dB of 25.4 dBm at 880 MHz Noise figure: 4.1 dB at 880 MHz BIAS PPoowweerr ssuuppppllyy vcuorltraegnet:: 434.3 m VA t oto 5 1 V0 4 mA RF1IN GN2D RF3OUT 05840-001 Dynamically adjustable bias Figure 1. No bias resistor required Thermally efficient, MSL-1 rated SOT-89 package Operating temperature range: −40°C to +105°C ESD rating of ±4 kV (Class 3A) APPLICATIONS Wireless infrastructure Automated test equipment ISM/AMR applications GENERAL DESCRIPTION The ADL5320 incorporates a dynamically adjustable biasing The ADL5320 also delivers excellent adjacent channel power circuit that allows for the customization of OIP3 and P1dB ratio (ACPR) vs. output power and bias voltage. The driver can performance from 3.3 V to 5 V without the need for an external deliver greater than 17 dBm of output power at 2140 MHz while bias resistor. This feature gives the designer the ability to tailor achieving an ACPR of −55 dBc at 5 V. If the bias is reduced to driver amplifier performance to the specific needs of the design. 3.3 V, the −55 dBc ACPR output power reduces to 9 dBm. This feature also creates the opportunity for dynamic biasing of –20 the driver amplifier, where a variable supply is used to allow for full 5 V biasing under large signal conditions and then can reduce Bc) –30 d the supply voltage when signal levels are smaller and lower power T ( E S –40 consumption is desirable. This scalability reduces the need to F F O SOURCE evaluate and inventory multiple driver amplifiers for different ER –50 VCC = 5V output power requirements from 22 dBm to 26 dBm output RRI VCC = 3.3V A power levels. C –60 Hz The ADL5320 is also rated to operate across the wide temperature @ 5M –70 range of −40°C to +105°C for reliable performance in designs R P that experience higher temperatures, such as power amplifiers. AC –80 The 1∕ watt driver amplifier also covers the 400 MHz to 2700 MHz 4 –90 wtoi dbee ftruenqueden tcoy a r asnpgeec iafnicd b oannldy rweiqtuhiirne st ha afte ww iedxet errannagle c. oTmhipso hnigenht s –20 –15 –10 –5 POUT 0(dBm) 5 10 15 20 05840-131 performance, broadband RF driver amplifier is well suited for a Figure 2. ACPR vs. Output Power, Single Carrier W-CDMA TM1-64 at variety of wired and wireless applications including cellular 2140 MHz infrastructure, ISM band power amplifiers, defense equipment, and instrumentation equipment. A fully populated evaluation board is available. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2008–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADL5320 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 High Temperature and 3.3 V Operation ................................. 11 Applications ....................................................................................... 1 Applications Information .............................................................. 12 Functional Block Diagram .............................................................. 1 Basic Layout Connections ......................................................... 12 General Description ......................................................................... 1 Soldering Information and Recommended PCB Revision History ............................................................................... 2 Land Pattern ................................................................................ 13 Specifications ..................................................................................... 3 Matching Procedure ................................................................... 14 Typical Scattering Parameters ..................................................... 4 Optimizing OP1dB .................................................................... 15 Absolute Maximum Ratings ............................................................ 5 W-CDMA ACPR Performance ................................................ 15 Thermal Resistance ...................................................................... 5 Evaluation Board ............................................................................ 16 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 18 Pin Configuration and Function Descriptions ............................. 6 Ordering Guide .......................................................................... 18 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 10/13—Rev. A to Rev. B Changes to Operating Temperature Range Parameter, Changed 1805 MHz to 2110 MHz .............................. Throughout Table 3 .................................................................................................5 Changes to Figure 27 ...................................................................... 10 Added Thermal Resistance Section and Table 4; Renumbered Changes to Figure 34 and Table 6 ................................................. 12 Sequentially ........................................................................................5 Changes to Figure 35 ...................................................................... 13 Added EPAD Notation to Figure 3 ................................................. 6 Changes to Matching Procedures Section ................................... 14 Added Figure 27 ............................................................................. 10 Added Optimizing OP1dB Section, Table 10, Table 11, Added High Temperature and 3.3 V Operation Section and Table 12, and Figure 39; Renumbered Sequentially ................... 15 Figure 28 to Figure 33 .................................................................... 11 Changes to Evaluation Board Section ............................................. 16 Added Applications Information Section and Figure 35 .......... 12 Updated Outline Dimensions ....................................................... 18 Changes to Soldering Information and Recommended PCB Changes to Ordering Guide .......................................................... 18 Land Pattern .................................................................................... 12 Changed −82 dBc to −80 dBc in W-CDMA ACPR Performance 6/12—Rev. 0 to Rev. A Section .............................................................................................. 14 Changes to Features Section and General Description Section ........ 1 Added Figure 39 ............................................................................. 14 Added Application Section and Figure 2; Renumbered Updated Outline Dimensions ....................................................... 17 Sequentially ....................................................................................... 1 Changes to Specifications Section .................................................. 3 2/08—Revision 0: Initial Version Deleted θ (Junction to Paddle) Parameter, Table 3 .................... 5 JC Rev. B | Page 2 of 20

Data Sheet ADL5320 SPECIFICATIONS T = 25°C, unless otherwise noted. A Table 1. 3.3 V 5 V Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit OVERALL FUNCTION Frequency Range 400 2700 400 2700 MHz FREQUENCY = 880 MHz Gain1 15.6 16.3 16.9 17.5 dB vs. Frequency ±50 MHz ±0.2 ±0.3 dB vs. Temperature −40°C ≤ T ≤ +85°C ±0.6 ±0.6 dB A vs. Supply 3.2 V to 3.4 V, 4.75 V to 5.25 V ±0.2 ±0.1 dB Output 1 dB Compression Point 21.5 25.4 dBm Output Third-Order Intercept Δf = 1 MHz, P = 10 dBm per tone 34 45 dBm OUT Noise Figure 3.2 4.1 dB FREQUENCY = 2140 MHz Gain1 12.2 12.4 13.2 14.0 dB vs. Frequency ±50 MHz ±0.3 ±0.33 dB vs. Temperature −40°C ≤ T ≤ +85°C ±0.7 ±0.8 dB A vs. Supply 3.2 V to 3.4 V, 4.75 V to 5.25 V ±0.15 ±0.06 dB Output 1 dB Compression Point 22.6 25.7 dBm Output Third-Order Intercept Δf = 1 MHz, P = 10 dBm per tone 32 42 dBm OUT Noise Figure 3.7 4.4 dB FREQUENCY = 2600 MHz Gain1 10.7 11.5 12.5 13.4 dB vs. Frequency ±100 MHz ±0.2 ±0.6 dB vs. Temperature −40°C ≤ T ≤ +85°C ±0.6 ±1.1 dB A vs. Supply 3.2 V to 3.4 V, 4.75 V to 5.25 V ±0.2 ±0.1 dB Output 1 dB Compression Point 25.7 27.4 dBm Output Third-Order Intercept Δf = 1 MHz, P = 10 dBm per tone 29 37 dBm OUT Noise Figure 4.1 5.1 dB POWER INTERFACE Pin RF OUT Supply Voltage 3.3 4.5 5 5.5 V Supply Current 44 104 124 mA vs. Temperature −40°C ≤ T ≤ +85°C ±5.0 ±6.0 mA A Power Dissipation VSUP = 3.3 V, VSUP = 5 V 145 520 mW 1 Guaranteed maximum and minimum specified limits on this parameter are based on six sigma calculations. Rev. B | Page 3 of 20

ADL5320 Data Sheet TYPICAL SCATTERING PARAMETERS VSUP = 5 V and T = 25°C; the effects of the test fixture have been de-embedded up to the pins of the device. A Table 2. S11 S21 S12 S22 Freq (MHz) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) 400 −1.42 −179.88 +14.16 +134.74 −32.56 +13.47 −3.42 +176.22 500 −1.38 +175.04 +13.97 +126.21 −32.02 +8.58 −3.71 +175.38 550 −1.42 +173.05 +13.81 +122.24 −31.84 +6.81 −3.84 +175.10 600 −1.48 +171.25 +13.66 +118.41 −31.70 +5.25 −3.96 +174.89 650 −1.54 +169.59 +13.49 +114.71 −31.56 +3.85 −4.08 +174.74 700 −1.62 +168.11 +13.32 +111.12 −31.43 +2.63 −4.19 +174.71 750 −1.70 +166.66 +13.17 +107.64 −31.29 +1.35 −4.30 +174.74 800 −1.80 +165.36 +13.05 +104.27 −31.16 +0.20 −4.41 +174.89 850 −1.90 +163.99 +12.94 +100.86 −31.01 −0.95 −4.52 +175.10 900 −2.01 +162.65 +12.84 +97.48 −30.85 −2.23 −4.62 +175.37 950 −2.13 +161.32 +12.73 +94.09 −30.69 −3.43 −4.71 +175.78 1000 −2.27 +159.98 +12.65 +90.72 −30.52 −4.80 −4.81 +176.29 1050 −2.43 +158.61 +12.62 +87.34 −30.32 −6.24 −4.89 +176.85 1100 −2.63 +157.11 +12.59 +83.90 −30.15 −7.92 −4.98 +177.52 1150 −2.84 +155.60 +12.56 +80.41 −29.95 −9.61 −5.06 +178.29 1200 −3.09 +153.91 +12.55 +76.75 −29.74 −11.56 −5.12 +179.17 1250 −3.39 +152.08 +12.56 +73.03 −29.54 −13.63 −5.18 −179.85 1300 −3.73 +150.14 +12.57 +69.24 −29.33 −15.87 −5.25 −178.72 1350 −4.13 +147.98 +12.61 +65.23 −29.12 −18.39 −5.28 −177.52 1400 −4.59 +145.57 +12.66 +61.05 −28.91 −21.17 −5.29 −176.26 1450 −5.13 +143.05 +12.72 +56.75 −28.69 −24.17 −5.27 −174.93 1500 −5.76 +140.31 +12.79 +52.20 −28.48 −27.48 −5.19 −173.52 1550 −6.48 +137.18 +12.83 +47.46 −28.28 −31.05 −5.12 −172.60 1600 −7.36 +133.46 +12.89 +42.49 −28.10 −34.99 −5.06 −171.45 1650 −8.45 +129.65 +12.93 +37.41 −27.95 −39.05 −4.94 −170.38 1700 −9.74 +125.36 +12.98 +32.12 −27.81 -43.45 −4.80 −169.52 1750 −11.32 +120.71 +12.99 +26.74 −27.70 −48.12 −4.65 −168.95 1800 −13.34 +115.47 +12.99 +21.16 −27.61 −53.06 −4.47 −168.68 1850 −16.00 +109.24 +12.97 +15.43 −27.56 −58.23 -4.30 −168.76 1900 −19.89 +100.84 +12.93 +9.57 −27.55 −63.67 −4.14 −169.26 1950 −26.68 +83.39 +12.86 +3.65 −27.58 −69.38 −3.99 −170.11 2000 −33.34 −26.40 +12.76 −2.46 −27.65 −75.33 −3.86 −171.37 2050 −23.21 −71.32 +12.64 −8.60 −27.75 −81.44 −3.74 −172.97 2100 −18.39 −83.50 +12.49 −14.83 −27.89 −87.92 −3.65 −175.01 2150 −15.39 −92.08 +12.31 −21.09 −28.07 −94.55 −3.58 −177.37 2200 −13.26 −100.04 +12.11 −27.46 −28.29 −101.56 −3.54 +179.90 2250 −11.63 −107.86 +11.88 −33.90 −28.54 −108.80 −3.50 +176.83 2300 −10.31 −115.84 +11.62 −40.49 −28.82 −116.46 −3.47 +173.43 2350 −9.20 −123.94 +11.33 −47.09 −29.15 −124.41 −3.44 +169.75 2400 −8.23 −132.24 +11.01 −53.81 −29.50 −132.81 −3.42 +165.83 2450 −7.38 −140.88 +10.64 −60.65 −29.89 −141.70 −3.40 +161.63 2500 −6.61 −149.66 +10.24 −67.57 −30.31 −150.89 −3.36 +157.29 2550 −5.89 −158.59 +9.78 −74.53 −30.76 −160.57 −3.31 +152.82 2600 −5.23 −167.51 +9.27 −81.60 −31.23 −170.68 −3.24 +148.32 2650 −4.62 −176.26 +8.70 −88.50 −31.73 +178.90 −3.17 +143.81 2700 −4.05 +175.18 +8.07 −95.43 −32.22 +168.34 −3.09 +139.40 Rev. B | Page 4 of 20

Data Sheet ADL5320 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Table 4 lists the junction-to-air thermal resistance (θ ) and the Parameter Rating JA junction-to-paddle thermal resistance (θ ) for the ADL5320. Supply Voltage, VSUP 6.5 V JC Input Power (50 Ω Impedance) 20 dBm Table 4. Thermal Resistance Internal Power Dissipation (Paddle Soldered) 683 mW Package Type θ 1 θ 2 Unit JA JC Maximum Junction Temperature 150°C 3-Lead SOT-89 35 11 °C/W Operating Temperature Range −40°C to +105°C Storage Temperature Range −65°C to +150°C 1 Measured on Analog Devices, Inc., evaluation board. For more information about board layout, see the Soldering Information and Recommended PCB Stresses above those listed under Absolute Maximum Ratings Land Pattern section. 2 Based on simulation with JEDEC standard JESD51. may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any ESD CAUTION other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. B | Page 5 of 20

ADL5320 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RFIN 1 ADL5320 GND 2 TOP VIEW (2) GND (Not to Scale) RFOUT 3 N1 . O TSTHOEELS DEEXRPOTOSE AD LPOAWD IISM PINETDEARNNCAEL GLYR COOUNNNDE PCLTAENDE.TO GND. 05840-002 Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 RF RF Input. Requires a dc blocking capacitor. IN 2 GND Ground. Connect to a low impedance ground plane. 3 RF RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is connected to OUT the external power supply. RF path requires a dc blocking capacitor. Exposed Paddle Expose Paddle. Internally connected to GND. Solder to a low impedance ground plane. Rev. B | Page 6 of 20

Data Sheet ADL5320 TYPICAL PERFORMANCE CHARACTERISTICS 50 50 30 OIP3 (10dBm) 45 OIP3(–40°C) m) 40 45 OIP3(+25°C) 29 B d P3 ( 35 40 OIP3(+85°C) 28 dB); P1dB, OI 322050 P1dB OIP3 (dBm) 35 27 P1dB (dBm) N, NF ( 15 GAIN 30 P1dB(–40°C) 26 AI G 10 25 P1dB(+85°C) 25 50 NF 05840-003 20 P1dB(+25°C) 24 05840-006 800 820 840 860 880 900 920 940 960 800 820 840 860 880 900 920 940 960 FREQUENCY (MHz) FREQUENCY (MHz) Figure 4. Gain, P1dB, OIP3, and Noise Figure vs. Frequency, Figure 7. OIP3 and P1dB vs. Frequency and Temperature, 800 MHz to 960 MHz 800 MHz to 960 MHz 19.0 50 930MHz 18.5 880MHz 18.0 46 17.5 –40°C AIN (dB) 1176..05 +85°C +25°C P3 (dBm) 42 960MHz 850MHz 830MHz G 16.0 OI 38 15.5 15.0 34 1144..50 05840-004 30 05870-007 800 820 840 860 880 900 920 940 960 –2 0 2 4 6 8 10 12 14 16 18 20 22 FREQUENCY (MHz) POUT (dBm) Figure 5. Gain vs. Frequency and Temperature, 800 MHz to 960 MHz Figure 8. OIP3 vs. POUT and Frequency, 800 MHz to 960 MHz –25.0 0 7.0 –25.5 –5 6.5 S22 6.0 –26.0 –10 B) 5.5 d S12 (dB)––2267..50 S12 ––1250 B) AND S22 ( NF (dB) 54..05 ++2855°°CC –27.5 –25 1 (d 4.0 S11 S1 3.5 –40°C –28.0 –30 3.0 –28.5 –35 –29.0700 750 800 850 900 950 100–040 05840-005 22..50700 750 800 850 900 950 1000 05840-008 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Input Return Loss (S11), Output Return Loss (S22), and Reverse Figure 9. Noise Figure vs. Frequency and Temperature, Isolation (S12) vs. Frequency, 800 MHz to 960 MHz 800 MHz to 960 MHz Rev. B | Page 7 of 20

ADL5320 Data Sheet 45 45 29.0 40 OIP3(10dBm) 43 OIP3(–40°C) 28.5 m) B 35 28.0 d 41 3 ( OIP3(+85°C) P 30 OIP3(+25°C) 27.5 NF (dB); P1dB, OI 221505 P1dB OIP3 (dBM) 333975 P1dB(–40°C) 222766...050 P1dB (dBm) AIN, 10 GAIN 33 25.5 G 250060 2080 2100NF2120 2140 2160 2180 2200 2220 05840-009 32219060 2080 P211d00B(+2251°2C0) 2140P12d1B60(+85°2C18)0 2200 22202254..05 05840-012 FREQUENCY (MHz) FREQUENCY (MHz) Figure 10. Gain, P1dB, OIP3, and Noise Figure vs. Frequency, Figure 13. OIP3 and P1dB vs. Frequency and Temperature, 2060 MHz to 2200 MHz 2060 MHz to 2200 MHz 16 43 2190MHz 15 41 2060MHz 2140MHz 2090MHz –40°C 14 39 dB) +25°C Bm) 2220MHz AIN ( 13 P3 (d 37 G +85°C OI 12 35 11 33 120060 2080 2100 2120 2140 2160 2180 2200 222005840-010 31–2 0 2 4 6 8 10 12 14 16 18 20 2205840-013 FREQUENCY (MHz) POUT (dBm) Figure 11. Gain vs. Frequency and Temperature, 2060 MHz to 2200 MHz Figure 14. OIP3 vs. POUT and Frequency, 2060 MHz to 2200 MHz –23 0 8.0 7.5 –5 –24 7.0 S22 –10 B) 6.5 –25 –15 2 (d 6.0 dB) S11 D S2 B) 5.5 +85°C S12 ( ––2267 S12 ––2205 11 (dB) AN NF (d 544...050 +25°C S –30 3.5 –40°C –28 3.0 –35 –219900 1950 2000 2050 2100 2150 2200 2250 2300–40 05840-011 22..150900 1950 2000 2050 2100 2150 2200 2250 2300 05840-014 FREQUENCY (MHz) FREQUENCY (MHz) Figure 12. Input Return Loss (S11), Output Return Loss (S22), and Reverse Figure 15. Noise Figure vs. Frequency and Temperature, Isolation (S12) vs. Frequency, 2060 MHz to 2200 MHz 2060 MHz to 2200 MHz Rev. B | Page 8 of 20

Data Sheet ADL5320 40 39 32 35 OIP3(10dBm) 38 OIP3(–40°C) 31 Bm) 37 OIP3(+25°C) d 30 3 ( 36 OIP3(+85°C) 30 P F (dB); P1dB, OI 221505 P1dB OIP3 (dBm) 333543 P1dB(+25°CP)1dB(–40°C) 2298 P1dB (dBm) AIN, N 10 GAIN 32 27 G 31 P1dB(+85°C) 5 26 20500 2520 2N54F0 2560F2R5E8Q0U2E6N0C0Y 2(M62H0z)2640 2660 2680 2700 05840-015 32209500 2550 FREQU2E6N0C0Y (MHz) 2650 270025 05840-018 Figure 16. Gain, P1dB, OIP3, and Noise Figure vs. Frequency, Figure 19. OIP3 and P1dB vs. Frequency and Temperature, 2500 MHz to 2700 MHz 2500 MHz to 2700 MHz 15 46 44 14 –40°C 42 13 B) +25°C m) 40 d B AIN ( 12 +85°C P3 (d 38 2700MHz 2600MHz G OI 36 11 34 2500MHz 10 32 29500 2550 2600 2650 270005840-016 30–3 –1 1 3 5 7 9 11 13 15 17 19 21 23 05840-019 FREQUENCY (MHz) POUT (dBm) Figure 17. Gain vs. Frequency and Temperature, 2500 MHz to 2700 MHz Figure 20. OIP3 vs. POUT and Frequency, 2500 MHz to 2700 MHz –25.0 0 8.0 –25.5 7.5 –5 7.0 –26.0 –10 6.5 –26.5 S22 B) +85°C S12 (dB)––––22227788....0505 S12 S11 –––122505 S11 (dB) AND S22 (d NF (dB) 65544.....05050 –+4205°°CC –30 3.5 –29.0 3.0 –35 ––2390..250400 2450 2500 2550 2600 2650 2700 2750 2800–40 05840-017 22..250400 2450 2500 2550 2600 2650 2700 2750 2800 05840-020 FREQUENCY (MHz) FREQUENCY (MHz) Figure 18. Input Return Loss (S11), Output Return Loss (S22), and Reverse Figure 21. Noise Figure vs. Frequency and Temperature, Isolation (S12) vs. Frequency, 2500 MHz to 2700 MHz 2500 MHz to 2700 MHz Rev. B | Page 9 of 20

ADL5320 Data Sheet 18 50 16 14 40 %) 12 %) E ( E ( 30 G 10 G A A T T N N E 8 E C C R R 20 PE 6 PE 4 10 20 05840-021 0 05840-024 42.0 42.8 43.6 44.4 45.2 46.0 46.8 47.6 3.80 3.88 3.96 4.04 4.12 4.20 4.28 OIP3 (dBm) NF (dB) Figure 22. OIP3 Distribution at 880 MHz Figure 25. Noise Figure Distribution at 880 MHz 60 120 115 50 5.25V A)110 E (%) 40 NT (m105 5.0V G E A R NT 30 UR100 E C ERC PLY 95 P 20 P 4.75V U S 90 10 0 24.4 24.8 25.2 25.6 26.0 26.4 26.8 05840-022 8850–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 05840-025 P1dB (dBm) TEMPERATURE (°C) Figure 23. P1dB Distribution at 880 MHz Figure 26. Supply Current vs. Supply Voltage and Temperature (Using 880 MHz Matching Components) 240 30 220 5V,+25°C 3.3V,+25°C 5V,–40°C 3.3V,–40°C 200 25 mA) 180 55VV,,++18505°C°C 33..33VV,,++81505°C°C T ( 160 %) 20 EN E ( RR 140 G U RCENTA 15 UPPLY C 110200 PE 10 S 80 60 50 05840-023 2400–6 –4 –2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 2805840-040 16.65 16.75 16.85 16.95 17.05 17.15 17.25 POUT PER TONE (dBm) GAIN (dB) Figure 24. Gain Distribution at 880 MHz Figure 27. Supply Current vs. POUT and Temperature (2140 MHz Matching Components) Rev. B | Page 10 of 20

Data Sheet ADL5320 HIGH TEMPERATURE AND 3.3 V OPERATION The ADL5320 has excellent performance at temperatures higher than 85°C. At 105°C, the gain and P1dB decrease by 0.2 dB, the OIP3 decreases by 0.4 dB, and the noise figure increases by 0.2 dB, compared with the data at 85°C. Figure 28, Figure 29, and Figure 30 show the performance at 105°C. 16 15.0 15 14.5 14.0 14 13.5 GAIN (dB) 13 105°C25°C 85°C GAIN (dB)1123..50 –40°C +25°C 12 12.0 11.5 +85°C 11 11.0 +105°C 10.5 120060 2080 2100 2F1R2E0QUE21N4C0Y (M2H16z)0 2180 2200 2220 05840-133 10.02060 2080 2100 2F1R2E0QUE21N4C0Y (M2H16z0) 2180 2200 2220 05840-136 Figure 28. Gain vs. Frequency and Temperature, Figure 31. Gain vs. Frequency and Temperature, 5 V Supply, 2060 MHz to 2200 MHz 3.3 V Supply, 2060 MHz to 2200 MHz 29.0 45 27 33 +85°C +105°C 28.5 25°C 43 26 32 +25°C 28.0 41 –40°C 25 31 P1dB (dBm) 222677...505 85°C 105°C 333579 OIP3 (dBm) P1dB (dBm) 24 30 OIP3 (dBm) –40°C 25°C 23 29 26.0 85°C 33 +25°C 105°C 22 28 25.5 31 +85°C +105°C 25.20060 2080 2100 2F1R2E0QUE21N4C0Y (M2H16z0) 2180 2200 222029 05840-134 221060 2080 2100 2F1R2E0QUE21N4C0Y (M2H16z0) 2180 2200 222027 05840-137 Figure 29. OIP3 and P1dB vs. Frequency and Temperature, Figure 32. OIP3 and P1dB vs. Frequency and Temperature, 5 V Supply, 2060 MHz to 2200 MHz 3.3 V Supply, 2060 MHz to 2200 MHz 7.0 7.0 6.5 6.5 6.0 6.0 B) 5.5 105°C B) 5.5 RE (d 5.0 85°C RE (d 5.0 +105°C U U FIG 4.5 25°C FIG 4.5 +85°C E E OIS 4.0 OIS 4.0 +25°C N N 3.5 3.5 –40°C 3.0 3.0 2.5 2.5 2.01900 1950 2000 2F0R5E0QUE21N0C0Y (M2H15z)0 2200 2250 2300 05840-135 2.01900 1950 2000 2F0R5E0QUE21N0C0Y (M2H15z)0 2200 2250 2300 05840-138 Figure 30. Noise Figure vs. Frequency and Temperature, 5 V Supply, Figure 33. Noise Figure vs. Frequency and Temperature, 2060 MHz to 2200 MHz 3.3 V Supply, 2060 MHz to 2200 MHz Rev. B | Page 11 of 20

ADL5320 Data Sheet APPLICATIONS INFORMATION BASIC LAYOUT CONNECTIONS GND VSUP The basic connections for operating the ADL5320 are shown in C6 10µF Figure 34. Table 6 lists the required matching components. D N C5 10nF Capacitors C1, C2, C3, C4, and C7 are Murata GRM155 series (2) G (0402 size) and Inductor L1 is a Coilcraft 0603CS series (0603 C41 size). For all frequency bands, the placement of C3 and C7 are ADL5320 critical. From 2300 MHz to 2700 MHz, the placement of C2 is L11 also important. Table 7 lists the recommended component RFIN C11 λ12 RFIN1 GND2 FOUT3 λ22 λ32 λ42C21 RFOUT placement for various frequencies. R C31 C71 A 5 V dc bias is supplied through L1 which is connected to dReFcOoUuT p(lPining 3c)a.p Ianc aitdodrsit aioren atlos oC r4e, q1u0i rneFd .a Tndh e1 t0y µpFic aplo cwuerrr esnutp ply 21SSEEEE TTAABBLLEE 76 FFOORR RFREECQOUMEMNECNYD SEPDE CCOIFMICP OCNOEMNPTO SNPEANCTISN.G. 05840-026 consumption for the ADL5320 is 110 mA. Figure 34. Basic Connections Table 6. Recommended Components for Basic Connections Frequency (MHz) C1 (pF) C2 (pF) C3 (pF) C4 (pF) C5 (nF) C6 (μF) C7 (pF) L1 (nH) 450 to 500 100 100 18 100 10 10 6.8 47 800 to 960 47 47 6.8 100 10 10 2.2 47 2110 to 2170 22 22 0.5 22 10 10 1.5 15 2300 to 2400 12 2.2 1.2 12 10 10 1.0 15 2500 to 2700 12 1.0 1.8 12 10 10 0.5 15 Table 7. Matching Component Spacing Frequency (MHz) λ1 (mils) λ2 (mils) λ3 (mils) λ4 (mils) 450 to 500 391 75 364 50 800 to 960 200 75 100 350 2110 to 2170 300 75 175 275 2300 to 2400 225 75 125 125 2500 to 2700 142 75 89 75 Rev. B | Page 12 of 20

Data Sheet ADL5320 SOLDERING INFORMATION AND RECOMMENDED 1.80mm PCB LAND PATTERN Figure 35 shows the recommended land pattern for the ADL5320. To minimize thermal impedance, the exposed paddle on the SOT-89 package underside is soldered down to a ground plane along with Pin 2. If multiple ground layers exist, stitch them together using vias. For more information on land pattern design and layout, refer to the Application Note AN-772, A Design and 0.762mm m m Manufacturing Guide for the Lead Frame Chip Scale Package 8 4 (LFCSP). 3. 0.635mm The land pattern on the ADL5320 evaluation board provides a m m measured thermal resistance (θJA) of 35°C/W. To measure θJA, the 5.37 0.20mm temperature at the top of the SOT-89 package is found with an IR temperature gun. Thermal simulation suggests a junction temperature 10°C higher than the top of the package temperature. m With additional ambient temperature and input/output power m 0.86mm 2 6 measurements, θJA can be determined. 0. m m 7 2 1. 0.86mm 1.50mm 3.00mm 05840-041 Figure 35. Recommended Land Pattern Rev. B | Page 13 of 20

ADL5320 Data Sheet MATCHING PROCEDURE The ADL5320 is designed to achieve excellent gain and IP3 performance. To achieve this, both input and output matching networks must present specific impedance to the device. The matching components listed in Table 7 were chosen to provide −10 dB input return loss while maximizing OIP3. The load-pull plots (Figure 36, Figure 37, and Figure 38) show the load impedance points on the Smith chart where optimum OIP3, gain, and output power can be achieved. These load impedance values (that is, the impedance that the device sees when looking into the output matching network) are listed in Table 8 and Table 9 fsohro mw ahxoimwu emac gha pina raanmd emtearx dimegurmad OesI Pa3s ,i rte issp mecotivveedly .a Twhaey cforonmto urs 05840-028 the optimum point. Figure 36. Load-Pull Contours, 880 MHz From the data shown in Table 8 and Table 9, it becomes clear that maximum gain and maximum OIP3 do not occur at the same impedance. This can also be seen on the load-pull contours in Figure 36, Figure 37, and Figure 38. Thus, output matching generally involves compromising between gain and OIP3. In addition, the load-pull plots demonstrate that the quality of the output impedance match must be compromised to optimize gain and/or OIP3. In most applications, where line lengths are short and where the next device in the signal chain presents a low input return loss, compromising on the output match is acceptable. iTfo a addifjufesrte tnhte t roaudtpe-uotf mf baettcwhe feonr oOpIePr3a,t igoanin a,t a an ddi fofuertpenutt firmeqpuedenancyc eo r 05840-029 Figure 37. Load-Pull Contours, 2140 MHz is desired, the following procedure is recommended. For example, to optimize the ADL5320 for optimum OIP3 and gain at 700 MHz, take the following steps: 1. Install the recommended tuning components for a 800 MHz to 960 MHz tuning band, but do not install C3 and C7. 2. Connect the evaluation board to a vector network analyzer so that input and output return loss can be viewed simultaneously. 3. Starting with the recommended values and positions for C3 and C7, adjust the positions of these capacitors along the transmission line until the return loss and gain are astciccekpst acbalne .b Peu ushse-ddo iwn nth ciasp caacsiteo arss tahna ta latreer nmaotiuvnet etod soonl dsmerainllg . 05840-030 Figure 38. Load-Pull Contours, 2600 MHz If moving the component positions does not yield satisfactory results, then the values of C3 and C7 should be increased Table 8. Load Conditions for Gain MAX or decreased (most likely increased in this case as the user ΓLoad is tuning for a lower frequency). Repeat this process until Frequency (MHz) (Magnitude) ΓLoad (°) Gain (dB) MAX the desired gain and return loss are achieved. 880 0.5147 159.88 17.76 4. Once the desired gain and return loss are realized, OIP3 2140 0.6611 134.40 13.78 2600 0.5835 133.80 12.36 should be measured. Most likely, it will be necessary to go back and forth between return loss/gain and OIP3 Table 9. Load Conditions for IP3 measurements (probably compromising most on output MAX ΓLoad return loss) until an acceptable compromise is achieved. Frequency (MHz) (Magnitude) ΓLoad (°) IP3 (dBm) MAX 880 0.4156 −138.22 46.29 2140 0.5035 +110.27 42.72 2600 0.4595 +102.48 43.01 Rev. B | Page 14 of 20

Data Sheet ADL5320 OPTIMIZING OP1dB W-CDMA ACPR PERFORMANCE In some applications, power handling (P1dB) is a more Figure 40 shows a plot of adjacent channel power ratio (ACPR) important parameter than IP3. In such cases, it is possible to vs. P for the ADL5320. The signal type being used is a single OUT retune the output load to increase the compression point of the W-CDMA carrier (Test Model 1−64) at 2140 MHz. This signal ADL5320. Table 10 shows the performance of the ADL5320 is generated by a very low ACPR source. ACPR is measured at after tuning the output load for higher OP1dB. Table 11 lists the the output by a high dynamic range spectrum analyzer, which component spacing, and Table 12 lists the component values. incorporates an instrument noise correction function. Table 10. OP1dB, Gain, and IP3 Results with Optimized OP1dB The ADL5320 achieves an ACPR of −80 dBc at 0 dBm output, Frequency (MHz) Gain (dB) OIP3 (dBm) OP1dB (dBm) at which point device noise and not distortion is beginning to 880 17.9 36 28.5 dominate the power in the adjacent channels. At an output 2140 13.5 40 28 power of 10 dBm, ACPR is still very low at −70 dBc, making the 2600 12.4 35 28.2 device particularly suitable for PA driver applications. –20 Table 11. Matching Component Spacing for Optimized OP1dB Frequency (MHz) λ1 (mils) λ2 (mils) λ3 (mils) λ4 (mils) Bc) –30 d 800 to 960 200 75 339 100 T ( E S –40 2110 to 2170 300 75 89 275 F F 2500 to 2700 142 75 89 75 ER O –50 VSOCCU =R C5VE RRI VCC = 3.3V A C –60 GND VSUP Hz M @ 5 –70 C6 10µF R P ND C5 10nF AC –80 (2) G C41 –90 ADL5320 L11 –20 –15 –10 –5 POUT 0(dBm) 5 10 15 20 05840-031 Figure 40. ACPR vs. POUT, Single Carrier W-CDMA (Test Model 1−64) at RFIN C11 λ12 RFIN1 GND2 FOUT3 λ22 λ32 λ42C21 RFOUT 2140 MHz Evaluation Board R C31 C71 12SSEEEE TTAABBLLEE 1121 FFOORR FRREECQOUMEMNECNYD SEPDE CCOIFMICP OCNOEMNPTO SNPEANCTISN.G. 05840-039 Figure 39. Component Values and Spacing for Increased OP1dB Table 12. Matching Component Values for Optimized OP1dB Frequency (MHz) C1 (pF) C2 (pF) C3 (pF) C4 (pF) C5 (nF) C6 (μF) C7 (pF) L1 (nH) 800 to 960 47 47 6.8 100 10 10 5.6 47 2110 to 2170 22 22 0.5 22 10 10 1.8 15 2500 to 2700 12 1.0 1.8 12 10 10 1.0 15 Rev. B | Page 15 of 20

ADL5320 Data Sheet EVALUATION BOARD The schematic of the ADL5320 evaluation board is shown in Figure 41. This evaluation board uses 25 mil wide traces and is made from FR4 material. The evaluation board comes tuned for operation in the 2110 MHz to 2170 MHz tuning band. Tuning 10uF options for other frequency bands are also provided in Table 13. The recommended placement for these components is provided 10nF 22pF in Table 14. The inputs and outputs should be ac-coupled with C1 C2 22pF 15nH 22pF appropriately sized capacitors. DC bias is provided to the C3 C7 amplifier via an inductor connected to the RF pin. A bias 0.5pF 1.5pF OUT voltage of 5 V is recommended. GND VSUP C6 10µF D N C5 10nF (2) G ADL5320 C4 22pF 05840-033 L1 Figure 42. Evaluation Board Layout and Default Component Placement for RFIN C221pF λ1 RFIN1 GND2 FOUT3 λ2 15λn3H λ4 C222pF RFOUT Operation from 2110 MHz to 2170 MHz C0.35pF R C1.75pF 05840-032 Figure 41. Evaluation Board, 2110 MHz to 2170 MHz Table 13. Evaluation Board Configuration Options 2110 MHz to 2170 MHz (Default 2300 MHz to 2500 MHz to Component Function 450 MHz to 500 MHz 800 MHz to 960 MHz Configuration) 2400 MHz 2700 MHz C1, C2 AC coupling 0402, 100 pF 0402, 47 pF 0402, 22pF C1= 0402 12 pF, C1 = 0402 12 pF, capacitors C2 = 0402 2.2 pF C2 = 0402 1.0 pF C4, C5, C6 Power supply C4 = 0603 100 pF, C4 = 0603 100 pF, C4 = 0402 22pF, C4 = 0603 12 pF, C4 = 0603 12 pF, bypassing C5 = 0603 10 nF, C5 = 0603 10 nF, C5 = 0603 10 nF, C5 = 0603 10 nF, C5 = 0603 10 nF, capacitors C6 = 1206 10 µF C6 = 1206 10 µF C6 = 1206 10 µF C6 = 1206 10 µF C6 = 1206 10 µF L1 DC bias inductor 0603, 47 nH 0603, 47 nH 0603, 15 nH 0603, 15 nH 0603, 15 nH C3, C7 Tuning C3 = 0402 18 pF, C3 = 0402 6.8 pF, C3 = 0402 0.5 pF, C3 = 0402 1.2 pF, C3 = 0402 1.8 pF, capacitors C7 = 0402 6.8 pF C7 = 0402 2.2 pF C7 = 0402 1.5 pF C7 = 0402 1.0 pF C7 = 0402 0.5 pF R1 R1 = 0402 0 Ω R1 = 0402 0 Ω VSUP, GND Power supply VSUP red test loop, VSUP red test loop, VSUP red test loop, VSUP red test loop, VSUP red test loop, connections GND black test loop GND black test loop GND black test loop GND black test loop GND black test loop Table 14. Recommended Component Spacing on Evaluation Board Frequency (MHz) λ1 (mils) λ2 (mils) λ3 (mils) λ4 (mils) 450 to 500 391 75 364 50 800 to 960 200 75 100 350 2110 to 2170 300 75 175 275 2300 to 2400 225 75 125 125 2500 to 2700 142 75 89 75 Rev. B | Page 16 of 20

Data Sheet ADL5320 10uF 10uF 10nF 10nF 100pF 12pF C1 C1 100pF 47nH C1020pF 12pF 15nH C3 C3 C7 1.2pF C7 C2 R1 0Ω 18pF 6.8pF 1pF 2.2pF 05840-037 05840-035 Figure 43. Evaluation Board Layout and Component Placement Figure 45. Evaluation Board Layout and Component Placement 450 MHz to 500 MHz Operation 2300 MHz to 2400 MHz Operation 10uF 10uF 10nF 10nF C1 100pF C2 C1 12pF 47pF 47nH 47pF 12pF 15nH C3 C7 C3 C7 C2 R1 0Ω 6.8pF 2.2pF 1.8pF 0.5pF 1.0pF 05840-034 05840-036 Figure 44. Evaluation Board Layout and Component Placement Figure 46. Evaluation Board Layout and Component Placement 800 MHz to 960 MHz Operation 2500 MHz to 2700 MHz Operation Rev. B | Page 17 of 20

ADL5320 Data Sheet OUTLINE DIMENSIONS 1.75 1.55 2.413 (2) 2.380 2.60 4.25 2.337 2.30 3.94 1 2 3 1.270 0.635 1.252 0.569 1.20 1.219 0.508 BOTTOM VIEW 1.50 TYP 0.75 3.00 TYP TOP VIEW 2.29 4.60 2.14 4.40 1.60 1.40 0.44 0.35 END VIEW 0.56 0.36 0.52 0.32 PKG-003480 COMPLIANT TO JEDEC STANDARDS TO-243 09-12-2013-C Figure 47. 3−Lead Small Outline Transistor Package [SOT-89] (RK-3) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option ADL5320ARKZ-R7 −40°C to +105°C 3-Lead SOT-89, 7“ Tape and Reel RK-3 ADL5320-EVALZ Evaluation Board 1 Z = RoHS Compliant Part. Rev. B | Page 18 of 20

Data Sheet ADL5320 NOTES Rev. B | Page 19 of 20

ADL5320 Data Sheet NOTES ©2008–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05840-0-10/13(B) Rev. B | Page 20 of 20

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