Triaxial Inertial Sensor with Magnetometer Data Sheet ADIS16405 FEATURES APPLICATIONS Triaxial, digital gyroscope with digital range scaling Unmanned aerial vehicles ±75°/sec, ±150°/sec, ±300°/sec settings Platform control Tight orthogonal alignment, 0.05° Digital compassing Triaxial, digital accelerometer, ±18 g Navigation Triaxial, digital magnetometer, ±2.5 gauss FUNCTIONAL BLOCK DIAGRAM Autonomous operation and data collection AUX_ AUX_ No external configuration commands required ADC DAC 220 ms start-up time TEMPERATURE 4 ms sleep mode recovery time SENSOR Factory calibrated sensitivity, bias, and axial alignment TRIAXIS MEMS CS Calibration temperature range: −40°C to +85°C ANGULAR RATE SENSOR SIGNAL CALIBRATION OUTPUT SCLK SPI-compatible serial interface CONDITIONING AND REGISTERS AND DIGITAL AND SPI DIN Embedded temperature sensor CONVERSION PROCESSING INTERFACE DOUT Programmable operation and control Automatic and manual bias correction controls TRIAXIS MEMS ACCELERATION Bartlett window FIR length, number of taps SENSOR Digital I/O: data ready, alarm indicator, general-purpose Alarms for condition monitoring Sleep mode for power management TRIAXIS MAGNETIC ALARMS POWER DAC output voltage SENSOR MANAGEMENT Enable external sample clock input up to 1.2 kHz Single-command self test VCC Single-supply operation: 4.75 V to 5.25 V SELF TEST DIGITAL CONTROL 2000 g shock survivability GND ADIS16405 Operating temperature range: −40°C to +105°C RST DIO1 DIO2 DIO3CDLIOK4IN/ 07907-001 Figure 1. GENERAL DESCRIPTION The ADIS16405 iSensor® product is a complete inertial system systems, especially when compared with the complexity and that includes a triaxal gyroscope, a triaxial accelerometer, and a investment associated with discrete designs. triaxial magnetometer. The ADIS16405 combines the Analog All necessary motion testing and calibration are part of the Devices, Inc., proprietary iMEMS® technology with signal production process at the factory, greatly reducing system conditioning that optimizes dynamic performance. The factory integration time. Tight orthogonal alignment simplifies inertial calibration characterizes each sensor for sensitivity, bias, alignment, frame alignment in navigation systems. An improved serial and linear acceleration (gyroscope bias). As a result, each sensor peripheral interface (SPI) and register structure provide faster has its own dynamic compensation for correction formulas that data collection and configuration control. By using a compatible provide accurate sensor measurements over a temperature range of pinout and the same package as the −40°C to +85°C. The magnetometers employ a self correction ADIS16362/ADIS16364/ADIS16365/ ADIS16367 family, function to provide accurate bias performance over temperature upgrading to the ADIS16405 requires only firmware changes to as well. accommodate additional sensors and register map updates. The ADIS16405 provides a simple, cost effective method for This compact module is approximately 23 mm × 23 mm × 23 mm integrating accurate, multiple axis inertial sensing into industrial and provides a flexible connector interface that enables multiple mounting orientation options. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADIS16405 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Basic Operation .......................................................................... 10 Applications ....................................................................................... 1 Reading Sensor Data .................................................................. 10 Functional Block Diagram .............................................................. 1 Device Configuration ................................................................ 10 General Description ......................................................................... 1 Burst Mode Data Collection ..................................................... 10 Revision History ............................................................................... 2 Memory Map .............................................................................. 11 Specifications ..................................................................................... 3 Output Data Registers................................................................ 12 Timing Specifications .................................................................. 6 Calibration................................................................................... 12 Timing Diagrams .......................................................................... 6 Operational Control ................................................................... 13 Absolute Maximum Ratings ............................................................ 7 Input/Output Functions ............................................................ 14 ESD Caution .................................................................................. 7 Diagnostics .................................................................................. 15 Pin Configuration and Function Descriptions ............................. 8 Outline Dimensions ....................................................................... 18 Typical Performance Characteristics ............................................. 9 Ordering Guide .......................................................................... 18 Theory of Operation ...................................................................... 10 REVISION HISTORY 10/2016—Rev. C to Rev. D Changes to Table 9 and Added Default Value to Table 10, Change to Table 8 ........................................................................... 11 Table 11, and Table 12 .................................................................... 12 Added Default Value to Table 13, and Table 15 and changes to 1/2015—Rev. B to Rev. C Internal Sample Rate Section and Table 15 ................................. 13 Deleted ADIS16400 ............................................................ Universal Added Default Value to Table 17, Table 18, and Table 19 and Changes to Features Section and General Description Section . 1 Changes to Digital Filtering Section ............................................ 14 Changes to Table 1 ............................................................................ 3 Added Default Value to Table 20 and Changes to Table 23 ...... 15 Changes to Figure 2 and Figure 4 ................................................... 6 Added Default Value to Table 24, Table 25, and Table 26 and Changes to Table 5 ............................................................................ 8 Changes to Table 24 ....................................................................... 16 Changes to Basic Operation Section, Figure 9 Caption, and Changes to Ordering Guide .......................................................... 18 Device Configuration Section ....................................................... 10 Deleted Figure 10; Renumbered Sequentially............................. 10 4/2009—Rev. 0 to Rev. A Added Endnote 1, Table 9.............................................................. 11 Added ADIS16400.............................................................. Universal Changes to Output Data Registers Section ................................. 12 Changes to Features .......................................................................... 1 Changes to Internal Sample Rate Section.................................... 13 Changes to Table 1 ............................................................................. 3 Changes to Ordering Guide .......................................................... 16 Changes to Figure 5 and Figure 6 .................................................... 8 Changes to Reading Sensor Data Section ................................... 10 7/2009—Rev. A to Rev. B Changes to Internal Sample Rate Section ................................... 13 Changes to Features Section............................................................ 1 Changes to Input/Output Functions Section .............................. 14 Changes to Data Retention Parameter........................................... 4 Changes to Digital Filtering Section ............................................ 14 Changes to Table 2 ............................................................................ 6 Changes to Ordering Guide .......................................................... 17 Changes to Figure 6 .......................................................................... 8 Changes to Device Configuration Section .................................. 10 3/2009—Revision 0: Initial Version Changes to Table 8 .......................................................................... 11 Rev. D | Page 2 of 18

Data Sheet ADIS16405 SPECIFICATIONS T = −40°C to +85°C, VCC = 5.0 V, angular rate = 0°/sec, dynamic range = ±300°/sec, ±1 g, unless otherwise noted. A Table 1. Parameter Test Conditions/Comments Min Typ Max Unit GYROSCOPES Dynamic Range ±300 ±350 °/sec Initial Sensitivity Dynamic range = ±300°/sec 0.0495 0.05 0.0505 °/sec/LSB Dynamic range = ±150°/sec 0.025 °/sec/LSB Dynamic range = ±75°/sec 0.0125 °/sec/LSB Sensitivity Temperature Coefficient −40°C ≤ T ≤ +85°C ±40 ppm/°C A Misalignment Axis to axis, Δ = 90° ideal ±0.05 Degrees Axis to frame (package) ±0.5 Degrees Nonlinearity Best fit straight line 0.1 % of FS Initial Bias Error 1 σ ±3 °/sec In-Run Bias Stability 1 σ, SMPL_PRD = 0x01 0.007 °/sec Angular Random Walk 1 σ, SMPL_PRD = 0x01 2.0 °/√hr Bias Temperature Coefficient −40°C ≤ T ≤ +85°C ±0.01 °/sec/°C A Linear Acceleration Effect on Bias Any axis, 1 σ (MSC_CTRL, Bit 7 = 1) 0.05 °/sec/g Bias Voltage Sensitivity VCC = 4.75 V to 5.25 V 0.32 °/sec/V Output Noise ±300°/sec range, no filtering 0.9 °/sec rms Rate Noise Density f = 25 Hz, ±300°/sec, no filtering 0.05 °/sec/√Hz rms 3 dB Bandwidth 330 Hz Resonant Frequency 14.3 kHz Self Test Change in Output Response ±300°/sec range setting ±696 ±2449 LSB ACCELEROMETERS Dynamic Range ±18 g Initial Sensitivity 3.285 3.33 3.38 mg/LSB Sensitivity Temperature Coefficient −40°C ≤ T ≤ +85°C ±50 ppm/°C A Misalignment Axis to axis, Δ = 90° ideal 0.2 Degrees Axis to frame (package) ±0.5 Degrees Nonlinearity Best fit straight line, ±17 g 0.1 % of FS Initial Bias Error 1 σ ±50 mg In-Run Bias Stability 1 σ 0.2 mg Velocity Random Walk 1 σ 0.2 m/sec/√hr Bias Temperature Coefficient −40°C ≤ T ≤ +85°C ±0.3 mg/°C A Bias Voltage Sensitivity VCC = 4.75 V to 5.25 V 2.5 mg/V Output Noise No filtering 9 mg rms Noise Density No filtering 0.5 mg/√Hz rms 3 dB Bandwidth 330 Hz Resonant Frequency 5.5 kHz Self Test Change in Output Response 59 151 LSB MAGNETOMETER Dynamic Range ±2.5 ±3.5 gauss Initial Sensitivity 25°C 0.49 0.5 0.51 mgauss/LSB Sensitivity Temperature Coefficient 25°C, 1 σ 600 ppm/°C Axis Nonorthogonality 25°C, axis to axis 0.25 Degrees Axis Misalignment 25°C, axis to base plate and guide pins 0.5 Degrees Nonlinearity Best fit straight line 0.5 % of FS Initial Bias Error 25°C, 0 gauss stimulus ±4 mgauss Bias Temperature Coefficient 0.5 mgauss/°C Output Noise 25°C, no filtering 1.25 mgauss rms Noise Density 25°C, no filtering, rms 0.066 mgauss/√Hz 3 dB Bandwidth 1540 Hz Rev. D | Page 3 of 18

ADIS16405 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit TEMPERATURE SENSOR Scale Factor 25°C, output = 0x0000 0.14 °C/LSB ADC INPUT Resolution 12 Bits Integral Nonlinearity ±2 LSB Differential Nonlinearity ±1 LSB Offset Error ±4 LSB Gain Error ±2 LSB Input Range 0 3.3 V Input Capacitance During acquisition 20 pF DAC OUTPUT Resolution 12 Bits Relative Accuracy Code 101 to Code 4095, 5 kΩ/100 pF to GND ±4 LSB Differential Nonlinearity ±1 LSB Offset Error ±5 mV Gain Error ±0.5 % Output Range 0 3.3 V Output Impedance 2 Ω Output Settling Time 5 kΩ/100 pF to GND 10 µs LOGIC INPUTS1 Input High Voltage, V 2.0 V INH Input Low Voltage, V 0.8 V INL CS signal to wake up from sleep mode 0.55 V CS Wake-Up Pulse Width 20 µs Logic 1 Input Current, I V = 3.3 V ±0.2 ±10 µA INH IH Logic 0 Input Current, I V = 0 V INL IL All Pins Except RST −40 −60 μA RST Pin −1 mA Input Capacitance, C 10 pF IN DIGITAL OUTPUTS1 Output High Voltage, V I = 1.6 mA 2.4 V OH SOURCE Output Low Voltage, V I = 1.6 mA 0.4 V OL SINK FLASH MEMORY Endurance2 10,000 Cycles Data Retention3 T = 85°C 20 Years J FUNCTIONAL TIMES4 Time until data is available Power-On Start-Up Time Normal mode, SMPL_PRD ≤ 0x09 220 ms Low power mode, SMPL_PRD ≥ 0x0A 290 ms Reset Recovery Time Normal mode, SMPL_PRD ≤ 0x09 100 ms Low power mode, SMPL_PRD ≥ 0x0A 170 ms Sleep Mode Recovery Time Normal mode, SMPL_PRD ≤ 0x09 4 ms Low power mode, SMPL_PRD ≥ 0x0A 15 ms Flash Memory Test Time Normal mode, SMPL_PRD ≤ 0x09 17 ms Low power mode, SMPL_PRD ≥ 0x0A 90 ms Flash Memory Update Time 50 ms Automatic Self Test Time SMPL_PRD = 0x01 12 ms CONVERSION RATE SMPL_PRD = 0x01 to 0xFF 0.413 819.2 SPS Clock Accuracy ±3 % Sync Input Clock 1.2 kHz Rev. D | Page 4 of 18

Data Sheet ADIS16405 Parameter Test Conditions/Comments Min Typ Max Unit POWER SUPPLY Operating Voltage Range, VCC 4.75 5.0 5.25 V Power Supply Current Low power mode at T = 25°C 45 mA A Normal mode at T = 25°C 70 mA A Sleep mode at T = 25°C 600 µA A 1 The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant. 2 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C. 3 The data retention lifetime equivalent is at a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction temperature. 4 These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which can affect overall accuracy. Rev. D | Page 5 of 18

ADIS16405 Data Sheet TIMING SPECIFICATIONS T = 25°C, VCC = 5 V, unless otherwise noted. A Table 2. Normal Mode Low Power Mode (SMPL_PRD ≤ 0x09) (SMPL_PRD ≥ 0x0A) Burst Mode Parameter Description Min1 Typ Max Min1 Typ Max Min1 Typ Max Unit f Serial clock frequency 0.01 2.0 0.01 0.3 0.01 1.0 MHz SCLK t Stall period between data 9 75 1/fSCLK µs STALL t Read rate 40 150 µs READRATE t Chip select to clock edge 48.8 48.8 48.8 ns CS t DOUT valid after SCLK edge 100 100 100 ns DAV t DIN setup time before SCLK rising edge 24.4 24.4 24.4 ns DSU t DIN hold time after SCLK rising edge 48.8 48.8 48.8 ns DHD t , t SCLK rise/fall times 5 12.5 5 12.5 5 12.5 ns SCLKR SCLKF t , t DOUT rise/fall times 5 12.5 5 12.5 5 12.5 ns DF DR tSFS CS high after SCLK edge 5 5 5 ns t Input sync pulse width 5 5 µs 1 t Input sync to data ready output 600 600 µs 2 t Input sync period 833 833 µs 3 1Guaranteed by design and characterization but not tested in production. TIMING DIAGRAMS CS tSCLKR tSCLKF tCS tSFS 1 2 3 4 5 6 15 16 SCLK tDAV tDR tDF DOUT MSB DB14 DB13 DB12 DB11 DB10 DB2 DB1 LSB tDSU tDHD DIN W/R A6 A5 A4 A3 A2 D2 D1 LSB 07907-002 Figure 2. SPI Timing and Sequence tREADRATE tSTALL CS SCLK 07907-003 Figure 3. Stall Time and Data Rate t3 t2 t1 SYNC CLOCK (DIO4/CLKIN) REDAADTAY 07907-004 Figure 4. Input Clock Timing Diagram Rev. D | Page 6 of 18

Data Sheet ADIS16405 ABSOLUTE MAXIMUM RATINGS Table 3. Stresses at or above those listed under Absolute Maximum Parameter Rating Ratings may cause permanent damage to the product. This is a Acceleration stress rating only; functional operation of the product at these Any Axis, Unpowered 2000 g or any other conditions above those indicated in the operational Any Axis, Powered 2000 g section of this specification is not implied. Operation beyond VCC to GND −0.3 V to +6.0 V the maximum operating conditions for extended periods may Digital Input Voltage to GND −0.3 V to +5.3 V affect product reliability. Digital Output Voltage to GND −0.3 V to VCC + 0.3 V Table 4. Package Characteristics Analog Input to GND −0.3 V to +3.6 V Package Type θ θ Device Weight Operating Temperature Range −40°C to +105°C JA JC 24-Lead Module 39.8°C/W 14.2°C/W 16 g Storage Temperature Range −65°C to +125°C1, 2 1 Extended exposure to temperatures outside the specified temperature ESD CAUTION range of −40°C to +105°C can adversely affect the accuracy of the factory calibration. For best accuracy, store the devices within the specified operating range of −40°C to +105°C. 2 Although the device is capable of withstanding short term exposure to 125°C and above, long-term exposure threatens internal mechanical integrity. Rev. D | Page 7 of 18

ADIS16405 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADIS16405 TOP VIEW (Not to Scale) DC A DIO3 SCLK DIN DIO1 DIO2 VCC GND GND DNC DNC AUX_ DNC 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 N T S T C C D C C C C C O4/CLKI DOU C RS VC VC GN DN DN AUX_DA DN DN DI NOTES 1. THIS VIEW REPRESENTS THETOP VIEW OF THE MATING CONNECTOR. 234... DWMNAHCTE IN=N GDC OOC NONNNOENTCE CTCOETDNONRTEO: CS TTAH.METAEDCI SC1L6M40-151, 2T-0H2E O PRIN ESQAURIVEA NLOETN TV.ISIBLE. 07907-005 Figure 5. Pin Configuration Z-AXIS aZ mZ gZ Y-AXIS aY mX X-AXIS mY aX gY gX PIN 23 PIN 1 ORIGINALIGNMENT REFERENCE POINT SEE MSC_CTRL[6]. NOTES 1.aX,aY,aZ,ARROWS INDICATE THE DIRECTION OFACCELERATION THAT PRODUCES A POSITIVE OUTPUT. 2.gX,gY,gZ,ARROWS INDICATE THE DIRECTION OF ROTATION THAT 3 . mPPRRXOO,mDDUUYCC,mEESSZ ,AAA PPROORSSOIIWTTIIVVSEE IN OODUUICTTAPPTUUETT.. THE DIRECTION OF MAGNETIC FIELD THAT 07907-006 Figure 6. Axial Orientation Table 5. Pin Function Descriptions Pin No. Mnemonic Type1 Description 1 DIO3 I/O Configurable Digital Input/Output 3. 2 DIO4/CLKIN I/O Configurable Digital Input/Output 4 or Sync Clock Input. 3 SCLK I SPI Serial Clock. 4 DOUT O SPI Data Output. Clocks output on SCLK falling edge. 5 DIN I SPI Data Input. Clocks input on SCLK rising edge. 6 CS I SPI Chip Select. 7 DIO1 I/O Configurable Digital Input/Output 1. 8 RST I Reset. 9 DIO2 I/O Configurable Digital Input/Output 2. 10, 11, 12 VCC S Power Supply. 13, 14, 15 GND S Power Ground. 16, 17, 18, 19, 22, 23, 24 DNC N/A Do Not Connect. Do not connect to these pins. 20 AUX_DAC O Auxiliary, 12-Bit Digital-to-Analog Converter (DAC) Output. 21 AUX_ADC I Auxiliary, 12-Bit Analog-to-Digital Converter (ADC) Input. 1 S is supply, O is output, I is input, N/A is not applicable. Rev. D | Page 8 of 18

Data Sheet ADIS16405 TYPICAL PERFORMANCE CHARACTERISTICS 0.1 0.01 ANCE(°/sec) +1σ RIANCE(g) ARI 0.01 VA 0.001 V N LLAN MEAN ALLA OTA –1σ TOO +1σ RO R MEAN –1σ 0.001 0.0001 0.1 1 10Tau (sec)100 1k 10k 07907-007 0.1 1 10Tau (sec)100 1k 10k 07907-008 Figure 7. Gyroscope Root Allan Variance Figure 8. Accelerometer Root Allan Variance Rev. D | Page 9 of 18

ADIS16405 Data Sheet THEORY OF OPERATION BASIC OPERATION READING SENSOR DATA The ADIS16405 is an autonomous system that requires no user Although the ADIS16405 produces data independently, it initialization. When it has a valid power supply, it initializes itself operates as a SPI slave device that communicates with system and starts sampling, processing, and loading sensor data into (master) processors using the 16-bit segments displayed in the output registers at a sample rate of 819.2 SPS. DIO1 pulses Figure 10. Individual register reads require two such 16-bit high after each sample cycle concludes. The SPI interface enables sequences. The first 16-bit sequence provides the read command simple integration with many embedded processor platforms, as bit (R/W = 0) and the target register address (A6 to A0). The shown in Figure 9 and Table 6. second sequence transmits the register contents (D15 to D0) on I/O LINES ARE COMPATIBLE WITH the DOUT line. For example, if DIN = 0x0A00, the content of 3.3V OR 5V LOGIC LEVELS 5V VDD XACCL_OUT shifts out on the DOUT line during the next 16-bit sequence. 10 11 12 SYSTEM The SPI operates in full duplex mode, which means that the master PSRPIO MCAESSTSEORR SS 6 CS ADIS16405 SPI SLAVE processor can read the output data from DOUT while using the SCLK 3 SCLK same SCLK pulses to transmit the next target address on DIN. DEVICE CONFIGURATION MOSI 5 DIN The user register memory map (see Table 8) identifies MISO 4 DOUT configuration registers with either a W (write only) or R/W IRQ 7 DIO1 (read/write). Configuration commands also use the bit sequence displayed in Figure 10. If the MSB is equal to 1, the last eight bits 13 14 15 07907-009 (aDddCr7e stso a DssCo0ci)a itned t hwei tDhI tNh es eaqdudernescse bloitasd ( Ain6t oto t hAe0 m). eFmoro ry Figure 9. Electrical Connection Diagram example, if DIN = 0xA11F, then 0x1F loads into Address Location 0x21 (XACCL_OFF, upper byte) at the conclusion of Table 6. Generic Master Processor Pin Names and Functions the data frame. Pin Name Function Most of the registers have a backup location in nonvolatile flash SS Slave select memory. The master processor must manage the backup function. SCLK Serial clock Set GLOB_CMD[3] = 1 (DIN = 0xBE04) to execute a manual MOSI Master output, slave input flash update (backup) operation, which copies the user registers MISO Master input, slave output into their respective flash memory locations. This operation IRQ Interrupt request takes 50 ms and requires the power supply voltage to be within the specified limit to complete properly. The FLASH_CNT register The ADIS16405 SPI interface supports full duplex serial provides a running count of these events for managing the long- communication (simultaneous transmit and receive) and uses term reliability of the flash memory. the bit sequence shown in Figure 10. Table 7 provides a list of the most common settings that require attention to initialize the BURST MODE DATA COLLECTION serial port of a processor for the ADIS16405 SPI interface. Burst mode data collection offers a more efficient method for collecting data from the ADIS16405. In sequential data cycles Table 7. Generic Master Processor SPI Settings (each separated by one SCLK period), all output registers clock Processor Setting Description out on DOUT. This sequence starts when the DIN sequence is Master The ADIS16405 operates as a slave. 0011 1110 0000 0000 (0x3E00). Next, the contents of each output SCLK Rate ≤ 2 MHz1 Normal mode, SMPL_PRD[7:0] ≤ 0x08. register are output from DOUT, starting with SUPPLY_OUT CPOL = 1 Clock polarity. and ending with AUX_ADC (see Figure 11). The addressing CPHA = 1 Clock phase. sequence shown in Table 8 determines the order of the outputs MSB First Bit sequence. in burst mode. 16-Bit Shift register/data length. 1 For burst mode, SCLK rate ≤ 1 MHz. For low power mode, SCLK rate ≤ 300 kHz. Rev. D | Page 10 of 18

Data Sheet ADIS16405 MEMORY MAP Table 8. User Register Memory Map1 Name R/W Flash Backup Address2 Default Function Bit Assignments FLASH_CNT R Yes 0x00 N/A Flash memory write count N/A SUPPLY_OUT R No 0x02 N/A Power supply measurement See Table 9 XGYRO_OUT R No 0x04 N/A X-axis gyroscope output See Table 9 YGYRO_OUT R No 0x06 N/A Y-axis gyroscope output See Table 9 ZGYRO_OUT R No 0x08 N/A Z-axis gyroscope output See Table 9 XACCL_OUT R No 0x0A N/A X-axis accelerometer output See Table 9 YACCL_OUT R No 0x0C N/A Y-axis accelerometer output See Table 9 ZACCL_OUT R No 0x0E N/A Z-axis accelerometer output See Table 9 XMAGN_OUT R No 0x10 N/A X-axis magnetometer measurement See Table 9 YMAGN_OUT R No 0x12 N/A Y-axis magnetometer measurement See Table 9 ZMAGN_OUT R No 0x14 N/A Z-axis magnetometer measurement See Table 9 TEMP_OUT R No 0x16 N/A Temperature output See Table 9 AUX_ADC R No 0x18 N/A Auxiliary ADC measurement See Table 9 XGYRO_OFF R/W Yes 0x1A 0x0000 X-axis gyroscope bias offset factor See Table 10 YGYRO_OFF R/W Yes 0x1C 0x0000 Y-axis gyroscope bias offset factor See Table 10 ZGYRO_OFF R/W Yes 0x1E 0x0000 Z-axis gyroscope bias offset factor See Table 10 XACCL_OFF R/W Yes 0x20 0x0000 X-axis acceleration bias offset factor See Table 11 YACCL_OFF R/W Yes 0x22 0x0000 Y-axis acceleration bias offset factor See Table 11 ZACCL_OFF R/W Yes 0x24 0x0000 Z-axis acceleration bias offset factor See Table 11 XMAGN_HIF R/W Yes 0x26 0x0000 X-axis magnetometer, hard iron factor See Table 12 YMAGN_HIF R/W Yes 0x28 0x0000 Y-axis magnetometer, hard iron factor See Table 12 ZMAGN_HIF R/W Yes 0x2A 0x0000 Z-axis magnetometer, hard iron factor See Table 12 XMAGN_SIF R/W Yes 0x2C 0x0800 X-axis magnetometer, soft iron factor See Table 13 YMAGN_SIF R/W Yes 0x2E 0x0800 Y-axis magnetometer, soft iron factor See Table 13 ZMAGN_SIF R/W Yes 0x30 0x0800 Z-axis magnetometer, soft iron factor See Table 13 GPIO_CTRL R/W No 0x32 0x0000 Auxiliary digital input/output control See Table 18 MSC_CTRL R/W Yes 0x34 0x0006 Miscellaneous control See Table 19 SMPL_PRD R/W Yes 0x36 0x0001 Internal sample period (rate) control See Table 15 SENS_AVG R/W Yes 0x38 0x0402 Dynamic range and digital filter control See Table 17 SLP_CNT W No 0x3A 0x0000 Sleep mode control See Table 16 DIAG_STAT R No 0x3C 0x0000 System status See Table 23 GLOB_CMD W N/A 0x3E 0x0000 System command See Table 14 ALM_MAG1 R/W Yes 0x40 0x0000 Alarm 1 amplitude threshold See Table 25 ALM_MAG2 R/W Yes 0x42 0x0000 Alarm 2 amplitude threshold See Table 25 ALM_SMPL1 R/W Yes 0x44 0x0000 Alarm 1 sample size See Table 26 ALM_SMPL2 R/W Yes 0x46 0x0000 Alarm 2 sample size See Table 26 ALM_CTRL R/W Yes 0x48 0x0000 Alarm control See Table 24 AUX_DAC R/W No 0x4A 0x0000 Auxiliary DAC data See Table 20 0x4C to 0x55 Reserved PRODUCT_ID 0x56 0x4015 Product identifier 1 N/A means not applicable. 2 Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1. CS SCLK DIN R/W A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 R/W A6 A5 DOUT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 N1.O DTOEUST BITS ARE BASED ON THE PREVIOUS 16-BIT SEQUENCE (R = 0). 07907-011 Figure 10. SPI Communication Bit Assignments Rev. D | Page 11 of 18

ADIS16405 Data Sheet CS 1 2 3 4 5 13 SCLK DIN 0x3E00 DON’T CARE DOUT PREVIOUS SUPPLY_OUT XGYRO_OUT YGYRO_OUT ZGYRO_OUT AUX_ADC 07907-012 Figure 11. Burst Mode Read Sequence OUTPUT DATA REGISTERS Auxiliary ADC Figure 6 provides the positive measurement direction for each The AUX_ADC register provides access to the auxiliary ADC gyroscope, accelerometer, and magnetometer. Table 9 provides input channel. The ADC is a 12-bit successive approximation the configuration and scale factor for each output data register converter that has an equivalent input circuit to the one shown in the ADIS16405. All inertial sensor outputs are in 14-bit, twos in Figure 13. The maximum input is 3.3 V. The ESD protection complement format, which means that 0x0000 is equal to 0 LSB, diodes can handle 10 mA without causing irreversible damage. 0x0001 is equal to +1 LSB, and 0x3FFF is equal to −1 LSB. The The on resistance (R1) of the switch has a typical value of 100 Ω. following is an example of how to calculate the sensor The sampling capacitor, C2, has a typical value of 16 pF. measurement from the XGYRO_OUT: VCC XGYRO_OUT = 0x3B4A D R1 C2 0x000 − 0x3B4A = −0x04B6 = (4 × 256 + 11 × 16 + 6) − Ra0tex 0=4 0B.60 5=° /−se1c2 0×6 ( L−S1B2 06) = −60.3°/sec C1 D 07907-014 Figure 13. Equivalent Analog Input Circuit Therefore, an ZGYRO_OUT output of 0x3B4A corresponds to (Conversion Phase: Switch Open, Track Phase: Switch Closed) a clockwise rotation around the z-axis (see Figure 6) of 60.3°/sec CALIBRATION when looking at the top of the package. Manual Bias Calibration Table 9. Output Data Register Formats The bias offset registers in Table 10, Table 11, and Table 12 (hard Register Bits Format Scale iron correction for magnetometer) provide a manual adjust- SUPPLY_OUT 14 Binary, 5 V = 0x0814 2.418 mV ment function for the output of each sensor. For example, if XGYRO_OUT1 14 Twos complement 0.05°/sec XGYRO_OFF equals 0x1FF6, the XGYRO_OUT offset shifts by YGYRO_OUT1 14 Twos complement 0.05°/sec −10 LSB, or −0.125°/sec. The DIN command for the upper byte ZGYRO_OUT1 14 Twos complement 0.05°/sec is DIN = 0x9B1F; for the lower byte, DIN = 0x9AF6. XACCL_OUT 14 Twos complement 3.33 mg YACCL_OUT 14 Twos complement 3.33 mg Table 10. XGYRO_OFF, YGYRO_OFF, ZGYRO_OFF ZACCL_OUT 14 Twos complement 3.33 mg Bits Description (Default = 0x0000) XMAGN_OUT 14 Twos complement 0.5 mgauss [15:13] Not used. YMAGN_OUT 14 Twos complement 0.5 mgauss [12:0] Data bits. Twos complement, 0.0125°/sec per LSB. ZMAGN_OUT 14 Twos complement 0.5 mgauss Typical adjustment range = ±50°/sec. TEMP_OUT2 12 Twos complement 0.14°C AUX_ADC 12 Binary, 1 V = 0x04D9 806 µV Table 11. XACCL_OFF, YACCL_OFF, ZACCL_OFF Bits Description (Default = 0x0000) 1 Assumes that the scaling is set to ±300°/sec. This factor scales with the range. 2 The typical output for this register at 25°C is 0x0000. [15:12] Not used. Each output data register uses the bit assignments shown in [11:0] Data bits. Twos complement, 3.33 mg/LSB. Typical adjustment range = ±6.75 g. Figure 12. The ND flag indicates that unread data resides in the output data registers. This flag clears and returns to 0 during an output register read sequence. It returns to 1 after the next internal Table 12. XMAGN_HIF, YMAGN_HIF, ZMAGN_HIF sample updates the registers with new data. The EA flag indicates Bits Description (Default = 0x0000) that one of the error flags in the DIAG_STAT register (see Table 23) [15:14] Not used. is active (true). The remaining 14 bits are for data. [13:0] Data bits. Twos complement, 0.5 mgauss/LSB. MSB FOR 14-BIT OUTPUT Typical adjustment range = ±4 gauss. ND EA MSB FOR 12-BIT OUTPUT 07907-013 Figure 12. Output Register Bit Assignments Rev. D | Page 12 of 18

Data Sheet ADIS16405 Magnetometer Soft Iron Correction (Scale Factor) Table 14. GLOB_CMD The soft iron correction factor for the magnetometer provides Bits Description the opportunity to change the scale factor for each individual axis. [15:8] Not used 7 Software reset command Table 13. XMAGN_SIF, YMAGN_SIF, ZMAGN_SIF [6:5] Not used Bits Description (Default = 0x0800) 4 Precision autonull command [15:12] Not used. 3 Flash update command [11:0] Data bits. Binary, linear scale adjustment factor 2 Auxiliary DAC data latch between 0x0000 (0×) and 0x3FFF (2×). 1 Factory calibration restore command 0 Autonull command Gyroscope Automatic Bias Null Calibration Set GLOB_CMD[0] = 1 (DIN = 0xBE01) to execute this function, Internal Sample Rate which measures the gyroscope outputs and then loads the gyro- The SMPL_PRD register provides discrete sample rate settings, scope offset registers with the opposite values to provide a quick using the bit assignments in Table 15 and the following equation: bias calibration. Then, all sensor data resets to 0, and the flash memory updates automatically within 50 ms (see Table 14). tS = tB × (NS + 1) Gyroscope Precision Automatic Bias Null Calibration where: t is the sample rate. When SMPL_PRD[7:0] = 0x0A, the sample Set GLOB_CMD[4] = 1 (DIN = 0xBE10) to execute this function, S rate is 149 SPS. which takes the sensor offline for 30 sec while it collects a set of t is the time base. gyroscope data and calculates a more accurate bias correction B N is the increment setting. factor for each gyroscope. When calculated, the correction S factor loads into the three gyroscope offset registers, all sensor Table 15. SMPL_PRD data resets to 0, and the flash memory updates automatically Bits Description (Default = 0x0001) within 50 ms (see Table 14). [15:8] Not used Restoring Factory Calibration 7 Time base (t ) B Set GLOB_CMD[1] = 1 (DIN = 0xBE02) to execute this function, 0 = 0.61035 ms, 1 = 18.921 ms which resets each user calibration register (see Table 10, Table 11, [6:0] Increment setting (NS) and Figure 11) to 0x0000, resets all sensor data to 0, and auto- Internal sample period = tS = tB × (NS + 1) matically updates the flash memory within 50 ms (see Table 14). The default sample rate setting of 819.2 SPS preserves the Linear Acceleration Bias Compensation (Gyroscope) sensor bandwidth and provides optimal performance. For Set MSC_CTRL[7] = 1 (DIN = 0xB486) to enable correction for systems that value slower sample rates, simply read the device at low frequency acceleration influences on gyroscope bias. Note a slower rate and keep the internal sample rate at 819.2 SPS. Use that the DIN sequence also preserves the factory default condi- the programmable filter (SENS_AVG) to reduce the bandwidth tion for the data ready function (see Table 19). along with the reduced read rates. The data-ready function OPERATIONAL CONTROL (MSC_CTRL) can drive an interrupt routine that uses a counter to Global Commands help ensure data coherence at the reduced update rates. Power Management The GLOB_CMD register provides trigger bits for several useful functions. Setting the assigned bit to 1 starts each operation, Setting SMPL_PRD ≥ 0x0A also sets the sensor in low power which returns the bit to 0 after completion. For example, set mode. For systems that require the lower power dissipation, in- GLOB_CMD[7] = 1 (DIN = 0xBE80) to execute a software reset, system characterization helps users to quantify the associated which stops the sensor operation and runs the device through performance trade-offs. In addition to sensor performance, this its start-up sequence. This includes loading the control registers mode affects SPI data rates (see Table 2). Set SLP_CNT[8] = 1 with their respective flash memory locations prior to producing (DIN = 0xBB01) to start the indefinite sleep mode, which requires new data. Reading the GLOB_CMD registers (DIN = 0x3E00) a CS assertion (high to low), reset, or power cycle to wake up. starts the burst mode read sequence. Use SLP_CNT[7:0] to put the device in sleep mode for a given period of time. For example, SLP_CNT[7:0] = 0x64 (DIN = 0xBA64) puts the device to sleep for 50 seconds. Rev. D | Page 13 of 18

ADIS16405 Data Sheet Table 16. SLP_CNT INPUT/OUTPUT FUNCTIONS Bits Description General-Purpose I/O [15:9] Not used DIO1, DIO2, DIO3, and DIO4 are configurable, general- 8 Indefinite sleep mode, set to 1 purpose I/O lines that serve multiple purposes according to the [7:0] Programmable sleep time bits, 0.5 sec/LSB following control register priority: MSC_CTRL, ALM_CTRL, and GPIO_CTRL. For example, set GPIO_CTRL = 0x080C Digital Filtering (DIN = 0xB308, and then 0xB20C) to set DIO1 and DIO2 as A programmable low-pass filter provides additional opportunity inputs and DIO3 and DIO4 as outputs, with DIO3 set low and for noise reduction on the inertial sensor outputs. This filter DIO4 set high. contains two cascaded averaging filters that provide a Bartlett window FIR filter response (see Figure 14). For example, Table 18. GPIO_CTRL SENS_AVG[2:0] = 100 (DIN = B804) sets each stage tap to 16. Bits Description (Default = 0x0000) When used with the default sample rate of 819.2 SPS, this filter [15:12] Not used setting reduces the sensor bandwidth to approximately 16 Hz. 11 General-Purpose I/O Line 4 (DIO4) data level 10 General-Purpose I/O Line 3 (DIO3) data level 0 9 General-Purpose I/O Line 2 (DIO2) data level –20 8 General-Purpose I/O Line 1 (DIO1) data level [7:4] Not used –40 3 General-Purpose I/O Line 4 (DIO4), direction control B) E (d –60 1 = output, 0 = input UD 2 General-Purpose I/O Line 3 (DIO3), direction control T NI –80 1 = output, 0 = input G A M 1 General-Purpose I/O Line 2 (DIO2), direction control –100 1 = output, 0 = input N = 2 0 General-Purpose I/O Line 1 (DIO1), direction control –120 N = 4 N = 16 1 = output, 0 = input N = 64 –140 0.001 0.01FREQUENCY (f/fS)0.1 1 07907-015 Input Clock Configuration Figure 14. Bartlett Window FIR Frequency Response The input clock allows external control over sampling in the (Taps = 2N + 1, Phase = N Samples) ADIS16405. Set GPIO_CTRL[3] = 0 (DIN = 0x0B200) and Dynamic Range SMPL_PRD[7:0] = 0x00 (DIN = 0xB600) to enable this function. See Table 2 and Figure 4 for timing information. There are three dynamic range settings for the gyroscope. The Data Ready I/O Indicator lower dynamic range settings (±75°/sec and ±150°/sec) limit the minimum filter tap sizes to maintain resolution. For example, set The factory default sets DIO1 as a positive data ready indicator SENS_AVG[10:8] = 010 (DIN = 0xB902) for a measurement signal. The MSC_CTRL[2:0] register provides configuration range of ±150°/sec. Because this setting can influence the filter options for changing this. For example, set MSC_CTRL[2:0] = settings, program SENS_AVG[10:8], then SENS_AVG[2:0] if 100 (DIN = 0xB404) to change the polarity of the data ready more filtering is required. signal for interrupt inputs that require negative logic inputs for activation. The resulting pulse width is between 100 µs and 200 µs Table 17. SENS_AVG over all conditions. Bits Description (Default = 0x0402) [15:11] Not used [10:8] Measurement range (sensitivity) selection 100 = ±300°/sec (default condition) 010 = ±150°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02) 001 = ±75°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04) [7:3] Not used [2:0] Number of taps in each stage N = 2M Rev. D | Page 14 of 18

Data Sheet ADIS16405 Set MSC_CTRL[10] = 1 (DIN = 0xB504) to run the internal self Table 19. MSC_CTRL test routine, which exercises all inertial sensors, measures each Bits Description (Default = 0x0006) response, makes pass/fail decisions, and reports them to error [15:12] Not used flags in the DIAG_STAT register. MSC_CTRL[10] resets itself 11 Memory test (clears on completion) to 0 after completing the routine. MSC_CTRL[9:8] (DIN = 1 = enabled, 0 = disabled 0xB502 or 0xB501) provide manual control over the self test 10 Internal self test enable (clears on completion) function. Table 22 shows an example test flow for using this 1 = enabled, 0 = disabled option to check the x-axis gyroscope. Zero motion provides 9 Manual self test, negative stimulus results that are more reliable. The settings in Table 22 are 1 = enabled, 0 = disabled flexible and provide opportunity for optimization around speed 8 Manual self test, positive stimulus and noise influence. For example, using fewer filtering taps 1 = enabled, 0 = disabled decreases delay times but increases the opportunity for noise 7 Linear acceleration bias compensation for gyroscopes influence. 1 = enabled, 0 = disabled 6 Linear accelerometer origin alignment Memory Test 1 = enabled, 0 = disabled Setting MSC_CTRL[11] = 1 (DIN = 0xB508) performs a [5:3] Not used checksum verification of the flash memory locations. The 2 Data ready enable pass/fail result loads into DIAG_STAT[6]. 1 = enabled, 0 = disabled Status 1 Data ready polarity The error flags provide indicator functions for common system 1 = active high, 0 = active low level issues. All of the flags clear (set to 0) after each DIAG_STAT 0 Data ready line select register read cycle. If an error condition remains, the error flag 1 = DIO2, 0 = DIO1 returns to 1 during the next sample cycle. DIAG_STAT[1:0] Auxiliary DAC does not require a read of this register to return to 0. The 12-bit AUX_DAC line can drive its output to within 5 mV Table 22. Manual Self Test Example Sequence of the ground reference when it is not sinking current. As the DIN Description output approaches 0 V, the linearity begins to degrade (~100 LSB 0xB601 SMPL_PRD[7:0] = 0x01, sample rate = 819.2 SPS. beginning point). As the sink current increases, the nonlinear 0xB904 SENS_AVG[15:8] = 0x04, gyroscope range = ±300°/sec. range increases. The DAC latch command moves the values of 0xB802 SENS_AVG[7:0] = 0x02, four-tap averaging filter. the AUX_DAC register into the DAC input register, enabling Delay = 50 ms. both bytes to take effect at the same time. 0x0400 Read XGYRO_OUT. 0xB502 MSC_CTRL[9] = 1, gyroscope negative self test. Table 20. AUX_DAC Delay = 50 ms. Bits Description (Default = 0x0000) 0x0400 Read XGYRO_OUT. [15:12] Not used. Calculate the positive change from the first reading to [11:0] Data bits. Scale factor = 0.8059 mV/code, offset the second reading of XGYRO_OUT, and check to binary format, 0 V = 0 codes. make sure the change is within the positive self test response range specified in Table 1. 0xB501 MSC_CTRL[9:8] = 01, gyroscope/accelerometer Table 21. Setting AUX_DAC = 1 V positive self test. DIN Description Delay = 50 ms. 0xB0D9 AUX_DAC[7:0] = 0xD9 (217 LSB). 0x0400 Read XGYRO_OUT. 0xB104 AUX_DAC[15:8] = 0x04 (1024 LSB). Calculate the negative change from the first reading 0xBE04 GLOB_CMD[2] = 1. Move values into the DAC input to the third reading of XGYRO_OUT, and check to register, resulting in a 1 V output level. make sure the change is within the positive self test response range specified in Table 1. DIAGNOSTICS 0xB500 MSC_CTRL[15:8] = 0x00. Self Test The self test function offers the opportunity to verify the mechanical integrity of each MEMS sensor. It applies an electrostatic force to each sensor element, which results in mechanical displacement that simulates a response to actual motion. Table 1 lists the expected response for each sensor, which provides pass/fail criteria. Rev. D | Page 15 of 18

ADIS16405 Data Sheet Table 23. DIAG_STAT Bit Descriptions Table 24. ALM_CTRL Bit Designations Bit Description Bits Description (Default = 0x0000) 15 Z-axis accelerometer self test failure [15:12] Alarm 2 source selection 1 = fail, 0 = pass 0000 = disable 14 Y-axis accelerometer self test failure 0001 = power supply output 1 = fail, 0 = pass 0010 = x-axis gyroscope output 13 X-axis accelerometer self test failure 0011 = y-axis gyroscope output 1 = fail, 0 = pass 0100 = z-axis gyroscope output 12 Z-axis gyroscope self test failure 0101 = x-axis accelerometer output 1 = fail, 0 = pass 11 Y-axis gyroscope self test failure 0110 = y-axis accelerometer output 1 = fail, 0 = pass 0111 = z-axis accelerometer output 10 X-axis gyroscope self test failure 1000 = x-axis magnetometer output 1 = fail, 0 = pass 1001 = y-axis magnetometer output 9 Alarm 2 status 1010 = z-axis magnetometer output 1 = active, 0 = inactive 1011 = gyroscope temperature output 8 Alarm 1 status 1100 = auxiliary ADC input 1 = active, 0 = inactive [11:8] Alarm 1 source selection (same as Alarm 2) 7 Not used 7 ROC enable for Alarm 2 6 Flash test, checksum flag 1 = rate of change, 0 = static level 1 = fail, 0 = pass 6 ROC enable for Alarm 1 5 Self test diagnostic error flag 1 = rate of change, 0 = static level 1 = fail, 0 = pass 5 Not used 4 Sensor overrange 4 Comparison data filter setting 1 = fail, 0 = pass 1 = filtered data, 0 = unfiltered data 3 SPI communication failure 3 Not used 1 = fail, 0 = pass 2 Alarm output enable 2 Flash update failure 1 = enabled, 0 = disabled 1 = fail, 0 = pass 1 Alarm output polarity 1 Power supply above 5.25 V 1 = active high, 0 = active low 1 = power supply ≥ 5.25 V, 0 = power supply ≤ 5.25 V 0 Alarm output line select 0 Power supply below 4.75 V 1 = power supply ≤ 4.75 V, 0 = power supply ≥ 4.75 V 1 = DIO2, 0 = DIO1 Alarm Registers Table 25. ALM_MAG1, ALM_MAG2 The alarm function provides monitoring for two independent Bits Description (Default = 0x0000) conditions. The ALM_CTRL register provides control inputs 15 Comparison polarity for data source, data filtering (prior to comparison), static 1 = greater than, 0 = less than comparison, dynamic rate of change (ROC) comparison, and 14 Not used output indicator configurations. The ALM_MAGx registers [13:0] Data bits that match the format of the trigger establish the trigger threshold and polarity configurations. source selection Table 27 gives an example of how to configure a static alarm. The ALM_SMPLx registers provide the number of samples to Table 26. ALM_SMPL1, ALM_SMPL2 use in the dynamic ROC configuration. The period equals the Bits Description (Default = 0x0000) number in the ALM_SMPLx register multiplied by the sample [15:8] Not used period time, which is established by the SMPL_PRD register. [7:0] Data bits: number of samples (both 0x00 and 0x01 = 1) See Table 28 for an example of how to configure the sensor for this type of function. Rev. D | Page 16 of 18

Data Sheet ADIS16405 Table 27. Alarm Configuration Example 1 Table 28. Alarm Configuration Example 2 DIN Description DIN Description 0xAF55, ALM_CTRL = 0x5517. 0xAF76, ALM_CTRL = 0x7687. 0xAE17 Alarm 1 input = XACCL_OUT. 0xAE87 Alarm 1 input = ZACCL_OUT. Alarm 2 input = XACCL_OUT. Alarm 2 input = YACCL_OUT. Static level comparison, filtered data. DIO2 output Rate of change comparison, unfiltered data. indicator, positive polarity. DIO2 output indicator, positive polarity. 0xA783, ALM_MAG1 = 0x8341. 0xB601 SMPL_PRD = 0x0001. Sample rate = 819.2 SPS. 0xA641 Alarm 1 is true if XACCL_OUT > +0.5 g. 0xAB08 ALM_SMPL1 = 0x0008. 0xA93C, ALM_MAG2= 0x3CBF. Alarm 1 rate of change period = 9.77 ms. 0xA8BF Alarm 2 is true if XACCL_OUT < −0.5 g. 0xAC50 ALM_SMPL2= 0x0050. Alarm 2 rate of change period = 97.7 ms. 0xA783, ALM_MAG1 = 0x8341. 0xA641 Alarm 1 is true if XACCL_OUT > +0.5 g. 0xA93C, ALM_MAG2= 0x3CBE. 0xA8BE Alarm 2 is true if XACCL_OUT < −0.5 g. Rev. D | Page 17 of 18

ADIS16405 Data Sheet OUTLINE DIMENSIONS 31.900 31.700 31.500 23.454 9.464 4.20 23.200 2.382 9.210 4.00 22.946 BSC 8.956 3.80 (2×) (2×) BOTTOM VIEW 17.41 21.410 1.588 BSC 17.21 21.210 TOP VIEW 22.964 1(72.×0)1 21.010 1.588 BSC 22.710 22.456 5.20 1B0.S6C0PIN 24 1144..595500 54(2..08×00) 1.00 7B.S1C8 CFEAASTTUINRGE 14.150 BSC 10.50 PIN 1 0.05 2.00 BSC BSC BSC 12.10 BSC FRONT VIEW 23.504 23.250 22.996 2.660 2.500 2.340 SIDE VIEW 4.330 DETAIL A BSC DETAIL A 4.162 BSC 0.305 BSC (24×) 1.00 1.65 BSC 14.00 BSCBSC (22×) 12-16-2011-C Figure 15. 24-Lead Module with Connector Interface (ML-24-2) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option ADIS16405BMLZ −40°C to +105°C 24-Lead Module with Connector Interface ML-24-2 1 Z = RoHS Compliant Part. ©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07907-0-10/16(D) Rev. D | Page 18 of 18

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