Digital Triaxial Vibration Sensor with FFT Analysis and Storage Digital Data Sheet ADIS16228 FEATURES GENERAL DESCRIPTION Frequency domain triaxial vibration sensor The ADIS16228 iSensor® is a complete vibration sensing system Flat frequency response up to 5 kHz that combines triaxial acceleration sensing with advanced time Digital acceleration data, ±18 g measurement range domain and frequency domain signal processing. Time domain Digital range settings: 0 g to 1 g/5 g/10 g/20 g signal processing includes a programmable decimation filter Real-time sample mode: 20.48 kSPS, single-axis and selectable windowing function. Frequency domain processing Capture sample modes: 20.48 kSPS, three axes includes a 512-point, real-valued FFT for each axis, along with Trigger modes: SPI, timer, external FFT averaging, which reduces the noise floor variation for finer Programmable decimation filter, 11 rate settings resolution. The 14-record FFT storage system offers users the Multirecord capture for selected filter settings ability to track changes over time and capture FFTs with multiple Manual capture mode for time domain data collection decimation filter settings. FFT, 512-point, real valued, all three axes (x, y, z) The 20.48 kSPS sample rate and 5 kHz flat frequency band 3 windowing options: rectangular, Hanning, flat top provide a frequency response that is suitable for many machine Programmable FFT averaging: up to 255 averages health applications. The aluminum core provides excellent Storage: 14 FFT records on all three axes (x, y, z) mechanical coupling to the MEMS acceleration sensors. An Programmable alarms, 6 spectral bands internal clock drives the data sampling and signal processing 2-level settings for warning and fault definition system during all operations, which eliminates the need for an Adjustable response delay to reduce false alarms external clock source. The data capture function has three modes Internal self-test with status flags that offer several options to meet the needs of many different Digital temperature and power supply measurements applications. In addition, real-time mode provides direct access 2 auxiliary digital inputs/outputs to streaming data on one axis. The SPI and data buffer structure SPI-compatible serial interface provide convenient access to data output. The ADIS16228 also Identification registers: serial number, device ID, user ID offers a digital temperature sensor and digital power supply Single-supply operation: 3.0 V to 3.6 V measurements. Operating temperature range: −40°C to +125°C 15 mm × 24 mm × 15 mm aluminum package, flex connector The ADIS16228 is available in a 15 mm × 24 mm × 15 mm module with flanges, machine screw holes (M2 or 2-56), and a flexible APPLICATIONS connector that enables simple user interface and installation. It Vibration analysis has an extended operating temperature range of −40°C to +125°C. Condition monitoring Machine health Instrumentation, diagnostics Safety shutoff sensing FUNCTIONAL BLOCK DIAGRAM DIO1DIO2 RST VDD ADIS16228 OINUPTUPTU/T ALARMS MANPAOGWEEMRENT GND CS TRIAXIAL CONTROLLER CONTROL MEMS REGISTERS SENSOR SCLK SPI PORT TEMP DIN SENSOR ADC CBAUPFTFUERRE WFIINLTDEORW SRTEOCROARGDE REOGUITSPTUETRS DOUT FFT SUPPLY 10069-001 Figure 1. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2011–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADIS16228 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Alarm Definition ........................................................................ 18 Applications ....................................................................................... 1 Alarm Indicator Signals ............................................................. 19 General Description ......................................................................... 1 Alarm Flags and Conditions ..................................................... 19 Functional Block Diagram .............................................................. 1 Alarm Status ................................................................................ 20 Revision History ............................................................................... 3 Worst-Case Condition Monitoring.......................................... 20 Specifications ..................................................................................... 4 Reading Output Data ..................................................................... 21 Timing Specifications .................................................................. 5 Reading Data from the Data Buffer ......................................... 21 Absolute Maximum Ratings ............................................................ 6 Accessing FFT Record Data ...................................................... 21 ESD Caution .................................................................................. 6 Data Format ................................................................................ 22 Pin Configuration and Function Descriptions ............................. 7 Real-Time Data Collection ....................................................... 22 Theory of Operation ........................................................................ 8 Power Supply/Temperature ....................................................... 22 Sensing Element ........................................................................... 8 FFT Event Header ...................................................................... 23 Signal Processing .......................................................................... 8 System Tools .................................................................................... 24 User Interface ................................................................................ 8 Global Commands ..................................................................... 24 Basic Operation ................................................................................. 9 Status/Error Flags ....................................................................... 24 SPI Write Commands .................................................................. 9 Power-Down ............................................................................... 24 SPI Read Commands ................................................................... 9 Operation Managment .............................................................. 25 Data Recording and Signal Processing ........................................ 12 Input/Output Functions ............................................................ 25 Recording Mode ......................................................................... 12 Self-Test ....................................................................................... 26 Spectral Record Production ...................................................... 13 Flash Memory Management ..................................................... 26 Sample Rate/Filtering ................................................................. 13 Device Identification .................................................................. 26 Dynamic Range/Sensitivity ....................................................... 15 Applications Information .............................................................. 27 Pre-FFT Windowing .................................................................. 16 Mating Connector ...................................................................... 27 FFT ............................................................................................... 17 Breakout Board ........................................................................... 27 Recording Times ......................................................................... 17 PC-Based Evaluation Tools ....................................................... 27 Data Records ............................................................................... 17 Outline Dimensions ....................................................................... 29 FFT Record Flash Endurance ................................................... 17 Ordering Guide .......................................................................... 29 Spectral Alarms ............................................................................... 18 Rev. F | Page 2 of 29

Data Sheet ADIS16228 REVISION HISTORY 4/2018—Rev. E to Rev. F 8/2013—Rev. B to Rev. C Changes to Figure 4 ........................................................................... 7 Changes to FFT Averaging Section .............................................. 16 Deleted Interface Board Section, Flex Connector Care Section, Figure 25, and Figure 27; Renumbered Sequentially .................. 27 3/2012—Rev. A to Rev. B Added Breakout Board Section, PC-Based Evaluation Tools Changes to Recording Times Section and Table 21 ................... 16 Section, and Figure 26; Renumbered Sequentially ..................... 27 Changes to Interface Board Section ............................................. 26 Added Figure 27 .............................................................................. 28 8/2011—Rev. 0 to Rev. A Changes to Ordering Guide ........................................................... 29 Changes to General Description ..................................................... 1 Changes to Output Noise and Bandwidth Parameters, Table 1 .. 3 8/2015—Rev. D to Rev. E Added CAL_ENABLE Register to Table 8 ................................... 10 Added Axial Definitions Section and Figure 19; Renumbered Changes to Real-Time Mode Section; Changes to Table 11; Sequentially ...................................................................................... 15 Change to Figure 14 ........................................................................ 12 Change to Scale Adjustment Section ............................................ 16 Changes to Figure 15 ...................................................................... 13 Change to Self-Test Section ........................................................... 26 Change to Dynamic Range Settings Section ............................... 15 Added Dynamic Range/Sensitivity Section; Added Table 13, 2/2014—Rev. C to Rev. D Renumbered Sequentially; Added Figure 16, Figure 17, and Moved Revision History ................................................................... 3 Figure 18, Renumbered Sequentially ............................................ 14 Change to Offset Temperature Coefficient Parameter, Table 1 .. 4 Changes to Recording Times Section ........................................... 16 Changes to Figure 14 ...................................................................... 13 Changes to Figure 20 and Figure 21 ............................................. 20 Changes to FFT Section, Table 19, and Table 20 ......................... 17 Changes to Table 49, Table 50, and Table 51; Change to Added Flex Connector Care Section ............................................ 27 Real-Time Data Collection Section .............................................. 21 Change to Power-Down Section ................................................... 23 7/2011—Revision 0: Initial Version Rev. F | Page 3 of 29

ADIS16228 Data Sheet SPECIFICATIONS T = −40°C to +125°C, VDD = 3.3 V, unless otherwise noted. A Table 1. Parameter Test Conditions/Comments Min Typ Max Unit ACCELEROMETERS Measurement Range1 T = 25°C ±18 g A Sensitivity, FFT T = 25°C, 0 g to 20 g range setting 0.3052 mg/LSB A Sensitivity, Time Domain T = 25°C 0.6104 mg/LSB A Sensitivity Error T = 25°C ±6 % A Nonlinearity With respect to full scale ±0.2 ±1.25 % Cross-Axis Sensitivity 2.6 % Alignment Error With respect to package 1.5 Degrees Offset Error T = 25°C ±1 g A Offset Temperature Coefficient 2 mg/°C Output Noise T = 25°C, 20.48 kHz sample rate, time domain 12 mg rms A Output Noise Density T = 25°C, 10 Hz to 1 kHz 0.248 mg/√Hz A Bandwidth ±5% flatness,2 CAL_ENABLE[4] = 0, see Figure 17 840 Hz ±5% flatness,2 CAL_ENABLE[4] = 1, see Figure 18 5000 Hz Sensor Resonant Frequency 5.5 kHz LOGIC INPUTS3 Input High Voltage, V 2.0 V INH Input Low Voltage, V 0.8 V INL Logic 1 Input Current, I V = 3.3 V ±0.2 ±1 µA INH IH Logic 0 Input Current, I V = 0 V INL IL All Except RST −40 −60 µA RST −1 mA Input Capacitance, C 10 pF IN DIGITAL OUTPUTS3 Output High Voltage, V I = 1.6 mA 2.4 V OH SOURCE Output Low Voltage, V I = 1.6 mA 0.4 V OL SINK FLASH MEMORY Endurance4 10,000 Cycles Data Retention5 T = 85°C, see Figure 24 20 Years J START-UP TIME6 Initial Startup 202 ms Reset Recovery7 RST pulse low or GLOB_CMD[7] = 1 54 ms Sleep Mode Recovery 2.3 ms CONVERSION RATE REC_CTRL1[11:8] = 0x1 (SR0 sample rate selection) 20.48 kSPS Clock Accuracy 3 % POWER SUPPLY Operating voltage range, VDD 3.0 3.3 3.6 V Power Supply Current Record mode, T = 25°C 40 48 mA A Sleep mode, T = 25°C 230 µA A 1 The maximum range depends on the frequency of vibration. 2 Assumes that frequency flatness calibration is enabled. 3 The digital input/output signals are 5 V tolerant. 4 Endurance is qualified as per JEDEC Standard 22, Method A117 and measured at −40°C, +25°C, +85°C, and +125°C. 5 Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22, Method A117. Retention lifetime depends on junction temperature. 6 The start-up times presented reflect the time it takes for data collection to begin. 7 The RST pin must be held low for at least 15 ns. Rev. F | Page 4 of 29

Data Sheet ADIS16228 TIMING SPECIFICATIONS T = 25°C, VDD = 3.3 V, unless otherwise noted. A Table 2. Parameter Description Min1 Typ Max Unit f SCLK frequency 0.01 2.5 MHz SCLK t Stall period between data, between 16th and 17th SCLK 16.5 µs STALL t Chip select to SCLK edge 48.8 ns CS t DOUT valid after SCLK edge 100 ns DAV t DIN setup time before SCLK rising edge 24.4 ns DSU t DIN hold time after SCLK rising edge 48.8 ns DHD t SCLK rise time 12.5 ns SR t SCLK fall time 12.5 ns SF t , t DOUT rise/fall times 5 12.5 ns DF DR t CS high after SCLK edge 5 ns SFS 1 Guaranteed by design, not tested. Timing Diagrams tSR CS tSF tCS tSFS 1 2 3 4 5 6 15 16 SCLK tDAV DOUT MSB DB14 DB13 DB12 DB11 DB10 DB2 DB1 LSB tDSU tDHD DIN R/W A6 A5 A4 A3 A2 D2 D1 LSB 10069-002 Figure 2. SPI Timing and Sequence tSTALL CS SCLK 10069-003 Figure 3. DIN Bit Sequence Rev. F | Page 5 of 29

ADIS16228 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Table 4. Package Characteristics Parameter Rating Package Type θ θ Device Weight JA JC Acceleration 15-Lead Module 31°C/W 11°C/W 6.5 grams Any Axis, Unpowered 2000 g Any Axis, Powered 2000 g ESD CAUTION VDD to GND −0.3 V to +6.0 V Digital Input Voltage to GND −0.3 V to +5.3 V Digital Output Voltage to GND −0.3 V to +3.6 V Analog Inputs to GND −0.3 V to +3.6 V Temperature Operating Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. F | Page 6 of 29

Data Sheet ADIS16228 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 PIN 15 PIN 15 PIN 1 TOP VIEW BOTTOM VIEW NOTES 1. THE LEADS ARE LOCATED ON THE BOTTOM SIDE OF THE FLEXIBLE CABLE. 2. THE LEAD FINISH IS IMMERSION GOLD OVER THE ELECTROLESS NICKEL. 3. THE THICKNESS OF THE GOLD FINISH IS BETWEEN 0.035µm AND 0.150µm. 4. PACKAGE IS NOT SUITABLE FOR SOLDER REFLOW ASSEMBLY PROCESSES. 5. EXAMPLE MATING CONNECTOR: FPAL/VNAX:T 0C 4FO-L6RE2PX8O8IB-R0L1AE5T -CI0O0ON0N-8N4E6C.TOR (FFC) 10069-004 Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Type1 Description 1, 2 VDD S Power Supply, 3.3 V. 3, 4, 5, 8 GND S Ground. 6, 9 DNC N/A No Connect. Do not connect to these pins. 7 DIO2 I/O Digital Input/Output Line 2. 10 RST I Reset, Active Low. 11 DIN I SPI, Data Input. 12 DOUT O SPI, Data Output. DOUT is an output when CS is low. When CS is high, DOUT is in a three-state, high impedance mode. 13 SCLK I SPI, Serial Clock. 14 CS I SPI, Chip Select. 15 DIO1 I/O Digital Input/Output Line 1. 1 S is supply, N/A is not applicable, I/O is input/output, I is input, and O is output. Rev. F | Page 7 of 29

ADIS16228 Data Sheet THEORY OF OPERATION The ADIS16228 is a vibration sensing system that combines a CAPTURE SPI triaxial MEMS accelerometer with advanced signal processing. TRIAXIAL BUFFER SIGNALS MEMS OUTPUT The SPI-compatible port and user register structure provide SENSOR REGISTERS CS convenient access to frequency domain vibration data and many SCLK T user controls. TEMP ADC OR DIN SENSOR P SENSING ELEMENT CONTROLLER CONTROL SPI DOUT REGISTERS Digital vibration sensing in the ADIS16228 starts with a MEMS achccaenlgereos mine vteerlo ccoirtye oinnt oe aac rhe paxreiss.e Antcacteivleer oelmecettreircsa lt rsaignnslaalt,e u lsiinnega r CLOCK 10069-006 Figure 6. Simplified Sensor Signal Processing Block Diagram a micromechanical system like the one shown in Figure 5. The mechanical part of this system includes two different frames USER INTERFACE (one fixed, one moving) that have a series of plates to form SPI Interface a variable, differential capacitive network. When experiencing The user registers (which include both the output registers and the force associated with gravity or acceleration, the moving the control registers, as shown in Figure 6) manage user access frame changes its physical position with respect to the fixed to both sensor data and configuration inputs. Each 16-bit register frame, which results in a change in capacitance. Tiny springs has its own unique bit assignment and two addresses: one for its tether the moving frame to the fixed frame and govern the upper byte and one for its lower byte. Table 8 provides a memory relationship between acceleration and physical displacement. map for each register, along with its function and lower byte A modulation signal on the moving plate feeds through each address. The data collection and configuration command uses capacitive path into the fixed frame plates and into a demodulation the SPI, which consists of four wires. The chip select (CS) signal circuit, which produces the electrical signal that is proportional activates the SPI interface, and the serial clock (SCLK) to the acceleration acting on the device. synchronizes the serial data lines. Input commands clock into ANCHOR the DIN pin, one bit at a time, on the SCLK rising edge. Output data clocks out of the DOUT pin on the SCLK falling edge. PLATE MOVABLE CAPACITORS FRAME When the SPI is used as a slave device, the DOUT contents reflect the information requested using a DIN command. ON FPILXAETDES Dual-Memory Structure TI A The user registers provide addressing for all input/output operations R ELE UCNELITL SENSING in the SPI interface. The control registers use a dual-memory CC UNIT structure. The controller uses SRAM registers for normal A MOVING FORCING PLATE CELL operation, including user-configuration commands. The flash memory provides nonvolatile storage for control registers that have flash backup (see Table 8). Storing configuration data ANCHOR 10069-005 i(nG tLhOe Bfl_aCshM mDe[m6]o =ry 1 r, eDquINire =s a0 xmBaEn4u0a)l .f Wlashhe unp tdhaete d ceovmicme panodw ers on or resets, the flash memory contents load into the SRAM and Figure 5. MEMS Sensor Diagram the device starts producing data according to the configuration SIGNAL PROCESSING in the control registers. Figure 6 offers a simplified block diagram for the ADIS16228. The signal processing stage includes time domain data capture, MANUAL FLASH digital decimation/filtering, windowing, FFT analysis, FFT BACKUP averaging, and record storage. See Figure 14 for more details NONVOLATILE VOLATILE FLASH MEMORY SRAM on the signal processing operation. (NO SPIACCESS) SPIACCESS START-UP RESET 10069-007 Figure 7. SRAM and Flash Memory Diagram Rev. F | Page 8 of 29

Data Sheet ADIS16228 BASIC OPERATION The ADIS16228 uses a SPI for communication, which enables Table 8 provides a list of user registers with their lower byte a simple connection with a compatible, embedded processor addresses. Each register consists of two bytes that each has its own platform, as shown in Figure 8. The factory default configuration unique 7-bit address. Figure 9 relates the bits of each register to for DIO1 provides a busy indicator signal that transitions low their upper and lower addresses. when an event completes and data is available for user access. Uansde tDhIeO D2I, Oif_ nCeTceRsLsa rreyg. i ster (see Table 66) to reconfigure DIO1 15 14 13UPP12ER B11YTE10 9 8 7 6 5LOW4ER B3YTE2 1 0 10069-009 Figure 9. Generic Register Bit Definitions I/O LINES ARE COMPATIBLE WITH 3.3V 3.3V OR 5V LOGIC LEVELS SPI WRITE COMMANDS VDD 1 2 User control registers govern many internal operations. The SYSTEM SS 14 CS DIN bit sequence in Figure 12 provides the ability to write to PROCESSOR ADIS16228 SPI MASTER SCLK 13 SCLK these registers, one byte at a time. Some configuration changes MOSI 11 DIN and functions require only one write cycle. For example, set MISO 12 DOUT GLOB_CMD[11] = 1 (DIN = 0xBF08) to start a manual capture IRQ2 7 DIO2 sequence. The manual capture starts immediately after the last bit IRQ1 15 DIO1 clocks into DIN (16th SCLK rising edge). Other configurations may 3 4 5 8 10069-008 reqCuSire writing to both bytes. Figure 8. Electrical Hook-Up Diagram SCLK TPianb Nlea 6m. eG eneric Master FPurnoccteisosno r Pin Names and Functions DIN 10069-010 SS Slave select Figure 10. SPI Sequence for Manual Capture Start (DIN = 0xBF08) SCLK Serial clock SPI READ COMMANDS MOSI Master output, slave input A single register read requires two 16-bit SPI cycles that also MISO Master input, slave output use the bit assignments that are shown in Figure 12. The first IRQ1, IRQ2 Interrupt request inputs (optional) sequence sets R/W = 0 and communicates the target address The ADIS16228 SPI interface supports full duplex serial (Bits[A6:A0]). Bits[D7:D0] are don’t care bits for a read DIN communication (simultaneous transmit and receive) and uses sequence. DOUT clocks out the requested register contents the bit sequence shown in Figure 12. Table 7 provides a list of during the second sequence. The second sequence can also use the most common settings that require attention to initialize DIN to set up the next read. Figure 11 provides a signal diagram a processor serial port for the ADIS16228 SPI interface. for all four SPI signals while reading the PROD_ID. In this diagram, DIN = 0x5600 and DOUT reflects the decimal Table 7. Generic Master Processor SPI Settings equivalent of 16,228. Processor Setting Description Master The ADIS16228 operates as a slave. CS SCLK Rate ≤ 2.5 MHz Bit rate setting. SPI Mode 3 Clock polarity/phase SCLK (CPOL = 1, CPHA = 1). DIN MSB First Bit sequence. 1 6-Bit Shift register/data length. DOUT DOUT = 00111111 0110 0100 = 0x3F64 = 16,228 = PROD_ID 10069-011 Figure 11. Example SPI Read, PROD_ID, Second Sequence CS SCLK DIN R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 R/W A6 A5 DOUT DB15 DB14DB13DB12DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB15 DB14 DB13 N1.ODTOEUSTBITSAREBASED ONTHEPREVIOUS16-BITSEQUENCE(R/W=0). 10069-012 Figure 12. Example SPI Read Sequence Rev. F | Page 9 of 29

ADIS16228 Data Sheet Table 8. User Register Memory Map Register Flash Name Access Backup Address Default Function Reference FLASH_CNT Read only Yes 0x00 N/A Status, flash memory write count See Table 68 X_SENS Read/write Yes 0x02 N/A X-axis accelerometer scale correction See Table 16 Y_SENS Read/write Yes 0x04 N/A Y-axis accelerometer scale correction See Table 17 Z_SENS Read/write Yes 0x06 N/A Z-axis accelerometer scale correction See Table 18 TEMP_OUT Read only No 0x08 0x8000 Output, temperature during capture See Table 56 SUPPLY_OUT Read only No 0x0A 0x8000 Output, power supply during capture See Table 54 FFT_AVG1 Read/write Yes 0x0C 0x0108 Control, FFT average size of 1, SR0 and SR1 See Table 19 FFT_AVG2 Read/write Yes 0x0E 0x0101 Control, FFT average size of 2, SR2 and SR3 See Table 20 BUF_PNTR Read/write No 0x10 0x0000 Control, buffer address pointer See Table 47 REC_PNTR Read/write No 0x12 0x0000 Control, record address pointer See Table 48 X_BUF Read only No 0x14 0x8000 Output, buffer for x-axis acceleration data See Table 49 Y_BUF Read only No 0x16 0x8000 Output, buffer for y-axis acceleration data See Table 50 Z_BUF Read only No 0x18 0x8000 Output, buffer for z-axis acceleration data See Table 51 REC_CTRL1 Read/write Yes 0x1A 0x1100 Control, Record Control Register 1 See Table 9 REC_CTRL2 Read/write Yes 0x1C 0x00FF Control, Record Control Register 2 See Table 14 REC_PRD Read/write Yes 0x1E 0x0000 Control, record period (automatic mode) See Table 10 ALM_F_LOW Read/write N/A 0x20 0x0000 Alarm, spectral band lower frequency limit See Table 28 ALM_F_HIGH Read/write N/A 0x22 0x0000 Alarm, spectral band upper frequency limit See Table 29 ALM_X_MAG1 Read/write N/A 0x24 0x0000 Alarm, x-axis, Alarm Trigger Level 1 (warning) See Table 30 ALM_Y_MAG1 Read/write N/A 0x26 0x0000 Alarm, y-axis, Alarm Trigger Level 1 (warning) See Table 31 ALM_Z_MAG1 Read/write N/A 0x28 0x0000 Alarm, z-axis, Alarm Trigger Level 1 (warning) See Table 32 ALM_X_MAG2 Read/write N/A 0x2A 0x0000 Alarm, x-axis, Alarm Trigger Level 2 (fault) See Table 33 ALM_Y_MAG2 Read/write N/A 0x2C 0x0000 Alarm, y-axis, Alarm Trigger Level 2 (fault) See Table 34 ALM_Z_MAG2 Read/write N/A 0x2E 0x0000 Alarm, z-axis, Alarm Trigger Level 2 (fault) See Table 35 ALM_PNTR Read/write Yes 0x30 0x0000 Alarm, spectral alarm band pointer See Table 27 ALM_S_MAG Read/write Yes 0x32 0x0000 Alarm, system alarm level See Table 36 ALM_CTRL Read/write Yes 0x34 0x0080 Alarm, configuration See Table 26 DIO_CTRL Read/write Yes 0x36 0x000F Control, functional input/output configuration See Table 66 GPIO_CTRL Read/write Yes 0x38 0x0000 Control, general-purpose input/output See Table 67 AVG_CNT Read/write Yes 0x3A 0x9630 Control, average count for sample rate options See Table 11 DIAG_STAT Read only No 0x3C 0x0000 Status, system error flags See Table 65 GLOB_CMD Write only No 0x3E N/A Control, global command register See Table 64 ALM_X_STAT Read only N/A 0x40 0x0000 Alarm, x-axis, status for spectral alarm bands See Table 37 ALM_Y_STAT Read only N/A 0x42 0x0000 Alarm, y-axis, status for spectral alarm bands See Table 38 ALM_Z_STAT Read only N/A 0x44 0x0000 Alarm, z-axis, status for spectral alarm bands See Table 39 ALM_X_PEAK Read only N/A 0x46 0x0000 Alarm, x-axis, peak value (most severe alarm) See Table 40 ALM_Y_PEAK Read only N/A 0x48 0x0000 Alarm, y-axis, peak value (most severe alarm) See Table 41 ALM_Z_PEAK Read only N/A 0x4A 0x0000 Alarm, z-axis, peak value (most severe alarm) See Table 42 TIME_STAMP_L Read only N/A 0x4C 0x0000 Record time stamp, lower word See Table 61 TIME_STAMP_H Read only N/A 0x4E 0x0000 Record time stamp, upper word See Table 62 Reserved N/A N/A 0x50 N/A N/A LOT_ID1 Read only Yes 0x52 N/A Lot identification code See Table 69 LOT_ID2 Read only Yes 0x54 N/A Lot identification code See Table 70 PROD_ID Read only Yes 0x56 0x3F64 Product identifier; convert to decimal = 16,228 See Table 71 SERIAL_NUM Read only Yes 0x58 N/A Serial number See Table 72 USER_ID Read/write Yes 0x5C 0x0000 User identification register See Table 73 REC_FLSH_CNT Read only No 0x5E N/A Record flash write/erase counter See Table 24 Reserved N/A N/A 0x62 N/A N/A Reserved N/A N/A 0x64 N/A N/A Reserved N/A N/A 0x66 N/A N/A Reserved N/A N/A 0x68 N/A N/A Rev. F | Page 10 of 29

Data Sheet ADIS16228 Register Flash Name Access Backup Address Default Function Reference Reserved N/A N/A 0x6A N/A N/A Reserved N/A N/A 0x6C N/A N/A REC_INFO1 Read only N/A 0x6E N/A Record settings See Table 59 ALM_X_FREQ Read only N/A 0x70 0x0000 Alarm, x-axis, frequency of most severe alarm See Table 43 ALM_Y_FREQ Read only N/A 0x72 0x0000 Alarm, y-axis, frequency of most severe alarm See Table 44 ALM_Z_FREQ Read only N/A 0x74 0x0000 Alarm, z-axis, frequency of most severe alarm See Table 45 REC_INFO2 Read only N/A 0x76 N/A Record settings See Table 60 REC_CNTR Read only No 0x78 0x0000 Record counter See Table 22 CAL_ENABLE Read/write Yes 0x7A 0x0010 Control, frequency calibration enable See Table 13 Rev. F | Page 11 of 29

ADIS16228 Data Sheet DATA RECORDING AND SIGNAL PROCESSING The ADIS16228 provides a complete sensing system for recording Manual FFT Mode and monitoring vibration data. Figure 13 provides a simplified Set REC_CTRL1[1:0] = 00 to place the device in manual FFT block diagram for the signal processing associated with spectral mode. Then use a start command to trigger the production of a record acquisition on all three axes (x, y, z). User registers spectral record. When the device is acquiring a spectral record, provide controls for data type (time or frequency), trigger mode use the busy indicator (DIO1, per factory default) to drive an (manual or automatic), collection mode (real time or capture), interrupt service line on an external processor, which can start sample rates/filtering, windowing, FFT averaging, spectral alarms, data collection after the process completes. DIAG_STAT is the and input/output management. only register that the SPI can read while the device is processing RECORDING MODE a command. Reading this register returns a 0x00 while the device The recording mode selection establishes the data type (time or is busy and 0x80 when the data is ready for external access. When frequency domain), trigger type (manual or automatic), and the spectral record is complete, the device waits for another start data collection (captured or real time). The REC_CTRL1[1:0] command. bits (See Table 9) provide four operating modes: manual FFT, Automatic FFT Mode automatic FFT, manual time capture, and real time. After setting Set REC_CTRL1[1:0] = 01 to place the device in automatic FFT REC_CTRL1, the manual FFT, automatic FFT, and manual time mode. Use the REC_PRD register (see Table 10) to program the capture modes require a start command to start acquiring a period between production of each spectral record. Then use a spectral or time domain record. There are two start command start command to trigger periodic acquisition of a spectral options in this mode: SPI and input/output. The SPI trigger record. For example, set REC_PRD = 0x020A (DIN = 0x9E0A, involves setting GLOB_CMD[11] = 1 (DIN = 0xBF08). The 0x9F02) to set the trigger period to 10 hours. input/output trigger involves using DIO_CTRL (see Table 66) to configure DIO1 or DIO2 as an input trigger line. Table 10. REC_PRD (Base Address = 0x1E), Read/Write Bits Description (Default = 0x0000) Table 9. REC_CTRL1 (Base Address = 0x1A), Read/Write [15:10] Not used (don’t care) Bits Description (Default = 0x1100) [9:8] Scale for data bits [15:14] Not used (don’t care). 00 = 1 second/LSB, 01 = 1 minute/LSB, 10 = 1 hour/LSB [13:12] Window setting. [7:0] Data bits, binary format; range = 0 to 255 00 = rectangular, 01 = Hanning, 10 = flat top, 11 = N/A. 11 SR3, 1 = enabled for FFT, 0 = disable. Manual Time Capture Mode Sample rate = 20,480 ÷ 2AVG_CNT[15:12] (see Table 11). Set REC_CTRL1[1:0] = 10 to place the device into manual time 10 SR2, 1 = enabled for FFT, 0 = disable. capture mode; then use a manual trigger to start a data collection Sample rate = 20,480 ÷ 2AVG_CNT[11:8] (see Table 11). cycle. When the device is operating in this mode, 512 samples 9 SR1, 1 = enabled for FFT, 0 = disable. of time domain data are loaded into the buffer for each axis. Sample rate = 20,480 ÷ 2AVG_CNT[7:4] (see Table 11). This data goes through all time domain signal processing, except 8 SR0, 1 = enabled for FFT, 0 = disable. the pre-FFT windowing, prior to loading into the data buffer for Sample rate = 20,480 ÷ 2AVG_CNT[3:0] (see Table 11). user access. The manual trigger options are the same as in the 7 Power-down between each recording. 1 = enabled. manual FFT mode (SPI, input/output). [6:4] Not used (don’t care). [3:2] Storage method. 00 = none, 01 = alarm trigger, 10 = all, 11 = N/A. [1:0] Recording mode. 00 = manual FFT, 01 = automatic FFT, 10 = manual time capture, 11 = real-time sampling/data access. DATA SPIAND MEMS ADC PROCESSING BUFFER REGISTERS RECORDS 10069-023 Figure 13. Simplified Block Diagram Rev. F | Page 12 of 29

Data Sheet ADIS16228 Real-Time Mode more than one sample rate option is enabled while the device is in the automatic FFT mode, the device produces a spectral record Set REC_CTRL1[1:0] = 11 to place the device into real-time mode. for one SRx option, and then waits for the next automatic trigger, In this mode, the device samples only one axis, at a rate of which occurs based on the time setting in the REC_PRD register 20.48 kSPS, and provides data on its output register at the SR0 (see Table 10). See Figure 15 for more details on how multiple sample rate setting in AVG_CNT[3:0] (see Table 11). Select the SRx options influence data collection and spectral record axis of measurement in this mode by reading its assigned register. production. When in real-time mode, the output data rate For example, select the x-axis by reading X_BUF, using DIN = reflects the SR0 setting. 0x1400. See Table 49, Table 50, or Table 51 for more information on the x_BUF registers. Use DIO1 (Pin 15) to help manage external Table 12 provides a list of SRx settings available in the AVG_CNT access to real-time data. For example, this signal is suitable for register (see Table 11), along with the resulting sample rates, FFT driving an interrupt line to initiate a service routine in an bin widths, bandwidth, and estimated total noise. Note that each external processor. SRx setting also has associated range settings in the REC_CTRL2 SPECTRAL RECORD PRODUCTION register (see Table 14) and the FFT averaging settings that are shown in the FFT_AVG1 and FFT_AVG2 registers (see Table 19 The ADIS16228 produces a spectral record by taking a time and Table 20, respectively). record of data on all three axes, then scaling, windowing, and performing an FFT process on each time record. This process Table 11. AVG_CNT (Base Address = 0x3A), Read/Write repeats for a programmable number of FFT averages, with the FFT Bits Description (Default = 0x9630) result of each cycle accumulating in the data buffer. After [15:12] Sample Rate Option 3, binary (0 to 10), completing the selected number of cycles, the FFT averaging SR3 option sample rate = 20,480 ÷ 2AVG_CNT[15:12] process completes by scaling the data buffer contents. Then the [11:8] Sample Rate Option 2, binary (0 to 10), data buffer contents are available to the SPI and output data SR2 option sample rate = 20,480 ÷ 2AVG_CNT[11:8] registers. [7:4] Sample Rate Option 1, binary (0 to 10), SR1 option sample rate = 20,480 ÷ 2AVG_CNT[7:4] SAMPLE RATE/FILTERING [3:0] Sample Rate Option 0, binary (0 to 10), The sample rate for each axis is 20.48 kSPS. The internal ADC SR0 option sample rate = 20,480 ÷ 2AVG_CNT[3:0] samples all three axes in a time-interleaving pattern (x1, y1, z1, Table 12. Sample Rate Settings and Filter Performance x2, y2…) that provides even distribution of data across the data Sample Peak Noise record. The averaging/decimating filter provides a control for SRx Rate, Bin Bandwidth per the final sample rate in the time record. By averaging and Option f (SPS) Width (Hz) (Hz) Bin (mg) S decimating the time domain data, this filter provides the ability 0 20,480 40 10,240 5.18 to focus the spectral record on lower bandwidths, which produces 1 10,240 20 5120 3.66 finer frequency resolution in each FFT frequency bin. AVG_CNT 2 5120 10 2560 2.59 (see Table 11) provides the setting for the four different sample 3 2560 5 1280 1.83 rate options in REC_CTRL1[11:8] (SRx, see Table 9). All four 4 1280 2.5 640 1.29 options are available when using the manual FFT, automatic 5 640 1.250 320 0.91 FFT, and manual time capture modes. When more than one 6 320 0.625 160 0.65 sample rate option is enabled while the device is in one of the 7 160 0.313 80 0.46 manual modes, the device produces a spectral record for one 8 80 0.156 40 0.32 SRx at a time, starting with the lowest number. After completing 9 40 0.078 20 0.23 the spectral record for one SRx option, the device waits for 10 20 0.039 10 0.16 another start command before producing a spectral record for the next SRx option that is enabled in REC_CTRL1[11:8]. When Rev. F | Page 13 of 29

ADIS16228 Data Sheet RANGE-SCALE SETTING FFT RECORDS—NONVOLATILE FLASH MEMORY KAsM=A XA M= APXE ÷A 2K1 5FROM REC_CTRL2[7:0] REFCFOTRD REFCFOTRD REFCFOTRD REFCFOTRD 0 1 m 13 SENSITIVITY ADJUSTMENT X_SENS, Y_SENS, Z_SENS SAMPLE RATE SETTING WINDOW SETTING REC_CTRL1[11:8] Ko Ks REC_CTRL1[13:12] mRE =C R_CETCR_LC2N[T3R:2] TAMRCEIACMXESILS 20.48kSPS N1AKN =a 1xK ÷NA WINDOW FFT AVE(FNRFFAT)GE CFRORERESRQPEUOCENTNSICOEYN BDUAFFTEAR RAECGSCIPSEITSESR FFFFTT__AAVVGG12, CAL_ENABLE[4] 10069-016 Figure 14. Signal Flow Diagram, REC_CTRL1[1:0] = 00 or 01, FFT Analysis Modes X1Y1Z1X2Y2Z2 X512Y512Z512 PWR2 TEMP2 DATA CAPTURE 512 SAMPLES FFT1 512 SAMPLES FFT2 512 SAMPLES FFTN AFVFGT PAWVGRTAEVMGP FFT RECORD RECORD 1 RECORD 1 RECORD 1 RECORD 1 SR0 SR1 SR2 SR3 RECORDS SPTI/RDIIGOG/TEIMRERDATA RDSYPTI/RDIIGOG/TEIMRERDATA RDSYPTI/RDIIGOG/TEIMRERDATA RDSYPTI/RDIIGOG/TEIMRERDATA RDY 10069-021 Figure 15. Spectral Record Production, with All SRx Settings Enabled Rev. F | Page 14 of 29

Data Sheet ADIS16228 1.4 DYNAMIC RANGE/SENSITIVITY 1.3 The range of the ADIS16228 accelerometers depends on the frequency of the vibration. The accelerometers have a self- 1.2 resonant frequency of 5.5 kHz, and the signal conditioning circuit applies a single-pole, low-pass filter (2.5 kHz) to the E (g) 1.1 D response. The self-resonant behavior of the accelerometer TU 1.0 NI influences the relationship between vibration frequency and G +3σ MA 0.9 dynamic range, as shown in Figure 16, which displays the response to peak input amplitudes, assuming a sinusoidal 0.8 MEAN vibration signature at each frequency. The accelerometer 0.7 resonance and low-pass filter also influence the magnitude –3σ Frersepqounesen, cays Rsheoswpno nins eF iCgourrere 1c7t.i on 0.6100 FREQUENCY10 (0H0z) 5000 10069-117 Figure 17. Magnitude/Frequency Response (CAL_ENABLE[4] = 0) The CAL_ENABLE register provides an on/off control bit for a magnitude/frequency correction that extends the flatness 1.1 (5%) of this response up to 5 kHz. Set CAL_ENABLE[4] = 1 (DIN = 0xFA10) to enable this function, which produces a magnitude/frequency response like the one that is shown in +3σ Figure 18. Set CAL_ENABLE[4] = 0 to remove this correction, g) E ( and use a response that reflects the curve that is shown in D U T 1.0 Figure 17. Note that this operation does not expand the dynamic NI G range of the sensor, but it can simplify the process of setting MA MEAN –3σ spectral alarm limits and any other postprocessing routines. Table 13. CAL_ENABLE (Base Address = 0x7A), Read/Write Bits Description (Default = 0x00FF) 0.9 [41 5:5] NFroetq uuseendc y(d/folant’nt ecassre c)a libration enable 100 FREQUENCY10 (0H0z) 5000 10069-118 1 = enable (see Figure 18) Figure 18. Magnitude/Frequency Response (CAL_ENABLE[4] = 1) 0 = disable (see Figure 17) Axial Definitions [3:0] Not used (don’t care) Figure 19 describes the axial and polarity definitions for all three accelerometers in the ADIS16228. 20 18g PEAK RESPONSE aX 18 16g PEAK RESPONSE 16 14g PEAK RESPONSE aZ g) 14 UDE ( 12 aY T GNI 10 A M PEAK 68 10069-100 Figure 19. Accelerometer Axial and Polarity Definitions 4 2g PEAK RESPONSE 2 0 1000 FR2E0Q00UENCY (Hz)4000 5000 6000 10069-116 Figure 16. Peak Magnitude vs. Frequency Rev. F | Page 15 of 29

ADIS16228 Data Sheet Dynamic Range Settings Scale Adjustment REC_CTRL2 (see Table 14) provides four range settings that The x_SENS registers (see Table 16, Table 17, and Table 18) are associated with each sample rate option, SRx. The range options provide a fine-scale adjustment function for each axis. The that are referenced in REC_CTRL2 reflect the maximum dynamic following equation describes how to use measured and ideal range, which occurs at the lower part of the frequency range and values to calculate the scale factor for each register in LSBs: does not account for the decrease in range (see Figure 16). For SCFx = a  × 218 example, set REC_CTRL2[5:4] = 10 (DIN = 0x9C20) to set the XI − 1  aXM  peak acceleration (A ) to 10 g on the SR2 sample rate option. MAX where: These settings help optimize FFT precision and sensitivity when a is the ideal x-axis value. monitoring lower magnitude vibrations. For each range setting XI a is the actual x-axis measurement. in Table 14, this stage scales the time domain data so that the XM maximum value equates to 215 LSBs for time domain data and These registers contain correction factors, which come from the 216 LSBs for frequency domain data. factory calibration process. The calibration process records accelerometer output in four different orientations and Note that the maximum range for each setting is 1 LSB smaller computes the correction factors for each register. than the listed maximum. For example, the maximum number of codes in the frequency domain analysis is 216 − 1, or 65,535. These registers also provide write access for in-system adjust- For example, when using a range setting of 1 g in one of the FFT ment. Gravity provides a common stimulus for this type of modes, the maximum measurement is equal to 1 g times 216 − 1, correction process. Use both +1 g and −1 g orientations to reduce divided by 216. See Table 15 for the resolution associated with the effect of offset on this measurement. In this case, the ideal each setting and Figure 14 for the location of this operation in measurement is 2 g, and the measured value is the difference of the signal flow diagram. The real-time mode automatically uses the accelerometer measurements at +1 g and −1 g orientations. the 20 g range setting. The factory-programmed values are stored in flash memory and are restored by setting GLOB_CMD[3] = 1 (DIN = 0xBE08) Table 14. REC_CTRL2 (Base Address = 0x1C), Read/Write (see Table 64). Bits Description (Default = 0x00FF) [15:8] Not used (don’t care) Table 16. X_SENS (Base Address = 0x02), Read/Write [7:6] Measurement range, SR3 Bits Description (Default = N/A) 00 = 1 g, 01 = 5 g, 10 = 10 g, 11 = 20 g [15:0] X-axis scale correction factor (SCFx), twos complement [5:4] Measurement range, SR2 00 = 1 g, 01 = 5 g, 10 = 10 g, 11 = 20 g Table 17. Y_SENS (Base Address = 0x04), Read/Write [3:2] Measurement range, SR1 Bits Description (Default = N/A) 00 = 1 g, 01 = 5 g, 10 = 10 g, 11 = 20 g [15:0] Y-axis scale correction factor (SCFy), twos complement [1:0] Measurement range, SR0 Table 18. Z_SENS (Base Address = 0x06), Read/Write 00 = 1 g, 01 = 5 g, 10 = 10 g, 11 = 20 g Bits Description (Default = N/A) Table 15. Range Settings and LSB Weights [15:0] Z-axis scale correction factor (SCFz), twos complement Range Setting (g) Time Mode FFT Mode (REC_CTRL2[5:4]) (mg/LSB) (mg/LSB) PRE-FFT WINDOWING 0 to 1 0.0305 0.0153 REC_CTRL1[13:12] provide three options for pre-FFT windowing 0 to 5 0.1526 0.0763 of time data. For example, set REC_CTRL1[13:12] = 01 to use 0 to 10 0.3052 0.1526 the Hanning window, which offers the best amplitude resolution 0 to 20 0.6104 0.3052 of the peaks between frequency bins and minimal broadening of peak amplitudes. The rectangular and flat top windows are also available because they are common windowing options for vibration monitoring. The flat top window provides accurate amplitude resolution with a trade-off of broadening the peak amplitudes. Rev. F | Page 16 of 29

Data Sheet ADIS16228 FFT The storage time (t ) applies only when a storage method is ST selected in REC_CTRL1[3:2] (see Table 9 for more details about The FFT process converts each 512-sample time record into a the record storage settings). The alarm scan time (t ) applies 256-point spectral record that provides magnitude vs. frequency AST only when the alarms are enabled in ALM_CTRL[4:0] (see data. Each FFT result loads into an accumulator stage that averages Table 26 for more information). Understanding the recording multiple FFT results for the FFT record. time helps predict when data is available, for systems that cannot FFT Averaging use DIO1 to monitor the status of these operations. Note that FFT_AVG1 (Table 19) and FFT_AVG2 (Table 20) contain user- when using automatic FFT mode, the automatic recording period configurable settings for the total number of FFT results in each (REC_PRD) must be greater than the total recording time. record. Each byte contains a binary number that sets the number of DATA RECORDS averages for a particular sample rate setting (SR0 to SR3, per AVG_ CNT register, Table 11). For example, set FFT_AVG1[15:8] = 0x0B After the ADIS16228 finishes processing FFT data, it stores the (DIN = 0x8D0B) to set the total number of averages for the SR1 data into the data buffer, where it is available for external access setting to 11. The default setting for the SR0 sample rate causes using the SPI and x_BUF registers (see Table 49 to Table 51). an average of 8 FFT results for one FFT record. The default REC_CTRL1[3:2] (see Table 9) provides programmable conditions settings for SR1, SR2, and SR3 cause each FFT to contain only for writing buffer data into the FFT records, which are in one FFT result (no averaging). nonvolatile flash memory locations. Set REC_CTRL1[3:2] = 01 to store data buffer data into the flash memory records only Table 19. FFT_AVG1 (Base Address = 0x0C), Read/Write when an alarm condition is met. Set REC_CTRL1[3:2] = 10 to Bits Description (Default = 0x0108) store every set of FFT data into the flash memory locations. The [15:8] Number of FFT results (NF in Figure 14) in a FFT record, flash memory record provides space for a total of 14 records. for sample rate SR1 range = 1 to 255, binary format Each record stored in flash memory contains a header and [7:0] Number of FFT results (N in Figure 14) in a FFT record, F frequency domain (FFT) data from all three axes (x, y, and z). for sample rate SR0 range = 1 to 255, binary format When all 14 records are full, new records do not load into the flash memory. The REC_CNTR register (see Table 22) provides Table 20. FFT_AVG2 (Base Address = 0x0E), Read/Write a running count for the number of records that are stored. Set Bits Description (Default = 0x0101) GLOB_CMD[8] = 1 (DIN = 0xBF01) to clear all of the records in [15:8] Number of FFT results (N in Figure 14) in a FFT record, F for sample rate SR3 range = 1 to 255, binary format flash memory. [7:0] Number of FFT results (N in Figure 14) in a FFT record, F Table 22. REC_CNTR (Base Address = 0x78), Read Only for sample rate SR2. range = 1 to 255, binary format Bits Description (Default = 0x0000) RECORDING TIMES [15:5] Not used [4:0] Total number of records taken; range = 0 to 14, binary When using automatic FFT mode, the automatic recording period (REC_PRD) must be greater than the total recording time. Use When used in conjunction with automatic trigger mode and record the following equations to calculate the recording time: storage, FFT analysis for each sample rate option requires no addi- tional inputs. Depending on the number of FFT averages, the time Manual time mode between each sample rate selection may be quite large. Note that t = t + t + t + t R S PT ST AST selecting multiple sample rates reduces the number of records t = (512/20480) × 2AVG_CNT available for each sample rate setting, as shown in Table 23. S Note that the AVG_CNT variable in this relationship refers to Table 23. Available Records per Sample Rate Selected the decimal equivalent of the applicable nibble in the Number of Sample Rates Selected Available Records AVG_CNT register (See Table 11). 1 14 FFT modes 2 7 3 4 t = N × (t + t + t ) + t + t R F S PT FFT ST AST 4 3 Table 21 provides a list of the processing times and settings that FFT RECORD FLASH ENDURANCE are used in these equations. Table 21. Typical Processing Times The REC_FLSH_CNT register (see Table 24) increments when Function Time (ms) all 14 records contain FFT data. Processing Time, t 18.7 PT Table 24. REC_FLSH_CNT (Base Address = 0x5E), Read Only FFT Time, t 32.7 FFT Bits Description Number of FFT Averages, N Per FFT_AVG1, FFT_AVG2 F [15:0] Flash write cycle count; record data only, binary Storage Time, t 120.0 ST Alarm Scan Time, t 2.21 AST Rev. F | Page 17 of 29

ADIS16228 Data Sheet SPECTRAL ALARMS The alarm function offers six spectral bands for alarm detection. ALARM DEFINITION Each spectral band has high and low frequency definitions, The alarm function provides six programmable spectral bands, along with two different trigger thresholds (Alarm 1 and Alarm 2) as shown in Figure 20. Each spectral alarm band has lower and for each accelerometer axis. Table 25 provides a summary of upper frequency definitions for all of the sample rate options each register used to configure the alarm function. (SRx). It also has two independent trigger level settings, which Table 25. Alarm Function Register Summary are useful for systems that value warning and fault condition Register Address Description indicators. ALM_F_LOW 0x20 Alarm frequency band, lower limit ALM_F_HIGH ALM_F_HIGH 0x22 Alarm frequency band, upper limit ALM_F_LOW ALM_X_MAG1 0x24 X-Axis Alarm Trigger Level 1 (warning) ALM_Y_MAG1 0x26 Y-Axis Alarm Trigger Level 1 (warning) ALM_x_MAG2 ALM_x_MAG1 ALM_Z_MAG1 0x28 Z-Axis Alarm Trigger Level 1 (warning) ALM_X_MAG2 0x2A X-Axis Alarm Trigger Level 2 (fault) E D ALM_Y_MAG2 0x2C Y-Axis Alarm Trigger Level 2 (fault) U T ALM_Z_MAG2 0x2E Z-Axis Alarm Trigger Level 2 (fault) GNI A ALM_PNTR 0x30 Alarm pointer M ALM_S_MAG 0x32 System alarm trigger level ALM_CTRL 0x34 Alarm configuration DIAG_STAT 0x3C Alarm status ALM_X_STAT 0x40 X-axis alarm status 1 2 3 4 5 6 AALLMM__YZ__SSTTAATT 00xx4424 YZ--aaxxiiss aallaarrmm ssttaattuuss FREQUENCY 10069-020 ALM_X_PEAK 0x46 X-axis alarm peak Figure 20. Spectral Band Alarm Setting Example, ALM_PNTR = 0x03 ALM_Y_PEAK 0x48 Y-axis alarm peak Select the spectral band for configuration by writing its number ALM_Z_PEAK 0x4A Z-axis alarm peak (1 to 6) to ALM_PNTR[2:0] (see Table 27). Then select the sample ALM_X_FREQ 0x70 X-axis alarm frequency of peak alarm rate option using ALM_PNTR[9:8]. This number represents a ALM_Y_FREQ 0x72 Y-axis alarm frequency of peak alarm binary number, which corresponds to the x in the SRx sample ALM_Z_FREQ 0x74 Z-axis alarm frequency of peak alarm rates option associated with REC_CTRL1[11:8] (see Table 9). For example, set ALM_PNTR[7:0] = 0x05 (DIN = 0xB005) to The ALM_CTRL register (see Table 26) provides control bits that select Alarm Spectral Band 5, and set ALM_PNTR[15:8] = 0x02 enable the spectral alarms of each axis, configures the system (DIN = 0xB102) to select the SR2 sample rate option. alarm, sets the record delay for the spectral alarms, and configures the clearing function for the DIAG_STAT error flags (see Table 65). Table 27. ALM_PNTR (Base Address = 0x30), Read/Write Bits Description (Default = 0x0000) Table 26. ALM_CTRL (Base Address = 0x34), Read/Write Bits Description (Default = 0x0080) [15:10] Not used [15:12] Not used. [9:8] Sample rate option; range = 0 to 3 for SR0 to SR3 [11:8] Response delay; range = 0 to 15. Represents the number [7:3] Not used of spectral records for each spectral alarm before a [2:0] Spectral band number; range = 1 to 6 spectral alarm flag is set high. Alarm Band Frequency Definitions 7 Latch DIAG_STAT error flags. Requires a clear status command (GLOB_CMD[4]) to reset the flags to 0. After the spectral band and sample rate settings are set, program 1 = enabled, 0 = disabled. the lower and upper frequency boundaries by writing their bin 6 Enable DIO1 as an Alarm 1 output indicator and enable numbers to the ALM_F_LOW register (see Table 28) and DIO2 as an Alarm 2 output indicator. 1 = enabled. ALM_F_HIGH register (see Table 29). Use the bin width 5 System alarm comparison polarity. definitions listed in Table 12 to convert a frequency into a bin 1 = trigger when less than ALM_S_MAG[11:0]. number for this definition. Calculate the bin number by dividing 0 = trigger when greater than ALM_S_MAG[11:0]. the frequency by the bin width that is associated with the sample 4 System alarm. 1 = temperature, 0 = power supply. rate setting. For example, if the sample rate is 5120 Hz and the 3 Alarm S enable (ALM_S_MAG). 1 = enabled, 0 = disabled. lower band frequency is 400 Hz, divide that number by the bin 2 Alarm Z enable (ALM_Z_MAG). 1 = enabled, 0 = disabled. width of 10 Hz to arrive at the 40th bin as the lower band setting. 1 Alarm Y enable (ALM_Y_MAG). 1 = enabled, 0 = disabled. Then set ALM_F_LOW[7:0] = 0x28 (DIN = 0xA028) to establish 0 Alarm X enable (ALM_X_MAG). 1 = enabled, 0 = disabled. 400 Hz as the lower frequency for the 5120 SPS sample rate setting. Rev. F | Page 18 of 29

Data Sheet ADIS16228 Table 28. ALM_F_LOW (Base Address = 0x20), Read/Write Table 33. ALM_X_MAG2 (Base Address = 0x2A), Read/Write Bits Description (Default = 0x0000) Bits Description (Default = 0x0000) [15:8] Not used [15:0] X-axis Alarm Trigger Level 2, 16-bit unsigned (see Table 14 [7:0] Lower frequency, bin number; range = 0 to 255 and Table 15 for the scale factor) Table 29. ALM_F_HIGH (Base Address = 0x22), Read/Write Table 34. ALM_Y_MAG2 (Base Address = 0x2C), Read/Write Bits Description (Default = 0x0000) Bits Description (Default = 0x0000) [15:8] Not used [15:0] Y-axis Alarm Trigger Level 2, 16-bit unsigned (see Table 14 [7:0] Upper frequency, bin number; range = 0 to 255 and Table 15 for the scale factor) Alarm Trigger Settings Table 35. ALM_Z_MAG2 (Base Address = 0x2E), Read/Write The ALM_x_MAG1 and ALM_x_MAG2 registers (see Table 30 Bits Description (Default = 0x0000) to Table 35) provide two independent trigger settings for all three [15:0] Z-axis Alarm Trigger Level 2, 16-bit unsigned (see Table 14 axes of acceleration data. They use the data format established and Table 15 for the scale factor) by the range settings in the REC_CTRL2 register (see Table 14) and recording mode in REC_CTRL1[1:0] (see Table 9). For Table 36. ALM_S_MAG (Base Address = 0x32), Read/Write example, when using the 0 g to 1 g mode for FFT analysis, Bits Description (Default = 0x0000) 32,768 LSB is the closest setting to 500 mg. Therefore, set [15:0] System alarm trigger level, data format matches target ALM_Y_MAG2 = 0x8000 (DIN = 0xAD80, 0xAC00) to set the from ALM_CTRL[4] critical alarm to 500 mg, when using the 0 g to 1 g range option Enable Alarm Settings in REC_CTRL2 for FFT records. See Table 14 and Table 15 for Before configuring the spectral alarm registers, clear their more information about formatting each trigger level. Note that current contents by setting GLOB_CMD[9] = 1 (DIN = 0xBF02). trigger settings that are associated with Alarm 2 should be After completing the spectral alarm band definitions, save greater than the trigger settings for Alarm 1. In other words, the the settings by setting GLOB_CMD[12] = 1 (DIN = 0xBF10). alarm magnitude settings should meet the following criteria: The device ignores the save command if any of these locations ALM_X_MAG2 > ALM_X_MAG1 has already been written to. ALM_Y_MAG2 > ALM_Y_MAG1 ALARM INDICATOR SIGNALS ALM_Z_MAG2 > ALM_Z_MAG1 DIO_CTRL[5:2] (see Table 66) and ALM_CTRL[6] (see Table 30. ALM_X_MAG1 (Base Address = 0x24), Read/Write Table 26) provide controls for establishing DIO1 and DIO2 as Bits Description (Default = 0x0000) dedicated alarm output indicator signals. Use DIO_CTRL[5:2] [15:0] X-axis Alarm Trigger Level 1, 16-bit unsigned (see Table 14 to select the alarm function for DIO1 and/or DIO2; then set and Table 15 for the scale factor) ALM_CTRL[6] = 1 to enable DIO1 to serve as an Alarm 1 indi- Table 31. ALM_Y_MAG1 (Base Address = 0x26), Read/Write cator and DIO2 as an Alarm 2 indicator. This setting establishes DIO1 to indicate Alarm 1 (warning) conditions and DIO2 to Bits Description (Default = 0x0000) indicate Alarm 2 (critical) conditions. [15:0] Y-axis Alarm Trigger Level 1, 16-bit unsigned (see Table 14 and Table 15 for the scale factor) ALARM FLAGS AND CONDITIONS Table 32. ALM_Z_MAG1 (Base Address = 0x28), Read/Write The FFT header (see Table 58) contains both generic alarm flags Bits Description (Default = 0x0000) (DIAG_STAT[13:8]; see Table 65) and spectral band-specific [15:0] Z-axis Alarm Trigger Level 1, 16-bit unsigned (see Table 14 alarm flags (ALM_x_STAT; see Table 37, Table 38, and Table 39). and Table 15 for the scale factor) The FFT header also contains magnitude (ALM_x_PEAK; see Table 40, Table 41, and Table 42) and frequency information (ALM_x_FREQ; see Table 43, Table 44, and Table 45) associated with the highest magnitude of vibration content in the record. Rev. F | Page 19 of 29

ADIS16228 Data Sheet ALARM STATUS Table 39. ALM_Z_STAT (Base Address = 0x44), Read Only Bits Description (Default = 0x0000) The ALM_x_STAT registers (see Table 37, Table 38, and Table 39 15 Alarm 2 on Band 6; 1 = alarm set, 0 = no alarm provide alarm bits for each spectral band on the current sample 14 Alarm 1 on Band 6; 1 = alarm set, 0 = no alarm rate option. 13 Alarm 2 on Band 5; 1 = alarm set, 0 = no alarm Table 37. ALM_X_STAT (Base Address = 0x40), Read Only 12 Alarm 1 on Band 5; 1 = alarm set, 0 = no alarm Bits Description (Default = 0x0000) 11 Alarm 2 on Band 4; 1 = alarm set, 0 = no alarm 15 Alarm 2 on Band 6; 1 = alarm set, 0 = no alarm 10 Alarm 1 on Band 4; 1 = alarm set, 0 = no alarm 14 Alarm 1 on Band 6; 1 = alarm set, 0 = no alarm 9 Alarm 2 on Band 3; 1 = alarm set, 0 = no alarm 13 Alarm 2 on Band 5; 1 = alarm set, 0 = no alarm 8 Alarm 1 on Band 3; 1 = alarm set, 0 = no alarm 12 Alarm 1 on Band 5; 1 = alarm set, 0 = no alarm 7 Alarm 2 on Band 2; 1 = alarm set, 0 = no alarm 11 Alarm 2 on Band 4; 1 = alarm set, 0 = no alarm 6 Alarm 1 on Band 2; 1 = alarm set, 0 = no alarm 10 Alarm 1 on Band 4; 1 = alarm set, 0 = no alarm 5 Alarm 2 on Band 1; 1 = alarm set, 0 = no alarm 9 Alarm 2 on Band 3; 1 = alarm set, 0 = no alarm 4 Alarm 1 on Band 1; 1 = alarm set, 0 = no alarm 8 Alarm 1 on Band 3; 1 = alarm set, 0 = no alarm 3 Not used 7 Alarm 2 on Band 2; 1 = alarm set, 0 = no alarm [2:0] Most critical alarm condition, spectral band; range = 1 to 6 6 Alarm 1 on Band 2; 1 = alarm set, 0 = no alarm 5 Alarm 2 on Band 1; 1 = alarm set, 0 = no alarm WORST-CASE CONDITION MONITORING 4 Alarm 1 on Band 1; 1 = alarm set, 0 = no alarm The ALM_x_PEAK registers (see Table 40, Table 41, and 3 Not used Table 42) contain the peak magnitude for the worst-case alarm [2:0] Most critical alarm condition, spectral band; range = 1 to 6 condition in each axis. The ALM_x_FREQ registers (see Table 43, Table 38. ALM_Y_STAT (Base Address = 0x42), Read Only Table 44, and Table 45) contain the frequency bin number for Bits Description (Default = 0x0000) the worst-case alarm condition. 15 Alarm 2 on Band 6; 1 = alarm set, 0 = no alarm Table 40. ALM_X_PEAK (Base Address = 0x46), Read Only 14 Alarm 1 on Band 6; 1 = alarm set, 0 = no alarm Bits Description (Default = 0x0000) 13 Alarm 2 on Band 5; 1 = alarm set, 0 = no alarm [15:0] Alarm peak, x-axis, accelerometer data format 12 Alarm 1 on Band 5; 1 = alarm set, 0 = no alarm 11 Alarm 2 on Band 4; 1 = alarm set, 0 = no alarm Table 41. ALM_Y_PEAK (Base Address = 0x48), Read Only 10 Alarm 1 on Band 4; 1 = alarm set, 0 = no alarm Bits Description (Default = 0x0000) 9 Alarm 2 on Band 3; 1 = alarm set, 0 = no alarm [15:0] Alarm peak, y-axis, accelerometer data format 8 Alarm 1 on Band 3; 1 = alarm set, 0 = no alarm 7 Alarm 2 on Band 2; 1 = alarm set, 0 = no alarm Table 42. ALM_Z_PEAK (Base Address = 0x4A), Read Only 6 Alarm 1 on Band 2; 1 = alarm set, 0 = no alarm Bits Description (Default = 0x0000) 5 Alarm 2 on Band 1; 1 = alarm set, 0 = no alarm [15:0] Alarm peak, z-axis, accelerometer data format 4 Alarm 1 on Band 1; 1 = alarm set, 0 = no alarm Table 43. ALM_X_FREQ (Base Address = 0x70), Read Only 3 Not used Bits Description (Default = 0x0000) [2:0] Most critical alarm condition, spectral band; range = 1 to 6 [15:8] Not used [7:0] Alarm frequency for x-axis peak alarm level, FFT bin number; range = 0 to 255 Table 44. ALM_Y_FREQ (Base Address = 0x72), Read Only Bits Description (Default = 0x0000) [15:8] Not used [7:0] Alarm frequency for y-axis peak alarm level, FFT bin number; range = 0 to 255 Table 45. ALM_Z_FREQ (Base Address = 0x74), Read Only Bits Description (Default = 0x0000) [15:8] Not used [7:0] Alarm frequency for z-axis peak alarm level, FFT bin number; range = 0 to 255 Rev. F | Page 20 of 29

Data Sheet ADIS16228 READING OUTPUT DATA The ADIS16228 samples, processes, and stores vibration data DATA IN BUFFERS LOAD INTO USER OUTPUT REGISTERS from three axes (x, y, and z) into the data buffer and FFT records (if selected). In manual time capture mode, the record X_BUF for each axis contains 512 samples. In manual and automatic FFT mode, each record contains the 256-point FFT result for each 0 Y_BUF accelerometer axis. Table 46 provides a summary of registers that Z_BUF provide access to processed sensor data. BUF_PNTR X-AXIS Y-AXIS Z-AXIS Table 46. Output Data Registers ACCELEFRFOTMETER ACCELEFRFOTMETER ACCELEFRFOTMETER BUFFER BUFFER BUFFER Register Address Description TEMP_OUT 0x08 Internal temperature 256/512 SUPPLY_OUT 0x0A Internal power supply BUF_PNTR 0x10 Data buffer index pointer FFTANALYSIS REC_PNTR 0x12 FFT record index pointer X_BUF 0x14 X-axis accelerometer buffer SUPPLY_OUT YZ__BBUUFF 00xx1168 YZ-- aaxxiiss aacccceelleerroommeetteerr bbuuffffeerr ISNTTOERRENSA DL ASTAAM IPNL FINFTG BSUYFSFTEERMS S.AMPLES, PROCESSES,AND TEMP_OUT 10069-013 GLOB_CMD 0x3E FFT record retrieve command Figure 21. Data Buffer Structure and Operation TIME_STAMP_L 0x4C Time stamp, lower word Table 47. BUF_PNTR (Base Address = 0x10), Read/Write TIME_STAMP_H 0x4E Time stamp, upper word Bits Description (Default = 0x0000) REC_INFO1 0x6E FFT record header information [15:9] Not used REC_INFO2 0x76 FFT record header information [8:0] Data bits; range = 0 to 255 (FFT), 0 to 511 (time) READING DATA FROM THE DATA BUFFER ACCESSING FFT RECORD DATA After completing a spectral record and updating each data buffer, the ADIS16228 loads the first data sample from each The FFT records can be stored in flash memory. The REC_PNTR data buffer into the x_BUF registers (see Table 49, Table 50, and register (see Table 48) and GLOB_CMD[13] (see Table 64) Table 51) and sets the buffer index pointer in the BUF_PNTR provide access to the FFT records, as shown in Figure 22. For register (see Table 47) to 0x0000. The index pointer determines example, set REC_PNTR[7:0] = 0x0A (DIN = 0x920A) and which data samples load into the x_BUF registers. For example, GLOB_CMD[13] = 1 (DIN = 0xBF20) to load FFT Record 10 in writing 0x009F to the BUF_PNTR register (DIN = 0x9100, the FFT buffer for SPI/register access. DIN = 0x909F) causes the 160th sample in each data buffer Table 48. REC_PNTR (Base Address = 0x12), Read/Write location to load into the x_BUF registers. The index pointer Bits Description (Default = 0x0000) increments with every x_BUF read command, which causes the [15:4] Not used next set of capture data to load into each capture buffer register [3:0] Data bits automatically. This enables an efficient method for reading all 256 samples in a record, using sequential read commands, without having to manipulate the BUF_PNTR register. FFT FFT FFT FFT RECORD RECORD RECORD RECORD 0 1 m 15 X Y Z X Y Z X Y Z X Y Z FFT FFT FFT FFT HEADER HEADER HEADER HEADER 0 1 m 15 m = REC_PNTR DATA SPI GLOB_CMD[13] = 1 BUFFER REGISTERS X, Y, Z REHGEFAISFDTTEERRS 10069-119 Figure 22. FFT Record Access Rev. F | Page 21 of 29

ADIS16228 Data Sheet DATA FORMAT REAL-TIME DATA COLLECTION Table 49, Table 50, and Table 51 list the bit assignments for When using real-time mode, select the output channel by the x_BUF registers. The acceleration data format depends reading the associated x_BUF register. For example, set DIN = on the range scale setting in REC_CTRL2 (see Table 14) and the 0x1600 to select the y-axis sensor for sampling. After selecting recording mode settings in REC_CTRL1 (see Table 9). Table 52 the channel, use the data-ready signal to trigger subsequent data provides some data formatting examples for the FFT mode, and reading of the Y_BUF register. In this mode, use the time domain Table 53 offers some data formatting examples for the 16-bit, data formatting for a range setting of 20 g, as shown in Table 15. twos complement format used in manual time mode. POWER SUPPLY/TEMPERATURE Table 49. X_BUF (Base Address = 0x14), Read Only At the end of each spectral record, the ADIS16228 also measures Bits Description (Default = 0x8000) power supply and internal temperature. It accumulates a 5.12 ms [15:0] X-acceleration data buffer register. record of power supply measurements at a sample rate of 50 kHz See Table 15 for scale sensitivity. and takes 64 samples of internal temperature data over a period Format = twos complement (time), binary (FFT). of 1.7 ms. The average of the power supply and internal tempera- ture loads into the SUPPLY_OUT register (see Table 54) and the Table 50. Y_BUF (Base Address = 0x16), Read Only TEMP_OUT register (see Table 56), respectively. When using Bits Description (Default = 0x8000) real-time mode, these registers update only when this mode starts. [15:0] Y-acceleration data buffer register. See Table 15 for scale sensitivity. Table 54. SUPPLY_OUT (Base Address = 0x0A), Read Only Format = twos complement (time), binary (FFT). Bits Description (Default = 0x8000) [15:12] Not used Table 51. Z_BUF (Base Address = 0x18), Read Only [11:0] Power supply, binary, 3.3 V = 0xA8F, 1.22 mV/LSB Bits Description (Default = 0x8000) [15:0] Z-acceleration data buffer register. Table 55. Power Supply Data Format Examples See Table 15 for scale sensitivity. Supply Level (V) LSB Hex Binary Format = twos complement (time), binary (FFT). 3.6 2949 0xB85 1011 1000 0101 3.3 + 0.0012207 2704 0xA90 1010 1001 0000 Table 52. FFT Mode, 5 g Range, Data Format Examples 3.3 2703 0xA8F 1010 1000 1111 Acceleration (mg) LSB Hex Binary 3.3 − 0.0012207 2702 0xA8E 1010 1000 1110 4,999.9237 65,535 0xFFFF 1111 1111 1111 1111 3.15 2580 0xA14 1010 0001 0100 100 × 5 ÷ 65,536 100 0x0064 0000 0000 0110 0100 2 × 5 ÷ 65,536 2 0x0002 0000 0000 0000 0010 Table 56. TEMP_OUT (Base Address = 0x08), Read Only 1 × 5 ÷ 65,536 1 0x0001 0000 0000 0000 0001 Bits Description (Default = 0x8000) 0 0 0x0000 0000 0000 0000 0000 [15:12] Not used [11:0] Temperature data, offset binary, 1278 LSB = +25°C, Table 53. Manual Time Mode, 5 g Range, Data Format −0.47°C/LSB Examples Acceleration (mg) LSB Hex Binary Table 57. Internal Temperature Data Format Examples Temperature (°C) LSB Hex Binary +4999.847 +32,767 0x7FFF 1111 1111 1111 1111 ~1000 +6,554 0x199A 0001 0001 10011010 125 1065 0x429 0100 0010 1001 +2 × 5 ÷ 32,768 +2 0x0002 0000 0000 0000 0010 25 + 0.47 1277 0x4FD 0100 1111 1101 +1 × 5 ÷ 32,768 +1 0x0001 0000 0000 0000 0001 25 1278 0x4FE 0100 1111 1110 0 0 0x0000 0000 0000 0000 0000 25 − 0.47 1279 0x4FF 0100 1111 1111 −1 × 5 ÷ 32,768 −1 0xFFFF 1111 1111 1111 1111 0 1331 0x533 0101 0011 0011 −2 × 5 ÷ 32,768 −2 0xFFFE 1111 1111 1111 1110 −40 1416 0x588 0101 1000 1000 ~−1000 −6554 0xE666 1110 0110 0110 0110 −5000 −32,768 0x8000 1000 0000 0000 0000 Rev. F | Page 22 of 29

Data Sheet ADIS16228 FFT EVENT HEADER The REC_INFO1 register (see Table 59) and the REC_INFO2 register (see Table 60) capture the settings associated with the Each FFT record has an FFT header that contains information current FFT record. that fills all of the registers listed in Table 58. The information in these registers contains recording time, record configuration Table 59. REC_INFO1 (Base Address = 0x6E), Read Only settings, status/error flags, and several alarm outputs. The registers Bits Description listed in Table 58 update with every record event and also update [15:14] Sample rate option with record-specific information when using GLOB_CMD[13] 00 = SR0, 01 = SR1, 10 = SR2, 11 = SR3 (see Table 64) to retrieve a data set from the FFT record in flash [13:12] Window setting memory. 00 = rectangular, 01 = Hanning, 10 = flat top, 11 = N/A [11:10] Signal range Table 58. FFT Header Register Information 00 = 1 g, 01 = 5 g, 10 = 10 g, 11 = 20 g Register Address Description [9:8] Not used (don’t care) DIAG_STAT 0x3C Alarm status [7:0] FFT averages; range = 1 to 255 ALM_X_STAT 0x40 X-axis alarm status ALM_Y_STAT 0x42 Y-axis alarm status Table 60. REC_INFO2 (Base Address = 0x76), Read Only ALM_Z_STAT 0x44 Z-axis alarm status Bits Description ALM_X_PEAK 0x46 X-axis alarm peak [15:4] Not used (don’t care) ALM_Y_PEAK 0x48 Y-axis alarm peak [3:0] AVG_CNT setting ALM_Z_PEAK 0x4A Z-axis alarm peak The TIME_STMP_x registers (see Table 61 and Table 62) TIME_STMP_L 0x4C Time stamp, lower word provide a relative time stamp that identifies the time for the TIME_STMP_H 0x4E Time stamp, upper word current FFT record. REC_INFO1 0x6E FFT record header information ALM_X_FREQ 0x70 X-axis alarm frequency of peak alarm Table 61. TIME_STMP_L (Base Address = 4C), Read Only ALM_Y_FREQ 0x72 Y-axis alarm frequency of peak alarm Bits Description (Default = 0x0000) ALM_Z_FREQ 0x74 Z-axis alarm frequency of peak alarm [15:0] Record time stamp, low integer, binary, seconds REC_INFO2 0x76 FFT record header information Table 62. TIME_STMP_H (Base Address = 0x4E), Read Only Bits Description (Default = 0x0000) [15:0] Record time stamp, high integer, binary, seconds Rev. F | Page 23 of 29

ADIS16228 Data Sheet SYSTEM TOOLS Table 63 provides an overview of the control registers that STATUS/ERROR FLAGS provide support for system-level functions. The DIAG_STAT register (see Table 65) provides a number of status/error flags that reflect the conditions observed in Table 63. System Tool Register Addresses a recording during SPI communication and diagnostic tests. Register Name Address Description An error condition is indicated by a setting of 1; and all of the FLASH_CNT 0x00 Flash memory write cycle count error flags are sticky, which means that they remain until they DIO_CTRL 0x36 Digital input/output configuration are reset by setting GLOB_CMD[4] = 1 (DIN = 0xBE10) or by GPIO_CTRL 0x38 General-purpose input/output control starting a new recording event. DIAG_STAT[14:8] indicates which DIAG_STAT 0x3C Status/error flags ALM_x_MAGx thresholds were exceeded during a recording GLOB_CMD 0x3E Global commands event. The flag in DIAG_STAT[3] indicates that the total number LOT_ID1 0x52 Lot Identification Code 1 of SCLK clocks is not a multiple of 16. LOT_ID2 0x54 Lot Identification Code 2 Table 65. DIAG_STAT (Base Address = 0x3C), Read Only PROD_ID 0x56 Product identification Bits Description (Default = 0x0000) SERIAL_NUM 0x58 Serial number 15 Not used (don’t care) USER_ID 0x5C User identification register 14 System alarm flag 13 Z-axis, Spectral Alarm 2 flag GLOBAL COMMANDS 12 Y-axis, Spectral Alarm 2 flag The GLOB_CMD register (see Table 64) provides an array of 11 X-axis, Spectral Alarm 2 flag single-write commands for convenience. Setting the assigned bit 10 Z-axis, Spectral Alarm 1 flag to 1 activates each function. When the function completes, the 9 Y-axis, Spectral Alarm 1 flag bit restores itself to 0. For example, clear the capture buffers by 8 X-axis, Spectral Alarm 1 flag setting GLOB_CMD[8] = 1 (DIN = 0xBF01). All of the commands 7 Data ready/busy indicator (0 = busy, 1 = data ready) in the GLOB_CMD register require that the power supply be 6 Flash test result, checksum flag within normal limits for the execution times listed in Table 64. 5 Self-test diagnostic error flag Table 64. GLOB_CMD (Base Address = 0x3E), Write Only 4 Recording escape flag, indicates use of the SPI-driven Bits Description Execution Time interruption command, 0xE8 15 Clear autonull correction 35 µs 3 SPI communication failure (SCLKs ≠ even multiple of 16) 14 Retrieve spectral alarm band infor- 40 µs 2 Flash update failure mation from the ALM_PNTR setting 1 Power supply > 3.625 V 13 Retrieve record data from flash 1.9 ms 0 Power supply < 3.125 V memory POWER-DOWN 12 Save spectral alarm band registers 461 µs to flash memory To power down the ADIS16228, set GLOB_CMD[1] = 1 (DIN = 11 Record start/stop N/A 0xBE02). To reduce power consumption, set REC_CTRL1[7] = 1, 10 Set BUF_PNTR = 0x0000 36 µs which automatically results in a power-down after a record is 9 Clear spectral alarm band 25.8 ms complete. Toggle the CS line from high to low to wake up the registers from flash memory device and place it in an idle state, where it waits for the next 8 Clear records 25.9 ms command. When DOI1 is configured as an external trigger, 7 Software reset 52 ms toggling it can wake up the device, as well. Using DIO1 for this 6 Save registers to flash memory 29.3 ms purpose avoids the potential for multiple devices contending 5 Flash test, compare sum of flash 5 ms for DOUT when waking up with the CS line approach. After memory with factory value completing the record cycle, the device remains awake. Use 4 Clear DIAG_STAT register 36 µs GLOB_CMD[1] to put it back to sleep after reading the 3 Restore factory register settings 84 ms record data. and clear the capture buffers 2 Self-test, result in DIAG_STAT[5] 32.9 ms 1 Power-down N/A 0 Autonull 822 ms Rev. F | Page 24 of 29

Data Sheet ADIS16228 OPERATION MANAGMENT Alarm Indicator The ADIS16228 SPI port supports two different communica- DIO_CTRL[5:2] provide controls for establishing DIO1 and/or tion commands while it is processing data or executing a command DIO2 as a general alarm output indicator that goes active when associated with the GLOB_CMD register (see Table 64): reading any of the flags in DIAG_STAT[13:8] is active. For example, set DIAG_STAT (DIN = 0x3C00) (see Table 65) and the escape code DIO_CTRL[7:0] = 0x12 (DIN = 0xB612) to configure DIO2 as (DIN = 0xE8E8). The SPI ignores all other commands when the a generic alarm indicator with an active high polarity. ALM_ processor is busy. CTRL[6] (see Table 26) provides an additional control, which enables DIO2 to reflect Alarm 2 and DIO1 to reflect Alarm 1 when Software Busy Indicator they are selected as alarm indicators in DIO_CTRL[5:2]. For Use the DIAG_STAT read command to poll DIAG_STAT[7], example, set DIO_CTRL[7:0] = 0x17 (DIN = 0xB617) and set which is equal to 0 when the processor is busy and equal to 1 when ALM_CTRL[6] = 1 (DIN = 0xB440) to establish DIO2 as an active the processor is idle and data is ready for SPI communications. high Alarm 2 indicator and DIO1 as an active high Alarm 1 Software Escape Code indicator. Set GLOB_CMD[4] = 1 (DIN = 0xBE10) to clear the DIAG_STAT error flags and restore the alarm indicator signal The only SPI command that is available when the processor is to its inactive state. busy capturing data is the escape code, which is 0xE8E8. This command is not available for interrupting any other processing Table 66. DIO_CTRL (Base Address = 0x36), Read/Write tasks. Send this command in a repeating pattern, with a small delay Bits Description (Default = 0x000F) between each write cycle, to the DIN pin while monitoring [15:6] Not used DIAG_STAT[7]. The following code example illustrates this [5:4] DIO2 function selection process: 00 = general-purpose input/output (use GPIO_CTRL) DIAG_STAT = 0; 01 = alarm indicator output (per ALM_CTRL) DIAG_STAT = read_reg(0x3C); 10 = trigger input while ((DIAG_STAT & 0x0080) == 0) 11 = busy/data-ready indicator output { write_reg(0xE8E8) [3:2] DIO1 function selection delay_us(50) 00 = general-purpose input/output (use GPIO_CTRL) DIAG_STAT = read_reg(0x3C) 01 = alarm indicator output (per ALM_CTRL) } 10 = trigger input INPUT/OUTPUT FUNCTIONS 11 = busy/data-ready indicator output The DIO_CTRL register (see Table 66) provides configuration 1 DIO2 line polarity control options for the two digital input/output lines, DIO1 and 1 = active high DIO2. 0 = active low Busy Indicator 0 DIO1 line polarity 1 = active high The busy indicator is an output signal that indicates internal 0 = active low processor activity. This signal is active during data recording events or internal processing (GLOB_CMD functions, for General-Purpose Input/Output example). The factory default setting for DIO_CTRL sets DIO1 If the DIO_CTRL register configures either DIO1 or DIO2 as as a positive, active high, busy indicator signal. When configured in a general-purpose digital line, use the GPIO_CTRL register (see this manner, use this signal to alert the master processor to read Table 67) to configure its input/output direction, set the output data from data buffers. level when configured as an output, and monitor the status of Trigger Input an input. The trigger function provides an input pin for starting record Table 67. GPIO_CTRL (Base Address = 0x38), Read/Write events with a signal pulse. Set DIO_CTRL[7:0] = 0x2F (DIN = Bits Description (Default = 0x0000) 0xB62F) to configure DIO2 as a positive trigger input and keep [15:10] Not used DIO1 as a busy indicator. To start a trigger, the trigger input signal 9 DIO2 output level must transition from low to high and then from high to low. The 1 = high; 0 = low recording process starts on the high-to-low transition, as shown 8 DIO1 output level in Figure 23, and the pulse duration must be at least 2.6 µs. 1 = high; 0 = low DIO2 Δt ≥ 2.6µs [7:2] Reserved Δt 1 DIO2 direction control DIO1 CAPTURE TIME 10069-014 0 1D I=O o1u dtipreuctt; i0o n= cinopnutrto l Figure 23. Manual Trigger/Busy Indicator Sequence Example 1 = output; 0 = input Rev. F | Page 25 of 29

ADIS16228 Data Sheet SELF-TEST DEVICE IDENTIFICATION Set GLOB_CMD[2] = 1 (DIN = 0xBE04) (see Table 64) to run Table 69. LOT_ID1 (Base Address = 0x52), Read Only an automatic self-test routine, which reports a pass/fail result to Bits Description DIAG_STAT[5] (see Table 65). [15:0] Lot identification code FLASH MEMORY MANAGEMENT Table 70. LOT_ID2 (Base Address = 0x54), Read Only Set GLOB_CMD[5] = 1 (DIN = 0xBE20) to run an internal Bits Description checksum test on the flash memory, which reports a pass/fail [15:0] Lot identification code result to DIAG_STAT[6]. The FLASH_CNT register (see Table 68) provides a running count of flash memory write cycles. This is a Table 71. PROD_ID (Base Address = 0x56), Read Only tool for managing the endurance of the flash memory. Figure 24 Bits Description (Default = 0x3F64) quantifies the relationship between data retention and junction [15:0] 0x3F64 = 16,228 temperature. Table 72. SERIAL_NUM (Base Address = 0x58), Read Only Table 68. FLASH_CNT (Base Address = 0x00), Read Only Bits Description Bits Description [15:0] Serial number, lot specific [15:0] Binary counter for writing to flash memory Table 73 shows a blank register that is available for writing user- specific identification. Table 73. USER_ID (Base Address = 0x5C), Read/Write 600 Bits Description (Default = 0x000) [15:0] User-written identification s) ar450 Ye N ( TIO EN300 T E R 150 0 30 40 55JUNCT7IO0NTEM85PERAT1U00RE(°C12)5 135 150 10069-015 Figure 24. Flash®/EE Memory Data Retention Rev. F | Page 26 of 29

Data Sheet ADIS16228 APPLICATIONS INFORMATION MATING CONNECTOR BREAKOUT BOARD The mating connector for the ADIS16228, J2, is the AVX® 04- The ADIS16ACL1/PCBZ breakout board provides a convenient 6288-015-000-846. Figure 25 provides a close-up view of this means for connecting the ADIS16228 to an embedded processor, connector, which clamps down on the flex cable to press its using a standard ribbon cable. This printed circuit board (PCB) metal pads onto the metal pads inside of the mating connector. provides four mounting holes (one in each corner), which provide clearance for 4-40 machine screws. SLIDER J1 is a 16-pin connector, which mates with 2 mm pitch, IDC LOCKING DIRECTION ribbon cables, such as the TCSD series from Samtec®. The LEDs (D1 and D2) are not populated; however, the pads are available SLIDER to install to provide a visual representation of the DIO1 and DIO2 signals. The pads accommodate VCC™ CMD28-21VRC/TR8, which works well when R1 and R2 are approximately 400 Ω (0603 pad sizes). PC-BASED EVALUATION TOOLS ADFILSE1X6 2C2A8CBMLELZ COMNANTEICNTGOR 10069-022 The ADIS16ACL1/PCBZ provides a simple way to connect the Figure 25. Mating Connector Detail ADIS16228 to the EVAL-ADIS2 evaluation system, which provides a PC-based method for evaluation of basic function and performance. For more information, visit the EVAL-ADIS2 Evaluation System page on the Analog Devices, Inc., website. 1.250" ADIS16ACL1/PCBZ J1 J2 1 2 15 1.500" 1 15 16 0.157" 0.157" 10069-026 Figure 26. ADIS16ACL1/PCBZ Top Level View/Dimensions Rev. F | Page 27 of 29

ADIS16228 Data Sheet VDD VDD J1 J1 J2 RST 1 2 SCLK 1 CS 3 4 DOUT 2 SPPAINRE 5 6 DIN 3 7 8 4 9 10 5 11 12 SPPAINRE 6 DIO1 13 14 DIO2 DIO2 7 SPPAINRE A31-156PA-2SV1 (671) SPPAINRE SPPAINRE 89 R2 RST 10 D2 400Ω DIN 11 DGND DGND A C DOUT 12 CMD28-21VRC/TR8 (RED) SCLK 13 R1 D1 400Ω CS 14 A C DIO1 15 VDD CMD28-21VRC/TR8 (RED) 04-6288-015-000-846 DGND DGND C2 C1 0603 10µF DNI DGND ADIS16210/ADIS16228 PACKAGE PIN OUT 10069-027 Figure 27. Electrical Schematic Rev. F | Page 28 of 29

Data Sheet ADIS16228 OUTLINE DIMENSIONS 24.20 15.20 24.00 15.00 SQ 23.80 20.20 14.80 20.00 19.80 TOP VIEW Ø 1.65 BOTTOM VIEW Hole and Slot Size for 2.65 1.5 mm Pin (4 PLCS) 3.50 (4 PLCS) R 2.65 (4 PLCS) R 0.83 (Centers of 2 R 0.83 Circles Separated by 0.89) 20.00 BSC 3.75 (4 PLCS) 0.50 NOM 0.254 PITCH NOM 8.20 8.00 DETAIL A 7.80 3.50 NOM FRONT VIEW 15.20 DETAIL A 15.00 14.80 04-27-2011-A Figure 28. 15-Lead Module with Connector Interface (ML-15-1) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option ADIS16228CMLZ −40°C to +125°C 15-Lead Module with Connector Interface ML-15-1 1 Z = RoHS Compliant Part. ©2011–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10069-0-4/18(F) Rev. F | Page 29 of 29