High Voltage, Precision Operational Amplifier Data Sheet ADA4700-1 FEATURES PIN CONFIGURATION Low input offset voltage: 0.2 mV typical NC 1 ADA4700-1 8 NC High output current drive: 30 mA Wide range of operating voltage: ±5 V to ±50 V –IN 2 7 V+ High slew rate: 20 V/µs typical +IN 3 6 OUT High gain bandwidth product: 3.5 MHz typical TOP VIEW V– 4 (Not to Scale) 5 NC Thermal regulation at junction temperature >145°C Ambient temperature range: −40°C to +85°C NOTES 1. NC = NO CONNECT. DO NOT L ow input bias current ≤ 15 nA typical 2 . CCOOORNN LNNEEEACCVTTE TEFOXLPO TOAHTSISIEN DPGIP.NA.DTO V– 11551-001 APPLICATIONS Figure 1. Automated and bench top test equipment High voltage regulators and power amplifiers Data acquisition and signal conditioning Piezo drivers and predrivers General-purpose current sensing GENERAL DESCRIPTION The ADA4700-1 is a high voltage, precision, single-channel 50 5 OUTPUT operational amplifier with a wide operating voltage range (±5 V 40 4 to ±50 V) and relatively high output current drive. Its advanced 30 3 design combines low power (170 mW for a ±50 V supply), high INPUT 20 2 bandwidth (3.5 MHz), and a high slew rate with unity-gain stability aranidl tpoh raasiel aint vtheres oiountp furet ee npaebrfloers mdeasnicgen.e Trsh teo a mbialixtyim toiz sew siinggn anle-ar PUT (V) 100 01 UT (V) T P U N to-noise ratios (SNRs). O–10 –1 I The ADA4700-1 is designed for applications requiring both ac and –20 –2 dc precision performance, making the ADA4700-1 useful in a –30 ADA4700-1 –3 wide variety of applications, including high voltage test equipment VSY = ±50V –40 AV = 20V/V –4 and instrumentation, high voltage regulators and power amplifiers, RL = 2kΩ –50 –5 pfoorw terar nsusdpuplcye rcso nwtirtohl awnidd ep roouttepcutito nra, nangeds a. sI ta ins apmarptliicfuielra rolry b wuefflel r 0 5 10 15 TIM2E0 (µs) 25 30 35 40 11551-200 Figure 2. Slew Rate suited for high intensity LED testing applications where it provides highly accurate voltage and current feedback as well as a predriver to provide accurate voltage and/or current sourcing stimulus to the LED string under test. The ADA4700-1 is specified over the industrial temperature range of −40°C to +85°C and includes thermal regulation at a junction temperature greater than 145°C and an integrated current limit. The ADA4700-1 is available in a thermally enhanced, 8-lead SOIC package with an exposed pad. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADA4700-1 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ........................................... 10 Applications ....................................................................................... 1 Test Circuits ..................................................................................... 20 Pin Configuration ............................................................................. 1 Theory of Operation ...................................................................... 21 General Description ......................................................................... 1 Thermal Regulation ................................................................... 21 Revision History ............................................................................... 2 Applications Information .............................................................. 22 Specifications ..................................................................................... 3 Thermal Management ............................................................... 22 V = ±50 V Electrical Characteristics ....................................... 3 Safe Operating Area ................................................................... 22 SY V = ±24 V Electrical Characteristics ....................................... 5 Driving Capacitive Loads .......................................................... 23 SY V = ±5 V Electrical Charateristics ........................................... 7 Increasing Current Drive .......................................................... 24 SY Absolute Maximum Ratings ............................................................ 8 Constant Current Applications ................................................ 24 Thermal Resistance ...................................................................... 8 Outline Dimensions ....................................................................... 25 ESD Caution .................................................................................. 8 Ordering Guide .......................................................................... 25 Pin Configuration and Function Descriptions ............................. 9 REVISION HISTORY 8/13—Revision 0: Initial Version Rev. 0 | Page 2 of 28

Data Sheet ADA4700-1 SPECIFICATIONS V = ±50 V ELECTRICAL CHARACTERISTICS SY V = ±50 V, V = 0 V, T = 25°C, unless otherwise specified. SY CM A Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V 0.2 2 mV OS −40°C ≤ T ≤ +85°C 2.5 mV A Offset Voltage Drift1 ΔV /ΔT −40°C ≤ T ≤ +85°C 2 13 µV/°C OS A Input Bias Current I 15 30 nA B −40°C ≤ T ≤ +85°C 50 nA A Input Offset Current I 2 25 nA OS −40°C ≤ T ≤ +85°C 30 nA A Input Voltage Range IVR −40°C ≤ T ≤ +85°C (V−) + 3 (V+) − 3 V A Common-Mode Rejection Ratio CMRR (V−) + 3 V ≤ V ≤ (V+) – 3 V 103 108 dB CM −40°C ≤ T ≤ +85°C 103 dB A Large Signal Voltage Gain A −47 V ≤ V ≤ +47 V, R = 2 kΩ 103 106 dB VO OUT L −40°C ≤ T ≤ +85°C 100 dB A Input Impedance Common-Mode R ||C 2.3||5.3 MΩ||pF IN INCM Differential R ||C 2.3||0.5 MΩ||pF IN INDM OUTPUT CHARACTERISTICS Output Voltage High V R = 10 kΩ to GND 48.0 48.5 V OH L −40°C ≤ T ≤ +85°C 47.8 V A R = 2 kΩ to GND 47.5 48.0 V L −40°C ≤ T ≤ +85°C 47.3 V A Output Voltage Low V R = 10 kΩ to GND −48.5 −48.0 V OL L −40°C ≤ T ≤ +85°C −47.8 V A R = 2 kΩ to GND −48.0 −47.5 V L −40°C ≤ T ≤ +85°C −47.3 V A Capacitive Load Drive2 C A = +1 1 nF L V Output Current Drive3 I 30 mA OUT Short-Circuit Limit I Sourcing/Sinking +72/−65 mA SC Closed-Loop Impedance Z f = 100 Hz, A = +1 0.001 Ω OUT V POWER SUPPLY Power Supply Rejection Ratio PSRR V = ±4.5 V to ±55 V 110 130 dB SY −40°C ≤ T ≤ +85°C 110 dB A Supply Current per Amplifier I 1.7 2.2 mA SY −40°C ≤ T ≤ +85°C 2.4 mA A DYNAMIC PERFORMANCE Slew Rate SR V = ±45 V p-p, A = +1, R = 2 kΩ, C = 300 pF 20 V/µs IN V L L Gain Bandwidth Product GBP V = 5 mV p-p, A = +100 3.5 MHz IN V Unity-Gain Crossover UGC V = 5 mV p-p, A = +1 2.6 MHz IN V −3 dB Bandwidth −3 dB V = 5 mV p-p, A = −1 4.8 MHz IN V Phase Margin ΦM V = 5 mV p-p, R = 1 MΩ, C = 35 pF, A = −1 70 Degrees IN L L V Settling Time to 0.1% t V = 30 V p-p, R = 10 kΩ, C = 5 pF, A = −1 4 µs S IN L L V Settling Time to 0.01% t V = 30 V p-p, R = 10 kΩ, C = 5 pF, A = −1 8 µs S IN L L V Rev. 0 | Page 3 of 28

ADA4700-1 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit NOISE PERFORMANCE Total Harmonic Distortion + Noise THD + N A = +1, V = 10 V p-p at 1 kHz, R = 10 kΩ, 0.0002 % V IN L bandwidth = 80 kHz Peak-to-Peak Noise e f = 0.1 Hz to 10 Hz 800 nV p-p n p-p Voltage Noise Density e f = 1 kHz 14.7 nV/√Hz n f = 10 Hz 27 nV/√Hz Current Noise Density i f = 1 kHz 400 fA/√Hz n 1 See Figure 7 through Figure 9. 2 Overshoot vs. temperature and capacitive load performance is shown in Figure 27 through Figure 30. Refer to the Driving Capacitive Loads section for recommendations on driving capacitive loads greater than 1 nF. 3 Refer to the Safe Operating Area section. Rev. 0 | Page 4 of 28

Data Sheet ADA4700-1 V = ±24 V ELECTRICAL CHARACTERISTICS SY V = ±24 V, V = 0 V, T = 25°C, unless otherwise specified. SY CM A Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V 0.2 2 mV OS −40°C ≤ T ≤ +85°C 2.5 mV A Offset Voltage Drift1 ΔV /ΔT −40°C ≤ T ≤ +85°C 2.5 15 µV/°C OS A Input Bias Current I 5 30 nA B −40°C ≤ T ≤ +85°C 50 nA A Input Offset Current I 2 25 nA OS −40°C ≤ T ≤ +85°C 30 nA A Input Voltage Range IVR −40°C ≤ T ≤ +85°C (V−) + 3 (V+) − 3 V A Common-Mode Rejection Ratio CMRR (V−) + 3 V ≤ V ≤ (V+) – 3 V 100 103 dB CM −40°C ≤ T ≤ +85°C 100 dB A Large Signal Voltage Gain A −21 V ≤ V ≤ +21 V, R = 2 kΩ 103 105 dB VO OUT L −40°C ≤ T ≤ +85°C 100 dB A Input Impedance Common-Mode R ||C 2.3||5.3 MΩ||pF IN INCM Differential R ||C 2.3||0.5 MΩ||pF IN INDM OUTPUT CHARACTERISTICS Output Voltage High V R = 10 kΩ to GND 22.2 22.5 V OH L −40°C ≤ T ≤ +85°C 22.0 V A R = 2 kΩ to GND 22.0 22.4 V L −40°C ≤ T ≤ +85°C 21.8 V A Output Voltage Low V R = 10 kΩ to GND −22.5 −22.2 V OL L −40°C ≤ T ≤ +85°C −22.0 V A R = 2 kΩ to GND −22.4 −22.0 V L −40°C ≤ T ≤ +85°C −21.8 V A Capacitive Load Drive2 C A = +1 1 nF L V Output Current Drive I 30 mA OUT Short-Circuit Limit3 I Sourcing/Sinking +72/−65 mA SC Closed-Loop Impedance Z f = 100 Hz, A = +1 0.001 Ω OUT V POWER SUPPLY Power Supply Rejection Ratio PSRR V = ±4.5 V to ±55 V 110 130 dB SY −40°C ≤ T ≤ +85°C 110 dB A Supply Current per Amplifier I 1.65 2.1 mA SY −40°C ≤ T ≤ +85°C 2.3 mA A DYNAMIC PERFORMANCE Slew Rate SR V = ±20 V p-p, A = +1, R = 2 kΩ, C = 300 pF 20 V/µs IN V L L Gain Bandwidth Product GBP V = 5 mV p-p, A = +100 3.5 MHz IN V Unity-Gain Crossover UGC V = 5 mV p-p, A = +1 2.6 MHz IN V −3 dB Bandwidth −3 dB V = 5 mV p-p, A = −1 4.8 MHz IN V Phase Margin ΦM V = 5 mV p-p, R = 1 MΩ, C = 35 pF, A = −1 70 Degrees IN L L V Settling Time to 0.1% t V = 20 V p-p, R = 10 kΩ, C = 5 pF, A = −1 4 µs S IN L L V Settling Time to 0.01% t V = 20 V p-p, R = 10 kΩ, C = 5 pF, A = −1 9 µs S IN L L V Rev. 0 | Page 5 of 28

ADA4700-1 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit NOISE PERFORMANCE Total Harmonic Distortion + Noise THD + N A = +1, V = 10 V p-p at 1 kHz, R = 10 kΩ, 0.0002 % V IN L bandwidth = 80 kHz Peak-to-Peak Noise e f = 0.1 Hz to 10 Hz 800 nV p-p n p-p Voltage Noise Density e f = 1 kHz 14.7 nV/√Hz n f = 10 Hz 27 nV/√Hz Current Noise Density i f = 1 kHz 400 fA/√Hz n 1 See Figure 7 through Figure 9. 2 Overshoot vs. temperature and capacitive load performance is shown in Figure 27 through Figure 30. Refer to the Driving Capacitive Loads section for recommendations on driving capacitive loads greater than 1 nF. 3 Refer to the Safe Operating Area section. Rev. 0 | Page 6 of 28

Data Sheet ADA4700-1 V = ±5 V ELECTRICAL CHARATERISTICS SY V = ±5 V, V = 0 V, T = 25°C, unless otherwise specified. SY CM A Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V 0.2 2 mV OS −40°C ≤ T ≤ +85°C 2.5 mV A Offset Voltage Drift1 ΔV /ΔT −40°C ≤ T ≤ +85°C 3 μV/°C OS A Input Bias Current I 5 30 nA B −40°C ≤ T ≤ +85°C 50 nA A Input Offset Current I 2 25 nA OS −40°C ≤ T ≤ +85°C 30 nA A Input Voltage Range IVR −40°C ≤ T ≤ +85°C −2 +2 V A Common-Mode Rejection Ratio CMRR −2 V ≤ V ≤ +2 V 86 89 dB CM −40°C ≤ T ≤ +85°C 86 dB A Large Signal Voltage Gain A −2 V ≤ V ≤ +2 V, R = 2 kΩ 97 99 dB VO OUT L −40°C ≤ T ≤ +85°C 95 dB A Input Impedance Common-Mode R ||C 2.3||5.3 MΩ||pF IN INCM Differential R ||C 2.3||0.5 MΩ||pF IN INDM OUTPUT CHARACTERISTICS Output Voltage High V R = 2 kΩ to GND 3.4 3.6 V OH L −40°C ≤ T ≤ +85°C 3.2 V A Output Voltage Low V R = 2 kΩ to GND −3.6 −3.4 V OL L −40°C ≤ T ≤ +85°C −3.2 V A Capacitive Load Drive2 C A = +1 1 nF L V Output Current Drive I 30 mA OUT Short Circuit Limit3 I Sourcing/Sinking +72/−65 mA SC Closed-Loop Impedance Z f = 100 Hz, A = +1 0.003 Ω OUT V POWER SUPPLY Power Supply Rejection Ratio PSRR V = ±4.5 V to ±55 V 110 130 dB SY −40°C ≤ T ≤ +85°C 110 dB A Supply Current per Amplifier I 1.5 2 mA SY −40°C ≤ T ≤ +85°C 2.2 mA A DYNAMIC PERFORMANCE Slew Rate SR V = ±2 V p-p, A = +1, R = 2 kΩ, C = 300 pF 18 V/μs IN V L L Gain Bandwidth Product GBP V = 5 mV p-p, A = +100 3.5 MHz IN V Unity-Gain Crossover UGC V = 5 mV p-p, A = +1 2.6 MHz IN V −3 dB Bandwidth −3 dB V = 5 mV p-p, A = −1 4.8 MHz IN V Phase Margin ΦM V = 5 mV p-p, R = 1 MΩ, C = 35 pF, A = −1 70 Degrees IN L L V Settling Time to 0.1% t V = 6 V p-p, R = 10 kΩ, C = 5 pF, A = −1 1.5 μs S IN L L V NOISE PERFORMANCE Total Harmonic Distortion + Noise THD + N A = +1, V = 2 V p-p at 1 kHz, R = 10 kΩ, 0.0005 % V IN L bandwidth = 80 kHz Peak-to-Peak Noise e f = 0.1 Hz to 10 Hz 800 nV p-p n p-p Voltage Noise Density e f = 1 kHz 14.7 nV/√Hz n Current Noise Density i f = 1 kHz 400 fA/√Hz n 1 See Figure 7 through Figure 9. 2 Overshoot vs. temperature and capacitive load performance is shown in Figure 27 through Figure 30. Refer to the Driving Capacitive Loads section for recommendations on driving capacitive loads greater than 1 nF. 3 Refer to the Safe Operating Area section. Rev. 0 | Page 7 of 28

ADA4700-1 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4. θ is specified for the worst-case conditions, that is, a device Parameter Rating JA soldered in a circuit board for surface-mount packages. The Supply Voltage 110 V values in Table 5 were obtained per JEDEC standard JESD51. Input Voltage V− ≤ V ≤ V+ IN Input Current ±10 mA Table 5. Thermal Resistance Differential Input Voltage V− ≤ V ≤ V+ IN Package Type θ θ Unit JA JC Storage Temperature Range −65°C to +150°C 8-Lead SOIC_N_EP 45 30 °C/W Operating Temperature Range1 −40°C to +85°C Junction Temperature Range −65°C to +150°C Board layout impacts thermal characteristics such as θJA. When Lead Temperature (Soldering, 60 sec) 300°C proper thermal management techniques are used, a better θJA ESD can be achieved. Refer to the Thermal Management section for Charged Device Model (CDM) 1250 V additional information. Human Body Model (HBM) 4500 V Although the exposed pad can be left floating, it must be Machine Model (MM) 200 V connected to an external V− plane for proper thermal 1 Refer to the Thermal Management section. management. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress ESD CAUTION rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 8 of 28

Data Sheet ADA4700-1 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NC 1 ADA4700-1 8 NC –IN 2 7 V+ +IN 3 6 OUT TOP VIEW V– 4 (Not to Scale) 5 NC NOTES 1. NC = NO CONNECT. DO NOT 2 . CCOOORNN LNNEEEACCVTTE TEFOXLPO TOAHTSISIEN DPGIP.NA.DTO V– 11551-003 Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1, 5, 8 NC No Connect. Do not connect to these pins. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 V− Negative Supply Voltage. 6 OUT Output. 7 V+ Positive Supply Voltage. 9 EPAD Exposed Pad. Connect the exposed pad to V− or leave floating. The exposed pad is electrically connected to the device. Rev. 0 | Page 9 of 28

ADA4700-1 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS T = 25°C, unless otherwise noted. A 90 30 ADA4700-1 ADA4700-1 80 VVSCYM == ±05VV VVSCYM == ±05VV MEAN =115µV 25 MEAN: 2.7µV/°C 70 S S R R E E FI 60 FI 20 LI LI P P M 50 M A A F F 15 R O 40 R O E E B B M 30 M 10 U U N N 20 5 10 0 0 –1500 –1000 –500 VOS0 (µV) 500 1000 1500 11551-004 0 1 2 3 4 T5CVOS6 (μV/°7C) 8 9 10 11 12 11551-008 Figure 4. Input Offset Voltage Distribution, VSY = ±5 V Figure 7. Input Offset Voltage Drift Distribution, VSY = ±5 V 100 35 ADA4700-1 ADA4700-1 90 VVSCYM == ±02V4V 30 VVSCYM == ±02V4V 80 MEAN = 150µV MEAN: 2.4µV/°C S S ER 70 ER 25 FI FI MPLI 60 MPLI 20 A A F 50 F O O ER 40 ER 15 B B M M U 30 U 10 N N 20 5 10 0 0 –1500 –1000 –500 VOS0 (µV) 500 1000 1500 11551-097 0 1 2 3 4 T5CVOS6 (μV/°7C) 8 9 10 11 12 11551-006 Figure 5. Input Offset Voltage Distribution, VSY = ±24 V Figure 8. Input Offset Voltage Drift Distribution, VSY = ±24 V 100 40 ADA4700-1 ADA4700-1 90 VSY = ±50V VSY = ±50V VCM = 0V 35 VCM =0V MEAN = 80µV MEAN: 2.0µV/°C 80 S S 30 R R E 70 E FI FI PLI 60 PLI 25 M M A A F 50 F 20 O O BER 40 BER 15 M M U 30 U N N 10 20 5 10 –01500 –1000 –500 VOS0 (µV) 500 1000 1500 11551-005 00 1 2 3 4 T5CVOS6 (μV/°7C) 8 9 10 11 12 11551-009 Figure 6. Input Offset Voltage Distribution, VSY = ±50 V Figure 9. Input Offset Voltage Drift Distribution, VSY = ±50 V Rev. 0 | Page 10 of 28

Data Sheet ADA4700-1 T = 25°C, unless otherwise noted. A 500 30 ADA4700-1 ADA4700-1 VSY = ±5V VSY = ±5V 20 400 –40°C +25°C 10 +25°C µV)300 +85°C A) (OS +125°C (nB 0 V200 I +85°C +125°C –10 –40°C 100 –20 0 –30 –2 –1 VCM0 (V) 1 2 11551-010 –2 –1 VCM0 (V) 1 2 11551-014 Figure 10. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ±5 V Figure 13. Input Bias Current (IB) vs. Common-Mode Voltage (VCM) and Temperature, VSY = ±5 V 500 30 ADA4700-1 ADA4700-1 VSY = ±15V VSY = ±15V 20 400 +25°C –40°C +85°C 10 300 µV) A) +25°C (OS –40°C (nB 0 V I 200 +125°C +85°C –10 +125°C 100 –20 0 –30 –12 –9 –6 –3 VCM0 (V) 3 6 9 12 11551-013 –12 –9 –6 –3 VCM0 (V) 3 6 9 12 11551-012 Figure 11. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ±15 V Figure 14. Input Bias Current (IB) vs. Common-Mode Voltage (VCM) and Temperature, VSY = ±15 V 500 40 ADA4700-1 ADA4700-1 VSY = ±50V 20 VSY =±50V 400 0 +85°C +85°C 300 –20 +125°C –40 (µV)OS200 –40°C +25°C +125°C (nA)B–60 +25°C V100 I –40°C –80 0 –100 –120 –100 –140 –200 –160 –47 –40 –30 –20 –10 VCM0 (V) 10 20 30 40 47 11551-011 –47 –40 –30 –20 –10 VCM0 (V) 10 20 30 40 47 11551-015 Figure 12. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ±50 V Figure 15. Input Bias Current (IB) vs. Common-Mode Voltage (VCM) and Temperature, VSY = ±50 V Rev. 0 | Page 11 of 28

ADA4700-1 Data Sheet T = 25°C, unless otherwise noted. A 10 10 ADA4700-1 ADA4700-1 VSY = ±5VTO ±50V VSY = ±5VTO ±50V SOURCING CURRENT SINKING CURRENT V) V) L ( L ( PLY RAI –40°C +25°C PLY RAI –40°C +25°C P P U U S S TO 1 +85°C TO 1 )OH +125°C )OL +125°C +85°C V V T ( T ( U U P P T T U U O O 0.01.001 0.01 LOA0.D1 CURRENT1 (mA) 10 100 11551-016 0.01.001 0.01 LOA0.D1 CURRENT1 (mA) 10 100 11551-020 Figure 16. Output Voltage (VOH) to Supply Rail vs. Load Current, Figure 19. Output Voltage (VOL) to Supply Rail vs. Load Current, VSY = ±5 V to ±50 V VSY = ±5 V to ±50 V 4 4 OL ADA4700-1 VCONTR OFF ON 23 V) AVLSOISVNY A=K =D I+ N ±1=G5 200VmA 23 V) 1 E (m OUTPUT 1 E (m D D U U 0 PLIT 0 PLIT OUTPUT M M –1 A –1 A UT UT –2 UTP –2 UTP O O ADA4700-1 –3 OL ON –3 TIME (1µs/DIV) VALSOOSVY AU= =D R+ C±1=5I N200VGmA ––54 11551-079 VCONTR OFF TIME (1µs/DIV) ––45 11551-087 Figure 17. Output Current Transient Settling Time (Sourcing), VSY = ±50 V, Figure 20. Output Current Transient Settling Time (Sinking), VSY = ±50 V, Refer to Figure 56 for the Test Circuit Refer to Figure 57 for the Test Circuit 2.0 ADA4700-1 +85°C +125°C +25°C –40°C A)1.5 m T ( N E R UR1.0 C Y L P P U S 0.5 00 5 10 15SUP2P0LY VO25LTAG3E0 (±V)35 40 45 50 11551-022 Figure 18. Supply Current vs. Supply Voltage Rev. 0 | Page 12 of 28

Data Sheet ADA4700-1 T = 25°C, unless otherwise noted. A 3.1 3.3 ADA4700-1 ADA4700-1 VSY = ±50V VSY = ±50V RL = 1MΩ RL = 2kΩ Hz)2.9 CL = 200pF Hz)3.1 –40°C M M TH ( TH (2.9 D D WI2.7 VCM = 0V WI D D +25°C AN VCM = –47V AN2.7 B B AIN 2.5 AIN +85°C Y-G VCM = +47V Y-G2.5 +125°C T T NI NI U2.3 U 2.3 2.1–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-025 2.10 20 40 60LOA8D0 CAP1A00CITI1V2E0 (pF1)40 160 180 200 11551-096 Figure 21. Unity-Gain Bandwidth vs. Temperature, VSY = ±50 V Figure 24. Unity-Gain Bandwidth vs. Load Capacitance and Temperature, VSY = ±50 V 200 180 110 150 135 VSY = ±50V 105 100 PHASE 90 s) VSY = ±15V e AIN (dB) 50 GAIN 45 E (Degre AIN (dB)100 G 0 0 AS G PH VSY = ±5V –50 –45 95 ADA4700-1 –100 VVSCYM == ±05VV TO ±50V –90 RL = 1MΩ CL = 35pF ADA4700-1 –150100 1k 10FkREQUEN1C00Yk (Hz) 1M 10M –135 11551-030 900 5 LOA1D0 CURRENT1 5(mA) 20 25 11551-029 Figure 22. Open-Loop Gain and Phase vs. Frequency, Figure 25. Open-Loop Gain vs. Load Current for Various Supply Voltages VSY = ±5 V to ±50 V 50 115 ADA4700-1 ADA4700-1 40 AV = +100 VSY = ±5VTO ±50V VSY = ±50V 30 RL = 10kΩ AV = +10 110 20 B) B) d d N ( 10 N ( RL = 2kΩ AI AI G AV = +1 G 0 105 –10 –20 –3010 100 1k FREQ10UkENCY (1H0z0)k 1M 10M 11551-023 100–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-031 Figure 23. Closed-Loop Gain vs. Frequency, VSY = ±5 V to ±50 V Figure 26. Open-Loop Gain vs. Temperature for Various Load Resistances, VSY = ±50 V Rev. 0 | Page 13 of 28

ADA4700-1 Data Sheet T = 25°C, unless otherwise noted. A 40 40 ADA4700-1 ADA4700-1 VSY = ±5V VSY = ±15V VIN = ±50mV VIN = ±50mV 30 RAVL == 1+01kΩ CL = 1000pF 30 RAVL == 1+01kΩ %) %) CL = 1000pF T ( T ( O O O CL = 500pF O H 20 H 20 RS RS CL = 500pF VE CL = 300pF VE O O CL = 300pF 10 10 CL = 100pF CL = 100pF 0–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-046 0–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-044 Figure 27. Small Signal Overshoot vs. Temperature for Figure 29. Small Signal Overshoot vs. Temperature for Various Capacitance Loads, VSY = ±5 V Various Capacitance Loads, VSY = ±15 V 40 60 ADA4700-1 ADA4700-1 VVASIVNY = == + ±±15500mVV 50 VVASIVNY = == + ±±1550VmTVO ±50V –OS+OS 30 RL = 10kΩ CL = 1000pF RL = 10kΩ %) %) 40 T ( T ( O O HO 20 CL = 500pF HO 30 S S R R VE CL = 300pF VE O O 20 10 CL = 100pF 10 0–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-047 01 10 LOAD1 0C0APACITA1N0C0E0 (pF) 10000 100000 11551-045 Figure 28. Small Signal Overshoot vs. Temperature for Figure 30. Small Signal Overshoot vs. Load Capacitance, VSY =±5 V to ±50 V Various Capacitance Loads, VSY = ±50 V Rev. 0 | Page 14 of 28

Data Sheet ADA4700-1 T = 25°C, unless otherwise noted. A 10 0.1 ADA4700-1 VSY = ±5V VCM = 0V 80kHz LOW-PASS FILTER 1 %) %) 0.01 E ( 0.1 E ( S S OI OI N N THD + 0.01 THD + 0.001 VIN = 2V p-p RL = 2kΩ RL = 2kΩ 0.001 AVSDYA =4 7±050V-1 VRILN == 130Vk Ωp-p VfINC M= =1 k0HVz RL = 10kΩ 0.00001.001 0.01 AMPLITU0.D1E (V p-p) 1 10 11551-071 0.000110 100 FREQUE1kNCY (Hz) 10k 100k 11551-074 Figure 31. Total Harmonic Distortion + Noise (THD + Noise) vs. Figure 34. Total Harmonic Distortion + Noise (THD + Noise) vs. Amplitude, VSY = ±5 V Frequency, VSY = ±5 V 10 0.1 ADA4700-1 VSY = ±15V VCM = 0V 80kHz LOW-PASS FILTER 1 %) %) 0.01 E ( 0.1 E ( S S OI OI N N THD + 0.01 RL = 2kΩ THD + 0.001 VRILN == 22kVΩ p-p 0.001 ADA4700-1 VSY = ±15V VIN = 10V p-p VCM = 0V RL = 10kΩ 0.00001.001fIN = 1kHz0.01 AM0.P1LITUDE (RVL 1p =-p 1)0kΩ 10 100 11551-072 0.000110 100 FREQUE1kNCY (Hz) 10k 100k 11551-075 Figure 32. Total Harmonic Distortion + Noise (THD + Noise) vs. Figure 35. Total Harmonic Distortion + Noise (THD + Noise) vs. Amplitude, VSY = ±15 V Frequency, VSY = ±15 V 10 0.1 ADA4700-1 VSY = ±50V VCM = 0V 80kHz LOW-PASS FILTER 1 %) %) 0.01 E ( 0.1 E ( S S OI OI N N + + THD 0.01 THD 0.001 VRILN == 22kVΩ p-p RL = 2kΩ 0.001 ADA4700-1 VVSCYM == ±05V0V VRILN == 1100kVΩ p-p fIN = 1kHz RL = 10kΩ 0.00001.001 0.01 AM0.P1LITUDE (V 1p-p) 10 100 11551-073 0.000110 100 FREQUE1kNCY (Hz) 10k 100k 11551-076 Figure 33. Total Harmonic Distortion + Noise (THD + Noise) vs. Figure 36. Total Harmonic Distortion + Noise (THD + Noise) vs. Frequency, Amplitude, VSY = ±50 V VSY = ±50 V Rev. 0 | Page 15 of 28

ADA4700-1 Data Sheet T = 25°C, unless otherwise noted. A 140 120 ADA4700-1 VCM = 0V 120 VCM = (V+) – 3V 100 110 VSY = ±50V dB) 80 VCM = (V–) + 3V dB) RR ( RR (100 VSY = ±15V CM 60 CM 40 VSY = ±5V 90 20 ADA4700-1 VSY = ±5V TO ±50V 010 100 FR1kEQUENCY 1(H0kz) 100k 1M 11551-038 80–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-041 Figure 37. Common-Mode Rejection Ratio (CMRR) vs. Frequency, Figure 39. Common-Mode Rejection Ratio (CMRR) vs. Temperature for VSY = ±5 V to ±50 V Various Supply Voltages 140 140 ADA4700-1 VSY = ±4.5VTO ±55V 120 100 135 80 B) B) d d R ( 60 R (130 R +PSRR R S S P P 40 –PSRR 20 125 0 ADA4700-1 VSY = ±5V TO ±50V –2010 100 1kFREQU1E0NkCY (Hz1)00k 1M 10M 11551-033 120–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-037 Figure 38. Power Supply Rejection Ratio (PSRR) vs. Frequency, Figure 40. Power Supply Rejection Ratio (PSRR) vs. Temperature VSY = ±5 V to ±50 V Rev. 0 | Page 16 of 28

Data Sheet ADA4700-1 T = 25°C, unless otherwise noted. A 1000 1000 ADA4700-1 ADA4700-1 VSY = ±5V VSY = ±50V AV = +100 100 AV = +100 100 10 10 AV = +10 Ω) 1 Ω) (OUT AV = +10 (OUT 1 AV = +1 Z 0.1 Z AV = +1 0.1 0.01 0.01 0.001 0.000110 100 1kFREQU1E0NkCY (Hz1)00k 1M 10M 11551-032 0.00110 100 1kFREQU1E0NkCY (Hz1)00k 1M 10M 11551-035 Figure 41. Closed-Loop Output Impedance (ZOUT) vs. Frequency, Figure 44. Closed-Loop Output Impedance (ZOUT) vs. Frequency, VSY = ±5 V VSY = ±50 V 5 10 V) TAGE ( 0 INPUT GE (V) 5 L A INPUT VO–1–05 60 NPUT VOLT –50 INPUT 20 V) I V) 40 GE ( –10 OUTPUT 0 GE ( A A 20 VOLT –20 VOLT UT UT VAVSIDNYA ==4 77±0.5500V-V1 p-p OUTPUT 0 OUTP VAVSIDNYA ==4 77±0.5500V-V1 p-p –40 OUTP 0AV = –120 4 6 TIME8 (µs) 10 12 14 16–20 11551-061 0 2 4 6 TIME8 (µs) 10 12AV = –1140 16–60 11551-064 Figure 42. Positive Output Overload Recovery, VSY = ±50 V Figure 45. Negative Output Overload Recovery, VSY = ±50 V 60 ADA4700-1 VSY = ±50V 40 AV = +1 20 V) T ( PU 0 T U O –20 –40 OUTPUT INPUT –600 20 40 60 80TIM1E00 (µs)120 140 160 180 200 11551-069 Figure 43. No Phase Reversal, VSY = ±50 V Rev. 0 | Page 17 of 28

ADA4700-1 Data Sheet T = 25°C, unless otherwise noted. A 1k 10 ADA4700-1 ADA4700-1 VSY = ±5VTO ±50V VSY = ±5VTO ±50V Hz) VCM = 0V Hz) VCM = 0V V/√ A/√ n p Y (100 Y ( T T SI SI N N E E E D E D 1 S S OI OI N N E 10 T G N A E T R L R O U V C 11 10 F1R0E0QUENCY (1Hkz) 10k 100k 11551-057 0.11 10 FREQ10U0ENCY (Hz) 1k 10k 11551-058 Figure 46. Input Voltage Noise Density vs. Frequency Figure 48. Input Current Noise Density vs. Frequency ADA4700-1 ADA4700-1 DIV) VVSCYM == ±05VV DIV) VVSCYM == ±05V0V V/ V/ E (200n E (200n G G A A OLT OLT V V D D E E R R R R E E EF EF R R UT UT P P N N I I TIME (1s/DIV) 11551-056 TIME (1s/DIV) 11551-059 Figure 47. 0.1 Hz to 10 Hz Noise, VSY = ±5 V Figure 49. 0.1 Hz to 10 Hz Noise, VSY = ±50 V Rev. 0 | Page 18 of 28

Data Sheet ADA4700-1 T = 25°C, unless otherwise noted. A 0.08 60 ADA4700-1 VSY = ±50V –40°C 00..0046 40 AVROVL U==T 2 +=k1 Ω±45V +85°C +25°C –40°C ≤ TA ≤ +125°C 20 CL = 300pF +125°C V) 0.02 V) E ( E ( G G A 0 A 0 T T L L O O V –0.02 V –20 –0.04 ADA4700-1 VSY = ±50V –40 –0.06 AV = +1 RL = 2kΩ CL = 300pF –0.080 2 4 6 8TIM1E0 (µs)12 14 16 18 20 11551-060 –600 4 8 12 16TIM2E0 (µs)24 28 32 36 40 11551-063 Figure 50. Small Signal Transient Response, VSY = ±50 V Figure 53. Large Signal Transient Response, VSY = ±50 V 35 8 ADA4700-1 ADA4700-1 s) 2350 –SR +SR VAVRCSOVLLY U=== T= 23 + =k0±1 Ω05±p04VF5V µs) 6 VARCSVLLY === = 12– 00±1kp5ΩVF 0.01% ATE (V/µ 20 G TIME ( 4 R N W 15 LI SLE SETT 10 2 0.1% 5 0–40 –25 –10 5 T20EMPE35RATU50RE (°6C5) 80 95 110 125 11551-062 00 2 STEP S4IZE (V) 6 8 11551-065 Figure 51. Slew Rate (SR) vs. Temperature, VSY = ±50 V Figure 54. 0.01% and 0.1% Settling Time vs. Step Size, VSY = ±5 V 10 10 ADA4700-1 0.01% ADA4700-1 0.01% VSY = ±15V VSY = ±50V AV = –1 AV = –1 8 RL = 10kΩ 8 RL = 10kΩ CL = 20pF CL = 20pF s) s) µ µ ME ( 6 ME ( 6 TI TI G 0.1% G N N LI LI 0.1% T 4 T 4 T T E E S S 2 2 00 5 1S0TEP SIZE (1V5) 20 25 11551-068 00 5 10 S1T5EP SIZE2 0(V) 25 30 35 11551-066 Figure 52. 0.01% and 0.1% Settling Time vs. Step Size, VSY = ±15 V Figure 55. 0.01% and 0.1% Settling Time vs. Step Size, VSY = ±50 V Rev. 0 | Page 19 of 28

ADA4700-1 Data Sheet TEST CIRCUITS +50V VOUT 750Ω –50V VCONTROL –15V 11551-082 Figure 56. Test Circuit for Output Current Transient Settling Time (Sourcing) Shown in Figure 17 +15V VCONTROL +50V 750Ω VOUT –50V 11551-098 Figure 57. Test Circuit for Output Current Transient Settling Time (Sinking) Shown in Figure 20 Rev. 0 | Page 20 of 28

Data Sheet ADA4700-1 THEORY OF OPERATION V+ Q9 Q10 I1 I3 I2 Q11 Q15 C3 Q17 D5 R1 Q19 D6 D9 R3 C1 I4 10Ω +IN Q1 Q7 Q8 Q2 –IN OUT D7 D10 R4 D1 D3 D4 D2 10Ω C2 D5 Q20 D8 Q3 Q5 D6 Q6 Q4 Q18 R2 Q16 C4 Q14 I5 I6 Q12 Q13 V– 11551-088 Figure 58. Simplified Schematic of the ADA4700-1 The Q19 and Q20 transistors in conjunction with the R3 and R4 The ADA4700-1 is a high voltage operational amplifier featuring resistors provide output short-circuit protection. Additionally, a a slew enhanced bipolar input stage that provides all of the voltage thermal regulating circuit (not shown in Figure 58) limits the gain. Single stage amplifiers are noted for their excellent stability die temperature to 145°C or greater to protect against excessive but poor open-loop gain; however, the advanced ADA4700-1 power dissipation. design provides gain comparable to multistage amplifiers and, therefore, combines the advantages of both. With approximately equal split supplies up to ±50 V, the output can be shorted to ground unconditionally; however, operating this Referring to Figure 58, the input stage is formed by Q5 to Q8 way is not recommended. loaded by the current mirrors, Q9 to Q14. The output stage is of the complementary Darlington type formed by Q15 to Q18. If the voltage between the output and either supply is more than Like other bipolar amplifiers, the input stage is internally clamped 60 V, avoid a short circuit to the supply. Transient dissipation in to prevent degradation with large differential inputs; however, the output transistors can exceed their safe operating area and the addition of Q1 and Q2 in conjunction with the high voltage cause subsequent destruction. diodes, D1 and D2, maintain high differential input impedance THERMAL REGULATION even when the voltage between the inputs is equal to the supply The circuitry for thermal regulation of the ADA4700-1 is voltage. This configuration makes the ADA4700-1 suitable for dependent on the ambient temperature and time duration of applications with unavoidable large differential voltages, such as the current drive. When thermal regulation of the ADA4700-1 rectifiers, peak detectors, and comparators. is active, the supply current, I , reduces from 1.7 mA to 300 µA. SY The ADA4700-1 uses a single-pole compensation set by C3 and The output stage remains biased during thermal regulation due C4. The internal snubber networks, R1/C1 and R2/C2, further to the parasitics of the output devices in conjunction with the enhance the stability. This design enables large capacitive loads elevated die temperature. For example, with a current drive, I , OUT to be driven without the risk of oscillation. of 30 mA for 180 seconds and with an ambient temperature of 85°C, the thermal regulation is triggered at a junction temperature of 145°C with an output current level of 22 mA. For additional information, refer to the Thermal Management section and the Safe Operating Area section. Rev. 0 | Page 21 of 28

ADA4700-1 Data Sheet APPLICATIONS INFORMATION THERMAL MANAGEMENT SAFE OPERATING AREA Thermal management of high power amplifiers such as the The safe operating area (SOA) of Figure 59 is the range of voltages, ADA4700-1 is an essential consideration in system design. Two currents, and temperatures under which an amplifier can safely conditions affect junction temperature (T): power dissipation operate without failure. It is directly dependent on the ambient J (P ) of the device and ambient temperature (T ) surrounding the temperature and the thermal resistance. Figure 59 shows the D A package. This relationship is shown in Equation 1. SOA for the ADA4700-1 at steady state using the PCB shown in Figure 60. The duration of the 30 mA load driven is 180 seconds. T = P × θ + T (1) J D JA A Different time intervals produce alternate sets of curves. The where θ is the thermal resistance between the die and the ambient JA guaranteed ambient temperature range of the ADA4700-1 is −40°C environment. Power dissipation is the sum of quiescent power of to +85°C. The 125°C shown in Figure 59 is for reference only. the device and the power required to drive a load. Power To maintain normal operation, the ADA4700-1 must remain in dissipation for the sourcing current is shown in Equation 2. the SOA (area under each curve) up to an ambient temperature PD = ((V+) − (V−)) × ISY + ((V+) − VOUT) × IOUT (2) of 85°C. Replace ((V+) − V ) in Equation 2 with ((V−) − V ) when 35 OUT OUT θJA = 26°C/W –40°C sinking current. +25°C 30 The specified thermal resistance of the ADA4700-1 is 45°C/W. +85°C Printed circuit board (PCB) layout and an external heat sink 25 +125°C can improve thermal performance by reducing θ . JA A) 20 m To reduce the thermal resistance between the junction and ( UT ambient environment, the exposed pad of the ADA4700-1 can IO 15 V+ = +6V TO +100V be soldered to the V− plane layer of the PCB, which acts as a – 10 heat sink. By using the PCB layout shown in Figure 60, θJA VOUT reduces to 26°C/W. + 101Ω 5 +3V The ADA4700-1 guards the die from exceeding the absolute V– = –3V mtemaxpimeruatmur tee gmrpeaetreart uthrea.n W 14h5e°nC t,h teh deriem raela rcehgeusl aat jiuonnc itsi otrni ggered, 01 V10CC – VOUT (V) 100 11551-102 the supply current is reduced, and the output load current is Figure 59. Safe Operating Area with θJA = 26°C/W limited. 4-LAYER FR4 PCB WITH INTERNAL GROUND AND 12.7mm POWER PLANE. (500mil) a LANDING VIAS: COPPER EPOXY FILLED TOP/BOTTOM: 1.5oz b ARRAY: 3 × 4 INTERNAL LAYERS: 1oz 9.65mm DIAMETER: a = 0.3048mm (12mil) (380mil) PITCH: b = 0.762mm (30mil) 1 8 6.1mm 2 7 25.4mm (240mil) 3 PAD 6 (1000mil) 4 5 9.65mm PADDLE VIAS: (380mil) c EPOXY FILLED ADPIRITARCMAHEY:T :c E1 =R0 : 1× a. 2 8=7 m0.m30 (4580mmmil) (12mil) 11551-103 Figure 60. Thermal Landing and PCB Material Used to Obtain a θJA of 26°C/W Rev. 0 | Page 22 of 28

Data Sheet ADA4700-1 DRIVING CAPACITIVE LOADS 10 OUTPUT 8 Although the ADA4700-1 behaves well when driving capacitive loads, C , as seen in Figure 27 to Figure 30, extra compensation 6 L can improve the response when large capacitances need to be 4 aac scnoumbmbeord naetetdw.o Trhke, assim shpolewstn w iany F oigf uacrec o6m1.p lishing this is with GE (V) 2 A 0 T L VIN VO –2 VOUT RSNUB –4 CSNUB CL 11551-084 –6 INPUT VSY = ±50V Figure 61. Snubber Network –8 ACVL == 1+01pF TO 1nF FRor u n=i t1y5-g0a Ωin aanpdp lCicatio =ns 1 a0n ndF c wapoarckist iwvee lllo. aRdess uuplt st ofo 1r nthFi,s –100 2 4 6TIME (8µs) 10 12 14 11551-093 SNUB SNUB circuit are shown in Figure 64. With higher closed-loop gains, Figure 64. Results from Snubber Network with AV = +1 and CL = 10 pF to 1 nF lighter snubbing can be used. For capacitive loads up to 10 nF, the 15 VSY = ±50V snubber must be larger. Figure 65 shows the results of using an AV = +10 R = 22 Ω, C = 100 nF, and C = 10 nF with the ADA4700-1 10 CL = 10nF SNUB SNUB L in a gain of 10. Because the snubber network places an ac load on the amplifier, snubbing does not work well when larger capacitive 5 V) loads are used, or when large transients are present. A better T ( approach is to use a bypass network in the feedback path, as PU 0 T U shown in Figure 62. O –5 VIN 22Ω VOUT –10 CFB CL 10n3.F3kΩ 11551-089 –150 0.2 0.4 0T.6IME (m0s.)8 1.0 1.2 1.4 11551-099 Figure 62. Unity-Gain Configuration with Bypass Network Figure 65. Results from Snubber Network with Higher Gains, CL = 10 nF The bypass network in Figure 62 performs well with loads up to 10 VSY = ±50V 100 nF. The resulting waveforms are shown in Figure 66 for various 8 AV = +1 output amplitudes. For heavier loads, capacitive feedback, C , must CL = 100nF FB 6 be increased. The configuration in Figure 62 can be modified to 4 work with gains greater than 1. Figure 63 shows a bypass network with a gain of 10 system, and results for various output amplitudes T (V) 2 are shown in Figure 67. PU 0 T U O –2 VIN 22Ω VOUT –4 CFB CL –6 43kΩ 3.3kΩ –8 Figu5r.e1 k6Ω3. Bypass Network with Gain of 10 Sy11551-090s tem –100 0.2 0.4 T0IM.6E (ms)0.8 1.0 1.2 11551-100 Figure 66. Results of Bypass Network for Various Output Amplitudes, Unity Gain with CL = 100 nF Rev. 0 | Page 23 of 28

ADA4700-1 Data Sheet 50 CONSTANT CURRENT APPLICATIONS VSY = ±50V 40 ACVL == 1+0100nF When a constant current with high compliance is needed, the 30 ADA4700-1 can be used as a modified Howland current pump. 20 The values shown in Figure 70 yield a transfer function of 1 mA/V. V) 10 Applying this analysis to the modified Howland current pump T ( in Figure 71 results in an output capability of 1 A/V. PU 0 UT R2 O–10 50kΩ IF R2 = R4 + RSET R1 AND R1 = R3 ––3200 +VIN 100kΩ IOUT =R–VSIENT RR12 RSET –40 500Ω Fig–u50re0 67. Result o0.f5 Bypass Ne1t.wT0IMorEk (wmist)h 1A.5V = +10 an2d.0 CL = 100 nF11551-101 100kRΩ3 49R.54kΩ IOUT 11551-086 Figure 70. Transfer Function of 1 mA/V INCREASING CURRENT DRIVE +V Extra output current can be obtained by adding external driver BDW93C transistors. Crossover distortion is minimized by allowing the amplifier to drive the lower currents directly via the bypass 10kΩ resistor, as is shown in Figure 68. This circuit can provide a few hundred miliamps; however, keep the driver transistors within 20kΩ their safe operating area. For heavier loads (up to 5 A), power VIN 270Ω 0.5Ω IOUT Darlingtons can be used, as is shown in Figure 69. +V 2N5550 VIN 180Ω IOUT 10kΩ BDW94C 2N5401 20kΩ –V 11551-092 +V 11551-085 Figure 71. Modified Howland Current Pump Figure 68. Increasing Current Drive Using Discrete Transistors +V BDW93C VIN 270Ω IOUT BDW94C –V 11551-091 Figure 69. Bilateral Current Source with Transfer Function 1 mA/V Rev. 0 | Page 24 of 28

Data Sheet ADA4700-1 OUTLINE DIMENSIONS 5.00 3.098 4.90 4.80 0.356 8 5 6.20 4.00 6.00 3.90 5.80 2.41 3.80 0.457 1 4 FOR PROPER CONNECTION OF 1.27 BSC BOTTOM VIEW THE EXPOSED PAD, REFER TO 3.81 REF THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TOP VIEW SECTION OF THIS DATA SHEET. 1.75 1.65 0.50 45° 1.35 1.25 0.25 0.25 0.17 0.10 MAX SEATING PLANE 0.51 0.05 NOM 8° 1.04 REF 0.31 COPL0A.1N0ARITY 0° 10..2470 COMPLIANTTO JEDEC STANDARDS MS-012-AA 06-03-2011-B Figure 72. 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP] Narrow Body (RD-8-2) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option ADA4700-1ARDZ −40°C to +85°C 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP] RD-8-2 ADA4700-1ARDZ-R7 −40°C to +85°C 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP] RD-8-2 ADA4700-1ARDZ-RL −40°C to +85°C 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP] RD-8-2 1 Z = RoHS Compliant Part. Rev. 0 | Page 25 of 28

ADA4700-1 Data Sheet NOTES Rev. 0 | Page 26 of 28

Data Sheet ADA4700-1 NOTES Rev. 0 | Page 27 of 28

ADA4700-1 Data Sheet NOTES ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11551-0-8/13(0) Rev. 0 | Page 28 of 28

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADA4700-1ARDZ ADA4700-1ARDZ-RL ADA4700-1ARDZ-R7 EVALPRAHVOPAMP-1RZ