Low Power, Wide Supply Range, Low Cost Difference Amplifiers, G = ½, 2 AD8278/AD8279 FEATURES FUNCTIONAL BLOCK DIAGRAMS Wide input range beyond supplies +VS 7 Rugged input overvoltage protection AD8278 Low supply current: 200 μA maximum (per amplifier) 40kΩ 20kΩ –IN 2 5 SENSE Low power dissipation: 0.5 mW at V = 2.5 V S Bandwidth: 1 MHz (G = ½) CMRR: 80 dB minimum, dc to 20 kHz (G = ½, B Grade) 6 OUT Low offset voltage drift: ±1 μV/°C maximum (B Grade) Low gain drift: 1 ppm/°C maximum (B Grade) 40kΩ 20kΩ +IN 3 1 REF Enhanced slew rate: 1.4 V/μs WiSdien gploew seurp spulyp:p 2ly V r taon 3g6e V –V4S 08308-001 Figure 1. AD8278 Dual supplies: ±2 V to ±18 V +VS 8-lead SOIC, 14-lead SOIC, and 8-lead MSOP packages 11 APPLICATIONS AD8279 40kΩ 20kΩ Voltage measurement and monitoring –INA 2 12 SENSEA Current measurement and monitoring 13 OUTA Instrumentation amplifier building block Portable, battery-powered equipment +INA 3 40kΩ 20kΩ 14 REFA Test and measurement 40kΩ 20kΩ –INB 6 10 SENSEB GENERAL DESCRIPTION 9 OUTB The AD8278 and AD8279 are general-purpose difference amplifiers intended for precision signal conditioning in power +INB 5 8 REFB 40kΩ 20kΩ cproiwticera.l T ahpep lAicDat8i2o7n8s atnhadt AreDq8u2ir7e9 b portohv hidigeh e xpceerpfotiromnaanl ccoe manmdo lonw- –V4S 08308-058 mode rejection ratio (80 dB) and high bandwidth while amplifying Figure 2. AD8279 input signals that are well beyond the supply rails. The on-chip Table 1. Difference Amplifiers by Category resistors are laser trimmed for excellent gain accuracy and high Low CMRR. They also have extremely low gain drift vs. temperature. Distortion High Voltage Current Sensing1 Low Power The common-mode range of the amplifier extends to almost AD8270 AD628 AD8202 (U) AD8276 triple the supply voltage (for G = ½), making the amplifer ideal AD8271 AD629 AD8203 (U) AD8277 for single-supply applications that require a high common- AD8273 AD8205 (B) mode voltage range. The internal resistors and ESD circuitry at AD8274 AD8206 (B) the inputs also provide overvoltage protection to the op amp. AMP03 AD8216 (B) The AD8278 and AD8279 can be used as difference amplifiers with 1U = unidirectional, B = bidirectional. G = ½ or G = 2. They can also be connected in a high precision, single-ended configuration for non inverting and inverting gains of The AD8278 is available in the space-saving 8-lead MSOP and −½, −2, +3, +2, +1½, +1, or +½. The AD8278 and AD8279 SOIC packages, and the AD8279 is offered in a 14-lead SOIC provide an integrated precision solution that has a smaller size, package. Both are specified for performance over the industrial lower cost, and better performance than a discrete alternative. temperature range of −40°C to +85°C and are fully RoHS compliant. The AD8278 and AD8279 operate on single supplies (2.0 V to 36 V) or dual supplies (±2 V to ±18 V). The maximum quiescent supply current is 200 μA, which is ideal for battery-operated and portable systems. For unity-gain difference amplifiers with similar performance, refer to the AD8276 and AD8277 data sheets. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2009–2011 Analog Devices, Inc. All rights reserved.

AD8278/AD8279 TABLE OF CONTENTS Features..............................................................................................1  Typical Performance Characteristics..............................................9  Applications.......................................................................................1  Theory of Operation......................................................................16  General Description.........................................................................1  Circuit Information....................................................................16  Functional Block Diagrams.............................................................1  Driving the AD8278 and AD8279...........................................16  Revision History...............................................................................2  Input Voltage Range...................................................................16  Specifications.....................................................................................3  Power Supplies............................................................................17  Absolute Maximum Ratings............................................................7  Applications Information..............................................................18  Thermal Resistance......................................................................7  Configurations............................................................................18  Maximum Power Dissipation.....................................................7  Differential Output....................................................................19  Short-Circuit Current..................................................................7  Instrumentation Amplifier........................................................19  ESD Caution..................................................................................7  Outline Dimensions.......................................................................20  Pin Configurations and Function Descriptions...........................8  Ordering Guide..........................................................................21  REVISION HISTORY 1/11—Rev. B to Rev. C Change to Table 3..............................................................................4 Change to Impedance/Differential Parameter, Table 3...............4 Change to Table 4..............................................................................5 Change to Impedance/Differential Parameter, Table 5...............6 Change to Table 5..............................................................................6 Added Figure 6 and Table 9.............................................................8 4/10—Rev. A to Rev. B Changes to Figure 31 and Figure 32.............................................13 Changed Supply Current Parameters to AD8278 Supply Current Changes to Figure 40, Figure 41, and Figure 42.........................14 Parameter and AD8279 Supply Current Parameter, Table 5......6 Added Figure 47; Renumbered Sequentially..............................15 Updated Outline Dimensions.......................................................20 Changes to Figure 51 to Figure 57................................................18 Added Differential Output Section..............................................19 10/09—Rev. 0 to Rev. A Changes to Figure 59......................................................................19 Added AD8279 and 14-Lead SOIC Model.....................Universal Updated Outline Dimensions.......................................................21 Changes to Features..........................................................................1 Changes to Ordering Guide..........................................................21 Changes to General Description....................................................1 Change to Table 2.............................................................................3 7/09—Revision 0: Initial Version Rev. C | Page 2 of 24

AD8278/AD8279 SPECIFICATIONS V = ±5 V to ±15 V, V = 0 V, T = 25°C, R = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless S REF A L otherwise noted. Table 2. G = ½ Grade B Grade A Parameter Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS System Offset1 50 100 50 250 μV Over Temperature T = −40°C to +85°C 100 250 μV A vs. Power Supply V = ±5 V to ±18 V 2.5 5 μV/V S Average Temperature Coefficient T = −40°C to +85°C 0.3 1 2 5 μV/°C A Common-Mode Rejection V = ±15 V, V = ±27 V, S CM Ratio (RTI) R = 0 Ω 80 74 dB S Input Voltage Range2 −3 (V + 0.1) +3 (V − 1.5) −3 (V + 0.1) +3 (V − 1.5) V S S S S Impedance3 Differential 120 120 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 1 1 MHz Slew Rate 1.1 1.4 1.1 1.4 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 10 V step on output, C = 100 pF 9 9 μs L Settling Time to 0.001% 10 10 μs GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift T = −40°C to +85°C 1 5 ppm/°C A Gain Nonlinearity V = 20 V p-p 7 12 ppm OUT OUTPUT CHARACTERISTICS Output Voltage Swing4 V = ±15 V, R = 10 kΩ S L T = −40°C to +85°C −V + 0.2 +V − 0.2 −V + 0.2 +V − 0.2 V A S S S S Short-Circuit Current Limit ±15 ±15 mA Capacitive Load Drive 200 200 pF NOISE5 Output Voltage Noise f = 0.1 Hz to 10 Hz 1.4 1.4 μV p-p f = 1 kHz 47 50 47 50 nV/√Hz POWER SUPPLY6 AD8278 Supply Current 200 200 μA Over Temperature T = −40°C to +85°C 250 250 μA A AD8279 Supply Current 300 350 300 350 μA Over Temperature T = −40°C to +85°C 400 400 μA A Operating Voltage Range7 ±2 ±18 ±2 ±18 V TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 26 and Figure 28 for details. 7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference voltage. Rev. C | Page 3 of 24

AD8278/AD8279 V = ±5 V to ±15 V, V = 0 V, T = 25°C, R = 10 kΩ connected to ground, G = 2 difference amplifier configuration, unless S REF A L otherwise noted. Table 3. G = 2 Grade B Grade A Parameter Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS System Offset1 100 200 100 500 μV Over Temperature T = −40°C to +85°C 200 500 μV A vs. Power Supply V = ±5 V to ±18 V 5 10 μV/V S Average Temperature Coefficient T = −40°C to +85°C 0.6 2 2 5 μV/°C A Common-Mode V = ±15 V, V = ±27 V, S CM Rejection Ratio (RTI) R = 0 Ω 86 80 dB S Input Voltage Range2 −1.5 (V + 0.1) +1.5 (V − 1.5) −1.5 (V + 0.1) +1.5 (V − 1.5) V S S S S Impedance3 Differential 30 30 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 550 550 kHz Slew Rate 1.1 1.4 1.1 1.4 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 10 V step on output, C = 100 pF 10 10 μs L Settling Time to 0.001% 11 11 μs GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift T = −40°C to +85°C 1 5 ppm/°C A Gain Nonlinearity V = 20 V p-p 7 12 ppm OUT OUTPUT CHARACTERISTICS Output Voltage Swing4 V = ±15 V, R = 10 kΩ, S L T = −40°C to +85°C −V + 0.2 +V − 0.2 −V + 0.2 +V − 0.2 V A S S S S Short-Circuit Current Limit ±15 ±15 mA Capacitive Load Drive 350 350 pF NOISE5 Output Voltage Noise f = 0.1 Hz to 10 Hz 2.8 2.8 μV p-p f = 1 kHz 90 95 90 95 nV/√Hz POWER SUPPLY6 AD8278 Supply Current 200 200 μA Over Temperature T = −40°C to +85°C 250 250 μA A AD8279 Supply Current 300 350 300 350 μA Over Temperature T = −40°C to +85°C 400 400 μA A Operating Voltage Range7 ±2 ±18 ±2 ±18 V TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 26 and Figure 28 for details. 7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference voltage. Rev. C | Page 4 of 24

AD8278/AD8279 V = +2.7 V to <±5 V, V = midsupply, T = 25°C, R = 10 kΩ connected to midsupply, G = ½ difference amplifier configuration, unless S REF A L otherwise noted. Table 4. G = ½ Grade B Grade A Parameter Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS System Offset1 75 150 75 250 μV Over Temperature T = −40°C to +85°C 150 250 μV A vs. Power Supply V = ±5 V to ±18 V 2.5 5 μV/V S Average Temperature Coefficient T = −40°C to +85°C 0.3 1 2 5 μV/°C A Common-Mode Rejection V = 2.7 V, V = 0 V to S CM Ratio (RTI) 2.4 V, R = 0 Ω 80 74 dB S V = ±5 V, V = −10 V S CM to +7 V, R = 0 Ω 80 74 dB S Input Voltage Range2 −3 (V + 0.1) +3 (V − 1.5) −3 (V + 0.1) +3 (V − 1.5) V S S S S Impedance3 Differential 120 120 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 870 870 kHz Slew Rate 1.3 1.3 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 2 V step on output, C = 100 pF, V = 2.7 V 7 7 μs L S GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift T = −40°C to +85°C 1 5 ppm/°C A OUTPUT CHARACTERISTICS Output Swing4 R = 10 kΩ, L T = −40°C to +85°C −V + 0.1 +V − 0.15 −V + 0.1 +V − 0.15 V A S S S S Short-Circuit Current Limit ±10 ±10 mA Capacitive Load Drive 200 200 pF NOISE5 Output Voltage Noise f = 0.1 Hz to 10 Hz 1.4 1.4 μV p-p f = 1 kHz 47 50 47 50 nV/√Hz POWER SUPPLY6 AD8278 Supply Current T = −40°C to +85°C 200 200 μA A AD8279 Supply Current T = −40°C to +85°C 375 375 μA A Operating Voltage Range 2.0 36 2.0 36 V TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 27 and Figure 28 for details. Rev. C | Page 5 of 24

AD8278/AD8279 V = +2.7 V to <±5 V, V = midsupply, T = 25°C, R = 10 kΩ connected to midsupply, G = 2 difference amplifier configuration, unless S REF A L otherwise noted. Table 5. G = 2 Grade B Grade A Parameter Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS System Offset1 150 300 150 500 μV Over Temperature T = −40°C to +85°C 300 500 μV A vs. Power Supply V = ±5 V to ±18 V 5 10 μV/V S Average Temperature Coefficient T = −40°C to +85°C 0.6 2 3 5 μV/°C A Common-Mode Rejection V = 2.7 V, V = 0 V S CM Ratio (RTI) to 2.4 V, R = 0 Ω 86 80 dB S V = ±5 V, V = −10 V S CM to +7 V, R = 0 Ω 86 80 dB S Input Voltage Range2 −1.5 (V + 0.1) +1.5 (V − 1.5) −1.5 (V + 0.1) +1.5 (V − 1.5) V S S S S Impedance3 Differential 30 30 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 450 450 kHz Slew Rate 1.3 1.3 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 2 V step on output, C = 100 pF, V = 2.7 V 9 9 μs L S GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift T = −40°C to +85°C 1 5 ppm/°C A OUTPUT CHARACTERISTICS Output Swing4 R = 10 kΩ, L T = −40°C to +85°C −V + 0.1 +V − 0.15 −V + 0.1 +V − 0.15 V A S S S S Short-Circuit Current Limit ±10 ±10 mA Capacitive Load Drive 200 200 pF NOISE5 Output Voltage Noise f = 0.1 Hz to 10 Hz 2.8 2.8 μV p-p f = 1 kHz 94 100 94 100 nV/√Hz POWER SUPPLY6 AD8278 Supply Current T = −40°C to +85°C 200 200 μA A AD8279 Supply Current T = −40°C to +85°C 375 375 μA A Operating Voltage Range 2.0 36 2.0 36 V TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 27 and Figure 28 for details. Rev. C | Page 6 of 24

AD8278/AD8279 ABSOLUTE MAXIMUM RATINGS 2.0 Table 6. TJ MAX = 150°C Parameter Rating W) Supply Voltage ±18 V ON ( 1.6 TI Maximum Voltage at Any Input Pin −VS + 40 V PA SOIC Minimum Voltage at Any Input Pin +VS − 40 V SSI 1.2 θJA = 121°C/W DI Storage Temperature Range −65°C to +150°C R MSOP Specified Temperature Range −40°C to +85°C OWE 0.8 θJA = 135°C/W P Package Glass Transition Temperature (TG) 150°C M U M Stresses above those listed under Absolute Maximum Ratings AXI 0.4 may cause permanent damage to the device. This is a stress M rating only; functional operation of the device at these or any 0 osetchteiro nco onfd tihtiios nsps eacbiofivcea ttihoons ies innodti ciamtepdli eind .t Ehex poopseurraeti toon aabl solute –50 –25 0AMBIEN2T5 TEME5R0ATURE7 (5°C) 100 125 08308-002 Figure 3. Maximum Power Dissipation vs. Ambient Temperature maximum rating conditions for extended periods may affect device reliability. SHORT-CIRCUIT CURRENT THERMAL RESISTANCE The AD8278 and AD8279 have built-in, short-circuit protection that limits the output current (see Figure 29 for more information). The θ values in Table 7 assume a 4-layer JEDEC standard JA While the short-circuit condition itself does not damage the board with zero airflow. part, the heat generated by the condition can cause the part to Table 7. Thermal Resistance exceed its maximum junction temperature, with corresponding Package Type θ Unit negative effects on reliability. Figure 3 and Figure 29, combined JA 8-Lead MSOP 135 °C/W with knowledge of the supply voltages and ambient temperature of 8-Lead SOIC 121 °C/W the part, can be used to determine whether a short circuit will 14-Lead SOIC 105 °C/W cause the part to exceed its maximum junction temperature. MAXIMUM POWER DISSIPATION ESD CAUTION The maximum safe power dissipation for the AD8278 and AD8279 are limited by the associated rise in junction tempera- ture (T) on the die. At approximately 150°C, which is the glass J transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 150°C for an extended period may result in a loss of functionality. Rev. C | Page 7 of 24

AD8278/AD8279 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS REF 1 8 NC REF 1 8 NC –IN 2 AD8278 7 +VS –IN 2 AD8278 7 +VS +IN 3 (NToOt Pto V SIEcaWle) 6 OUT +IN 3 (NToOt Pto V SIEcaWle) 6 OUT –VS 4NC = NO CONNECT5 SENSE 08308-003 –VS N4C = NO CONNECT5 SENSE 08308-004 Figure 4. MSOP Pin Configuration Figure 5. SOIC Pin Configuration Table 8. AD8278 Pin Function Descriptions Pin No. Mnemonic Description 1 REF Reference Voltage Input. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply. 5 SENSE Sense Terminal. 6 OUT Output. 7 +VS Positive Supply. 8 NC No Connect. NC 1 14 REFA –INA 2 13 OUTA +INA 3 AD8279 12 SENSEA –VS 4 11 +VS TOPVIEW +INB 5 10 SENSEB (NottoScale) –INB 6 9 OUTB NC N7C=NOCONNECT8 REFB 08308-059 Figure 6. 14-Lead SOIC Pin Configuration Table 9. AD8279 Pin Function Descriptions Pin No. Mnemonic Description 1 NC No Connect. 2 −INA Channel A Inverting Input. 3 +INA Channel A Noninverting Input. 4 −VS Negative Supply. 5 +INB Channel B Noninverting Input. 6 −INB Channel B Inverting Input. 7 NC No Connect. 8 REFB Channel B Reference Voltage Input. 9 OUTB Channel B Output. 10 SENSEB Channel B Sense Terminal. 11 +VS Positive Supply. 12 SENSEA Channel A Sense Terminal. 13 OUTA Channel A Output. 14 REFA Channel A Reference Voltage Input. Rev. C | Page 8 of 24

AD8278/AD8279 TYPICAL PERFORMANCE CHARACTERISTICS V = ±15 V, T = 25°C, R = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted. S A L 600 80 N = 3840 MEAN = –16.8 SD = 41.7673 60 500 40 V) S 400 µ 20 HIT ET ( F S 0 O F R 300 OF BE M –20 M E NU 200 YST –40 S –60 100 –80 REPRESENTATIVE DATA 0 –100 –150 –1S0Y0STEM–5 O0FFSET0 VOLTAG50E (µV)100 150 08308-005 –50 –35 –20 –5TEMP1E0RATU2R5E (°C4)0 55 70 85 08308-008 Figure 7. Distribution of Typical System Offset Voltage, G = 2 Figure 10. System Offset vs. Temperature, Normalized at 25°, G = ½ 800 20 N = 3837 MEAN = 7.78 700 SD = 13.569 15 10 600 S V) 5 HIT 500 µV/ 0 F R ( R O 400 RO –5 E R B E NUM 300 GAIN ––1150 200 –20 100 –25 REPRESENTATIVE DATA 0 –30 –60 –40 –20 CM0RR (µV/V2)0 40 60 08308-006 –50 –35 –20 –5TEMP1E0RATU2R5E (°C4)0 55 70 85 08308-009 Figure 8. Distribution of Typical Common-Mode Rejection, G = 2 Figure 11. Gain Error vs. Temperature, Normalized at 25°C, G = ½ 10 30 5 20 VS = ±15V V) E ( G 0 A 10 T V/V) VOL R (µ –5 DE 0 MR MO VS = ±5V C N- –10 O –10 M M O C –15 –20 REPRESENTATIVE DATA –20 –30 –50 –35 –20 –5TEMP1E0RATU2R5E (°C4)0 55 70 85 08308-007 –20 –15 –10 OU–T5PUT VO0LTAGE5 (V) 10 15 20 08308-010 Figure 9. CMRR vs. Temperature, Normalized at 25°C, G = ½ Figure 12. Input Common-Mode Voltage vs. Output Voltage, ±15 V and ±5 V Supplies, G = ½ Rev. C | Page 9 of 24

AD8278/AD8279 10 5 VREF = MIDSUPPLY VS = 5V VREF = MIDSUPPLY 8 4 VS = 5V V) 6 V) E ( E ( 3 G 4 G A A OLT 2 OLT 2 V V DE 0 DE 1 O VS = 2.7V O N-M –2 N-M 0 VS = 2.7V O O M –4 M OM OM –1 C –6 C –2 –8 –10 –3 –0.5 0.5 1O.5UTPUT V2O.5LTAGE (3V.5) 4.5 5.5 08308-011 –0.5 0.5 1O.5UTPUT V2O.5LTAGE (3V.5) 4.5 5.5 08308-014 Figure 13. Input Common-Mode Voltage vs. Output Voltage, Figure 16. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = Midsupply, G = ½ 5 V and 2.7 V Supplies, VREF = Midsupply, G = 2 12 6 VREF = 0V VREF = 0V 10 VS = 5V 5 VS = 5V V) 8 V) E ( E ( 4 G G A 6 A LT LT 3 O O V 4 V DE DE 2 O 2 O M M MON- 0 VS = 2.7V MON- 1 VS = 2.7V COM –2 COM 0 –4 –1 –6 –2 –0.5 0.5 1O.5UTPUT V2O.5LTAGE (3V.5) 4.5 5.5 08308-012 –0.5 0.5 1O.5UTPUT V2O.5LTAGE (3V.5) 4.5 5.5 08308-015 Figure 14. Input Common-Mode Voltage vs. Output Voltage, Figure 17. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = 0 V, G = ½ 5 V and 2.7 V Supplies, VREF = 0 V, G = 2 30 18 VS = ±15V 12 20 GAIN = 2 V) 6 E ( G A 10 0 T ODE VOL 0 VS = ±5V AIN (dB) –1–26 GAIN = ½ M G N- O –10 –18 M M CO –24 –20 –30 –30 –36 –20 –15 –10 OU–T5PUT VO0LTAGE5 (V) 10 15 20 08308-013 100 1k F1R0EkQUENCY1 (0H0zk) 1M 10M 08308-016 Figure 15. Input Common-Mode Voltage vs. Output Voltage, Figure 18. Gain vs. Frequency, ±15 V Supplies ±15 V and ±5 V Supplies, G = 2 Rev. C | Page 10 of 24

AD8278/AD8279 18 +VS –0.1 12 GAIN = 2 ES–0.2 6 G (V)TAG–0.3 0 WINVOL–0.4 GAIN (dB) –1–26 GAIN = ½ OLTAGE SO SUPPLY TTTAAA === –++428055°°°CCC –18 UT VED T+0.4 TA = +125°C TPRR+0.3 –24 OUFE E+0.2 R –30 +0.1 –36100 1k F1R0EkQUENCY1 (0H0zk) 1M 10M 08308-017 –VS2 4 6 SUP8PLY VO1L0TAGE1 (2±VS) 14 16 18 08308-020 Figure 19. Gain vs. Frequency, +2.7 V Single Supply Figure 22. Output Voltage Swing vs. Supply Voltage and Temperature, RL = 10 kΩ 120 +VS GAIN = 2 –0.2 100 S–0.4 GAIN = ½ G (V)TAGE––00..68 80 WINVOL–1.0 CMRR (dB) 60 VOLTAGE STO SUPPLY +–11..22 TTTTAAAA ==== –+++42810552°°°5CCC°C 40 UT ED +1.0 PR TR+0.8 UE 20 OREF+0.6 +0.4 +0.2 01 10 100FREQUE1NkCY (Hz)10k 100k 1M 08308-018 –VS2 4 6 SUP8PLY VO1L0TAGE1 (2±VS) 14 16 18 08308-021 Figure 20. CMRR vs. Frequency Figure 23. Output Voltage Swing vs. Supply Voltage and Temperature, RL = 2 kΩ 120 +VS 100 ES –4 –PSRR G (V)TAG 80 WINVOL –8 PSRR (dB) 60 +PSRR VOLTAGE STO SUPPLY TTTTAAAA ==== –+++42810552°°°5CCC°C 40 UT ED +8 PR TR UE OF 20 RE +4 01 10 100FREQUE1NkCY (Hz)10k 100k 1M 08308-019 –VS1k LOAD RES1I0SkTANCE (Ω) 100k 08308-022 Figure 21. PSRR vs. Frequency Figure 24. Output Voltage Swing vs. RL and Temperature, VS = ±15 V Rev. C | Page 11 of 24

AD8278/AD8279 +VS 250 VREF = MIDSUPPLY –0.5 S PUT VOLTAGE SWING (V)RED TO SUPPLY VOLTAGE++–––11212.....05050 TTTTAAAA ==== –+++42810552°°°5CCC°C UPPLY CURRENT (µA) 121500000 VS = ±15VVS = +2.7V TR S UE OEF+1.0 50 R +0.5 –VS0 1 2 3OUTP4UT CU5RRENT6 (mA)7 8 9 10 08308-023 0–50 –30 –10 10TEMP3E0RATU5R0E (°C7)0 90 110 130 08308-026 Figure 25. Output Voltage Swing vs. IOUT and Temperature, VS = ±15 V Figure 28. Supply Current per Channel vs. Temperature 180 30 25 170 A) 20 m A) T ( 15 URRENT (µ 116500 T CURREN 105 ISHORT+ C UI LY RC 0 UPP 140 T-CI –5 S R O 130 SH –10 ISHORT– –15 120 –20 0 2 4 S6UPPLY8 VOLT1A0GE (±1V2) 14 16 18 08308-024 –50 –30 –10 10TEMP3E0RATU5R0E (°C7)0 90 110 130 08308-027 Figure 26. Supply Current per Channel vs. Dual-Supply Voltage, VIN = 0 V Figure 29. Short-Circuit Current per Channel vs. Temperature 180 2.0 1.8 –SLEW RATE 170 1.6 A) 1.4 NT (µ 160 V/µs) 1.2 +SLEW RATE RE E ( UR 150 AT 1.0 C R LY EW 0.8 PP 140 SL U 0.6 S 0.4 130 0.2 120 0 0 5 10 SU1P5PLY V2O0LTAGE25 (V) 30 35 40 08308-025 –50 –30 –10 10TEMP3E0RATU5R0E (°C7)0 90 110 130 08308-028 Figure 27. Supply Current per Channel vs. Single-Supply Voltage, VIN = 0 V, Figure 30. Slew Rate vs. Temperature, VIN = 20 V p-p, 1 kHz VREF = 0 V Rev. C | Page 12 of 24

AD8278/AD8279 10 8 6 V) DI 4 1V/DIV m/ pp 2 2 TY ( 0 43..1624µµss TTOO 00..00011%% RI A E –2 N LI 0.002%/DIV N –4 O N –6 –8 4µs/DIV –10–5 –4 –3 –2OUT–P1UT V0OLTAG1E (V)2 3 4 5 08308-029 TIME (µs) 08308-032 Figure 31. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = ½ Figure 34. Large Signal Pulse Response and Settling Time, 2 V Step, VS = 2.7 V, G = ½ 20 16 12 V) DI 8 5V/DIV m/ pp 4 2 TY ( 0 9.76.86µµss TTOO 00..00011%% RI A E –4 N LI 0.002%/DIV N –8 O N –12 –16 40µs/DIV –20–5 –4 –3 –2OUT–P1UT V0OLTAG1E (V)2 3 4 5 08308-030 TIME (µs) 08308-033 Figure 32. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = 2 Figure 35. Large Signal Pulse Response and Settling Time, 10 V Step, VS = ±15 V, G = 2 5V/DIV 1V/DIV 6.24µs TO 0.01% 4.34µs TO 0.01% 7.92µs TO 0.001% 5.12µs TO 0.001% 0.002%/DIV 0.002%/DIV 40µs/DIV 4µs/DIV TIME (µs) 08308-031 TIME (µs) 08308-034 Figure 33. Large Signal Pulse Response and Settling Time, 10 V Step, Figure 36. Large Signal Pulse Response and Settling Time, 2 V Step, VS = ±15 V, G = ½ VS = 2.7 V Rev. C | Page 13 of 24

AD8278/AD8279 5.0 VS = 5V 4.5 4.0 p) p- 3.5 V E ( 3.0 2V/DIV OLTAG 2.5 VS = 2.7V V T 2.0 U P T 1.5 U O 1.0 0.5 10µs/DIV 08308-035 0100 1k FREQU1E0NkCY (Hz) 100k 1M 08308-038 Figure 37. Large Signal Step Response, G = ½ Figure 40. Maximum Output Voltage vs. Frequency, VS = 5 V, 2.7 V V V DI DI V/ V/ m 5 0 2 NO LOAD CL = 100pF CL = 147pF 10µs/DIV 08308-036 40µs/DIV CL = 247pF 08308-039 Figure 38. Large Signal Step Response, G = 2 Figure 41. Small Signal Step Response for Various Capacitive Loads, G = ½ 30 VS = ±15V 25 p) p- V 20 E ( V LTAG 15 mV/DI O 0 V 2 UT VS = ±5V P 10 UT CL = 100pF O CL = 200pF 5 CL = 247pF 0100 1k FREQU1E0NkCY (Hz) 100k 1M 08308-037 40µs/DIV CL = 347pF 08308-040 Figure 39. Maximum Output Voltage vs. Frequency, VS = ±15 V, ±5 V Figure 42. Small Signal Step Response for Various Capacitive Loads, G = 2 Rev. C | Page 14 of 24

AD8278/AD8279 50 45 GAIN = 2 40 ±2V 35 %) ±5V T ( 30 V O DI RSHO 25 ±15V 1µV/ E 20 V GAIN = ½ O ±18V 15 10 5 00 50 CAP1A0C0ITIVE LOA15D0 (pF) 200 250 08308-041 1s/DIV 08308-044 Figure 43. Small Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = ½ Figure 46. 0.1 Hz to 10 Hz Voltage Noise 35 160 30 140 2kΩ LOAD B) 120 d 25 N ( OVERSHOOT (%) 2105 ±5V ±2V ±15V NNEL SEPARATIO 1068000 10 A H 40 C ±18V 5 20 00 50 100CAPA1C5I0TIVE LO20A0D (pF)250 300 350 08308-042 010 100 FREQUE1NkCY (Hz) 10k 100k 08308-060 Figure 44. Small Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = 2 Figure 47. Channel Separation 1k Hz) E (nV/ 100 GAIN = 2 S NOI GAIN = ½ 10 0.1 1 10FREQU1E0N0CY (Hz)1k 10k 100k 08308-043 Figure 45. Voltage Noise Density vs. Frequency Rev. C | Page 15 of 24

AD8278/AD8279 THEORY OF OPERATION CIRCUIT INFORMATION AC Performance Each channel of the AD8278 and AD8279 consists of a low power, Component sizes and trace lengths are much smaller in an IC low noise op amp and four laser-trimmed on-chip resistors. than on a PCB; therefore, the corresponding parasitic elements These resistors can be externally connected to make a variety are also smaller. This results in better ac performance of the of amplifier configurations, including difference, noninverting, AD8278 and AD8279. For example, the positive and negative and inverting configurations. Taking advantage of the integrated input terminals of the AD8278 and AD8279 op amps are resistors of the AD8278 and AD8279 provides the designer with intentionally not pinned out. By not connecting these nodes several benefits over a discrete design, including smaller size, to the traces on the PCB, their capacitance remains low and lower cost, and better ac and dc performance. balanced, resulting in improved loop stability and excellent common-mode rejection over frequency. +VS 7 DRIVING THE AD8278 AND AD8279 AD8278 40kΩ 20kΩ Care should be taken to drive the AD8278 and AD8279 with a –IN 2 5 SENSE low impedance source, for example, another amplifier. Source resistance of even a few kilohms (kΩ) can unbalance the resistor 6 OUT ratios and, therefore, significantly degrade the gain accuracy and common-mode rejection of the AD8278 and AD8279. Because all 40kΩ 20kΩ +IN 3 1 REF configurations present several kilohms (kΩ) of input resistance, the AD8278 and AD8279 do not require a high current drive –V4S 08308-045 from the source and are easy to drive. Figure 48. Functional Block Diagram INPUT VOLTAGE RANGE DC Performance The AD8278 and AD8279 are able to measure input voltages Much of the dc performance of op amp circuits depends on the beyond the supply rails. The internal resistors divide down accuracy of the surrounding resistors. Using superposition to the voltage before it reaches the internal op amp and provide analyze a typical difference amplifier circuit, as is shown in protection to the op amp inputs. Figure 49 shows an example Figure 49, the output voltage is found to be of how the voltage division works in a difference amplifier configuration. For the AD8278 and AD8279 to measure correctly, V =V ⎜⎛ R2 ⎟⎞⎜⎛1+ R4⎟⎞−V ⎜⎛R4⎟⎞ the input voltages at the input nodes of the internal op amp OUT IN+⎜⎝R1+R2⎟⎠⎝ R3⎠ IN−⎝R3⎠ must stay below 1.5 V of the positive supply rail and can exceed the negative supply rail by 0.1 V. Refer to the Power Supplies This equation demonstrates that the gain accuracy and common- section for more details. mode rejection ratio of the AD8278 and AD8279 is determined primarily by the matching of resistor ratios. Even a 0.1% R1R+2R2(VIN+) mismatch in one resistor degrades the CMRR to 69 dB for a R4 G = 2 difference amplifier. R3 VIN– The difference amplifier output voltage equation can be reduced to R1 VIN+ R4( ) R2 V = V −V as longO aUsT the Rfo3llowINin+g ratIiNo− of the resistors is tightly matched: R1R+2R2(VIN+) 08308-062 Figure 49. Voltage Division in the Difference Amplifier Configuration R2 R4 = The AD8278 and AD8279 have integrated ESD diodes at the inputs R1 R3 that provide overvoltage protection. This feature simplifies The resistors on the AD8278 and AD8279 are laser trimmed to system design by eliminating the need for additional external match accurately. As a result, the AD8278 and AD8279 provide protection circuitry and enables a more robust system. superior performance over a discrete solution, enabling better The voltages at any of the inputs of the parts can safely range CMRR, gain accuracy, and gain drift, even over a wide tempera- from +V − 40 V up to −V + 40 V. For example, on ±10 V ture range. S S supplies, input voltages can go as high as ±30 V. Care should be taken to not exceed the +V − 40 V to −V + 40 V input limits S S to avoid damaging the parts. Rev. C | Page 16 of 24

AD8278/AD8279 POWER SUPPLIES The AD8278 and AD8279 are typically specified at single and dual supplies, but they can be used with unbalanced supplies as The AD8278 and AD8279 operate extremely well over a very well; for example, −V = −5 V, +V = +20 V. The difference between wide range of supply voltages. They can operate on a single S S the two supplies must be kept below 36 V. The positive supply supply as low as 2 V and as high as 36 V, under appropriate rail must be at least 2 V above the negative supply. setup conditions. For best performance, the user should ensure that the internal R1R +1 R2(VREF) op amp is biased correctly. The internal input terminals of the R4 op amp must have sufficient voltage headroom to operate R3 properly. Proper operation of the part requires at least 1.5 V R1 between the positive supply rail and the op amp input terminals. R2 This relationship is expressed in the following equation: R1 V <+V −1.5V VREFR1R +1 R2(VREF) 08308-046 R1+R2 REF S Figure 50. Ensure Sufficient Voltage Headroom on the Internal Op Amp Inputs For example, when operating on a +V= 2 V single supply and S Use a stable dc voltage to power the AD8278 and AD8279. Noise V = 0 V, it can be seen from Figure 50 that the op amp input REF on the supply pins can adversely affect performance. Place a terminals are biased at 0 V, allowing more than the required 1.5 V bypass capacitor of 0.1 μF between each supply pin and ground, headroom. However, if V = 1 V under the same conditions, the REF as close as possible to each supply pin. Use a tantalum capacitor input terminals of the op amp are biased at 0.66 V (G = ½). Now of 10 μF between each supply and ground. It can be farther the op amp does not have the required 1.5 V headroom and away from the supply pins and, typically, it can be shared by cannot function. Therefore, the user must increase the supply other precision integrated circuits. voltage or decrease V to restore proper operation. REF Rev. C | Page 17 of 24

AD8278/AD8279 APPLICATIONS INFORMATION CONFIGURATIONS 5 20kΩ 40kΩ 2 –IN The AD8278 and AD8279 can be configured in several ways OUT (see Figure 51 to Figure 57). These configurations have excellent 6 gain accuracy and gain drift because they rely on the internal 1 20kΩ 40kΩ 3 matched resistors. Note that Figure 53 shows the AD8278 and +IN AvoDlt8a2g7e9 a at st hdeif nfeornenincvee armtinpgli finieprus tw. Tithhi as amlliodwsus ptphley A reDfe8r2e7n8c aen d VOUT = 2 (VIN+A −D V8IN2−7) +8 VREF VREF = MIDSUPPLY 08308-050 AD8279 to be used as a level shifter, which is appropriate in Figure 54. Difference Amplifier, Gain = 2, Referenced to Midsupply single-supply applications that are referenced to midsupply. 2 40kΩ 20kΩ 5 Table 10 lists several single-ended amplifier configurations IN that are not illustrated. OUT 6 1 20kΩ 2 40kΩ 20kΩ 5 –IN 3 40kΩ 6 OUT VOUT = –½VIN AD8278 08308-051 Figure 55. Inverting Amplifier, Gain = −½ 3 40kΩ 20kΩ 1 +IN VOUT = ½ (VINA+ −D V8IN2−7)8 08308-047 2 40kΩ 20kΩ 5 OUT Figure 51. Difference Amplifier, Gain = ½ 6 1 20kΩ 5 20kΩ 40kΩ 2 IN 3 40kΩ –IN 6 OUT VOUT = 1.5VIN AD8278 08308-052 Figure 56. Noninverting Amplifier, Gain = 1.5 1 20kΩ 40kΩ 3 +IN 5 20kΩ 40kΩ 2 VOUT = 2(VIN+A − DVI8N−2)78 08308-048 6 OUT Figure 52. Difference Amplifier, Gain = 2 1 20kΩ 40kΩ 3 2 40kΩ 20kΩ 5 IN –IN AD8278 6 OUT VOUT = 2VIN 08308-053 Figure 57. Noninverting Amplifier, Gain = 2 3 40kΩ 20kΩ 1 +IN VOUT = ½ (VINA+ −D V8IN2−7) 8+ VREFVREF = MIDSUPPLY 08308-049 Figure 53. Difference Amplifier, Gain = ½, Referenced to Midsupply Table 10. AD8278 Difference and Single-Ended Amplifier Configurations Amplifier Configuration Signal Gain Pin 1 (REF) Pin 2 (VIN−) Pin 3 (VIN+) Pin 5 (SENSE) Difference Amplifier +½ GND IN− IN+ OUT Difference Amplifier +2 IN+ OUT GND IN− Single-Ended Inverting Amplifier −½ GND IN GND OUT Single-Ended Inverting Amplifier −2 GND OUT GND IN Single-Ended Noninverting Amplifier +3⁄2 IN GND IN OUT Single-Ended Noninverting Amplifier +3 IN OUT IN GND Single-Ended Noninverting Amplifier +½ GND GND IN OUT Single-Ended Noninverting Amplifier +1 IN GND GND OUT Single-Ended Noninverting Amplifier +1 GND OUT IN GND Single-Ended Noninverting Amplifier +2 IN OUT GND GND Rev. C | Page 18 of 24

AD8278/AD8279 INSTRUMENTATION AMPLIFIER The reference must be driven with a low impedance source to maintain the internal resistor ratio. An example using the low The AD8278 and AD8279 can be used as building blocks for a power, low noise OP1177 as a reference is shown in Figure 58. low power, low cost instrumentation amplifier. An instrumentation INCORRECT CORRECT amplifier provides high impedance inputs and delivers high common-mode rejection. Combining the AD8278 with an Analog Devices, Inc., low power amplifier (see Table 11) creates a precise, power efficient voltage measurement solution suitable for power AD8278 AD8278 REF REF critical systems. V V –IN A1 + 40kΩ OP1177 RF 20kΩ – 08308-054 RG 20kΩ VOUT Figure 58. Driving the Reference Pin RF 40kΩ AD8278/ DThIFe FtwEoR dEiNffeTreIAncLe OamUpTliPfiUerTs o f the AD8279 can be configured +IN A2 VOUT = R(1E +F 2RAFD/R8G)2 (7V9IN+ – VIN–) × 2 08308-056 to provide a differential output, as shown in Figure 59. This Figure 60. Low Power Precision Instrumentation Amplifier differential output configuration is suitable for various applications, Table 11. Low Power Op Amps such as strain gage excitation and single-ended-to-differential Op Amp (A1, A2) Features conversion. The differential output voltage has a gain twice that AD8506 Dual micropower op amp of a single AD8279 channel, as shown in the following equation: AD8607 Precision dual micropower op amp V = V − V = 2 × G × (V – V ) DIFF_OUT +OUT −OUT AD8279 IN+ IN− AD8617 Low cost CMOS micropower op amp If the AD8279 amplifiers are each configured for G = ½, the AD8667 Dual precision CMOS micropower op amp differential gain is 1×; if the AD8279 amplifiers are each It is preferable to use dual op amps for the high impedance inputs configured for G = 2, the differential gain is 4×. because they have better matched performance and track each +VS other over temperature. The AD8278 and AD8279 difference 11 amplifiers cancel out common-mode errors from the input op AD8279 amps, if they track each other. The differential gain accuracy of 20kΩ 40kΩ the in-amp is proportional to how well the input feedback –IN 12 2 resistors (R) match each other. The CMRR of the in-amp F increases as the differential gain is increased (1 + 2R/R ), but a F G 13 +OUT higher gain also reduces the common-mode voltage range. Refer to A Designer’s Guide to Instrumentation Amplifiers for 20kΩ 40kΩ +IN 14 3 more design ideas and considerations at www.analog.com, under Technical Documentation. 20kΩ 40kΩ 10 6 9 –OUT 20kΩ 40kΩ 8 5 –V4S 08308-061 Figure 59. AD8279 Differential Output G = 4 Configuration Rev. C | Page 19 of 24

AD8278/AD8279 OUTLINE DIMENSIONS 5.00(0.1968) 4.80(0.1890) 8 5 4.00(0.1574) 6.20(0.2441) 3.80(0.1497) 1 4 5.80(0.2284) 1.27(0.0500) 0.50(0.0196) BSC 1.75(0.0688) 0.25(0.0099) 45° 0.25(0.0098) 1.35(0.0532) 8° 0.10(0.0040) 0° COPLANARITY 0.51(0.0201) 0.10 SEATING 0.31(0.0122) 0.25(0.0098) 10..2470((00..00510507)) PLANE 0.17(0.0067) COMPLIANTTOJEDECSTANDARDSMS-012-AA C(RINOEFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIOARRNOESUNANORDETEDAIN-POMPFRIFLOLMPIMIRLELIATIMTEEERTFSEO;RIRNECUQHSUEDIVIINMAELDENENSSTIIOGSNNFS.OR 012407-A Figure 61. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 2.80 1 4 PIN1 IDENTIFIER 0.65BSC 0.95 15°MAX 0.85 1.10MAX 0.75 0.80 0.15 0.40 6° 0.23 0.55 CO0P.0L50A.1N0ARICTOYMPLIANT0.T25OJEDECSTA0°NDARDS0M.0O9-187-AA 0.40 10-07-2009-B Figure 62. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. C | Page 20 of 24

AD8278/AD8279 8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 14 8 6.20 (0.2441) 3.80 (0.1496) 1 7 5.80 (0.2283) 1.27 (0.0500) 0.50 (0.0197) BSC 45° 1.75 (0.0689) 0.25 (0.0098) 0.25 (0.0098) 1.35 (0.0531) 8° 0.10 (0.0039) 0° COPLANARITY SEATING 0.10 0.51 (0.0201) PLANE 0.25 (0.0098) 1.27 (0.0500) 0.31 (0.0122) 0.17 (0.0067) 0.40 (0.0157) COMPLIANTTO JEDEC STANDARDS MS-012-AB C(RINOEFNPETARRREOENNLCLTEIHN EOGSN EDLSIYM)AEANNRDSEI AORRNOESU NANORDEET DAIN-PO MPFRIFLO LMPIIMRLELIATIMTEEER TFSEO; RIRN ECUQHSU EDI VIINMA LEDENENSSTIIOGSN NFS.OR 060606-A Figure 63. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding AD8278ARZ −40°C to +85°C 8-Lead SOIC_N R-8 AD8278ARZ-R7 −40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8 AD8278ARZ-RL −40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8 AD8278BRZ −40°C to +85°C 8-Lead SOIC_N R-8 AD8278BRZ-R7 −40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8 AD8278BRZ-RL −40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8 AD8278ARMZ −40°C to +85°C 8-Lead MSOP RM-8 Y21 AD8278ARMZ-R7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 Y21 AD8278ARMZ-RL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 Y21 AD8278BRMZ −40°C to +85°C 8-Lead MSOP RM-8 Y22 AD8278BRMZ-R7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 Y22 AD8278BRMZ-RL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 Y22 AD8279ARZ −40°C to +85°C 14-Lead SOIC_N R-14 AD8279ARZ-R7 −40°C to +85°C 14-Lead SOIC_N, 7" Tape and Reel R-14 AD8279ARZ-RL −40°C to +85°C 14-Lead SOIC_N, 13" Tape and Reel R-14 AD8279BRZ −40°C to +85°C 14-Lead SOIC_N R-14 AD8279BRZ-R7 −40°C to +85°C 14-Lead SOIC_N, 7" Tape and Reel R-14 AD8279BRZ-RL −40°C to +85°C 14-Lead SOIC_N, 13" Tape and Reel R-14 1 Z = RoHS Compliant Part. Rev. C | Page 21 of 24

AD8278/AD8279 NOTES Rev. C | Page 22 of 24

AD8278/AD8279 NOTES Rev. C | Page 23 of 24

AD8278/AD8279 NOTES ©2009–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08308-0-1/11(C) Rev. C | Page 24 of 24

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: AD8278ARMZ AD8278ARMZ-R7 AD8278ARMZ-RL AD8278ARZ AD8278ARZ-R7 AD8278ARZ-RL AD8278BRMZ AD8278BRMZ-R7 AD8278BRMZ-RL AD8278BRZ AD8278BRZ-R7 AD8278BRZ-RL AD8279ARZ AD8279ARZ-R7 AD8279ARZ-RL AD8279BRZ AD8279BRZ-R7 AD8279BRZ-RL AD8279-EVALZ