a Dual, Current Feedback Low Power Op Amp AD812 FEATURES PIN CONFIGURATION Two Video Amplifiers in One 8-Lead SOIC Package 8-Lead Plastic Optimized for Driving Cables in Video Systems Mini-DIP and SOIC Excellent Video Specifications (R = 150 V): L Gain Flatness 0.1 dB to 40 MHz 0.02% Differential Gain Error OUT1 1 8 V+ 0.028 Differential Phase Error –IN1 2 + 7 OUT2 Low Power +IN1 3 6 –IN2 Operates on Single +3 V Supply + V– 4 5 +IN2 5.5 mA/Amplifier Max Power Supply Current AD812 High Speed 145 MHz Unity Gain Bandwidth (3 dB) 1600 V/ms Slew Rate Easy to Use 50 mA Output Current Output Swing to 1 V of Rails (150 V Load) APPLICATIONS The AD812 offers low power of 4.0 mA per amplifier max (V = Video Line Driver S +5 V) and can run on a single +3 V power supply. The outputs Professional Cameras of each amplifier swing to within one volt of either supply rail to Video Switchers easily accommodate video signals of 1 V p-p. Also, at gains of Special Effects +2 the AD812 can swing 3 V p-p on a single +5 V power sup- ply. All this is offered in a small 8-lead plastic DIP or 8-lead PRODUCT DESCRIPTION SOIC package. These features make this dual amplifier ideal The AD812 is a low power, single supply, dual video amplifier. for portable and battery powered applications where size and Each of the amplifiers have 50 mA of output current and are power is critical. optimized for driving one back-terminated video load (150 W ) each. Each amplifier is a current feedback amplifier and fea- The outstanding bandwidth of 145 MHz along with 1600 V/m s of slew rate make the AD812 useful in many general purpose tures gain flatness of 0.1 dB to 40 MHz while offering differen- tial gain and phase error of 0.02% and 0.02(cid:176) . This makes the high speed applications where a single +5 V or dual power sup- AD812 ideal for professional video electronics such as cameras plies up to – 15 V are available. The AD812 is available in the and video switchers. industrial temperature range of –40(cid:176) C to +85(cid:176) C. 0.4 0.06 % 0.3 GRL = = + 1250V AIN – 0.04 G 0.2 L B 0.1 DIFFERENTIAL GAIN NTIA NORMALIZED GAIN – d––––0000....02341 VS = 66155VV NTIAL PHASE – Degrees 000...000648 DIFFERENTIAL PHASE 0.02 DIFFERE 5V RE 0.02 –0.5 E F 3V F –0.6 DI 0 100k 1M 10M 100M 5 6 7 8 9 10 11 12 13 14 15 FREQUENCY – Hz SUPPLY VOLTAGE – 6Volts Figure 1.Fine-Scale Gain Flatness vs. Frequency, Gain Figure 2.Differential Gain and Phase vs. Supply Voltage, = +2, R = 150 W Gain = +2, R = 150 W L L REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: http://www.analog.com otherwise under any patent or patent rights of Analog Devices. Fax: 781/326-8703 © Analog Devices, Inc., 1998

AD812–SPECIFICATIONS Dual Supply (@ T = +258C, R = 150 V, unless otherwise noted) A L Model AD812A Conditions V Min Typ Max Units S DYNAMIC PERFORMANCE –3dB Bandwidth G = +2, No Peaking – 5 V 50 65 MHz – 15 V 75 100 MHz Gain = +1 – 15 V 100 145 MHz Bandwidth for 0.1dB Flatness G = +2 – 5 V 20 30 MHz – 15 V 25 40 MHz Slew Rate1 G = +2, R = 1 kW – 5 V 275 425 V/m s L 20 V Step – 15 V 1400 1600 V/m s G = –1, R = 1 kW – 5 V 250 V/m s L – 15 V 600 V/m s Settling Time to 0.1% G = –1, R = 1 kW L V = 3 V Step – 5 V 50 ns O V = 10 V Step – 15 V 40 ns O NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion f = 1 MHz, R = 1 kW – 15 V –90 dBc C L Input Voltage Noise f = 10kHz – 5 V, – 15 V 3.5 nV/(cid:214) Hz Input Current Noise f = 10 kHz, +In – 5 V, – 15 V 1.5 pA/(cid:214) Hz f =10 kHz, –In – 5 V, – 15 V 18 pA/(cid:214) Hz Differential Gain Error NTSC, G = +2, R = 150 W – 5 V 0.05 0.1 % L – 15 V 0.02 0.06 % Differential Phase Error – 5 V 0.07 0.15 Degrees – 15 V 0.02 0.06 Degrees DC PERFORMANCE Input Offset Voltage – 5 V, – 15 V 2 5 mV T –T 12 mV MIN MAX Offset Drift – 5 V, – 15 V 15 m V/(cid:176) C –Input Bias Current – 5 V, – 15 V 7 25 m A T –T 38 m A MIN MAX +Input Bias Current – 5 V, – 15 V 0.3 1.5 m A T –T 2.0 m A MIN MAX Open-Loop Voltage Gain V = – 2.5 V, R = 150 W – 5 V 68 76 dB O L T –T 69 dB MIN MAX V = – 10 V, R = 1 kW – 15 V 76 82 dB O L T –T 75 dB MIN MAX Open-Loop Transresistance V = – 2.5 V, R = 150 W – 5 V 350 550 kW O L T –T 270 kW MIN MAX V = – 10 V, R = 1 kW – 15 V 450 800 kW O L T –T 370 kW MIN MAX INPUT CHARACTERISTICS Input Resistance +Input – 15 V 15 MW –Input 65 W Input Capacitance +Input 1.7 pF Input Common Mode – 5 V 4.0 – V Voltage Range – 15 V 13.5 – V Common-Mode Rejection Ratio Input Offset Voltage V = – 2.5 V – 5 V 51 58 dB CM –Input Current 2 3.0 m A/V +Input Current 0.07 0.15 m A/V Input Offset Voltage V = – 12 V – 15 V 55 60 dB CM –Input Current 1.5 3.3 m A/V +Input Current 0.05 0.15 m A/V –2– REV. B

AD812 Model AD812A Conditions V Min Typ Max Units S OUTPUT CHARACTERISTICS Output Voltage Swing R = 150 W , T –T – 5 V 3.5 3.8 – V L MIN MAX R = 1 kW , T –T – 15 V 13.6 14.0 – V L MIN MAX Output Current – 5 V 30 40 mA – 15 V 40 50 mA Short Circuit Current G = +2, R = 715 W – 15 V 100 mA F V = 2 V IN Output Resistance Open-Loop – 15 V 15 W MATCHING CHARACTERISTICS Dynamic Crosstalk G = +2, f = 5 MHz – 5 V, – 15 V –75 dB Gain Flatness Match G = +2, f = 40 MHz – 15 V 0.1 dB DC Input offset Voltage T –T – 5 V, – 15 V 0.5 3.6 mV MIN MAX –Input Bias Current T –T – 5 V, – 15 V 2 25 m A MIN MAX POWER SUPPLY Operating Range – 1.2 – 18 V Quiescent Current Per Amplifier – 5 V 3.5 4.0 mA – 15 V 4.5 5.5 mA T –T – 15 V 6.0 mA MIN MAX Power Supply Rejection Ratio Input Offset Voltage V = – 1.5 V to – 15 V 70 80 dB S –Input Current 0.3 0.6 m A/V +Input Current 0.005 0.05 m A/V NOTES 1Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. Specifications subject to change without notice. Single Supply (@ T = +258C, R = 150 V, unless otherwise noted) A L Model AD812A Conditions V Min Typ Max Units S DYNAMIC PERFORMANCE –3 dB Bandwidth G = +2, No Peaking +5 V 35 50 MHz +3 V 30 40 MHz Bandwidth for 0.1 dB Flatness G = +2 +5 V 13 20 MHz +3 V 10 18 MHz Slew Rate1 G = +2, R = 1 kW +5 V 125 V/m s L +3 V 60 V/m s NOISE/HARMONIC PERFORMANCE Input Voltage Noise f = 10kHz +5 V, +3 V 3.5 nV/(cid:214) Hz Input Current Noise f = 10 kHz, +In +5 V, +3 V 1.5 pA/(cid:214) Hz f = 10 kHz, –In +5 V, +3 V 18 pA/(cid:214) Hz Differential Gain Error2 NTSC, G = +2, R = 150 W +5 V 0.07 % L G = +1 +3 V 0.15 % Differential Phase Error2 G = +2 +5 V 0.06 Degrees G = +1 +3 V 0.15 Degrees REV. B –3–

AD812–SPECIFICATIONS Single Supply (Continued) AD812A Model Conditions V Min Typ Max Units S DC PERFORMANCE Input Offset Voltage +5 V, +3 V 1.5 4.5 mV T –T 7.0 mV MIN MAX Offset Drift +5 V, +3 V 7 m V/(cid:176) C –Input Bias Current +5 V, +3 V 2 20 m A T –T 30 m A MIN MAX +Input Bias Current +5 V, +3 V 0.2 1.5 m A T –T 2.0 m A MIN MAX Open-Loop Voltage Gain V = +2.5 V p-p +5 V 67 73 dB O V = +0.7 V p-p +3 V 70 dB O Open-Loop Transresistance V = +2.5 V p-p +5 V 250 400 kW O V = +0.7 V p-p +3 V 300 kW O INPUT CHARACTERISTICS Input Resistance +Input +5 V 15 MW –Input +5 V 90 W Input Capacitance +Input 2 pF Input Common Mode +5 V 1.0 4.0 V Voltage Range +3 V 1.0 2.0 V Common-Mode Rejection Ratio Input Offset Voltage V = 1.25 V to 3.75 V +5 V 52 55 dB CM –Input Current 3 5.5 m A/V +Input Current 0.1 0.2 m A/V Input Offset Voltage V = 1 V to 2 V +3 V 52 dB CM –Input Current 3.5 m A/V +Input Current 0.1 m A/V OUTPUT CHARACTERISTICS Output Voltage Swing p-p R = 1 kW , T –T +5 V 3.0 3.2 V p-p L MIN MAX R = 150 W , T –T +5 V 2.8 3.1 V p-p L MIN MAX +3 V 1.0 1.3 V p-p Output Current +5 V 20 30 mA +3 V 15 25 mA Short Circuit Current G = +2, R = 715 W +5 V 40 mA F V = 1 V IN MATCHING CHARACTERISTICS Dynamic Crosstalk G = +2, f = 5 MHz +5 V, +3 V –72 dB Gain Flatness Match G = +2, f = 20 MHz +5 V, +3 V 0.1 dB DC Input offset Voltage T –T +5 V, +3 V 0.5 3.5 mV MIN MAX –Input Bias Current T –T +5 V, +3 V 2 25 m A MIN MAX POWER SUPPLY Operating Range 2.4 36 V Quiescent Current Per Amplifier +5 V 3.2 4.0 mA +3 V 3.0 3.5 mA T –T +5 V 4.5 mA MIN MAX Power Supply Rejection Ratio Input Offset Voltage V = +3 V to +30 V 70 80 dB S –Input Current 0.3 0.6 m A/V +Input Current 0.005 0.05 m A/V TRANSISTOR COUNT 56 NOTES 1Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. 2Single supply differential gain and phase are measured with the ac coupled circuit of Figure 53. Specifications subject to change without notice. –4– REV. B

AD812 ABSOLUTE MAXIMUM RATINGS1 MAXIMUM POWER DISSIPATION Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .– 18 V The maximum power that can be safely dissipated by the Internal Power Dissipation2 AD812 is limited by the associated rise in junction temperature. Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3 Watts The maximum safe junction temperature for the plastic encap- Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts sulated parts is determined by the glass transition temperature Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . – V of the plastic, about 150(cid:176) C. Exceeding this limit temporarily S Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V may cause a shift in parametric performance due to a change in Output Short Circuit Duration the stresses exerted on the die by the package. Exceeding a . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves junction temperature of 175(cid:176) C for an extended period can result Storage Temperature Range N, R . . . . . . . . .–65(cid:176) C to +125(cid:176) C in device failure. Operating Temperature Range . . . . . . . . . . . .–40(cid:176) C to +85(cid:176) C While the AD812 is internally short circuit protected, this may Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300(cid:176) C not be sufficient to guarantee that the maximum junction tem- NOTES perature (150 degrees) is not exceeded under all conditions. To 1Stresses above those listed under Absolute Maximum Ratings may cause perma- ensure proper operation, it is important to observe the derating nent damage to the device. This is a stress rating only; functional operation of the curves. device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating It must also be noted that in high (noninverting) gain configura- conditions for extended periods may affect device reliability. tions (with low values of gain resistor), a high level of input 2Specification is for device in free air: 8-lead plastic package: q = 90(cid:176)C/Watt; 8-lead SOIC package: q = 150(cid:176)C/Watt. JA overdrive can result in a large input error current, which may JA result in a significant power dissipation in the input stage. This ORDERING GUIDE power must be included when computing the junction tempera- ture rise due to total internal power. Temperature Package Package Model Range Description Option 2.0 AD812AN –40(cid:176) C to +85(cid:176) C 8-Lead Plastic DIP N-8 s TJ = +1508C AD812AR –40(cid:176) C to +85(cid:176) C 8-Lead Plastic SOIC SO-8 Watt 8-LEAD MINI-DIP PACKAGE AD812AR-REEL 13" Reel N – 1.5 O AD812AR-REEL7 7" Reel TI A P SI S METALIZATION PHOTO DI1.0 R Dimensions shown in inches and (mm). E W O 8-LEAD SOIC PACKAGE P 0.0783 M (1.99) MU0.5 V+ OUT2 –IN2 AXI 8 7 6 M 0 5 +IN2 –50–40–30–20–10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE – 8C Figure 3.Plot of Maximum Power Dissipation vs. Temperature 0.0539 (1.37) 4 V– 1 2 3 4 OUT1 –IN1 +IN1 V– CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily WARNING! accumulate on the human body and test equipment and can discharge without detection. Although the AD812 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD ESD SENSITIVE DEVICE precautions are recommended to avoid performance degradation or loss of functionality. REV. B –5–

AD812–Typical Performance Characteristics 20 16 s olt 6V 14 ANGE – 15 NT – mA12 VS = 615V GE R URRE DE VOLTA10 SUPPLY C180 VS = 65V MON-MO 5 TOTAL 6 M O C 0 4 0 5 10 15 20 –60 –40 –20 0 20 40 60 80 100 120 140 SUPPLY VOLTAGE – 6Volts JUNCTION TEMPERATURE – 8C Figure 4.Input Common-Mode Voltage Range vs. Supply Figure 7.Total Supply Current vs. Junction Temperature Voltage 10 20 TA = +25C NO LOAD A9 m – – V p-p15 RRENT 8 E U G C A Y OLT10 PPL7 UT V RL = 150V L SU P A T T OU 5 TO6 5 0 2 4 6 8 10 12 14 16 00 5 10 15 20 SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – 6Volts Figure 5.Output Voltage Swing vs. Supply Voltage Figure 8.Total Supply Current vs. Supply Voltage 30 25 615V SUPPLY 20 25 p 15 p- A E – Volts 20 mRENT – 105 –IB, VS = 65V G R A15 U 0 T C UT VOL10 T BIAS –5 +IB, VS = 65V, 615V P U–10 OUT 65V SUPPLY INP–15 –IB, VS = 615V 5 –20 0 –25 10 100 1k 10k –60 –40 –20 0 20 40 60 80 100 120 140 LOAD RESISTANCE – V JUNCTION TEMPERATURE – 8C Figure 6.Output Voltage Swing vs. Load Resistance Figure 9.Input Bias Current vs. Junction Temperature –6– REV. B

AD812 4 70 2 VS = 65V V 0 60 m TAGE – ––42 NT – mA 50 VOL –6 VS = 615V RRE ET CU FS –8 UT 40 T OF–10 UTP U O P N–12 30 I –14 –16 20 –60 –40 –20 0 20 40 60 80 100 120 140 0 5 10 15 20 JUNCTION TEMPERATURE – 8C SUPPLY VOLTAGE – 6Volts Figure 10.Input Offset Voltage vs. Junction Temperature Figure 13.Linear Output Current vs. Supply Voltage 160 1k V – G = +2 mA140 SINK VS = 615V NCE 100 URRENT – 120 T RESISTA 10 UIT C100 SOURCE UTPU C O 1 T CIR 80 OOP 65VS R L HO ED-0.1 S 60 S CLO 615VS 40 0.01 –60 –40 –20 0 20 40 60 80 100 120 140 10k 100k 1M 10M 100M JUNCTION TEMPERATURE – 8C FREQUENCY – Hz Figure 11.Short Circuit Current vs. Junction Temperature Figure 14.Closed-Loop Output Resistance vs. Frequency 80 30 VS = 615V 70 25 mA p-p ENT – 60 GE – V 20 RL = 1kV R A R50 T15 U L C O UT VS = 65V T V UTP40 TPU10 VS = 65V O VS = 615V OU 30 5 20 0 –60 –40 –20 0 20 40 60 80 100 120 140 100k 1M 10M 100M JUNCTION TEMPERATURE – 8C FREQUENCY – Hz Figure 12.Linear Output Current vs. Junction Temperature Figure 15.Large Signal Frequency Response REV. B –7–

AD812 100 100 0 s 120 –45 ee PHASE VS = 615V egr INVERTING INPUT –90 – D VOLTAGE NOISE – nV/ Hz10 CUVRORLETNATG NEO NISONEISOENINVERTING INPUT 10CURRENT NOISE – pA/ Hz TRANSIMPEDANCE – dB1680000 GAIN VS = 3V VVSS == 63V15V ––113850 PHASE CURRENT NOISE 1 1 40 10 100 1k 10k 100k 10k 100k 1M 10M 100M FREQUENCY – Hz FREQUENCY – Hz Figure 16.Input Current and Voltage Noise vs. Frequency Figure 19.Open-Loop Transimpedance vs. Frequency (Relative to 1 W ) 90 –30 681V G = +2 80 681V VS = 2V p-p EJECTION – dB 6700 VIN 681V681V VOUT ORTION – dBc ––7500 VVSS == 66155VV ; ;R RL L= = 1 15k0VV ON-MODE R 5400 VS = 3V VS = 615V MONIC DIST –90 32RNDD HHAARRMMOONNIICCVS = 65V VS = 615V M 30 R M A O H–110 C 20 2ND 3RD 10 –130 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY – Hz FREQUENCY – Hz Figure 17.Common-Mode Rejection vs. Frequency Figure 20.Harmonic Distortion vs. Frequency 80 10 GAIN = –1 70 8 VS = 615V N – dB 60 615V TO 0 6 TIO 6V 4 EC 50 M 2 EJ 61.5V RO Y R 40 G F 0 1% 0.1% 0.025% UPPL 30 SWIN –2 R S UT –4 WE 20 TP PO OU –6 10 –8 0 –10 10k 100k 1M 10M 100M 20 30 40 50 60 FREQUENCY – Hz SETTLING TIME – ns Figure 18.Power Supply Rejection vs. Frequency Figure 21.Output Swing and Error vs. Settling Time –8– REV. B

AD812 1400 1400 G = +1 1200 VS = 615V G = +1 1200 RL = 500V 1000 1000 ms G = +2 ms E – V/ 800 E – V/ 800 G = +2 W RAT 600 G = +10 W RAT 600 G = +10 E E SL SL 400 G = –1 400 G = –1 200 200 0 0 0 1 2 3 4 5 6 7 8 9 10 0 1.5 3.0 4.5 6.0 7.5 9.0 10.5 12.0 13.5 15.0 OUTPUT STEP SIZE – Vp-p SUPPLY VOLTAGE – 6Volts Figure 22.Slew Rate vs. Output Step Size Figure 25.Maximum Slew Rate vs. Supply Voltage 2V 50ns 500mV 20ns 100 100 90 VIN 90 VIN 10 VOUT 10 VOUT 0% 0% 2V 500mV Figure 23.Large Signal Pulse Response, Gain = +1, Figure 26.Small Signal Pulse Response, Gain = +1, (RF = 750 W , RL = 150 W , VS = – 5 V) (RF = 750 W , RL = 150 W , VS = – 5 V) 200 s PHASE G = +1 ee G = +1 RL = 150V 0 egr 180 RL = 150V VS = 615V –90 T – D 160 RF = 750V OP GAIN – dB––0211 GAIN VS = 6165V5V 655VV3V ––128700PHASE SHIF B BANDWIDTH – MHz11182040000 PEAKING 1dB PEAKING 0.2dBRF = 866V D-LO–3 5V –3d 60 OSE–4 3V 40 CL–5 20 –6 0 1 10 100 1000 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY – MHz SUPPLY VOLTAGE – 6Volts Figure 24.Closed-Loop Gain and Phase vs. Frequency, Figure 27.–3 dB Bandwidth vs. Supply Voltage, G = +1 G = +1 REV. B –9–

AD812 500mV 50ns 50mV 20ns 100 100 90 VIN 90 VIN 10 VOUT 10 VOUT 0% 0% 5V 500mV Figure 28.Large Signal Pulse Response, Gain = +10, Figure 31.Small Signal Pulse Response, Gain = +10, (R = 357 W , R = 500 W , V = – 15 V) (R = 357 W , R = 150 W , V = – 5 V) F L S F L S s CLOSED-LOOP GAIN (NORMALIZED) – dB ––––––456230111 PGHAAISNE 10535VVV 3V VS V=S 16 =010 66655V15V5VV GRL = = + 11500V10000–––12987000 PHASE SHIFT – Degree CLOSED-LOOP GAIN (NORMALIZED) – dB ––––––623451011 PGHAAISNE 31V035VV5V VS = 6151V00V6S65 =V5 V6GR15L =V = + 11k0V1000–0–––31296870000PHASE SHIFT – Degrees FREQUENCY – MHz FREQUENCY – MHz Figure 29.Closed-Loop Gain and Phase vs. Frequency, Figure 32.Closed-Loop Gain and Phase vs. Frequency, Gain = +10, RL = 150 W Gain = +10, RL = 1 kW 100 110 90 GRL == +11500V 100 GRL = = + 11k0V 80 90 NDWIDTH – MHz657000 RFP =E 1A5K4IVNG 1dB RRFF == 365479VV DWIDTH – MHz678000 RF = 154V RRFF == 365479VV A40 N B A50 3dB 30 dB B40 – 3 – 20 30 10 20 0 0 2 4 6 8 10 12 14 16 18 20 10 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – 6Volts Figure 30.–3 dB Bandwidth vs. Supply Voltage, Figure 33.–3 dB Bandwidth vs. Supply Voltage, Gain = +10, RL = 150 W Gain = +10, RL = 1 kW –10– REV. B

AD812 2V 50ns 500mV 20ns 100 100 90 VIN 90 VIN 10 VOUT 10 VOUT 0% 0% 2V 500mV Figure 34.Large Signal Pulse Response, Gain = –1, Figure 37.Small Signal Pulse Response, Gain = –1, (R = 750 W , R = 150 W , V = – 5 V) (R = 750 W , R = 150 W , V = – 5 V) F L S F L S CLOSED-LOOP GAIN (NORMALIZED) – dB––––––623450111 PGHAAISNE 10 VS 6= 561V01505VV6 53V53VVVVSGR =L = 6= – 11155V0V100–––0021978000 PHASE SHIFT – Degrees CLOSED-LOOP GAIN (NORMALIZED) – dB––––––23456011 PGHAAISNE VS = 6165V5V V5SV 35=VV 6135VV65V GRL = = – 11k0V –––021978000 PHASE SHIFT – Degrees FREQUENCY – MHz 1 10 100 1000 FREQUENCY – MHz Figure 35.Closed-Loop Gain and Phase vs. Frequency, Figure 38.Closed-Loop Gain and Phase vs. Frequency, Gain = –1, R = 150 W L Gain = –10, R = 1 kW L 130 100 G = –1 111200 RL = 150V RF = 681V 8900 GRL = = – 11k0V –3dB BANDWIDTH – MHz16978000000 PEAKING # 1P.0EdABKING # 0 R.2Fd =B 715V –3dB BANDWIDTH – MHz 3645700000 RF = 154V RRFF == 365479VV 50 20 40 10 30 0 2 4 6 8 10 12 14 16 18 20 0 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – 6Volts Figure 36.–3 dB Bandwidth vs. Supply Voltage, Figure 39.–3 dB Bandwidth vs. Supply Voltage, Gain = –1, RL = 150 W Gain = –10, R = 1 kW L REV. B –11–

AD812 General Considerations To estimate the –3 dB bandwidth for closed-loop gains or feed- The AD812 is a wide bandwidth, dual video amplifier which back resistors not listed in the above table, the following two offers a high level of performance on less than 5.5 mA per am- pole model for the AD812 many be used: plifier of quiescent supply current. It is designed to offer out- standing performance at closed-loop inverting or noninverting G gains of one or greater. A = CL ( ) Built on a low cost, complementary bipolar process, and achiev- S2ØŒ RF +GrIN CTøœ +S(R +Gr )C +1 ing bandwidth in excess of 100 MHz, differential gain and phase Œ 2p f œ F IN T º 2 ß errors of better than 0.1% and 0.1(cid:176) (into 150 W ), and output where: A = closed-loop gain current greater than 40 mA, the AD812 is an exceptionally CL G = 1 + R /R efficient video amplifier. Using a conventional current feedback F G r = input resistance of the inverting input architecture, its high performance is achieved through careful IN C = “transcapacitance,” which forms the open-loop attention to design details. T dominant pole with the tranresistance Choice of Feedback and Gain Resistors R = feedback resistor F Because it is a current feedback amplifier, the closed-loop band- R = gain resistor G width of the AD812 depends on the value of the feedback resis- f = frequency of second (nondominant) pole 2 tor. The bandwidth also depends on the supply voltage. In S = 2 p j f addition, attenuation of the open-loop response when driving Appropriate values for the model parameters at different supply load resistors less than about 250 W will affect the bandwidth. voltages are listed in Table II. Reasonable approximations for Table I contains data showing typical bandwidths at different these values at supply voltages not found in the table can be supply voltages for some useful closed-loop gains when driving a obtained by a simple linear interpolation between those tabu- load of 150 W . (Bandwidths will be about 20% greater for load lated values which “bracket” the desired condition. resistances above a few hundred ohms.) The choice of feedback resistor is not critical unless it is impor- Table II. Two-Pole Model Parameters at Various tant to maintain the widest, flattest frequency response. The Supply Voltages resistors recommended in the table are those (metal film values) V r (V) C (pF) f (MHz) that will result in the widest 0.1 dB bandwidth. In those appli- S IN T 2 cations where the best control of the bandwidth is desired, 1% – 15 85 2.5 150 metal film resistors are adequate. Wider bandwidths can be – 5 90 3.8 125 attained by reducing the magnitude of the feedback resistor (at +5 105 4.8 105 the expense of increased peaking), while peaking can be reduced +3 115 5.5 95 by increasing the magnitude of the feedback resistor. As discussed in many amplifier and electronics textbooks (such Table I. –3 dB Bandwidth vs. Closed-Loop Gain and as Roberge’s Operational Amplifiers: Theory and Practice), the Feedback Resistor (R = 150 W ) L –3 dB bandwidth for the 2-pole model can be obtained as: V (V) Gain R (V) BW (MHz) f = f [1 – 2d2 + (2 – 4d2 + 4d4)1/2]1/2 S F 3 N – 15 +1 866 145 where: +2 715 100 +10 357 65 Ø ø 1/2 f ––110 731557 16000 fN=ºŒŒ (RF +G2rIN)CT ßœœ – 5 +1 750 90 and: +2 681 65 d = (1/2) [f (R + Gr ) C ]1/2 +10 154 45 2 F IN T –1 715 70 This model will predict –3 dB bandwidth within about 10 to –10 154 45 15% of the correct value when the load is 150 W . However, it is not an accurate enough to predict either the phase behavior or +5 +1 750 60 the frequency response peaking of the AD812. +2 681 50 +10 154 35 Printed Circuit Board Layout Guidelines –1 715 50 As with all wideband amplifiers, printed circuit board parasitics –10 154 35 can affect the overall closed-loop performance. Most important for controlling the 0.1 dB bandwidth are stray capacitances at +3 +1 750 50 the output and inverting input nodes. Increasing the space between +2 681 40 signal lines and ground plane will minimize the coupling. Also, +10 154 30 signal lines connecting the feedback and gain resistors should be –1 715 40 kept short enough that their associated inductance does not –10 154 25 cause high frequency gain errors. –12– REV. B

AD812 Power Supply Bypassing The input and output signal return paths must also be kept from Adequate power supply bypassing can be very important when overlapping. Since ground connections are not of perfectly zero optimizing the performance of high speed circuits. Inductance impedance, current in one ground return path can produce a in the supply leads can (for example) contribute to resonant voltage drop in another ground return path if they are allowed circuits that produce peaking in the amplifier’s response. In to overlap. addition, if large current transients must be delivered to a load, Electric field coupling external to (and across) the package can then large (greater than 1 m F) bypass capacitors are required to be reduced by arranging for a narrow strip of ground plane to be produce the best settling time and lowest distortion. Although run between the pins (parallel to the pin rows). Doing this on 0.1 m F capacitors may be adequate in some applications, more both sides of the board can reduce the high frequency crosstalk elaborate bypassing is required in other cases. by about 5 dB or 6 dB. When multiple bypass capacitors are connected in parallel, it is Driving Capacitive Loads important to be sure that the capacitors themselves do not form When used with the appropriate output series resistor, any load resonant circuits. A small (say 5 W ) resistor may be required in capacitance can be driven without peaking or oscillation. In series with one of the capacitors to minimize this possibility. most cases, less than 50 W is all that is needed to achieve an As discussed below, power supply bypassing can have a signifi- extremely flat frequency response. As illustrated in Figure 44, cant impact on crosstalk performance. the AD812 can be very attractive for driving largely capacitive loads. In this case, the AD812’s high output short circuit Achieving Low Crosstalk current allows for a 150 V/m s slew rate when driving a 510 pF Measured crosstalk from the output of amplifier 2 to the input capacitor. of amplifier 1 of the AD812 is shown in Figure 40. The crosstalk from the output of amplifier 1 to the input of amplifier 2 is a few dB better than this due to the additional distance between criti- RF cal signal nodes. A carefully laid-out PC board should be able to achieve the level +VS 0.1mF of crosstalk shown in the figure. The most significant contribu- tors to difficulty in achieving low crosstalk are inadequate power 1.0mF supply bypassing, overlapped input and/or output signal paths, RG 8 and capacitive coupling between critical nodes. RS AD812 VO The bypass capacitors must be connected to the ground plane at VIN 4 1.0mF CL RL a point close to and between the ground reference points for the RT two loads. (The bypass of the negative power supply is particu- 0.1mF larly important in this regard.) There are two amplifiers in the package, and low impedance signal return paths must be pro- –VS vided for each load. (Using a parallel combination of 1 m F, 0.1m F, and 0.01 m F bypass capacitors will help to achieve opti- Figure 41.Circuit for Driving a Capacitive Load mal crosstalk.) –10 VS = 65V –20 G = +2 RL = 150V RF = 750V –30 RL = 1kV –40 12 CL = 10pF B B K – d –50 N – d 9 RS = 0 OSSTAL ––6700 OOP GAI 63 RS = 30V CR –80 ED-L 0 RS = 50V S O –3 –90 L C –6 –100 –110100k 1M 10M 100M 1 10 100 1000 FREQUENCY – MHz FREQUENCY – Hz Figure 42.Response to a Small Load Capacitor at – 5 V Figure 40.Crosstalk vs. Frequency REV. B –13–

AD812 VS = 615V 1V 50ns G = +2 RF = 750V RL = 1kV 100 12 90 VIN B 9 d N – 6 P GAI 3 CL = 150pF, RS = 30V O O 0 D-L 10 VOUT CLOSE ––36 CL = 510pF, RS = 15V 0% 2V –9 1 10 100 1000 Figure 45.6 dB Overload Recovery; G = 10, R = 500 W , FREQUENCY – MHz L V = – 5 V Figure 43.Response to Large Load Capacitor, V = – 15 V S S In the case of high gains with very high levels of input overdrive, 5V 100ns a longer recovery time may occur. For example, if the input common-mode voltage range is exceeded in a gain of +10, the 100 VIN recovery time will be on the order of 100 ns. This is primarily 90 due to current overloading of the input stage. As noted in the warning under “Maximum Power Dissipation,” a high level of input overdrive in a high noninverting gain circuit can result in a large current flow in the input stage. For differ- ential input voltages of less than about 1.25 V, this will be inter- 10 VOUT nally limited to less than 20 mA (decreasing with supply voltage). 0% For input overdrives which result in higher differential input voltages, power dissipation in the input stage must be consid- 5V ered. It is recommended that external diode clamps be used in cases where the differential input voltage is expected to exceed Figure 44.Pulse Response of Circuit of Figure 41 with 1.25 V. C = 510 pF, R = 1 kW , R = R = 715 W , R = 15 W L L F G S High Performance Video Line Driver At a gain of +2, the AD812 makes an excellent driver for a back- Overload Recovery terminated 75 W video line. Low differential gain and phase There are three important overload conditions to consider. errors and wide 0.1 dB bandwidth can be realized over a wide They are due to input common mode voltage overdrive, input range of power supply voltage. Outstanding gain and group current overdrive, and output voltage overdrive. When the delay matching are also attainable over the full operating supply amplifier is configured for low closed-loop gains, and its input voltage range. common-mode voltage range is exceeded, the recovery time will be very fast, typically under 10 ns. When configured for a higher RG RF gain, and overloaded at the output, the recovery time will also be short. For example, in a gain of +10, with 6 dB of input +VS 0.1mF overdrive, the recovery time of the AD812 is about 10 ns. 8 75V C7A5BVLE AD812 75V CABLE VOUT VIN 4 75V 75V 0.1mF –VS Figure 46.Gain of +2 Video Line Driver (R = R from F G Table I) –14– REV. B

AD812 90 es 0.4 PHASE GRL = = + 1250V 0–90 T – Degre 00..23 GRL = = + 1250V AIN – dB –011 GAIN 3 V 5 3VV 5V VS = 6651V5V ––128700PHASE SHIF ZED GAIN – dB –00..011 D-LOOP G ––23 V6S 5=V 615V NORMALI ––00..23 VS = 66155VV E –4 –0.4 S O 5V CL –5 –0.5 3V –6 –0.6 1 10 100 1000 100k 1M 10M 100M FREQUENCY –MHz FREQUENCY – Hz Figure 47.Closed-Loop Gain and Phase vs. Frequency for Figure 50.Fine-Scale Gain Flatness vs. Frequency, the Line Driver Gain = +2, R = 150 W L 120 1.0 G = +2 RF = 590V G = +2 110 RL = 150V RF = 715V 0.8 RL = 150V z100 PEAKING # 1dB RF = 750V 0.6 VRSF == 36V81V H 90 0.4 M WIDTH – 8700 NO PEAKING TCH – dB 0.02 D A dB BAN 5600 GAIN M––00..24 VRSF == 671155VV 3 – 40 –0.6 30 –0.8 20 –1.0 0 2 4 6 8 10 12 14 16 18 20 1 10 100 1000 SUPPLY VOLTAGE – 6Volts FREQUENCY – MHz Figure 48.–3 dB Bandwidth vs. Supply Voltage, Figure 51.Closed-Loop Gain Matching vs. Frequency, Gain = +2, R = 150 W Gain = +2, R = 150 W L L DELAY 0.06 % 8 N – 3V AI 6 5V 0.04 G DIFFERENTIAL GAIN AL 4 65V TI 615V grees 0.08 0.02 FFEREN AY – ns 20 – De 0.06 DI DEL DELAY MATCHING SE DIFFERENTIAL PHASE UP 0.4 A O L PH 0.04 GR 0.2 VS = 3V TO 615V TIA 0 REN 0.02 –0.2 E F F –0.4 DI 0 100k 1M 10M 100M 5 6 7 8 9 10 11 12 13 14 15 FREQUENCY – Hz SUPPLY VOLTAGE – 6Volts Figure 52.Group Delay and Group Delay Matching vs. Figure 49.Differential Gain and Phase vs. Supply Voltage, Frequency, G = +2, R = 150 W Gain = +2, R = 150 W L L REV. B –15–

AD812 Operation Using a Single Supply 90 The AD812 will operate with total supply voltages from 36 V PHASE es e down to 2.4 V. With proper biasing (see Figure 53), it can be an VS = 5V 0 Degr oouuttsptuatn vdoinltga gsein rgalne gseusp epxlyte vnidd etoo awmitphliinfi e1r .v oSlitn ocef tthhee siunpppulty a rnadils, 0.05 GAIN ––19800HIFT – i3t Vw ipll- ph asnigdnlea la o 1n. 3a Vsi npg-lpe s5ig Vn aslu opnp lay .s iTnhglee s3m.3a lVl s sigunpapll,y 0, .o1rd aB N – dB –0.5 –270HASE S 8 bandwidths will exceed 10 MHz in either case, and the large GAI –1.0 P 9/9 sTighnea cl abpaancditwiviedltyh cs owuiplll eedx cceaebdl e6 d MrivHerz .in Figure 53 will achieve D-LOOP ––12..50 59b–0– E 8 outstanding differential gain and phase errors of 0.07% and 0.06 S 1 degrees respectively on a single 5 V supply. Resistor R2, in this CLO –2.5 C circuit, is selected to optimize the differential gain and phase by –3.0 operating the amplifier in its most linear region. To optimize the –3.5 circuit for a 3 V supply, a value of 8 kW is recommended for R2. 1 10 100 1000 FREQUENCY – MHz Figure 54.Closed-Loop Gain and Phase vs. Frequency, 649V 649V Circuit of Figure 53 C3 R3 30mF 1kV +VS C2 1mF 1V 50ns R1 9kV 8 COUT 75V 100 2Cm1F AD812 47mF 75V CABLE VOUT 90 VIN VIN 4 75V R2 11.8kV Figure 53.Biasing for Single Supply Operation VOUT 10 0% 500mV Figure 55.Pulse Response of the Circuit of Figure 53 with V = 5 V S OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP 8-Lead Plastic SOIC (N-8) (SO-8) 0.39 (9.91) 0.1968 (5.00) 8 5 0.25 0.1890 (4.80) S.A. (6.35) 0.1574 (4.00) 8 5 0.2440 (6.20) U. 1 PIN 1 4 0.060 (1.52) 00..332050 ((87..2652)) 0.1497 (3.80) 1 4 0.2284 (5.80) ED IN 0.165 60.01 0.015 (0.38) 0.195 (4.95) PIN 1 0.0688 (1.75) 0.0196 (0.50) NT (4.19 60.25) 0.115 (2.93) 0.0098 (0.25) 0.0532 (1.35) 0.0099 (0.25)3 458 RI 0.125 (3.18) 0.0040 (0.10) P MIN 0(.00.1486 6+00..0080)3(B02..S15C04)0.03N3O (M0.84) SPELAANTIENG 00..001058 ((00..328014)) SEPALTAINNGE 0(B.10.S52C070) 00..00119328 ((00..4395)) 00..00009785 ((00..2159)) 8088 00..00510600 ((10..2471)) –16– REV. B

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