High Precision 5 V Reference AD586 FEATURES The AD586J, AD586K, AD586L, and AD586M are available in an 8-lead PDIP; the AD586J, AD586K, AD586L, AD586A, and Laser trimmed to high accuracy AD586B are available in an 8-lead SOIC package; and the 5.000 V ±2.0 mV (M grade) AD586J, AD586K, AD586L, AD586S, and AD586T are Trimmed temperature coefficient available in an 8-lead CERDIP package. 2 ppm/°C max, 0°C to 70°C (M grade) 5 ppm/°C max, −40°C to +85°C (B and L grades) VIN NOISE REDUCTION 10 ppm/°C max, −55°C to +125°C (T grade) 2 8 Low noise, 100 nV/√Hz AD586 Noise reduction capability Output trim capability RZ1 RS MIL-STD-883-compliant versions available RZ2 A1 6 VOUT Industrial temperature range SOICs available RF RT Output capable of sourcing or sinking 10 mA 5 TRIM RI GENERAL DESCRIPTION 4 The AD586 represents a major advance in state-of-the-art GND monolithic voltage references. Using a proprietary ion-implanted bthuirni-efdil mZe rneesri sdtoiords,e t hane dA lDas5e8r6 w parfoevr itdreims omuitnstga nodf ihnigg hp estrafobrilmity- N1.OPMTIANEKSSE 1 ,N 3O, ACNODN N7 EACRTEIO INNTSE TRON ATHL ETSEES TP OPOINITNST.S. 00529-001 ance at low cost. Figure 1. The AD586 offers much higher performance than most other PRODUCT HIGHLIGHTS 5 V references. Because the AD586 uses an industry-standard 1. Laser trimming of both initial accuracy and temperature pinout, many systems can be upgraded instantly with the coefficients results in very low errors over temperature AD586. without the use of external components. The AD586M has The buried Zener approach to reference design provides lower a maximum deviation from 5.000 V of ±2.45 mV between noise and drift than band gap voltage references. The AD586 0°C and 70°C, and the AD586T guarantees ±7.5 mV offers a noise reduction pin that can be used to further reduce maximum total error between −55°C and +125°C. the noise level generated by the buried Zener. 2. For applications requiring higher precision, an optional The AD586 is recommended for use as a reference for 8-, 10-, fine-trim connection is provided. 12-, 14-, or 16-bit DACs that require an external precision 3. Any system using an industry-standard pinout reference reference. The device is also ideal for successive approximation can be upgraded instantly with the AD586. or integrating ADCs with up to 14 bits of accuracy and, in general, can offer better performance than the standard on-chip 4. Output noise of the AD586 is very low, typically 4 µV p-p. references. A noise reduction pin is provided for additional noise filtering using an external capacitor. The AD586J, AD586K, AD586L, and AD586M are specified for operation from 0°C to 70°C; the AD586A and AD586B are 5. The AD586 is available in versions compliant with specified for −40°C to +85°C operation; and the AD586S and MIL-STD-883. Refer to the Analog Devices Military AD586T are specified for −55°C to +125°C operation. Products Databook or the current AD586/883B data sheet for detailed specifications. Rev. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.

AD586 TABLE OF CONTENTS Specifications.....................................................................................3 Load Regulation............................................................................9 AD586J, AD586K/AD586A, AD586L/AD586B.......................3 Temperature Performance............................................................9 AD586M, AD586S, AD586T.......................................................4 Negative Reference Voltage from an AD586...........................10 Absolute Maximum Ratings............................................................5 Using the AD586 with Converters...........................................10 ESD Caution..................................................................................5 5 V Reference with Multiplying CMOS DACs or ADCs......11 Pin Configurations and Function Descriptions...........................6 Stacked Precision References for Multiple Voltages..............11 Theory of Operation........................................................................7 Precision Current Source..........................................................11 Applying the AD586.....................................................................7 Precision High Current Supply................................................11 Noise Performance and Reduction............................................7 Outline Dimensions.......................................................................13 Turn-on Time................................................................................8 Ordering Guide..........................................................................14 Dynamic Performance.................................................................8 REVISION HISTORY 3/05—Rev. F to Rev. G Updated Format..................................................................Universal Split Specifications Table into Table 1 and Table 2.......................3 Changes to Table 1............................................................................3 Added Figure 2 and Figure 4...........................................................6 Updated Outline Dimensions.......................................................13 Changes to Ordering Guide..........................................................14 1/04—Rev. E to Rev. F Changes to ORDERING GUIDE...................................................3 7/03—Rev. D to Rev. E Removed AD586J CHIPS..................................................Universal Updated ORDERING GUIDE........................................................3 Change to Figure 3...........................................................................4 Updated Figure 12............................................................................7 Updated OUTLINE DIMENSIONS..............................................9 4/01—Rev. C to Rev. D Changed Figure 10 to Table 1 (Maximum Output Change in mV)...............................................6 11/95—Revision 0: Initial Version Rev. G | Page 2 of 16

AD586 SPECIFICATIONS AD586J, AD586K/AD586A, AD586L/AD586B @ T = 25°C, V = 15 V, unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results A IN from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units, unless otherwise specified. Table 1. AD586J AD586K/AD586A AD586L/AD586B Parameter Min Typ Max Min Typ Max Min Typ Max Unit OUTPUT VOLTAGE 4.980 5.020 4.995 5.005 4.9975 5.0025 V OUTPUT VOLTAGE DRIFT1 0°C to 70°C 25 15 5 ppm/°C −55°C to +125°C ppm/°C GAIN ADJUSTMENT +6 +6 +6 % −2 −2 −2 % LINE REGULATION1 10.8 V < + V < 36 V IN T to T ±100 ±100 ±100 µV/V MIN MAX 11.4 V < +V < 36 V IN T to T µV/V MIN MAX LOAD REGULATION1 Sourcing 0 mA < I < 10 mA OUT 25°C 100 100 100 µV/mA T to T 100 100 100 µV/mA MIN MAX Sinking −10 mA < I < 0 mA OUT 25°C 400 400 400 µV/mA QUIESCENT CURRENT 2 3 2 3 2 3 mA POWER CONSUMPTION 30 30 30 mW OUTPUT NOISE 0.1 Hz to 10 Hz 4 4 4 µV p-p Spectral Density, 100 Hz 100 100 100 nV/√Hz LONG-TERM STABILITY 15 15 15 ppm/1000 hr SHORT-CIRCUIT CURRENT-TO-GROUND 45 60 45 60 45 60 mA TEMPERATURE RANGE Specified Performance2 0 70 0 (K grade) 70 0 (L grade) 70 °C −40 (A grade) +85 −40 (B grade) +85 °C Operating Performance3 −40 +85 −40 +85 −40 +85 °C 1 Maximum output voltage drift is guaranteed for all packages and grades. CERDIP packaged parts are also 100°C production tested. 2 Lower row shows specified performance for A and B grades. 3 The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance outside their specified temperature range. Rev. G | Page 3 of 16

AD586 AD586M, AD586S, AD586T @ T = 25°C, V = 15 V, unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results A IN from those tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units, unless otherwise specified. Table 2. AD586M AD586S AD586T Parameter Min Typ Max Min Typ Max Min Typ Max Unit OUTPUT VOLTAGE 4.998 5.002 4.990 5.010 4.9975 5.0025 V OUTPUT VOLTAGE DRIFT1 0°C to 70°C 2 ppm/°C −55°C to +125°C 20 10 ppm/°C GAIN ADJUSTMENT +6 +6 +6 % −2 −2 −2 % LINE REGULATION1 10.8 V < +V < 36 V IN T to T ±100 µV/V MIN MAX 11.4 V < +V < 36 V IN T to T ±150 ±150 µV/V MIN MAX LOAD REGULATION1 Sourcing 0 mA < I < 10 mA OUT 25°C 100 150 150 µV/mA T to T 100 150 150 µV/mA MIN MAX Sinking −10 mA < I < 0 mA OUT 25°C 400 400 400 µV/mA QUIESCENT CURRENT 2 3 2 3 2 3 mA POWER CONSUMPTION 30 30 30 mW OUTPUT NOISE 0.1 Hz to 10 Hz 4 4 4 µV p-p Spectral Density, 100 100 100 nV/√Hz 100 Hz LONG-TERM STABILITY 15 15 15 ppm/1000 hr SHORT-CIRCUIT CURRENT-TO-GROUND 45 60 45 60 45 60 mA TEMPERATURE RANGE Specified Performance2 0 70 −55 +125 −55 +125 °C Operating Performance3 −40 +85 −55 +125 −55 +125 °C 1 Maximum output voltage drift is guaranteed for all packages and grades. CERDIP packaged parts are also 100°C production tested. 2 Lower row shows specified performance for A and B grades. 3 The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance outside their specified temperature range. Rev. G | Page 4 of 16

AD586 ABSOLUTE MAXIMUM RATINGS Table 3. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent damage to the device. This is a stress VIN to Ground 36 V rating only; functional operation of the device at these or any Power Dissipation (25°C) 500 mW other conditions above those indicated in the operational Storage Temperature −65°C to +150°C section of this specification is not implied. Exposure to absolute Lead Temperature (Soldering, 10 sec) 300°C maximum rating conditions for extended periods may affect Package Thermal Resistance device reliability. θ 22°C/W JC θ 110°C/W JA Output Protection Output safe for indefinite short to ground or V . IN ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. G | Page 5 of 16

AD586 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NOISE NOISE NOISE TP1 1 8 REDUCTION TP1 1 8 REDUCTION TP1 1 8 REDUCTION TVPIN1 23 (NToAOt DPto 5V SI8Ec6aWle) 76 TVPO1UT TVPIN1 23 (NToAOt PDto V5 SI8Ec6aWle) 76 TVPO1UT TVPIN1 23 TAODP 5VI8E6W 76 TVPO1UT GND 4 5 TRIM GND 4 5 TRIM GND 4 (Not to Scale) 5 TRIM 1TNSPHO O DCUEOLNNDON TBEEECS TM FIOAADNCEST ,OT EORX YTC HTEEEPSSTET D PPUOOMIIMNNTYT.S P.CB PAD, 00529-002 1TNSPHO O DCUEOLNNDON TBEEECS TM FIOAADNCEST ,OT EORX YTC HTEEEPSSTET D PPUOOMIIMNNTYT.S P.CB PAD, 00529-003 1TNSPHO O DCUEOLNNDON TBEEECS TM FIOAADNCEST ,OT EORX YTC HTEEEPSSTET D PPUOOMIIMNNTYT.S P.CB PAD, 00529-004 Figure 2. Pin Configuration (N-8) Figure 3. Pin Configuration (Q-8) Figure 4. Pin Configuration (R-8) Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 TP1 Factory Trim Pad (No Connect). 2 V Input Voltage. IN 3 TP1 Factory Trim Pad (No Connect). 4 GND Ground. 5 TRIM Optional External Fine Trim. See the Applying the AD586 section. 6 V Output Voltage. OUT 7 TP1 Factory Trim Pad (No Connect). 8 NOICE REDUCTION Optional Noise Reduction Filter with External 1µF Capacitor to Ground. Rev. G | Page 6 of 16

AD586 THEORY OF OPERATION The AD586 consists of a proprietary buried Zener diode refer- VIN ence, an amplifier to buffer the output, and several high stability 2 thin-film resistors, as shown in the block diagram in Figure 5. VIN This design results in a high precision monolithic 5 V output AD586 VO 6 OUTPUT NOISE reference with initial offset of 2.0 mV or less. The temperature 8 OPTIONAL REDUCTION TRIM 5 10kΩ compensation circuitry provides the device with a temperature NOISE CN REDUCTION 1µF GND coefficient of under 2 ppm/°C. CAPACITOR 4 Using the bias compensation resistor between the Zener output 00529-005 and the noninverting input to the amplifier, a capacitor can be Figure 6. Optional Fine-Trim Configuration added at the noise reduction pin (Pin 8) to form a low-pass NOISE PERFORMANCE AND REDUCTION filter and reduce the noise contribution of the Zener to the The noise generated by the AD586 is typically less than 4 µV p-p circuit. over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is VIN NOISE REDUCTION approximately 200 µV p-p. The dominant source of this noise is 2 8 the buried Zener, which contributes approximately 100 nV/√Hz. By comparison, contribution by the op amp is negligible. Figure 7 AD586 shows the 0.1 Hz to 10 Hz noise of a typical AD586. The noise RZ1 RS measurement is made with a band-pass filter made of a 1-pole RZ2 A1 6 VOUT high-pass filter with a corner frequency at 0.1 Hz, and a 2-pole RF RT low-pass filter with a corner frequency at 12.6 Hz, to create a 5 TRIM filter with a 9.922 Hz bandwidth. RI If further noise reduction is desired, an external capacitor can 4 be added between the noise reduction pin and ground, as GND shown in Figure 6. This capacitor, combined with the 4 kΩ R S N1.OPMTIANEKSSE 1 ,N 3O, ACNODN N7 EACRTEIO INNTSE TRON ATHL ETSEES TP OPOINITNST.S. 00529-001 aonf dth teh Ze eZneenre cre rlel.s Ais t1a nµcFe sc,a fpoarcmitso ra wloiwll -hpaavses afi l3t edrB o np otihnet oaut tput 12 Hz, and will reduce the high frequency (to 1 MHz) noise to Figure 5. Functional Block Diagram about 160 µV p-p. Figure 8 shows the 1 MHz noise of a typical APPLYING THE AD586 AD586, both with and without a 1 µF capacitor. The AD586 is simple to use in virtually all precision reference applications. When power is applied to Pin 2 and Pin 4 is 1µF 5s grounded, Pin 6 provides a 5 V output. No external components are required; the degree of desired absolute accuracy is achieved simply by selecting the required device grade. The AD586 requires less than 3 mA quiescent current from an operating 1µF supply of 12 V or 15 V. An external fine trim may be desired to set the output level to exactly 5.000 V (calibrated to a main system reference). System calibration may also require a reference voltage that is slightly different from 5.000 V, for example, 5.12 V for binary applica- tciaonn so.f Ifnse et itthhee ro cuatpseu, tt hbey oasp tmiouncahl tarsi m30 c0i rmcuVi tw shitohw mni ninim Fiagl uerfefe 6c t 00529-006 Figure 7. 0.1 Hz to 10 Hz Noise on other device characteristics. Rev. G | Page 7 of 16

AD586 200µV 50µS 10V 5V 1mS CN = 1µF VIN VOUT NO CN 00529-007 00529-009 Figure 8. Effect of 1 µF Noise Reduction Capacitor on Broadband Noise Figure 10. Extended Time Scale TURN-ON TIME 10V 1mV 100mS Upon application of power (cold start), the time required for VIN the output voltage to reach its final value within a specified error band is defined as the turn-on settling time. Two compo- nents normally associated with this are the time for the active circuits to settle, and the time for the thermal gradients on the chip to stabilize. Figure 9, Figure 10, and Figure 11 show the turn-on characteristics of the AD586. It shows the settling to be VOUT about 60 µs to 0.01%. Note the absence of any thermal tails when the horizontal scale is expanded to l ms/cm in Figure 10. Otiountp cuatp taucrinto-ro ins tuimseed .i Ws mhoend ipfireeds ewnht,e tnh iasn c eaxptaecrintoarl nacotiss ea sr eadnu c- 00529-010 additional load to the current source of the internal Zener Figure 11. Turn-On with 1µF CN Characteristics diode, resulting in a somewhat longer turn-on time. In the case DYNAMIC PERFORMANCE of a 1 µF capacitor, the initial turn-on time is approximately 400 ms to 0.01% (see Figure 11). The output buffer amplifier is designed to provide the AD586 with static and dynamic load regulation superior to less com- 10V 1mV plete references. VIN Many ADCs and DACs present transient current loads to the reference, and poor reference response can degrade the per- formance of the converter. VOUT Figure 12, Figure 13, and Figure 14 display the characteristics of the AD586 output amplifier driving a 0 mA to 10 mA load. VOUT 20µS 00529-008 3.5V 5005ΩV Figure 9. Electrical Turn-On AD586 VL 0V 00529-011 Figure 12. Transient Load Test Circuit Rev. G | Page 8 of 16

AD586 5V 50mV 1µS 5V 200mV 1µS VL CL= 0 VOUT CL= 1000pF 00529-012 00529-015 Figure 13. Large-Scale Transient Response Figure 16. Output Response with Capacitive Load LOAD REGULATION 5V 1mV 2µS The AD586 has excellent load regulation characteristics. Figure 17 VL shows that varying the load several mA changes the output by a few µV. The AD586 has somewhat better load regulation per- formance sourcing current than sinking current. VOUT ∆VOUT (µV) 1000 500 00529-013 –6 –4 –2 0 2 4 6 8 10 LOAD (mA) –500 Figure 14. Fine-Scale Setting for Transient Load –1000 In some applications, a varying load may be both resistive and cbayp aa cloitnivge c ianp ancaittuivree , coarb tlhe.e load may be connected to the AD586 00529-016 Figure 17. Typical Load Regulation Characteristics Figure 15 and Figure 16 display the output amplifier characteristics driving a 1000 pF, 0 mA to 10 mA load. TEMPERATURE PERFORMANCE The AD586 is designed for precision reference applications where temperature performance is critical. Extensive tempera- 3.5V C10L00pF 500Ω VOUT ture testing ensures that the device maintains a high level of performance over the operating temperature range. 5V AD586 VL 0V 00529-014 Svoolmtaeg ec oenrrfours ioovne er xtiesmtsp weritahtu dreef. iHniinstgo arnicda lslyp,e rceiffeyrienngc reesf ehraevnec e Figure 15. Capacitive Load Transient Response Test Circuit been characterized using a maximum deviation per degree Celsius, that is, ppm/°C. However, because of nonlinearities in temperature characteristics that originated in standard Zener references (such as “S” type characteristics), most manufacturers have begun to use a maximum limit error band approach to specify devices. This technique involves measuring the output at three or more different temperatures to specify an output volt- age error band. Rev. G | Page 9 of 16

AD586 Table 5. Maximum Output Change in mV Figure 18 shows the typical output voltage drift for the AD586L Maximum Output Change (mV) and illustrates the test methodology. The box in Figure 18 is bounded on the sides by the operating temperature extremes Device Grade 0°C to 70°C −40°C to +85°C −55°C to +125°C and on the top and the bottom by the maximum and minimum AD586J 8.75 output voltages measured over the operating temperature AD586K 5.25 range. The slope of the diagonal drawn from the lower left to AD586L 1.75 the upper right corner of the box determines the performance AD586M 0.70 grade of the device. AD586A 9.37 SLOPE = T.C. = VMAX–VMIN AD586B 3.12 (TMAX–TMIN)×5×10–6 AD586S 18.00 5.0027– 5.0012 =(70°C– 0)×5×10–6 AD586T 9.00 = 4.3ppm/°C TMIN TMAX SLOPE NEGATIVE REFERENCE VOLTAGE FROM AN AD586 5.003 VMAX The AD586 can be used to provide a precision −5.000 V output, as shown in Figure 19. The V pin is tied to at least a 6 V supply, IN the output pin is grounded, and the AD586 ground pin is con- VMIN nected through a resistor, R, to a −15 V supply. The −5 V output S is now taken from the ground pin (Pin 4) instead of V . It is OUT 5.000 essential to arrange the output load and the supply resistor, RS, so that the net current through the AD586 is between 2.5 mA –20 0 TEMP2E0RATUR4E0 (°C) 60 80 00625-017 astnadb i1li0t.y0 o mf tAh.e T dheev ticeem wpielrl abtue rees scehnatriaaclltye rtihseti csas maned a slo tnhga-tt oerf ma unit used in the standard +5 V output configuration. Figure 18. Typical AD586L Temperature Drift +6V→+30V 10V Each AD586J, AD586K, and AD586L grade unit is tested at 0°C, 2.5mA <RS–IL< 10mA 2 25°C, and 70°C. Each AD586SQ and AD586TQ grade unit is VIN tested at −55°C, +25°C, and +125°C. This approach ensures that AD586 VOUT 6 the variations of output voltage that occur as the temperature GND changes within the specified range will be contained within a 4 IL box whose diagonal has a slope equal to the maximum specified –5V dfrroifmt. Tdehvei cpeo tsoit idoenv iocfe t ahse ibnoitxia ol ne rtrhoer vaenrdti cthale sschaalpe ew oilfl tchhea cnugrev e –15VRS 00529-018 vary. The maximum height of the box for the appropriate tem- Figure 19. AD586 as a Negative 5 V Reference perature range and device grade is shown in Table 5. Dupli- cation of these results requires a combination of high accuracy USING THE AD586 WITH CONVERTERS and stable temperature control in a test system. Evaluation of The AD586 is an ideal reference for a wide variety of 8-, 12-, 14-, the AD586 will produce a curve similar to that in Figure 18, but and 16-bit ADCs and DACs. Several representative examples are output readings could vary depending on the test methods and explained in the following sections. equipment used. Rev. G | Page 10 of 16

AD586 5 V REFERENCE WITH MULTIPLYING 22V TO 46V CMOS DACs OR ADCs 2 The AD586 is ideal for applications with 10- and 12-bit VIN multiplying CMOS DACs. In the standard hookup, as shown VOUT 6 15V AD586 in Figure 20, the AD586 is paired with the AD7545 12-bit TRIM 5 10kΩ multiplying DAC and the AD711 high speed BiFET op amp. GND 4 The amplifier DAC configuration produces a unipolar 0 V to −5 V output range. Bipolar output applications and other 2 operating details can be found in the individual product data VIN sheets. VOUT 6 10V AD586 TRIM 5 10kΩ R2 +15V +15V 68Ω 2 GND 2 C1 +15V VIN 4 VIN 18 20 33pF 0.1µF VOUT 6 5V AD586 AD586 VDD RFB TRIM 5 10kΩ OUT 1 1 2 7 VOUT 6 19 VREF AD711K 6 VOUT GND GTNRDIM 5 10kΩ AD7545KDGANGDND 2 3 4 0.1µF0VTO–5V 4 00529-021 4 DB11TODB0 3 –15V 00529-019 Figure 22. Multiple AD586s Stacked for Precision 5 V, 10 V, and 15 V Outputs PRECISION CURRENT SOURCE Figure 20. Low Power 12-Bit CMOS DAC Application The design of the AD586 allows it to be easily configured as a The AD586 can also be used as a precision reference for multi- current source. By choosing the control resistor R in Figure 23, ple DACs. Figure 21 shows the AD586, the AD7628 dual DAC, C the user can vary the load current from the quiescent current and the AD712 dual op amp hooked up for single-supply opera- (typically, 2 mA) to approximately 10 mA. The compliance volt- tion to produce 0 V to −5 V outputs. Because both DACs are on age of this circuit varies from about 5 V to 21 V, depending on the same die and share a common reference and output op the value of V . amps, the DAC outputs will exhibit similar gain TCs. IN +VIN +15V +15V 2 V2IN 17 3RFB A VIN VOUT 6 VREFA 4 DACA OUT A 2 AD586 VOUT 6 RC IL = 5R VC + IBIAS AD586 VOUTA= GND (500Ω MIN) GN4D INDPAUTTAS 174DDBB07 AD7628 RAFGBN BD119 AD712 0TO–5V 4 00529-022 OUT B Figure 23. Precision Current Source 4 20 VREFB DACB VOUTB= PRECISION HIGH CURRENT SUPPLY DG5ND 0TO–5V 00529-020 For higher currents, the AD586 can easily be connected to a power PNP or power Darlington PNP device. The circuit in Figure 21. AD586 as a 5 V Reference for a CMOS Figure 24 and Figure 25 can deliver up to 4 amps to the load. STACKED PRECISION REFERENCES FOR The 0.1 µF capacitor is required only if the load has a significant MULTIPLE VOLTAGES capacitive component. If the load is purely resistive, improved high frequency supply rejection results can be obtained by Often, a design requires several reference voltages. Three removing the capacitor. AD586s can be stacked, as shown in Figure 22, to produce 5.000 V, 10.000 V, and 15.000 V outputs. This scheme can be extended to any number of AD586s, provided the maximum load current is not exceeded. This design provides the addi- tional advantage of improved line regulation on the 5.0 V output. Changes in V of 18 V to 50 V produce output changes IN that are below the noise level of the references. Rev. G | Page 11 of 16

AD586 15V 15V 220Ω 220Ω 2N6285 2N6285 0.1µF 0.1µF 2 2 VIN 5V VIN AD586GN4D VOUT 6 RC IL = R C + IBIA00529-023S AD586GN4D VOUT 6 V5VO U@T 4 AMPS 00529-024 Figure 24. Precision High Current Current Source Figure 25. Precision High Current Voltage Source Rev. G | Page 12 of 16

AD586 OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 0.280 (7.11) 0.250 (6.35) 1 4 0.240 (6.10) 0.325 (8.26) PIN 1 0.310 (7.87) 5.00 (0.1968) 0.100 (2.54) 0.300 (7.62) 4.80 (0.1890) BSC 0.060 (1.52) 0.195 (4.95) (05M..23A13X0) 0.015 MAX 00..113105 ((32..3902)) 4.00 (0.1574) 8 5 6.20 (0.2440) 00..115300 ((33..8310)) (M0I.N38) 0.01G5 A(0U.3G8E) 3.80 (0.1497) 1 4 5.80 (0.2284) 0.115 (2.92) SPELAANTIENG PLANE 00..001140 ((00..3265)) 00..002128 ((00..5466)) 0M.I0N05 (0.13) 0.43M0 A(1X0.92) 0.008 (0.20) 1.27B (0S.C0500) 1.75 (0.0688) 00..5205 ((00..00109969))× 45° 0.014 (0.36) 0.25 (0.0098) 1.35 (0.0532) 0.070 (1.78) 0.10 (0.0040) 0.060 (1.52) 0.51 (0.0201) 8° 0.045C (O1.M14P)LIANT TO JEDEC STANDARDS MS-001-BA COPL0A.1N0ARITY SEPALTAINNGE 0.31 (0.0122) 00..2157 ((00..00009687)) 0° 10..2470 ((00..00510507)) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR COMPLIANT TO JEDEC STANDARDS MS-012AA REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 26. 8-Lead Plastic Dual In-Line Package [PDIP] Figure 28. 8-Lead Standard Small Outline Package [SOIC] (N-8) Narrow Body Dimensions shown in inches and (millimeters) (R-8) Dimensions shown in millimeters and (inches) 0.005 (0.13) 0.055 (1.40) MIN MAX 8 5 0.310 (7.87) 0.220 (5.59) 1 4 PIN 1 0.100 (2.54) BSC 0.405 (10.29) MAX 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.200 (5.08) MAX 0.015 (0.38) 0.200 (5.08) 0.150 (3.81) 0.125 (3.18) MIN 0.023 (0.58) SEATING 0.015 (0.38) 0.014 (0.36) 00..007300 ((10..7786)) PLANE 1 05°° 0.008 (0.20) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 27. 8-Lead Ceramic Dual In-Line Package [CERDIP] (Q-8) Dimensions shown in inches and (millimeters) Rev. G | Page 13 of 16

AD586 ORDERING GUIDE Initial Temperature Temperature Package Package Quantity Per Model Error Coefficient Range Description Option Reel AD586JN 20 mV 25 ppm/°C 0°C to 70°C PDIP N-8 AD586JNZ1 20 mV 25 ppm/°C 0°C to 70°C PDIP N-8 AD586JQ 20 mV 25 ppm/°C 0°C to 70°C CERDIP Q-8 AD586JR 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 AD586JR-REEL7 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586JRZ1 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 AD586JRZ-REEL71 20 mV 25 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586KN 5 mV 15 ppm/°C 0°C to 70°C PDIP N-8 AD586KNZ1 5 mV 15 ppm/°C 0°C to 70°C PDIP N-8 AD586KQ 5 mV 15 ppm/°C 0°C to 70°C CERDIP Q-8 AD586KR 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 AD586KR-REEL 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586KR-REEL7 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586KRZ1 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 AD586KRZ-REEL1 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586KRZ-REEL71 5 mV 15 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586LN 2.5 mV 5 ppm/°C 0°C to 70°C PDIP N-8 AD586LNZ1 2.5 mV 5 ppm/°C 0°C to 70°C PDIP N-8 AD586LR 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 AD586LR-REEL 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586LR-REEL7 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586LRZ1 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 AD586LRZ-REEL1 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 2,500 AD586LRZ-REEL71 2.5 mV 5 ppm/°C 0°C to 70°C SOIC R-8 1,000 AD586MN 2 mV 2 ppm/°C 0°C to 70°C PDIP N-8 AD586MNZ1 2 mV 2 ppm/°C 0°C to 70°C PDIP N-8 AD586AR 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 AD586AR-REEL 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 2,500 AD586ARZ1 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 AD586ARZ-REEL1 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 2,500 AD586ARZ-REEL71 5 mV 15 ppm/°C −40°C to +85°C SOIC R-8 1,000 AD586BR 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 AD586BR-REEL7 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 1,000 AD586BRZ1 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 AD586BRZ-REEL1 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 2,500 AD586BRZ-REEL71 2.5 mV 5 ppm/°C −40°C to +85°C SOIC R-8 1,000 AD586LQ 2.5 mV 5 ppm/°C 0°C to 70°C CERDIP Q-8 AD586SQ 10 mV 20 ppm/°C −55°C to +125°C CERDIP Q-8 AD586TQ 2.5 mV 10 ppm/°C −55°C to +125°C CERDIP Q-8 AD586TQ/883B2 2.5 mV 10 ppm/°C −55°C to +125°C CERDIP Q-8 1 Z = Pb-free part. 2 For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or the current AD586/883B data sheet. Rev. G | Page 14 of 16

AD586 NOTES Rev. G | Page 15 of 16

AD586 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00529–0–3/05(G) Rev. G | Page 16 of 16