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AD521JDZ产品简介:
ICGOO电子元器件商城为您提供AD521JDZ由Analog设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 AD521JDZ价格参考¥484.52-¥484.52。AnalogAD521JDZ封装/规格:线性 - 放大器 - 仪表,运算放大器,缓冲器放大器, 仪表 放大器 1 电路 14-CDIP。您可以下载AD521JDZ参考资料、Datasheet数据手册功能说明书,资料中有AD521JDZ 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
-3db带宽 | 2MHz |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC OPAMP INSTR 2MHZ 14CDIP仪表放大器 IC PREC Instrumentation AMP |
产品分类 | Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps集成电路 - IC |
品牌 | Analog Devices Inc |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 放大器 IC,仪表放大器,Analog Devices AD521JDZ- |
数据手册 | |
产品型号 | AD521JDZ |
产品培训模块 | http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=30008http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=26202 |
产品目录页面 | |
产品种类 | 仪表放大器 |
供应商器件封装 | 14-CDIP |
共模抑制比—最小值 | 110 dB |
包装 | 管件 |
压摆率 | 10 V/µs |
双重电源电压 | +/- 5 V to +/- 18 V |
可用增益调整 | 0.1 V/V to 1000 V/V |
商标 | Analog Devices |
增益带宽生成 | 40 MHz |
增益带宽积 | - |
安装类型 | 通孔 |
安装风格 | Through Hole |
封装 | Tube |
封装/外壳 | 14-CDIP(0.300",7.62mm) |
封装/箱体 | CERDIP-14 |
工作温度 | 0°C ~ 70°C |
工作温度范围 | 0 C to + 70 C |
工作电源电压 | 18 V |
工厂包装数量 | 25 |
带宽 | 2 MHz |
放大器类型 | 仪表 |
最大工作温度 | + 70 C |
最大输入电阻 | 10 MOhms |
最小工作温度 | 0 C |
标准包装 | 1 |
电压-电源,单/双 (±) | ±5 V ~ 18 V |
电压-输入失调 | 3mV |
电流-电源 | 5mA |
电流-输入偏置 | 80nA |
电流-输出/通道 | - |
电源电流 | 5 mA |
电路数 | 1 |
系列 | AD521 |
视频文件 | http://www.digikey.cn/classic/video.aspx?PlayerID=1364138032001&width=640&height=505&videoID=2245193153001http://www.digikey.cn/classic/video.aspx?PlayerID=1364138032001&width=640&height=505&videoID=2245193159001 |
转换速度 | 10 V/us |
输入偏压电流—最大 | 80 nA |
输入补偿电压 | 3 mV |
输出类型 | - |
通道数量 | 1 Channel |
.. ,. ANALOG IntegratedCircuit W DEVICES PrecisionInstrumentatioAnmplifier [ AD521 I FEATURES PIN CONFIGURATION ProgrammableGainsfrom 0.1to 1000 DifferentialInputs +INPUT I 1 141~AIN HighCMRR:11OdBmin LowDrift: 2p.Vfc max (L) GAI~12 131~ALE Complete Input Protection, PowerONandPowerOFF Functionally Completewith the Addition ofTwo Resistors InternallyCompensated GainBandwidthProduct: 4OMHz OFFSET I TRIM 4 Output Current Limited:25mA a Very LowNoise:05p.V p-p,0.1Hzto 10Hz,RTI(I G-1000 ChipsareAvailable OFFSET TRIMI8 9 ICOMPo N ot R OUTPUT I 7 81 v+ e c o m PRODUCTDESCRIPTION m +70°C.The "S" gradeguaranteesperformance to specification e TheAD521 isasecondgeneration, lowcost,nmonolithic IC overthe eXtendedtemperatUrerange:-SSoCto +125°C. d tirnUsterUinmsterUntmateionntaatimonplaifmieprlidfeievre,ltohpeedAbDy52A1naisloaggDaienvbicleoesc.kAwsdaith fPRODUCTHIGHLIGHTS differential inputs andanaccurately programmable input/ 1o. ThreA DS21isatrUeinstrumentation amplifier inintegrated circuit fonrm, offeringthe user performance comparableto output gainrelationship. e many modular inswtrume ntation amplifiersat afraction of TheAD521 ICinstrUmentation amplifiershould not becon- the cost. D e fusedwith anoperational amplifier,althoughseveralmanu- si 2. TheAD521haslowguaranteed input offsegtvoltagedrift factUrers(includingAnalogDevices)offer opampswhichcan n (21lVf Cfor Lgrade)andlownoisefor precision,higshgain beusedasbuildingblocksinvariablegaininstrumentation applications. amplifiercircuits. Opampsaregeneral-purposecomponents which,whenusedwithprecision-matchedexternal resistors, 3. TheAD521 isfunctionally complete with the addition of canperform the instrUmentationamplifierfunction. two resistors. Gaincanbe presetfrom 0.1 to morethan 1000. Aninstrumentation amplifierisaprecisiondifferential volt- agegaindeviceoptimized for operation inarealworldenvi- 4. TheAD521isfullyprotected forinput levelsup to 15V ronment, and isintended to beusedwhereveracquisitionofa beyond the supplyvoltagesandJOVdifferential atthe usefulsignalisdifficult. It ischaracterizedbyhighinput im- inputs. pedance,balanceddifferential inputs, lowbiascurrents and 5. Internally compensated for allgains,the AD521alsooffers highCMR. the user the provisionfor limitingbandwidth. Asacomplete instrUmentationamplifier,the AD521 requires 6. Offsetnullingcanbe achievedwith anoptional trim pot. onlytwo resistorsto setitsgainto anyvaluebetween 0.1 and 7. TheAD521offers superior dynamicperformance witha 1000.Theratio matchingof theseresistorsdoesnot affect the gain-bandwidthproduct of40MHz,fullpeakresponseof highCMRR(upto 120dB)or the highinput impedance(3 X 100kHz(independent ofgain)and asettlingtime of 5p.s 109il) ofthe AD521. Furthermore, unlikemostoperational to 0.1%of a 10Vstep. amplifier-basedinstrUmentationamplifiers,the inputs are protected againstovervoltagesup to :1:15voltsbeyond the supplies. TheAD521 ICinstrumentation amplifierisavailableinfour different versionsof accuracyandoperating temperatUrerange. Theeconomical "J" grade,the lowdrift "K" grade, andthe lowerdrift, higherlinearity "L" gradearespecifiedfrom 0to -~ ~-- ~_. ~ 01::\/ 1\
AD521-SPECIFICATIONS = = (typical@ Vs :t15V, RL 2kO and TA= +25°Cunlessotherwisespecified) AD521SD ~ AD521JD AD521KD AD5HW (AD5HSDI883B) GAIN Ra..e (For Spocified Operation, Note I) Ito 1000 Equation G. Rs/RC V/V Error from Equation (to.25~.004G)% Nonlin..rity (NatO2) . I..G<IOOO 0.2%max 0.1%max GainTemporaturo C""fficient t(3 to.05G)f£mtC t(l5 to.4G)f£mtc OUTPUT CHARACTERISTICS RatOdOutput UOV, tlOmA min Output atMaximum Oporati.. Temporaturo tlOV @SmAmin Impodance 0.10 DYNAMIC RESPONSE SmallSignalBandwidth (13dB) G=I >2MHz G= 10 300kHz G= 100 200kHz G=1000 40kHz SmallSignal, t1.0% Flatn..s G=I 75kHz G= 10 26kHz G= 100 24kHz G=1000 6kHz FullPeak Response (NatO3) 100kHz Skw RatO,I..G ..1000 10V/lis Settling Time (any 10VstOptowithin 10mV of Final Value) G-I 711' G= 10 511S N G. 100 otG .lOOO l3O5lll1ss DifforcnRtiaJ Oveerload Recovery (130V Input to within 10mV ofFinal Value)c(NatO4) G- 1000 o SOliS Common ModeStOpRecovery (30VmInput towithin 10mVof Final Value) (NatO5) m = e G 1000 nlOllS VOLTAGE OFFSET (may benulled) d e Inpvust.OTeffmseptorVatoulrteage (Vas,) 31m51V1VmtCaxm(2amxV(7It1yVpd)tC typ) f5l.151mVVtCmmaaxx(0(l..55mI1VVfcryp)typ) l2..IOIVm/v.Cmmaaxx(0.5mV typ) Ouvtvpssu..tTSeuOmpfppflsoyertatuVreoltage (Vaso) 443OO11OOVmI/I%VVtCmmaxax(20(0l5m0VIlVt!y':pC) typ) o21.0500rmllVVfc maxnma(x30(m5V0eIlVty!p':)C typ) 7.lO51O1mVVtCmmaaxx vs.Supply (Narc 6) 0.005VOSO/% w INPUTCURRENTS De Input BiasCurrent (either input) 80nA max 4.OnAmax si vs.Temporature InAtC max 500pAfC max gn vs.Supply 2%IV s Input OffserCurrent 20nA max 10nAmax vs.Temporature 250pAtC max 125pAtC max INPUT Differential Input Impodance (NatO7) 3x 1O911111.8pF Common ModeInput Impedance (NatO8) 6x lO'O11113.0pF Input Voltage Rangefor Specified Poriorrnance (with rospect toground) tlOV Maximum Voltage without Damage to Unit, PowerON orOFF Differential Mode (Note 9) 30V Voltage ateither input (Narc 9) Vstl5V Common ModeRejection Ratio, DCto60Hz with IH1 source unbalance Gol 70dB min(74dB typ) 74dBmin (80dB typ) GGoollOOO 9lO0dOBdBmminin(9(4l0d4BdBtypt)yp) 914Od4BdBmminin(lO(l1O4ddBBtytpy)p) - G. 1000 lOOdBmin(lIOdB typ) llOdB min (l20dB trP,) NOISE - Voltage RTO(p-p)@O.IHz to 10Hz(Narc 10) RMSRTO, 10Hzto 10kHz Input Current, rms, 10Hzto 10kHz REFERENCE TERMINAL BiasCurrent 311A - Input Resistance IOM11 Voltage Range tlOV - Gainto Output I POWERSUPPLY Oporati!ll Voltage Ra..e t5V toU8V Quincent Supply Current SmAmax TEMPERATURE RANGE Spooned Performance 0to +70.C -55.Cto+125.C Oporating -25.C to +85.C -55.C to +-12-5.C Storage -65.C to +150.C °Specificatiom AD521JD. ooSpec:if'ocatioaa AD5Z1KD. Specificatioaaoubjoct10<!wit<withoutDOO«. --- -- - -------- REV.A ~
ApplyingtheAD521 [ NOTES: mon mode signalgreater than Vs -o.5V isapplied to the 1. Gains below 1and above 1000 are obtained by simply ad- inputs, transistor clamps are activated which drop the excessive justing the gain setting resistors. (Input voltage should be re- input voltage across internal input resistors. Power dissipated stricted to :t10V for gains equal to or less than 1.) in these resistors causes temperatUre gradients and a correspon- ding change in offset voltage, as well as an added thermal time 2. Nonlinearity isdefined as the ratio of the deviation from constant, but will not damage the device.) the "best straight line" through afull scale output range of 1:9volts. With a combination of high gain and :tlO volt output 6. Output Offset Voltage versus Power Supply includes a swing, distortion may increase to as much as0.3%. constant 0.005 times the unnulled output offset per percent change in either power supply. If the output offset isnulled, 3. Full Peak Response isthe frequency below which atypical the output offset change versus supply change issubstantially amplifier will produce full output swing. reduced. 4. Differential Overload Recovery isthe time it takes the ampli- 7. Differential Input Impedance isthe impedance between the fier to recover from a pulsed 30V differential input with 15V two inputs. of common mode voltage, to within 10mV of final value. The 8. Common Mode Input Impedance isthe impedance from test input isa 30V, 10,uspulse at a 1kHz rate. (When adiffer- ential signal of greater than 11V isapplied between the inputs, either input to the power supplies. a transistor clamps are activated which drop the exces!' input 9. Maximum Input Voltage (differential or at either input) is voltage across internal input resistors. If a continuous overload 30V when using :t15V supplies. A more general specification is N ismaintained, power dissipated in these resistors causes temper- that neither input may exceed either supply (even when oatUtre gradients and a corresponding change in offset voltage, Vs =0) by more than 15V and that the difference between the aswellRas addeed thermal time constant, but will not damage two inputs must not exceed 30V. (See also Notes 4 and 5.) the device.) c o 10. O.lHz to 10Hz Peak-to-Peak Voltage Noise isdefined as m 5. Common Mode Step Recoverymisthe time it takes the amp- the maximum peak-to-peak voltage noise ovserved during 2 e lifier to recover from a 30V common mode innput with zero of 3separate 10second periods with the test circuit of Fig- d volts of differential signal to within 10mV of final valuee. The ure 8. test input is 30V, 10,uspulse at a 1kHz rate. (When a com- d f o r n e w ORDERING GUIDE METALIZATIONDPHeOTOGRAPH Dimensions shown in inches ansd (mmi).g Temperature Package Contact factory for latest dimensions. n s Model Range Description Option! AD52lJD DoCto +7DoC 14-PinCeramic DIP D-14 AD52IKD DoCto +7DoC 14-PinCeramic DIP D-14 AD521LD DoCto +7DoC 14-PinCeramic DIP D-14 AD521SD - 55°Cto +125°C 14-PinCeramic DIP D-14 AD521SD/883B2 - 55°Cto +125°C 14-PinCeramic DIP D-14 AD52lJ Chips DoCto +7DoC Die AD521K Chips DoCto +7DoC Die AD521S Chips - 55°Cto +125°CDie NOTES IFor outline information see Package Information section. 14 RGAIN 2Standard military drawing available. 1 +INPUT ~ 2 3 4 5 6 RGAIN -INPUT OFFSET -Vs OFFSET TRIM TRIM 0.110{2.8001 8BLA fN~TRf !MFNTA TfnN AMP! !FfFR.C; 4-,ffl;
AD521 DESIGNPRINCIPLE Figure 1isasimplifiedschematicoftheAD521. Adifferential 4. Donot exceedthe allowableinput signalrange.Theline- inputvoltage,VIN,appearsacrossRGcausinganimbalancein arity of the ADS21decreasesifthe inputs aredrivenwithin the currents throughQl and<l2,~I=VIN/RG' That imbalance 5voltsof the supply rails,particularly whenthe deviceis isforcedto flowinRs becausethe collectorcurrents of Q3 usedatagainlessthan 1.Toavoidthispossibility,atten- and<4 areconstrainedto beequalbytheir biasing(current uate the input signalthrough aresistivedividernetworkand mirror). Theseconditions canonlybe satisfiedifthe differen- usethe ADS21asabuffer, asshowninFigure4.Theresis- tialvoltageacrossRs (andhence the output voltageofthe tor R/2 matches the impedanceseenbyboth AD521in- AD521)isequalto ~I XRs. Thefeedbackamplifier,ApB puts sothat the voltageoffset causedbybiascurrentswill beminimized. performsthatfunction. Therefore,VOUT=V~ XRs or VOUT - Rs 5. Usethe compensation pin (pin 9) and the applicable com- VIN -~ pensation circuit when the amplifier isrequired to drivea +V capacitive load. It isworth mentioning that coaxial cables can '~invisibly" provide such capacitance since many popu- lar coaxial cables display capacitance in the vicinity of3OpF VON per foot. I-IrQ This compensation (bandwidth control) feature permits the user to fit the response of the AD521 to the particular appli- VOUT V,N "'RI. 1IQ cation as illustrated by Figure S.In cases of extremely high Not OR-VvO-U.T.,,"Ira laosafdolcloawpasc:itance the compensation circuit may be changed R e c 1. Reduce 680n to 24n o m SENSE 2. Reduce BOn to 7.5n m e 3. Increase 1000pF to O.IJ,LF n d 4. Set Cx to 1000pF if no compensation was originally e d f used. Otherwise, do not alter the original value. o t t Thisrall ows stable operation for load capacitances up to 'i 'x IX ~.~', 3000pF, nbut leimits the slew rate to approximately 0.16VIJ,Ls; CURRENT MIRROR w D 6. Signals having frequency compeonents above the Instrumen- V- tation Amplifier's output amplifiersclosied-loop bandwidth Figure7.Simplified AD527 Schematic will be transmitted from V-to the output gwithnlittlesor no attenuation. Therefore, it isadvisable to decouple the V- APPLICATION NOTES FOR THE AD521 supply line to the output common or to pin 11.1 These notes ensure the AD521 will achieve the high level of V+ performance necessary for many diversified IA applications. 1. Gains below 1are realized by adjusting the gain setting resistors as shown in Figure 2 (the resistor, as betWeen pins 10and 13should remain 100kn :1:15%,seeapplication +IN note 3). For best results, the input voltage should be re- stricted to :tl0V even though the gain may be lessthan 1. OUTPUT See Figure 6 for gains above 1000. -IN OUTPUT 2. Provide a return path to ground for input bias currents. The SIGNAL AD521 isan instrumentation amplifier, not an isolation COMMON GAIN VALUEOFRO 0.1 1I0Il1 amplifier. When using a thermocouple or other "floating" 1 1(JOkS1 source, this return path may be provided directly to ground 10 101<!J 100 1k!1 or indirectly through aresistor to ground from pins 1and/ 1000 100!J or 3, asshown in Figure 3. If the return path isnot pro- vided, bias currents will cause the output to saturate. The Figure 2. Operating Connections for AD527 value of the resistor may be determined by dividing the maximum allowable common mode voltage for the appli- cation by the bias current of the instrumentation amplifier. 3. The resistors betWeen pins 10and 13, (RSCALE)must equal l00kn :t15%(Figure 2). If RSCALEistoo low (below 85kn) the output swing of the AD521 isreduced. At values below IFor further details, refer to "An I.C.User's Guide to Decoupling, Grounding, and MakingThings Go Right for aChange," byA. 'ceS 80kU and above 120kU the stability of the AD521 may be Paul Brokaw. This application note isavailable from Analog Devi impaired. without charge upon request. - - - . - - --- -- -- REV.A j - -- - -- - -
~ [ AD521 R. INPUT OFFSET AND OUTPUT OFFSET When specifying offsets and other errors in an operational amplifier, it isoften convenient to refer these errors to the inputs. This enables the user to calculate the maximum error he would see at the output with any gain or circuit configura- ~ tion. An op amp with 1mV of input offset voltage, for example, would produce 1V of offset at the output in again of 1000 configuration. ":' a). Transformer Coupled, Direct Return In the case of an instrumcntation amplifier, where the gain is controlled in the amplifier, it is more convenient to separate R. errors into two categories. Those errors which simply add to the output signal and are unaffected by the gain can be classi- ~ fied asoutput errors. Those which act as if they are associated with the input signal, such that their effect at the output is proportional to the gain, can be classified asinput errors. a As an illustration, a typical ADS21 might have a+30mV output offset and a -o.7mV input offset. In aunity gain configuration, the total output offset would be +29.3mV or the sum of the ~ N b). Thermocouple, DirectReturn tWo. At again of 100, the output offset would be -40mV or: ot 30mV + 100(-o.7mV) =-40mV. R R. ec Byseparating these errors, one can evaluate the total error o independent of the gain settings used, similar to the situation m m with the input offset specifications on an op amp. In agiven e n gain configuration, both errors can be combined to give atotal d e error referred to the input (R.T.I.) or output (R.T.O.) by the d ffollowing formula: o r Total nError R.T.I. =input error + (output error/gain) e c). AC Coupled,IndirectReturn Total Error R.Tw.O.= (Gain x input error) + output error D e Figure3. GroundRerums for "Floating" Transducers The offset trim adjustment (pins 4 ands6, Fiigure 2) isassoci- g ated primarily with the output offset. At any gain int cansbe used to introduce an output offset equal and opposite to the input offset voltage multiplied by the gain. Asaresult, the total output offset can be reduced to zero. Asshown in Figure 6, the gain range on the ADS21 can be 7 extended considerably by adding an attenuator in the sense VOUT terminal feedback path (aswell as adjusting the ratio, Rs/~). Since the sense terminal isthe inverting input to the output amplifier, the additional gain to the output is controlled by Rl and Rz. This gain factor is 1 +Rz/Rl' 1. ~~~~~:~~:~CK UPGAINLOSTBYR 2. INPUT SIGNAL MUSTBEREDUCED IN RI PROPORTION TOPOWER SUPPLY VOLTAGE LEVEL Figure 4. Operating Conditions for V/~VS= 10V V, V+ VOUT + ~ V2 R2 GAIN. Villi RO R, OUTPUT COMMON VOUT.[VREF +(~)(VI -V2)][R';,R2] V- Figure6. Circuitforutilizingsomeof the unique featuresof the 1 AD521. Note thatgainchangesintroduced by changingR1and Cx=10fJ1rftwhenft isthe desiredbandwidth. R2 willhaveaminimum effect onoutput offsst if theoffsst is (ft inkHz,Cx inJ.l.F) carefullynulledat thehighestgainsetting. Figure5. OptionalCompensation Circuit R~lL--l1 INSTRUMENTA nON AMPLIFIERS 4-21
AD521 RS Where offset errors are critical, a resistor equal to the parallel combination of Rl and Rz should be placed between pin 11 and VREF. Thisminimizes the offset errors resulting from the input current flowing in Rl and Rz at the sense tenninal. Note VIN RG that gain changes introduced by changing the Rl/Rz attenua- VOUT=VIN~ RG tor will have a minimum effect on output offset if the offset iscarefully nulled at the highest gain setting. I I VCM When apredetennined output offset isdesired, VREF can be L - -.'4-'}--------- placed in series with pin 11. This offset isthen multiplied by the gain factor 1 + R2/Rl as shown in the equation of Figure 6. Figure 7. Ground loop elimination. The reference input, Pin 11, allows remote referencing of ground potential. Differences in ground potentials areattenuated by the high CMRR of the AD521. +15V I lOOk 3Oon 1 HF lOOk Not O.,&,.FTI 114 8 IOk CRHECAORRTDER R e c o lOOk m ---tt-m e n d 2.5j.F eF d f - =1 orI 10Mn n 3Oon e O.I&,.F I I w -15V D e siCOMMON g Figure 8. Test circuit for measuring peak to peak noise in the ns bandwidth 0.1Hz to 10Hz. Typical measurements are found by reading the maximum peak to peak voltage noise of the device under test fD.U.T.) for 3 observation periods of 10seconds each. - - --- REV.A ~ - - - --- --- -