93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 16K Microwire Compatible Serial EEPROM Device Selection Table Part VCC Range ORG Pin PE Pin Word Size Temp Ranges Packages Number 93AA86A 1.8-5.5 No No 8-bit I P, SN, ST, MS, OT 93AA86B 1.8-5-5 No No 16-bit I P, SN, ST, MS, OT 93LC86A 2.5-5.5 No No 8-bit I, E P, SN, ST, MS, OT 93LC86B 2.5-5.5 No No 16-bit I, E P, SN, ST, MS, OT 93C86A 4.5-5.5 No No 8-bit I, E P, SN, ST, MS, OT 93C86B 4.5-5.5 No No 16-bit I, E P, SN, ST, MS, OT 93AA86C 1.8-5.5 Yes Yes 8- or 16-bit I P, SN, ST, MS, MC, MN 93LC86C 2.5-5.5 Yes Yes 8- or 16-bit I, E P, SN, ST, MS, MC, MN 93C86C 4.5-5.5 Yes Yes 8- or 16-bit I, E P, SN, ST, MS, MC, MN Features: Description: • Low-Power CMOS Technology The Microchip Technology Inc. 93XX86A/B/C devices • ORG Pin to Select Word Size for ‘86C’ Version are 16K bit low-voltage serial Electrically Erasable • 2048 x 8-bit Organization ‘A’ Devices (no ORG) PROMs (EEPROM). Word-selectable devices such as • 1024 x 16-bit Organization ‘B’ Devices (no ORG) the 93XX86C are dependent upon external logic levels driving the ORG pin to set word size. The • Program Enable Pin to Write-Protect the Entire 93XX86A devices provide dedicated 8-bit memory Array (‘86C’ version only) organization, while the 93XX86B devices provide • Self-tImed Erase/Write Cycles (including dedicated 16-bit memory organization. A Program Auto-Erase) Enable (PE) pin allows the user to write-protect the • Automatic Erase All (ERAL) before Write All entire memory array. Advanced CMOS technology (WRAL) makes these devices ideal for low-power, nonvolatile • Power-On/Off Data Protection Circuitry memory applications. The entire 93XX Series is • Industry Standard 3-Wire Serial I/O available in standard packages including 8-lead PDIP • Device Status Signal (Ready/Busy) and SOIC, and advanced packaging including 8-lead • Sequential Read Function MSOP, 6-lead SOT-23, 8-lead 2x3 DFN/TDFN and 8- • 1,000,000 E/W Cycles lead TSSOP. All packages are Pb-free (Matte Tin) • Data Retention > 200 Years finish. • Pb-free and RoHS Compliant • Temperature Ranges Supported: - Industrial (I) -40°C to +85°C - Automotive (E)-40°C to +125°C Pin Function Table Name Function CS Chip Select CLK Serial Data Clock DI Serial Data Input DO Serial Data Output VSS Ground PE Program Enable – 93XX86C only ORG Memory Configuration – 93XX86C only VCC Power Supply  2003-2012 Microchip Technology Inc. DS21797L-page 1

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Package Types (not to scale) PDIP/SOIC SOT-23 (P, SN) (OT) CS 1 8 VCC DO 1 6 VCC CLK 2 7 PE(1) VSS 2 5 CS DI 3 6 ORG(1) DI 3 4 CLK DO 4 5 VSS TSSOP/MSOP DFN/TDFN (ST, MS) (MC, MN) CS 1 8 VCC CS 1 8 VCC CLK 2 7 PE(1) CLK 2 7 PE DI 3 6 ORG(1) DI 3 6 ORG DO 4 5 VSS DO 4 5 VSS Note 1: 93XX86C only. DS21797L-page 2  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS..........................................................................................................-0.6V to VCC +1.0V Storage temperature...............................................................................................................................-65°C to +150°C Ambient temperature with power applied................................................................................................-40°C to +125°C ESD protection on all pins 4kV Note: † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS All parameters apply over the specified Industrial (I): TA = -40°C to +85°C, VCC = +1.8V to 5.5V ranges unless otherwise noted. Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to 5.5V Param. Symbol Parameter Min. Typ. Max. Units Conditions No. D1 VIH1 High-level input voltage 2.0 — VCC +1 V VCC 2.7V VIH2 0.7 VCC — VCC +1 V VCC < 2.7V D2 VIL1 Low-level input voltage -0.3 — 0.8 V VCC 2.7V VIL2 -0.3 — 0.2 VCC V VCC < 2.7V D3 VOL1 Low-level output voltage — — 0.4 V IOL = 2.1 mA, VCC = 4.5V VOL2 — — 0.2 V IOL = 100 A, VCC = 2.5V D4 VOH1 High-level output voltage 2.4 — — V IOH = -400 A, VCC = 4.5V VOH2 VCC - 0.2 — — V IOH = -100 A, VCC = 2.5V D5 ILI Input leakage current — — ±1 A VIN = VSS or VCC D6 ILO Output leakage current — — ±1 A VOUT = VSS or VCC D7 CIN, Pin capacitance (all inputs/ — — 7 pF VIN/VOUT = 0V (Note 1) COUT outputs) TA = 25°C, FCLK = 1 MHz D8 ICC write Write current — — 3 mA FCLK = 3 MHz, VCC = 5.5V — 500 — A FCLK = 2 MHz, VCC = 2.5V D9 ICC read Read current — — 1 mA FCLK = 3 MHz, VCC = 5.5V — — 500 A FCLK = 2 MHz, VCC = 3.0V — 100 — A FCLK = 2 MHz, VCC = 2.5V D10 ICCS Standby current — — 1 A I – Temp — — 5 A E – Temp CLK = CS = 0V ORG = DI PE = VSS or VCC (Note 2) (Note 3) D11 VPOR VCC voltage detect (Note 1) — 1.5 — V 93AA86A/B/C, 93LC86A/B/C — 3.8 — V 93C86A/B/C Note 1: This parameter is periodically sampled and not 100% tested. 2: ORG and PE pin not available on ‘A’ or ‘B’ versions. 3: Ready/Busy status must be cleared from DO; see Section3.4 “Data Out (DO)”.  2003-2012 Microchip Technology Inc. DS21797L-page 3

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C TABLE 1-2: AC CHARACTERISTICS All parameters apply over the specified Industrial (I): TA = -40°C to +85°C, VCC = +1.8V to 5.5V ranges unless otherwise noted. Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to 5.5V Param. Symbol Parameter Min. Max. Units Conditions No. A1 FCLK Clock frequency — 3 MHz 4.5V VCC < 5.5V 2 MHz 2.5V VCC < 4.5V 1 MHz 1.8V VCC < 2.5V A2 TCKH Clock high time 200 — ns 4.5V VCC < 5.5V 250 ns 2.5V VCC < 4.5V 450 ns 1.8V VCC < 2.5V A3 TCKL Clock low time 100 — ns 4.5V VCC < 5.5V 200 ns 2.5V VCC < 4.5V 450 ns 1.8V VCC < 2.5V A4 TCSS Chip Select setup time 50 — ns 4.5V VCC < 5.5V 100 ns 2.5V VCC < 4.5V 250 ns 1.8V VCC < 2.5V A5 TCSH Chip Select hold time 0 — ns 1.8V VCC < 5.5V A6 TCSL Chip Select low time 250 — ns 1.8V VCC < 5.5V A7 TDIS Data input setup time 50 — ns 4.5V VCC < 5.5V 100 ns 2.5V VCC < 4.5V 250 ns 1.8V VCC < 2.5V A8 TDIH Data input hold time 50 — ns 4.5V VCC < 5.5V 100 ns 2.5V VCC < 4.5V 250 ns 1.8V VCC < 2.5V A9 TPD Data output delay time — 100 ns 4.5V VCC < 5.5V, CL = 100 pF 250 ns 2.5V VCC < 4.5V, CL = 100 pF 400 ns 1.8V VCC < 2.5V, CL = 100 pF A10 TCZ Data output disable time — 100 ns 4.5V VCC < 5.5V, (Note 1) 200 ns 1.8V VCC < 4.5V, (Note 1) A11 TSV Status valid time — 200 ns 4.5V VCC < 5.5V, CL = 100 pF 300 ns 2.5V VCC < 4.5V, CL = 100 pF 500 ns 1.8V VCC < 2.5V, CL = 100 pF A12 TWC Program cycle time — 5 ms Erase/Write mode (AA and LC versions) A13 TWC — 2 ms Erase/Write mode (93C versions) A14 TEC — 6 ms ERAL mode, 4.5V VCC 5.5V A15 TWL — 15 ms WRAL mode, 4.5V VCC 5.5V A16 — Endurance 1M — cycles 25°C, VCC = 5.0V, (Note 2) Note 1: This parameter is periodically sampled and not 100% tested. 2: This application is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model, which may be obtained from Microchip’s web site at www.microchip.com. DS21797L-page 4  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C FIGURE 1-1: SYNCHRONOUS DATA TIMING VIH CS VIL TCSS TCKH TCKL TCSH VIH CLK VIL TDIS TDIH VIH DI VIL TPD TPD TCZ VOH DO (Read) VOL TCZ TSV DO VOH (Program) Status Valid VOL Note: TSV is relative to CS. TABLE 1-3: INSTRUCTION SET FOR X16 ORGANIZATION (93XX86B OR 93XX86C WITH ORG = 1) Req. CLK Instruction SB Opcode Address Data In Data Out Cycles READ 1 10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D15-D0 29 EWEN 1 00 1 1 X X X X X X X X — HighZ 13 ERASE 1 11 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY) 13 ERAL 1 00 1 0 X X X X X X X X — (RDY/BSY) 13 WRITE 1 01 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D15-D0 (RDY/BSY) 29 WRAL 1 00 0 1 X X X X X X X X D15-D0 (RDY/BSY) 29 EWDS 1 00 0 0 X X X X X X X X — High-Z 13 TABLE 1-4: INSTRUCTION SET FOR X8 ORGANIZATION (93XX86A OR 93XX86C WITH ORG = 0) Req. CLK Instruction SB Opcode Address Data In Data Out Cycles READ 1 10 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D7-D0 22 EWEN 1 00 1 1 X X X X X X X X X — High-Z 14 ERASE 1 11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY) 14 ERAL 1 00 1 0 X X X X X X X X X — (RDY/BSY) 14 WRITE 1 01 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7-D0 (RDY/BSY) 22 WRAL 1 00 0 1 X X X X X X X X X D7-D0 (RDY/BSY) 22 EWDS 1 00 0 0 X X X X X X X X X — High-Z 14  2003-2012 Microchip Technology Inc. DS21797L-page 5

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.0 FUNCTIONAL DESCRIPTION 2.3 Data Protection When the ORG pin (93XX86C) is connected to VCC, All modes of operation are inhibited when VCC is below the (x16) organization is selected. When it is connected a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices to ground, the (x8) organization is selected. Instruc- or 3.8V for ‘93C’ devices. tions, addresses and write data are clocked into the DI The EWEN and EWDS commands give additional pin on the rising edge of the clock (CLK). The DO pin is protection against accidentally programming during normally held in a High-Z state except when reading normal operation. data from the device, or when checking the Ready/ Busy status during a programming operation. The Note: For added protection, an EWDS command Ready/Busy status can be verified during an Erase/ should be performed after every write Write operation by polling the DO pin; DO low indicates operation and an external 10 k pull- that programming is still in progress, while DO high down protection resistor should be added indicates the device is ready. DO will enter the High-Z to the CS pin. state on the falling edge of CS. After power-up the device is automatically in the EWDS mode. Therefore, an EWEN instruction must be 2.1 Start Condition performed before the initial ERASE or WRITE instruction can be executed. The Start bit is detected by the device if CS and DI are both high with respect to the positive edge of CLK for Note: To prevent accidental writes to the array in the first time. the 93XX86C devices, set the PE pin to a logic low. Before a Start condition is detected, CS, CLK and DI may change in any combination (except to that of a Start condition), without resulting in any device Block Diagram operation (Read, Write, Erase, EWEN, EWDS, ERAL or WRAL). As soon as CS is high, the device is no VCC VSS longer in Standby mode. Memory Address An instruction following a Start condition will only be Array Decoder executed if the required opcode, address and data bits for any particular instruction are clocked in. Note: When preparing to transmit an instruction, Address Counter either the CLK or DI signal levels must be at a logic low as CS is toggled active high. DO Output Data Register Buffer 2.2 Data In/Data Out (DI/DO) DI It is possible to connect the Data In and Data Out pins Mode together. However, with this configuration it is possible ORG* Decode for a “bus conflict” to occur during the “dummy zero” CS Logic that precedes the read operation, if A0 is a logic high PE* level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative CLK Clock Register impedances of Data Out and the signal source driving A0. The higher the current sourcing capability of the driver, the higher the voltage at the Data Out pin. In *ORG and PE inputs are not available on order to limit this current, a resistor should be A/B devices. connected between DI and DO. DS21797L-page 6  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.4 Erase The DO pin indicates the Ready/Busy status of the device if CS is brought high after a minimum of 250 ns The ERASE instruction forces all data bits of the low (TCSL). DO at logical ‘0’ indicates that programming specified address to the logical ‘1’ state. The rising is still in progress. DO at logical ‘1’ indicates that the edge of CLK before the last address bit initiates the register at the specified address has been erased and write cycle. the device is ready for another instruction. Note: After the Erase cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. FIGURE 2-1: ERASE TIMING TCSL CS Check Status CLK DI 1 1 1 AN AN-1 AN-2 ••• A0 TSV TCZ High-Z DO Busy Ready High-Z TWC 2.5 Erase All (ERAL) The DO pin indicates the Ready/Busy status of the device, if CS is brought high after a minimum of 250 ns The Erase All (ERAL) instruction will erase the entire low (TCSL). memory array to the logical ‘1’ state. The ERAL cycle is identical to the erase cycle, except for the different Note: After the ERAL command is complete, opcode. The ERAL cycle is completely self-timed. The issuing a Start bit and then taking CS low rising edge of CLK before the last data bit initiates the will clear the Ready/Busy status from DO. write cycle. Clocking of the CLK pin is not necessary VCC must be 4.5V for proper operation of ERAL. after the device has entered the ERAL cycle. FIGURE 2-2: ERAL TIMING TCSL CS Check Status CLK DI 1 0 0 1 0 x ••• x TSV TCZ High-Z DO Busy Ready High-Z TEC  2003-2012 Microchip Technology Inc. DS21797L-page 7

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.6 Erase/Write Disable and Enable Once the EWEN instruction is executed, programming (EWDS/EWEN) remains enabled until an EWDS instruction is executed or VCC is removed from the device. The 93XX86A/B/C powers up in the Erase/Write To protect against accidental data disturbance, the Disable (EWDS) state. All programming modes must be EWDS instruction can be used to disable all Erase/Write preceded by an Erase/Write Enable (EWEN) instruction. functions and should follow all programming operations. Execution of a READ instruction is independent of both the EWEN and EWDS instructions. FIGURE 2-3: EWDS TIMING TCSL CS CLK DI 1 0 0 0 0 x ••• x FIGURE 2-4: EWEN TIMING TCSL CS CLK 1 0 0 1 1 x ••• x DI 2.7 Read The output data bits will toggle on the rising edge of the CLK and are stable after the specified time delay (TPD). The READ instruction outputs the serial data of the Sequential read is possible when CS is held high. The addressed memory location on the DO pin. A dummy memory data will automatically cycle to the next register zero bit precedes the 8-bit (If ORG pin is low or A-Version and output sequentially. devices) or 16-bit (If ORG pin is high or B-version devices) output string. FIGURE 2-5: READ TIMING CS CLK DI 1 1 0 AN ••• A0 High-Z DO 0 Dx ••• D0 Dx ••• D0 Dx ••• D0 DS21797L-page 8  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.8 Write The DO pin indicates the Ready/Busy status of the device, if CS is brought high after a minimum of 250 ns The WRITE instruction is followed by 8 bits (If ORG is low (TCSL). DO at logical ‘0’ indicates that programming low or A-version devices) or 16 bits (If ORG pin is high is still in progress. DO at logical ‘1’ indicates that the or B-version devices) of data which are written into the register at the specified address has been written with specified address. The self-timed auto-erase and the data specified and the device is ready for another programming cycle is initiated by the rising edge of CLK instruction. on the last data bit. Note: The write sequence requires a logic high signal on the PE pin prior to the rising edge of the last data bit. Note: After the Write cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO FIGURE 2-6: WRITE TIMING TCSL CS CLK DI 1 0 1 AN ••• A0 Dx ••• D0 TSV TCZ High-Z DO Busy Ready High-Z TWC  2003-2012 Microchip Technology Inc. DS21797L-page 9

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.9 Write All (WRAL) The DO pin indicates the Ready/Busy status of the device if CS is brought high after a minimum of 250 ns The Write All (WRAL) instruction will write the entire low (TCSL). memory array with the data specified in the command. The self-timed auto-erase and programming cycle is Note: The write sequence requires a logic high initiated by the rising edge of CLK on the last data bit. signal on the PE pin prior to the rising Clocking of the CLK pin is not necessary after the edge of the last data bit. device has entered the WRAL cycle. The WRAL command does include an automatic ERAL cycle for the device. Therefore, the WRAL instruction does not Note: After the Write All cycle is complete, require an ERAL instruction, but the chip must be in the issuing a Start bit and then taking CS low EWEN status. will clear the Ready/Busy status from DO. VCC must be 4.5V for proper operation of WRAL. FIGURE 2-7: WRAL TIMING TCSL CS CLK DI 1 0 0 0 1 x ••• x Dx ••• D0 TSV TCZ High-Z DO Busy Ready HIGH-Z TWL DS21797L-page 10  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 3.0 PIN DESCRIPTIONS TABLE 3-1: PIN DESCRIPTIONS Name PDIP SOIC TSSOP MSOP DFN(1) TDFN(1) SOT-23 Function CS 1 1 1 1 1 1 5 Chip Select CLK 2 2 2 2 2 2 4 Serial Clock DI 3 3 3 3 3 3 3 Data In DO 4 4 4 4 4 4 1 Data Out VSS 5 5 5 5 5 5 2 Ground ORG 6 6 6 6 6 6 — Organization/93XX86C only PE 7 7 7 7 7 7 — Program Enable/93XX86C only VCC 8 8 8 8 8 8 6 Power Supply Note 1: The exposed pad on the DFN/TDFN package may be connected to Vss or left floating. 3.1 Chip Select (CS) 3.3 Data In (DI) A high level selects the device; a low level deselects Data In (DI) is used to clock in a Start bit, opcode, the device and forces it into Standby mode. However, a address and data, synchronously with the CLK input. programming cycle which is already in progress will be completed, regardless of the Chip Select (CS) input 3.4 Data Out (DO) signal. If CS is brought low during a program cycle, the device will go into Standby mode as soon as the Data Out (DO) is used in the Read mode to output data programming cycle is completed. synchronously with the CLK input (TPD after the positive edge of CLK). CS must be low for 250 ns minimum (TCSL) between consecutive instructions. If CS is low, the internal This pin also provides Ready/Busy status information control logic is held in a Reset status. during erase and write cycles. Ready/Busy status information is available on the DO pin if CS is brought 3.2 Serial Clock (CLK) high after being low for minimum Chip Select low time (TCSL), and an erase or write operation has been The Serial Clock is used to synchronize the communi- initiated. cation between a master device and the 93XX series The Status signal is not available on DO if CS is held device. Opcodes, address and data bits are clocked in low during the entire erase or write cycle. In this case, on the positive edge of CLK. Data bits are also clocked DO is in the High-Z mode. If status is checked after the out on the positive edge of CLK. erase/write cycle, the data line will be high to indicate CLK can be stopped anywhere in the transmission the device is ready. sequence (at high or low level) and can be continued Note: After a programming cycle is complete, anytime with respect to clock high time (TCKH) and issuing a Start bit and then taking CS low clock low time (TCKL). This gives the controlling master will clear the Ready/Busy status from DO. freedom in preparing opcode, address and data. CLK is a “don't care” if CS is low (device deselected). If 3.5 Organization (ORG) CS is high, but the Start condition has not been detected (DI = 0), any number of clock cycles can be When the ORG pin is connected to VCC or logic high, received by the device without changing its status (i.e., the (x16) memory organization is selected. When the waiting for a Start condition). ORG pin is tied to VSS or logic low, the (x8) memory CLK cycles are not required during the self-timed write organization is selected. For proper operation, ORG (i.e., auto erase/write) cycle. must be tied to a valid logic level. After detection of a Start condition the specified number 93XX86A devices are always (x8) organization and of clock cycles (respectively low-to-high transitions of 93XX86B devices are always (x16) organization. CLK) must be provided. These clock cycles are required to clock in all required opcode, address and data bits before an instruction is executed. CLK and DI then become “don't care” inputs waiting for a new Start condition to be detected.  2003-2012 Microchip Technology Inc. DS21797L-page 11

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 3.6 Program Enable (PE) This pin allows the user to enable or disable the ability to write data to the memory array. If the PE pin is tied to VCC, the device can be programmed. If the PE pin is tied to VSS, programming will be inhibited. This pin cannot be floated, it must be tied to VCC or VSS. PE is not available on 93XX86A or 93XX86B. On those devices, programming is always enabled. DS21797L-page 12  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 8-Lead MSOP (150 mil) Example: XXXXXXT 3L86CI YWWNNN 5281L7 6-Lead SOT-23 Example: XXNN 5EL7 8-Lead PDIP Example: XXXXXXXX 93LC86C T/XXXNNN I/P e 3 1L7 YYWW 0528 8-Lead SOIC Example: XXXXXXXT 93LC86CI XXXXYYWW SN e 3 0528 NNN 1L7 8-Lead TSSOP Example: XXXX L86C TYWW I528 NNN 1L7 8-Lead 2x3 DFN Example: XXX 3E4 YWW 528 NN L7 8-Lead 2x3 TDFN Example: XXX EE4 YWW 528 NN L7  2003-2012 Microchip Technology Inc. DS21797L-page 13

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 1st Line Marking Codes Part Number SOT-23 DFN TDFN TSSOP MSOP I Temp. E Temp. I Temp. E Temp. I Temp. E Temp. 93AA86A A86A 3A86AT 5BNN — — — — — 93AA86B A86B 3A86BT 5LNN — — — — — 93AA86C A86C 3A86CT — — 3E1 — EE1 — 93LC86A L86A 3L86AT 5ENN 5FNN — — — — 93LC86B L86B 3L86BT 5PNN 5RNN — — — — 93LC86C L86C 3L86CT — — 3E4 — EE4 EE5 93C86A C86A 3C86AT 5HNN 5JNN — — — — 93C86B C86B 3C86BT 5TNN 5UNN — — — — 93C86C C86C 3C86CT — — 3E7 — EE7 EE8 Note: T = Temperature grade (I, E) NN = Alphanumeric traceability code Legend: XX...X Part number or part number code T Temperature (I, E) Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) e3 Pb-free JEDEC designator for Matte Tin (Sn) Note: For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS21797L-page 14  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging  2003-2012 Microchip Technology Inc. DS21797L-page 15

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging DS21797L-page 16  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2003-2012 Microchip Technology Inc. DS21797L-page 17

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:20)(cid:21)(cid:6)(cid:19)(cid:11)(cid:13)(cid:11)(cid:12)(cid:22)(cid:21)(cid:8)(cid:23)(cid:17)(cid:20)(cid:24)(cid:8)(cid:25)(cid:15)(cid:17)(cid:20)(cid:3)(cid:26)(cid:27)(cid:28) (cid:29)(cid:22)(cid:12)(cid:5)(cid:30) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) b N 4 E E1 PIN1IDBY LASERMARK 1 2 3 e e1 D A A2 c φ L A1 L1 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 9 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)(cid:24)((cid:2))(cid:22)* 6$# (cid:7)!(cid:14)(cid:2)4(cid:14)(cid:28)!(cid:2)1(cid:7)#(cid:8)(cid:11) (cid:14)(cid:30) (cid:30)(cid:20)(cid:24)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20)(cid:24)(cid:4) ; (cid:30)(cid:20)(cid:23)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:4)(cid:20)<(cid:24) ; (cid:30)(cid:20)(cid:29)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) ; (cid:4)(cid:20)(cid:30)( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:3)(cid:20)(cid:3)(cid:4) ; (cid:29)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:30)(cid:20)(cid:29)(cid:4) ; (cid:30)(cid:20)<(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:3)(cid:20)(cid:5)(cid:4) ; (cid:29)(cid:20)(cid:30)(cid:4) .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:30)(cid:4) ; (cid:4)(cid:20)9(cid:4) .(cid:10)(cid:10)#(cid:12)(cid:9)(cid:7)(cid:15)# 4(cid:30) (cid:4)(cid:20)(cid:29)( ; (cid:4)(cid:20)<(cid:4) .(cid:10)(cid:10)#(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> ; (cid:29)(cid:4)> 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:4)< ; (cid:4)(cid:20)(cid:3)9 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:3)(cid:4) ; (cid:4)(cid:20)((cid:30) (cid:29)(cid:22)(cid:12)(cid:5)(cid:11)(cid:30) (cid:30)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:3)<) DS21797L-page 18  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2003-2012 Microchip Technology Inc. DS21797L-page 19

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C (cid:31)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8) (cid:18)(cid:6)(cid:10)(cid:8)!(cid:19)(cid:3)(cid:4)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:9)(cid:24)(cid:8)"(cid:8)(cid:27)##(cid:8)(cid:16)(cid:13)(cid:10)(cid:8)$(cid:22)(cid:7)%(cid:8)(cid:25)(cid:9) !(cid:9)(cid:28) (cid:29)(cid:22)(cid:12)(cid:5)(cid:30) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) N NOTE1 E1 1 2 3 D E A A2 L A1 c e eB b1 b 3(cid:15)(cid:7)# (cid:19)5*:"(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 < 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:20)(cid:30)(cid:4)(cid:4)(cid:2))(cid:22)* (cid:13)(cid:10)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25) ; ; (cid:20)(cid:3)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)(cid:24)( )(cid:28) (cid:14)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) (cid:25)(cid:30) (cid:20)(cid:4)(cid:30)( ; ; (cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:11)(cid:10)$(cid:16)!(cid:14)(cid:9)(cid:2)=(cid:7)!#(cid:11) " (cid:20)(cid:3)(cid:24)(cid:4) (cid:20)(cid:29)(cid:30)(cid:4) (cid:20)(cid:29)(cid:3)( (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:20)(cid:3)(cid:23)(cid:4) (cid:20)(cid:3)((cid:4) (cid:20)(cid:3)<(cid:4) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:20)(cid:29)(cid:23)< (cid:20)(cid:29)9( (cid:20)(cid:23)(cid:4)(cid:4) (cid:13)(cid:7)(cid:12)(cid:2)#(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)#(cid:7)(cid:15)(cid:17)(cid:2)1(cid:16)(cid:28)(cid:15)(cid:14) 4 (cid:20)(cid:30)(cid:30)( (cid:20)(cid:30)(cid:29)(cid:4) (cid:20)(cid:30)((cid:4) 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:20)(cid:4)(cid:4)< (cid:20)(cid:4)(cid:30)(cid:4) (cid:20)(cid:4)(cid:30)( 3(cid:12)(cid:12)(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8(cid:30) (cid:20)(cid:4)(cid:23)(cid:4) (cid:20)(cid:4)9(cid:4) (cid:20)(cid:4)(cid:5)(cid:4) 4(cid:10)-(cid:14)(cid:9)(cid:2)4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:20)(cid:4)(cid:30)(cid:23) (cid:20)(cid:4)(cid:30)< (cid:20)(cid:4)(cid:3)(cid:3) 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)(cid:26)(cid:10)-(cid:2)(cid:22)(cid:12)(cid:28)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:2)? (cid:14)) ; ; (cid:20)(cid:23)(cid:29)(cid:4) (cid:29)(cid:22)(cid:12)(cid:5)(cid:11)(cid:30) (cid:30)(cid:20) 1(cid:7)(cid:15)(cid:2)(cid:30)(cid:2),(cid:7) $(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)!(cid:14)&(cid:2)%(cid:14)(cid:28)#$(cid:9)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2),(cid:28)(cid:9)(cid:18)0(cid:2)8$#(cid:2)(cid:31)$ #(cid:2)8(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)-(cid:7)#(cid:11)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)#(cid:8)(cid:11)(cid:14)!(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) ?(cid:2)(cid:22)(cid:7)(cid:17)(cid:15)(cid:7)%(cid:7)(cid:8)(cid:28)(cid:15)#(cid:2)*(cid:11)(cid:28)(cid:9)(cid:28)(cid:8)#(cid:14)(cid:9)(cid:7) #(cid:7)(cid:8)(cid:20) (cid:29)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:20)(cid:4)(cid:30)(cid:4)@(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+(cid:2))(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)(cid:30)<) DS21797L-page 20  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2003-2012 Microchip Technology Inc. DS21797L-page 21

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21797L-page 22  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C (cid:31)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:15)(cid:29)(cid:24)(cid:8)"(cid:8)(cid:29)(cid:6)(cid:21)(cid:21)(cid:22)&’(cid:8)(cid:27)()#(cid:8)(cid:16)(cid:16)(cid:8)$(cid:22)(cid:7)%(cid:8)(cid:25)(cid:15)(cid:17)!*(cid:28) (cid:29)(cid:22)(cid:12)(cid:5)(cid:30) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)  2003-2012 Microchip Technology Inc. DS21797L-page 23

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C (cid:31)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:20)+(cid:13)(cid:19)(cid:8)(cid:15)+(cid:21)(cid:13)(cid:19),(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:10)(cid:8)(cid:17)(cid:18)(cid:12)(cid:10)(cid:13)(cid:19)(cid:5)(cid:8)(cid:23)(cid:15)(cid:20)(cid:24)(cid:8)"(cid:8)-(-(cid:8)(cid:16)(cid:16)(cid:8)$(cid:22)(cid:7)%(cid:8)(cid:25)(cid:20)(cid:15)(cid:15)(cid:17)(cid:9)(cid:28) (cid:29)(cid:22)(cid:12)(cid:5)(cid:30) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D N E E1 NOTE1 1 2 b e c φ A A2 A1 L1 L 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 < 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)9((cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) ; ; (cid:30)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:3) (cid:4)(cid:20)<(cid:4) (cid:30)(cid:20)(cid:4)(cid:4) (cid:30)(cid:20)(cid:4)( (cid:22)#(cid:28)(cid:15)!(cid:10)%%(cid:2) (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)( ; (cid:4)(cid:20)(cid:30)( 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " 9(cid:20)(cid:23)(cid:4)(cid:2))(cid:22)* (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)=(cid:7)!#(cid:11) "(cid:30) (cid:23)(cid:20)(cid:29)(cid:4) (cid:23)(cid:20)(cid:23)(cid:4) (cid:23)(cid:20)((cid:4) (cid:6)(cid:10)(cid:16)!(cid:14)!(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:3)(cid:20)(cid:24)(cid:4) (cid:29)(cid:20)(cid:4)(cid:4) (cid:29)(cid:20)(cid:30)(cid:4) .(cid:10)(cid:10)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:23)( (cid:4)(cid:20)9(cid:4) (cid:4)(cid:20)(cid:5)( .(cid:10)(cid:10)#(cid:12)(cid:9)(cid:7)(cid:15)# 4(cid:30) (cid:30)(cid:20)(cid:4)(cid:4)(cid:2)(cid:26)". .(cid:10)(cid:10)#(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)> ; <> 4(cid:14)(cid:28)!(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:8) (cid:4)(cid:20)(cid:4)(cid:24) ; (cid:4)(cid:20)(cid:3)(cid:4) 4(cid:14)(cid:28)!(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:30)(cid:24) ; (cid:4)(cid:20)(cid:29)(cid:4) (cid:29)(cid:22)(cid:12)(cid:5)(cid:11)(cid:30) (cid:30)(cid:20) 1(cid:7)(cid:15)(cid:2)(cid:30)(cid:2),(cid:7) $(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)!(cid:14)&(cid:2)%(cid:14)(cid:28)#$(cid:9)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2),(cid:28)(cid:9)(cid:18)0(cid:2)8$#(cid:2)(cid:31)$ #(cid:2)8(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)-(cid:7)#(cid:11)(cid:7)(cid:15)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)#(cid:8)(cid:11)(cid:14)!(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15) (cid:2)(cid:21)(cid:2)(cid:28)(cid:15)!(cid:2)"(cid:30)(cid:2)!(cid:10)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)$!(cid:14)(cid:2)(cid:31)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:20)(cid:2)(cid:6)(cid:10)(cid:16)!(cid:2)%(cid:16)(cid:28) (cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)#(cid:9)$ (cid:7)(cid:10)(cid:15) (cid:2) (cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)#(cid:2)(cid:14)&(cid:8)(cid:14)(cid:14)!(cid:2)(cid:4)(cid:20)(cid:30)((cid:2)(cid:31)(cid:31)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2) (cid:7)!(cid:14)(cid:20) (cid:29)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:26)".+ (cid:26)(cid:14)%(cid:14)(cid:9)(cid:14)(cid:15)(cid:8)(cid:14)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)0(cid:2)$ $(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)0(cid:2)%(cid:10)(cid:9)(cid:2)(cid:7)(cid:15)%(cid:10)(cid:9)(cid:31)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:12)$(cid:9)(cid:12)(cid:10) (cid:14) (cid:2)(cid:10)(cid:15)(cid:16)(cid:18)(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:4)<9) DS21797L-page 24  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2003-2012 Microchip Technology Inc. DS21797L-page 25

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C (cid:31)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8) (cid:18)(cid:6)(cid:10)(cid:8).(cid:10)(cid:6)(cid:12)’(cid:8)(cid:29)(cid:22)(cid:8)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:6)(cid:14),(cid:6)/(cid:5)(cid:8)(cid:23)0*(cid:24)(cid:8)"(cid:8)(cid:26)1(cid:27)1#()(cid:8)(cid:16)(cid:16)(cid:8)$(cid:22)(cid:7)%(cid:8)(cid:25) .(cid:29)(cid:28) (cid:29)(cid:22)(cid:12)(cid:5)(cid:30) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D e b N N L K E E2 EXPOSEDPAD NOTE1 NOTE1 1 2 2 1 D2 TOPVIEW BOTTOMVIEW A NOTE2 A3 A1 3(cid:15)(cid:7)# (cid:6)(cid:19)44(cid:19)(cid:6)"(cid:13)"(cid:26)(cid:22) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:2)4(cid:7)(cid:31)(cid:7)# (cid:6)(cid:19)5 56(cid:6) (cid:6)(cid:25)7 5$(cid:31)8(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)1(cid:7)(cid:15) 5 < 1(cid:7)#(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)((cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2):(cid:14)(cid:7)(cid:17)(cid:11)# (cid:25) (cid:4)(cid:20)<(cid:4) (cid:4)(cid:20)(cid:24)(cid:4) (cid:30)(cid:20)(cid:4)(cid:4) (cid:22)#(cid:28)(cid:15)!(cid:10)%%(cid:2) (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) (cid:4)(cid:20)(cid:4)(cid:3) (cid:4)(cid:20)(cid:4)( *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)/(cid:15)(cid:14) (cid:25)(cid:29) (cid:4)(cid:20)(cid:3)(cid:4)(cid:2)(cid:26)". 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21) (cid:3)(cid:20)(cid:4)(cid:4)(cid:2))(cid:22)* 6,(cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)=(cid:7)!#(cid:11) " (cid:29)(cid:20)(cid:4)(cid:4)(cid:2))(cid:22)* "&(cid:12)(cid:10) (cid:14)!(cid:2)1(cid:28)!(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) (cid:21)(cid:3) (cid:30)(cid:20)(cid:29)(cid:4) ; (cid:30)(cid:20)(( "&(cid:12)(cid:10) (cid:14)!(cid:2)1(cid:28)!(cid:2)=(cid:7)!#(cid:11) "(cid:3) (cid:30)(cid:20)((cid:4) ; (cid:30)(cid:20)(cid:5)( *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:2)=(cid:7)!#(cid:11) 8 (cid:4)(cid:20)(cid:3)(cid:4) (cid:4)(cid:20)(cid:3)( (cid:4)(cid:20)(cid:29)(cid:4) *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:2)4(cid:14)(cid:15)(cid:17)#(cid:11) 4 (cid:4)(cid:20)(cid:29)(cid:4) (cid:4)(cid:20)(cid:23)(cid:4) (cid:4)(cid:20)((cid:4) *(cid:10)(cid:15)#(cid:28)(cid:8)#(cid:27)#(cid:10)(cid:27)"&(cid:12)(cid:10) (cid:14)!(cid:2)1(cid:28)! U (cid:4)(cid:20)(cid:3)(cid:4) ; ; (cid:29)(cid:22)(cid:12)(cid:5)(cid:11)(cid:30) (cid:30)(cid:20) 1(cid:7)(cid:15)(cid:2)(cid:30)(cid:2),(cid:7) $(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)!(cid:14)&(cid:2)%(cid:14)(cid:28)#$(cid:9)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2),(cid:28)(cid:9)(cid:18)0(cid:2)8$#(cid:2)(cid:31)$ #(cid:2)8(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)-(cid:7)#(cid:11)(cid:7)(cid:15)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)#(cid:8)(cid:11)(cid:14)!(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) 1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:31)(cid:28)(cid:18)(cid:2)(cid:11)(cid:28),(cid:14)(cid:2)(cid:10)(cid:15)(cid:14)(cid:2)(cid:10)(cid:9)(cid:2)(cid:31)(cid:10)(cid:9)(cid:14)(cid:2)(cid:14)&(cid:12)(cid:10) (cid:14)!(cid:2)#(cid:7)(cid:14)(cid:2)8(cid:28)(cid:9) (cid:2)(cid:28)#(cid:2)(cid:14)(cid:15)! (cid:20) (cid:29)(cid:20) 1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)(cid:7) (cid:2) (cid:28)-(cid:2) (cid:7)(cid:15)(cid:17)$(cid:16)(cid:28)#(cid:14)!(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)!(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6)"(cid:2)’(cid:30)(cid:23)(cid:20)((cid:6)(cid:20) )(cid:22)*+ )(cid:28) (cid:7)(cid:8)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)#(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)&(cid:28)(cid:8)#(cid:2),(cid:28)(cid:16)$(cid:14)(cid:2) (cid:11)(cid:10)-(cid:15)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14) (cid:20) (cid:26)".+ (cid:26)(cid:14)%(cid:14)(cid:9)(cid:14)(cid:15)(cid:8)(cid:14)(cid:2)(cid:21)(cid:7)(cid:31)(cid:14)(cid:15) (cid:7)(cid:10)(cid:15)0(cid:2)$ $(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)-(cid:7)#(cid:11)(cid:10)$#(cid:2)#(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)0(cid:2)%(cid:10)(cid:9)(cid:2)(cid:7)(cid:15)%(cid:10)(cid:9)(cid:31)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:12)$(cid:9)(cid:12)(cid:10) (cid:14) (cid:2)(cid:10)(cid:15)(cid:16)(cid:18)(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17)*(cid:4)(cid:23)(cid:27)(cid:30)(cid:3)(cid:29)* DS21797L-page 26  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2003-2012 Microchip Technology Inc. DS21797L-page 27

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21797L-page 28  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2003-2012 Microchip Technology Inc. DS21797L-page 29

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C (cid:31)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8) (cid:18)(cid:6)(cid:10)(cid:8).(cid:10)(cid:6)(cid:12)’(cid:8)(cid:29)(cid:22)(cid:8)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:6)(cid:14),(cid:6)/(cid:5)(cid:8)(cid:23)0(cid:29)(cid:24)(cid:8)"(cid:8)(cid:26)1(cid:27)1#(23(cid:8)(cid:16)(cid:16)(cid:8)$(cid:22)(cid:7)%(cid:8)(cid:25)(cid:20) .(cid:29)(cid:28) (cid:29)(cid:22)(cid:12)(cid:5)(cid:30) .(cid:10)(cid:9)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:31)(cid:10) #(cid:2)(cid:8)$(cid:9)(cid:9)(cid:14)(cid:15)#(cid:2)(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:14)(cid:2)!(cid:9)(cid:28)-(cid:7)(cid:15)(cid:17) 0(cid:2)(cid:12)(cid:16)(cid:14)(cid:28) (cid:14)(cid:2) (cid:14)(cid:14)(cid:2)#(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)1(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)#(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)#(cid:14)!(cid:2)(cid:28)#(cid:2) (cid:11)##(cid:12)+22---(cid:20)(cid:31)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)(cid:31)2(cid:12)(cid:28)(cid:8)/(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) DS21797L-page 30  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C APPENDIX A: REVISION HISTORY Revision A (5/2003) Initial Release. Revision B (7/2003) Revised DC Char. Param. D8; Revised Figures 2.1, 2.2, 2.6, 2.7; Revised Section 3.6; Revised Product ID System. Revision C (12/2003) Corrections to Section 1.0, Electrical Characteristics. Section 4.1, 6-Lead SOT-23 package to OT. Revision D (2/2004) Corrections to Device Selection Table, Table 1-1, Table 1-2, Section 2.4, Section 2.5, Section 2.8 and Section 2.9. Added note to Figure 2-7. Revision E (3/2005) Added DFN package. Revision F (4/2005) Added notes throughout. Revision G (1/2006) Revised note in Sections 2.8 and 2.9. Replaced DFN package drawing. Revision H (10/2007) Added SN package to Device Selection Table; Revised Pin Function Table; Revised Package Types; Revised Table 3-1; Replaced Package Drawings; Revised Product ID System. Revision J (5/2008) Revised Figures 2-1, 2-2, 2-6 and 2-7; Revised Package Marking Information; Replaced Package Drawings. Revision K (1/2012) Added TDFN package; Revised Product ID System. Revision L (04/2012) Revised Device Selection Table; Added Note 1 to Package Types Diagram; Revised Marking Code table; Revised Product ID System.  2003-2012 Microchip Technology Inc. DS21797L-page 31

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C NOTES: DS21797L-page 32  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at Users of Microchip products can receive assistance www.microchip.com. This web site is used as a means through several channels: to make files and information easily available to • Distributor or Representative customers. Accessible by using your favorite Internet • Local Sales Office browser, the web site contains the following • Field Application Engineer (FAE) information: • Technical Support • Product Support – Data sheets and errata, • Development Systems Information Line application notes and sample programs, design resources, user’s guides and hardware support Customers should contact their distributor, documents, latest software releases and archived representative or field application engineer (FAE) for software support. Local sales offices are also available to help • General Technical Support – Frequently Asked customers. A listing of sales offices and locations is Questions (FAQ), technical support requests, included in the back of this document. online discussion groups, Microchip consultant Technical support is available through the web site program member listing at: http://microchip.com/support • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.  2003-2012 Microchip Technology Inc. DS21797L-page 33

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480)792-4150. Please list the following information, and use this outline to provide us with your comments about this document. TO: Technical Publications Manager Total Pages Sent ________ RE: Reader Response From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: 93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Literature Number: DS21797L Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21797L-page 34  2003-2012 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X X /XX Examples: a) 93AA86C-I/P: 16K, 2048x8 or 1024x16 Serial Device Tape & Reel Temperature Package EEPROM, PDIP package, 1.8V Range b) 93AA86AT-I/OT: 16K, 2048x8 Serial EEPROM, SOT-23 package, tape and reel, 1.8V Device: 93AA86A: 16K 1.8V Microwire Serial EEPROM (x8) c) 93AA86CT-I/MS: 16K, 2048x8 or 1024x16 93AA86B: 16K 1.8V Microwire Serial EEPROM (x16) Serial EEPROM, MSOP package, tape and 93AA86C: 16K 1.8V Microwire Serial EEPROM w/ORG reel, 1.8V 93LC86A: 16K 2.5V Microwire Serial EEPROM (x8) 93LC86B: 16K 2.5V Microwire Serial EEPROM (x16) a) 93LC86C-I/ST: 16K, 2048x8, 1024x16 Serial 93LC86C: 16K 2.5V Microwire Serial EEPROM w/ORG EEPROM, TSSOP package, 2.5V b) 93LC86BT-I/OT: 16K, 1024x16 Serial 93C86A: 16K 5.0V Microwire Serial EEPROM (x8) EEPROM, SOT-23 package, tape and reel, 93C86B: 16K 5.0V Microwire Serial EEPROM (x16) 2.5V 93C86C: 16K 5.0V Microwire Serial EEPROM w/ORG c) 93LC86CT-E/MNY: 16K, 2048x8 or 1024x16 Serial EEPROM, Automotive temp, TDFN package, tape and reel, 2.5V Tape & Reel: Blank = Standard packaging a) 93C86C-I/MS: 16K, 2048x8 or 1024x16 Serial T = Tape & Reel EEPROM, MSOP package, 5.0V b) 93C86AT-I/OT: 16K, 2048x8 Serial EEPROM, SOT-23 package, tape and reel, 5.0V Temperature Range: I = -40°C to +85°C E = -40°C to +125°C Package: MS = Plastic MSOP (Micro Small outline, 8-lead) OT = Plastic SOT-23, 6-lead (Tape & Reel only) P = Plastic DIP (300 mil body), 8-lead SN = Plastic SOIC (3.90 mm body), 8-lead ST = Plastic TSSOP (4.4 mm body), 8-lead MC = Plastic DFN (2x3x0.90 mm body), 8-lead MNY(1)= Plastic TDFN (2x3x0.75 mm body), 8-lead (Tape & Reel only) Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish.  2003-2012 Microchip Technology Inc. DS21797L-page 35

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C NOTES: DS21797L-page 36  2003-2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT, devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC, intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620762165 QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures == ISO/TS 16949 == are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2012 Microchip Technology Inc. DS21797L-page 37

Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office Asia Pacific Office India - Bangalore Austria - Wels 2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 91-80-3090-4444 Tel: 43-7242-2244-39 Chandler, AZ 85224-6199 Tower 6, The Gateway Fax: 91-80-3090-4123 Fax: 43-7242-2244-393 Tel: 480-792-7200 Harbour City, Kowloon India - New Delhi Denmark - Copenhagen Fax: 480-792-7277 Hong Kong Tel: 91-11-4160-8631 Tel: 45-4450-2828 Technical Support: Tel: 852-2401-1200 Fax: 91-11-4160-8632 Fax: 45-4485-2829 http://www.microchip.com/ support Fax: 852-2401-3431 India - Pune France - Paris Web Address: Australia - Sydney Tel: 91-20-2566-1512 Tel: 33-1-69-53-63-20 www.microchip.com Tel: 61-2-9868-6733 Fax: 91-20-2566-1513 Fax: 33-1-69-30-90-79 Atlanta Fax: 61-2-9868-6755 Japan - Osaka Germany - Munich Duluth, GA China - Beijing Tel: 81-66-152-7160 Tel: 49-89-627-144-0 Tel: 86-10-8569-7000 Fax: 49-89-627-144-44 Tel: 678-957-9614 Fax: 81-66-152-9310 Fax: 678-957-1455 Fax: 86-10-8528-2104 Japan - Yokohama Italy - Milan China - Chengdu Tel: 39-0331-742611 Boston Tel: 81-45-471- 6166 Tel: 86-28-8665-5511 Fax: 39-0331-466781 Westborough, MA Fax: 81-45-471-6122 Tel: 774-760-0087 Fax: 86-28-8665-7889 Korea - Daegu Netherlands - Drunen Fax: 774-760-0088 China - Chongqing Tel: 82-53-744-4301 Tel: 31-416-690399 Chicago Tel: 86-23-8980-9588 Fax: 82-53-744-4302 Fax: 31-416-690340 Itasca, IL Fax: 86-23-8980-9500 Korea - Seoul Spain - Madrid Tel: 630-285-0071 China - Hangzhou Tel: 82-2-554-7200 Tel: 34-91-708-08-90 Fax: 630-285-0075 Tel: 86-571-2819-3187 Fax: 82-2-558-5932 or Fax: 34-91-708-08-91 Cleveland Fax: 86-571-2819-3189 82-2-558-5934 UK - Wokingham Independence, OH China - Hong Kong SAR Malaysia - Kuala Lumpur Tel: 44-118-921-5869 Tel: 216-447-0464 Tel: 852-2401-1200 Tel: 60-3-6201-9857 Fax: 44-118-921-5820 Fax: 216-447-0643 Fax: 852-2401-3431 Fax: 60-3-6201-9859 Dallas China - Nanjing Malaysia - Penang Addison, TX Tel: 86-25-8473-2460 Tel: 60-4-227-8870 Tel: 972-818-7423 Fax: 86-25-8473-2470 Fax: 60-4-227-4068 Fax: 972-818-2924 China - Qingdao Philippines - Manila Detroit Tel: 86-532-8502-7355 Tel: 63-2-634-9065 Farmington Hills, MI Fax: 86-532-8502-7205 Fax: 63-2-634-9069 Tel: 248-538-2250 Fax: 248-538-2260 China - Shanghai Singapore Tel: 86-21-5407-5533 Tel: 65-6334-8870 Indianapolis Fax: 86-21-5407-5066 Fax: 65-6334-8850 Noblesville, IN Tel: 317-773-8323 China - Shenyang Taiwan - Hsin Chu Fax: 317-773-5453 Tel: 86-24-2334-2829 Tel: 886-3-5778-366 Fax: 86-24-2334-2393 Fax: 886-3-5770-955 Los Angeles Mission Viejo, CA China - Shenzhen Taiwan - Kaohsiung Tel: 949-462-9523 Tel: 86-755-8203-2660 Tel: 886-7-536-4818 Fax: 949-462-9608 Fax: 86-755-8203-1760 Fax: 886-7-330-9305 Santa Clara China - Wuhan Taiwan - Taipei Santa Clara, CA Tel: 86-27-5980-5300 Tel: 886-2-2500-6610 Tel: 408-961-6444 Fax: 86-27-5980-5118 Fax: 886-2-2508-0102 Fax: 408-961-6445 China - Xian Thailand - Bangkok Toronto Tel: 86-29-8833-7252 Tel: 66-2-694-1351 Mississauga, Ontario, Fax: 86-29-8833-7256 Fax: 66-2-694-1350 Canada China - Xiamen Tel: 905-673-0699 Tel: 86-592-2388138 Fax: 905-673-6509 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 11/29/11 Fax: 86-756-3210049 DS21797L-page 38  2003-2012 Microchip Technology Inc.

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: 93AA86C-I/SN 93AA86AT-I/MS 93AA86AT-I/ST 93AA86BT-I/MS 93AA86BT-I/ST 93C86AT-E/MS 93C86AT-E/SN 93C86AT-E/ST 93C86AT-I/MS 93C86AT-I/SN 93C86AT-I/ST 93C86BT-E/MS 93C86BT-E/SN 93C86BT-E/ST 93C86BT-I/MS 93C86BT-I/SN 93C86BT-I/ST 93LC86AT-E/MS 93LC86AT-E/ST 93LC86AT-I/MS 93LC86AT-I/ST 93LC86BT-E/MS 93LC86BT-E/ST 93LC86BT-I/MS 93LC86BT-I/ST 93AA86CT-I/MNY 93C86CT-I/MNY 93LC86CT- I/MNY 93C86CT-E/MNY 93LC86CT-E/MNY