Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

7 4 March 1993 V Revised May 2005 H C 5 7 4 74VHC574 O c Octal D-Type Flip-Flop with 3-STATE Outputs t a l D General Description cuit prevents device destruction due to mismatched supply - T and input voltages. y The VHC574 is an advanced high speed CMOS octal flip- p flop with 3-STATE output fabricated with silicon gate CMOS Features e technology. It achieves the high speed operation similar to F equivalent Bipolar Schottky TTL while maintaining the (cid:1) High Speed: tPD 5.6 ns (typ) at VCC 5V lip CcoMnOtroSl lelodw b yp oaw celor cdki sinspipuatt i(oCnP. )T ahnisd 8a-nb iot uDtp-tuytp een aflibpl-ef loinpp uist (cid:1) High Noise Immunity: VNIH VNIL 28% VCC (Min) -F (OE). When the OE input is HIGH, the eight outputs are in (cid:1) Power Down Protection is provided on all inputs lo a high impedance state. (cid:1) Low Noise: VOLP 0.6V (typ) p w Aapnp ilniepdu tt op trhoete icntpiount pciinrcsu wit itehnosuutr eresg tahradt to0 Vth teo s7uVp pclya nv oblte- (cid:1)(cid:1) LPoinw a Pnodw Feurn Dctiisosnip Catoiomnp: aICtibCl e w4 iPthA 7 (4MHaCx5) 7@4 TA 25qC ith age. This device can be used to interface 5V to 3V systems 3 and two supply systems such as battery back up. This cir- - S T A Ordering Code: T E O Order Number Package Number Package Description u 74VHC574M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide t p 74VHC574SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide u t 74VHC574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide s 74VHC574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description D0–D7 Data Inputs CP Clock Pulse Input OE 3-STATE Output Enable Input O0–O7 3-STATE Outputs © 2005 Fairchild Semiconductor Corporation DS011565 www.fairchildsemi.com

4 7 Functional Description Truth Table 5 C The VHC574 consists of eight edge-triggered flip-flops with H individual D-type inputs and 3-STATE true outputs. The Inputs Outputs V 74 baull fffleipre-fdlo cplso.c Tk haen de igbhutff eflripe-dfl oOpust pwuitll Esntoarbel eth aer es tcaotem omf otnh etior Dn CP OE On individual D inputs that meet the setup and hold time H (cid:17) L H requirements on the LOW-to-HIGH Clock (CP) transition. L (cid:17) L L With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When the OE is X X H Z HIGH, the outputs go to the high impedance state. Opera- H HIGH Voltage Level tion of the OE input does not affect the state of the flip- L LOW Voltage Level flops. X Immaterial Z High Impedance (cid:17) LOW-to-HIGH Transition Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2

7 Absolute Maximum Ratings Recommended Operating 4 (Note 1) V Conditions (Note 2) H Supply Voltage (VCC) (cid:16)0.5V to (cid:14)7.0V C DC Input Voltage (VIN) (cid:16)0.5V to (cid:14)7.0V Supply Voltage (VCC) 2.0V to (cid:14)5.5V 57 DC Output Voltage (VOUT) (cid:16)0.5V to VCC (cid:14) 0.5V Input Voltage (VIN) 0V to (cid:14)5.5V 4 Input Diode Current (IIK) (cid:16)20 mA Output Voltage (VOUT) 0V to VCC Output Diode Current r20 mA Operating Temperature (TOPR) (cid:16)40qC to (cid:14)85qC DC Output Current (IOUT) r25 mA Input Rise and Fall Time (tr, tf) DC VCC/GND Current (ICC) r75 mA VCC 3.3V r 0.3V 0 a 100 ns/V Storage Temperature (TSTG) (cid:16)65qC to (cid:14)150qC VCC 5.0V r 0.5V 0 a 20 ns/V Lead Temperature (TL) Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifica- (Soldering, 10 seconds) 260qC tions should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading vari- ables. Fairchild does not recommend operation outside databook specifica- tions. Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC TA 25qC TA (cid:16)40qC to (cid:14)85qC Units Conditions (V) Min Typ Max Min Max VIH HIGH Level 2.0 1.50 1.50 V Input Voltage 3.0 (cid:16) 5.5 0.7 VCC 0.7 VCC VIL LOW Level 2.0 0.50 0.50 V Input Voltage 3.0 (cid:16) 5.5 0.3 VCC 0.3 VCC VOH HIGH Level 2.0 1.9 2.0 1.9 VIN VIH IOH (cid:16)50 PA Output Voltage 3.0 2.9 3.0 2.9 V or VIL 4.5 4.4 4.5 4.4 3.0 2.58 2.48 V IOH (cid:16)4 mA 4.5 3.94 3.80 IOH (cid:16)8 mA VOL LOW Level 2.0 0.0 0.1 0.1 VIN VIH IOL 50 PA Output Voltage 3.0 0.0 0.1 0.1 V or VIL 4.5 0.0 0.1 0.1 3.0 0.36 0.44 V IOL 4 mA 4.5 0.36 0.44 IOL 8 mA IOZ 3-STATE 5.5 r0.25 r2.5 PA VIN VIH or VIL Output Off-State Current VOUT VCC or GND IIN Input Leakage 0 (cid:16) 5.5 r0.1 r1.0 PA VIN 5.5V or GND Current ICC Quiescent Supply 5.5 4.0 40.0 PA VIN VCC or GND Current Noise Characteristics Symbol Parameter VCC TA 25qC Units Conditions (V) Typ Limits VOLP Quiet Output Maximum Dynamic VOL 5.0 1.0 1.2 V CL 50 pF (Note 3) VOLV Quiet Output Minimum Dynamic VOL 5.0 (cid:16)0.8 (cid:16)1.0 V CL 50 pF (Note 3) VIHD Minimum HIGH Level Dynamic Input Voltage 5.0 3.5 V CL 50 pF (Note 3) VILD Maximum LOW Level Dynamic Input Voltage 5.0 1.5 V CL 50 pF (Note 3) Note 3: Parameter guaranteed by design. 3 www.fairchildsemi.com

4 7 AC Electrical Characteristics 5 C VH Symbol Parameter V(VCC) Min TA T y 2p5qC Max TAM i n(cid:16)40qC to M(cid:14)8a5xqC Units Conditions 4 7 tPLH Propagation Delay 3.3 r 0.3 8.5 13.2 1.0 15.5 ns CL 15 pF tPHL Time (CP to On) 11.0 16.7 1.0 19.0 CL 50 pF 5.0 r 0.5 5.6 8.6 1.0 10.0 ns CL 15 pF 7.1 10.6 1.0 12.0 CL 50 pF tPZL 3-STATE Output 3.3 r 0.3 8.2 12.8 1.0 15.0 ns RL 1 k: CL 15 pF tPZH Enable Time 10.7 16.3 1.0 18.5 CL 50 pF 5.0 r 0.5 5.9 9.0 1.0 10.5 ns CL 15 pF 7.4 11.0 1.0 12.5 CL 50 pF tPLZ 3-STATE Output 3.3 r 0.3 11.0 15.0 1.0 17.0 ns RL 1 k: CL 50 pF tPHZ Disable Time 5.0 r 0.5 7.1 10.1 1.0 11.5 CL 50 pF tOSLH Output to 3.3 r 0.3 1.5 1.5 ns (Note 4) CL 50 pF tOSHL Output Skew 5.0 r 0.5 1.0 1.0 CL 50 pF fMAX Maximum Clock 3.3 r 0.3 80 125 65 CL 15 pF Frequency 50 75 45 MHz CL 50 pF 5.0 r 0.5 130 180 110 CL 15 pF 85 115 75 CL 50 pF CIN Input 4 10 10 pF VCC Open Capacitance COUT Output 6 pF VCC 5.0V Capacitance CPD Power Dissipation 28 pF (Note 5) Capacitance Note 4: Parameter guaranteed by design. tOSLH |tPLH max (cid:16) tPLH min|; tOSHL |tPHL max (cid:16) tPHL min| Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) CPD * VCC * fIN (cid:14) ICC/8 (per F/F). The total CPD when n pcs. of the Octal D Flip-Flop operates can be calculated by the equation: CPD (total) 20 (cid:14) 8n. AC Operating Requirements Symbol Parameter VCC TA 25qC TA (cid:16)40qC to (cid:14)85qC Units (V) Min Typ Max Min Max tW(H) Minimum Pulse Width (CP) 3.3 r 0.3 5.0 5.0 ns tW(L) 5.0 r 0.5 5.0 5.0 tS Minimum Set-Up Time 3.3 r 0.3 3.5 3.5 5.0 r 0.5 3.5 3.5 ns tH Minimum Hold Time 3.3 r 0.3 1.5 1.5 5.0 r 0.5 1.5 1.5 www.fairchildsemi.com 4

7 Physical Dimensions 4 inches (millimeters) unless otherwise noted V H C 5 7 4 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com

4 7 Physical Dimensions 5 inches (millimeters) unless otherwise noted (Continued) C H V 4 7 Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6

7 Physical Dimensions 4 inches (millimeters) unless otherwise noted (Continued) V H C 5 7 4 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com

s ut Physical Dimensions inches (millimeters) unless otherwise noted (Continued) p t u O E T A T S - 3 h t i w p o l F - p li F e p y T - D l a t c O 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 4 Package Number N20A 7 5 C H V 4 7 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea- body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support to perform when properly used in accordance with device or system, or to affect its safety or effectiveness. instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the www.fairchildsemi.com user. www.fairchildsemi.com 8

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: 74VHC574N 74VHC574M 74VHC574MTC 74VHC574SJX 74VHC574SJ 74VHC574MX 74VHC574MTCX