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ICGOO电子元器件商城为您提供74VHC573MTCX由Fairchild Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74VHC573MTCX价格参考¥4.23-¥9.35。Fairchild Semiconductor74VHC573MTCX封装/规格:逻辑 - 锁销, D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-TSSOP。您可以下载74VHC573MTCX参考资料、Datasheet数据手册功能说明书,资料中有74VHC573MTCX 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC LATCH OCT DTYPE 3ST 20TSSOP闭锁 Octal D-Type Latch |
产品分类 | |
品牌 | Fairchild Semiconductor |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,闭锁,Fairchild Semiconductor 74VHC573MTCX74VHC |
数据手册 | |
产品型号 | 74VHC573MTCX |
产品目录页面 | |
产品种类 | 闭锁 |
传播延迟时间 | 14.5 ns at 3.3 V, 8.8 ns at 5 V |
供应商器件封装 | 20-TSSOP |
其它名称 | 74VHC573MTCXTR |
包装 | 带卷 (TR) |
单位重量 | 191 mg |
商标 | Fairchild Semiconductor |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 20-TSSOP(0.173",4.40mm 宽) |
封装/箱体 | TSSOP-20 |
工作温度 | -40°C ~ 85°C |
工厂包装数量 | 2500 |
延迟时间-传播 | 4.5ns |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
极性 | Non-Inverting |
标准包装 | 2,500 |
独立电路 | 1 |
电压-电源 | 2 V ~ 5.5 V |
电流-输出高,低 | 8mA,8mA |
电源电压-最大 | 5.5 V |
电源电压-最小 | 2 V |
电路 | 8:8 |
电路数量 | 8 Circuit |
系列 | 74VHC573 |
输入线路数量 | 2 Line |
输出类型 | 三态 |
输出线路数量 | 3 Line |
逻辑类型 | D 型透明锁存器 |
逻辑系列 | 74VHC |
零件号别名 | 74VHC573MTCX_NL |
高电平输出电流 | - 8 mA |
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
7 4 V H C May 2007 5 7 74VHC573 3 tm O Octal D-Type Latch with 3-STATE Outputs c t a l D Features General Description - T y ■ High Speed: tPD = 5.0ns (Typ.) at VCC = 5V The VHC573 is an advanced high speed CMOS octal p ■ High Noise Immunity: VNIH = VNIL = 28% VCC (Min.) latch with 3-STATE output fabricated with silicon gate e L CMOS technology. It achieves the high speed operation ■ Power Down Protection is provided on all inputs a similar to equivalent Bipolar Schottky TTL while main- t ■ Low Noise: V = 0.6V (Typ.) c OLP taining the CMOS low power dissipation. This 8-bit h ■ Low Power Dissipation: ICC = 4µA (Max.) @ TA = 25°C D-type latch is controlled by a latch enable input (LE) w ■ Pin and function compatible with 74HC573 and an Output Enable input (OE). When the OE input is it h HIGH, the eight outputs are in a high impedance state. 3 - An input protection circuit ensures that 0V to 7V can be S T applied to the input pins without regard to the supply A voltage. This device can be used to interface 5V to 3V T E systems and two supply systems such as battery back O up. This circuit prevents device destruction due to mis- u matched supply and input voltages. t p u t s Ordering Information Order Number Package Package Description Number 74VHC573M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74VHC573SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC573MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Description Pin Names Description D –D Data Inputs 0 7 LE Latch Enable Input OE 3-STATE Output Enable Input O –O 3-STATE Outputs 0 7 ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3
7 4 Logic Symbol Functional Description V H C IEEE/IEC The VHC573 contains eight D-type latches with 5 3-STATE output buffers. When the Latch Enable (LE) 7 3 input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch O c output will change state each time its D input changes. t a When LE is LOW the latches store the information that l was present on the D inputs, a setup time preceding the D - HIGH-to-LOW transition of LE. The 3-STATE buffers are T y controlled by the Output Enable (OE) input. When OE is p LOW, the buffers are enabled. When OE is HIGH the e buffers are in the high impedance mode, but, this does L a not interfere with entering new data into the latches. t c h w i t h 3 - S T Truth Table A T E Inputs Outputs O OE LE D O u n t p L H H H u t L H L L s L L X O 0 H X X Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 2
7 4 Absolute Maximum Ratings V H Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be C operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 5 7 In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. 3 The absolute maximum ratings are stress ratings only. O c Symbol Parameter Rating t a l VCC Supply Voltage –0.5V to +7.0V D - V DC Input Voltage –0.5V to +7.0V T IN y V DC Output Voltage –0.5V to V + 0.5V p OUT CC e I Input Diode Current –20mA L IK a I Output Diode Current ±20mA t OK c h IOUT DC Output Current ±25mA w ICC DC VCC/GND Current ±75mA it h TSTG Storage Temperature –65°C to +150°C 3 - T Lead Temperature (Soldering, 10 seconds) 260°C S L T A T E Recommended Operating Conditions(1) O u The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended t p operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not u recommend exceeding them or designing to absolute maximum ratings. t s Symbol Parameter Rating V Supply Voltage 2.0V to +5.5V CC V Input Voltage 0V to +5.5V IN V Output Voltage 0V to V OUT CC T Operating Temperature –40°C to +85°C OPR t , t Input Rise and Fall Time, r f V = 3.3V ± 0.3V 0ns/V ∼ 100ns/V CC V = 5.0V ± 0.5V 0ns/V ∼ 20ns/V CC Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 3
7 4 DC Electrical Characteristics V H C TA = 25°C TA = –40°C to +85°C 5 7 Symbol Parameter VCC (V) Conditions Min. Typ. Max. Min. Max. Units 3 V HIGH Level Input 2.0 1.50 1.50 V O IH Voltage c 3.0–5.5 0.7 x VCC 0.7 x VCC ta VIL LOW Level Input 2.0 0.50 0.50 V l D Voltage 3.0–5.5 0.3 x V 0.3 x V - CC CC T VOH HIGH Level 2.0 VIN = VIH IOH = –50µA 1.9 2.0 1.9 V yp Output Voltage or V e 3.0 IL 2.9 3.0 2.9 L 4.5 4.4 4.5 4.4 a t 3.0 IOH = –4mA 2.58 2.48 ch 4.5 I = –8mA 3.94 3.80 w OH i VOL LOW Level 2.0 VIN = VIH IOL = 50µA 0.0 0.1 0.1 V th Output Voltage 3.0 or VIL 0.0 0.1 0.1 3 - S 4.5 0.0 0.1 0.1 T 3.0 I = 4mA 0.36 0.44 A OL T 4.5 I = 8mA 0.36 0.44 E OL O I 3-STATE Output 5.5 V = V or V , ±0.25 ±2.5 µA OZ IN IH IL u Off-State Current VOUT = VCC or GND tp I Input Leakage 0–5.5 V = 5.5V or GND ±0.1 ±1.0 µA u IN IN t Current s I Quiescent Supply 5.5 V = V or GND 4.0 40.0 µA CC IN CC Current Noise Characteristics T = 25°C A Symbol Parameter V (V) Conditions Typ. Limits Units CC V (2) Quiet Output Maximum 5.0 C = 50pF 0.9 1.2 V OLP L Dynamic V OL V (2) Quiet Output Minimum 5.0 C = 50pF –0.8 –1.0 V OLV L Dynamic V OL V (2) Minimum HIGH Level 5.0 C = 50pF 3.5 V IHD L Dynamic Input Voltage V (2) Maximum LOW Level 5.0 C = 50pF 1.5 V ILD L Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 4
7 4 AC Electrical Characteristics V H C TA = –40°C 5 T = 25°C to +85°C 7 A 3 Symbol Parameter VCC (V) Conditions Min. Typ. Max. Min. Max. Units O tPLH, tPHL Propagation Delay 3.3 ± 0.3 CL = 15pF 7.6 11.9 1.0 14.0 ns ct a Time (LE to On) CL = 50pF 10.1 15.4 1.0 17.5 l D 5.0 ± 0.5 C = 15pF 5.0 7.7 1.0 9.0 - L T CL = 50pF 6.5 9.7 1.0 11.0 yp tPLH, tPHL Propagation Delay 3.3 ± 0.3 CL = 15pF 7.0 11.0 1.0 13.0 ns e L Time (D–On) C = 50pF 9.5 14.5 1.0 16.5 a L t c 5.0 ± 0.5 CL = 15pF 4.5 6.8 1.0 8.0 h C = 50pF 6.0 8.8 1.0 10.0 w L i t , t 3-STATE Output 3.3 ± 0.3 R = 1kΩ C = 15pF 7.3 11.5 1.0 13.5 ns th PZL PZH L L Enable Time CL = 50pF 9.8 15.0 1.0 17.0 3-S 5.0 ± 0.5 C = 15pF 5.2 7.7 1.0 9.0 T L A C = 50pF 6.7 9.7 1.0 11.0 T L E t , t 3-STATE Output 3.3 ± 0.3 R = 1kΩ C = 50pF 10.7 14.5 1.0 16.5 ns PLZ PHZ L L O Disable Time 5.0 ± 0.5 C = 50pF 6.7 9.7 1.0 11.0 u L t p tOSLH, tOSHL Output to Output 3.3 ± 0.3 (3) CL = 50pF 1.5 1.5 ns u Skew 5.0 ± 0.5 C = 50pF 1.0 1.0 ts L C Input Capacitance V = Open 4 10 10 pF IN CC C Output Capacitance V = 5.0V 6 pF OUT CC C Power Dissipation (4) 29 pF PD Capacitance Notes: 3. Parameter guaranteed by design. t = |t – t |; t = |t – t | OSLH PLH max PLH min OSHL PHL max PHL min 4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating PD current consumption without load. Average operating current can be obtained by the equation: I (Opr.) = C • V • f + I / 8 (per Latch). The total C when n pcs. of the Latch operates can be CC PD CC IN CC PD calculated by the equation: C (total) = 21 + 8n. PD AC Operating Requirements T = –40°C to A T = 25°C +85°C V A CC Symbol Parameter (V) Min. Typ. Max. Min. Max. Units t (H), t (L) Minimum Pulse Width (LE) 3.3 ± 0.3 5.0 5.0 ns w w 5.0 ± 0.5 5.0 5.0 t Minimum Setup Time 3.3 ± 0.3 3.5 3.5 ns S 5.0 ± 0.5 3.5 3.5 t Minimum Hold Time 3.3 ± 0.3 1.5 1.5 ns H 5.0 ± 0.5 1.5 1.5 ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 5
7 4 Physical Dimensions V H Dimensions are in inches (millimeters) unless otherwise noted. C 5 7 3 O c t a l D - T y p e L a t c h w i t h 3 - S T A T E O u t p u t s Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 6
7 4 Physical Dimensions (Continued) V H Dimensions are in millimeters unless otherwise noted. C 5 7 3 O c t a l D - T y p e L a t c h w i t h 3 - S T A T E O u t p u t s Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 7
7 4 Physical Dimensions (Continued) V H Dimensions are in millimeters unless otherwise noted. C 5 7 3 O c t a l D - T y p e L a t c h w i t h 3 - S T A T E O u t p u t s Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 8
7 4 V H C 5 7 3 TRADEMARKS O ThefollowingareregisteredandunregisteredtrademarksFairchildSemiconductorownsorisauthorizedtouseandisnotintendedtobean c exhaustivelistofallsuchtrademarks. t a ACEx® HiSeC™ Power-SPM™ TinyBuck™ l D Acrosstheboard.Aroundtheworld.™ i-Lo™ PowerTrench® TinyLogic® - ActiveArray™ ImpliedDisconnect™ ProgrammableActiveDroop™ TINYOPTO™ T y Bottomless™ IntelliMAX™ QFET® TinyPower™ p BuilditNow™ ISOPLANAR™ QS™ TinyWire™ e CoolFET™ MICROCOUPLER™ QTOptoelectronics™ TruTranslation™ L CorePLUS™ MicroPak™ QuietSeries™ µSerDes™ at CROSSVOLT™ MICROWIRE™ RapidConfigure™ UHC® c h CTL™ Motion-SPM™ RapidConnect™ UniFET™ w CurrentTransferLogic™ MSX™ ScalarPump™ VCX™ DOME™ MSXPro™ SMARTSTART™ Wire™ ith E2CMOS™ OCX™ SPM® 3 EcoSPARK® OCXPro™ STEALTH™ - EnSigna™ OPTOLOGIC® SuperFET™ ST FACTQuietSeries™ OPTOPLANAR® SuperSOT™-3 A FACT® PACMAN™ SuperSOT™-6 T FAST® PDP-SPM™ SuperSOT™-8 E FASTr™ POP™ SyncFET™ O FPS™ Power220® TCM™ u FRFET® Power247® ThePowerFranchise® tp GlobalOptoisolator™ PowerEdge™ ™ u t GTO™ PowerSaver™ TinyBoost™ s DISCLAIMER FAIRCHILDSEMICONDUCTORRESERVESTHERIGHTTOMAKECHANGESWITHOUTFURTHERNOTICETOANYPRODUCTS HEREINTOIMPROVERELIABILITY,FUNCTION,ORDESIGN.FAIRCHILDDOESNOTASSUMEANYLIABILITYARISINGOUTOFTHE APPLICATIONORUSEOFANYPRODUCTORCIRCUITDESCRIBEDHEREIN;NEITHERDOESITCONVEYANYLICENSEUNDERITS PATENTRIGHTS,NORTHERIGHTSOFOTHERS.THESESPECIFICATIONSDONOTEXPANDTHETERMSOFFAIRCHILD’S WORLDWIDETERMSANDCONDITIONS,SPECIFICALLYTHEWARRANTYTHEREIN,WHICHCOVERSTHESEPRODUCTS. LIFESUPPORTPOLICY FAIRCHILD’SPRODUCTSARENOTAUTHORIZEDFORUSEASCRITICALCOMPONENTSINLIFESUPPORTDEVICESOR SYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION. Asusedherein: 1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support, which, (a) are intended for surgical implant into the bodyor device, or system whose failure to perform can be (b) support or sustain life, and (c) whose failure to perform reasonablyexpectedtocausethefailureofthelifesupport when properly used in accordance with instructions for use deviceorsystem,ortoaffectitssafetyoreffectiveness. provided in the labeling, can be reasonably expected to resultinasignificantinjuryoftheuser. PRODUCTSTATUSDEFINITIONS DefinitionofTerms DatasheetIdentification ProductStatus Definition AdvanceInformation FormativeorInDesign Thisdatasheetcontainsthedesignspecificationsforproduct development.Specificationsmaychangeinanymannerwithoutnotice. Preliminary FirstProduction Thisdatasheetcontainspreliminarydata;supplementarydatawillbe publishedatalaterdate.FairchildSemiconductorreservestherightto makechangesatanytimewithoutnoticetoimprovedesign. NoIdentificationNeeded FullProduction Thisdatasheetcontainsfinalspecifications.FairchildSemiconductor reservestherighttomakechangesatanytimewithoutnoticetoimprove design. Obsolete NotInProduction Thisdatasheetcontainsspecificationsonaproductthathasbeen discontinuedbyFairchildSemiconductor.Thedatasheetisprintedfor referenceinformationonly. Rev.I27 ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC573 Rev. 1.3 9
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative © Semiconductor Components Industries, LLC www.onsemi.com www.onsemi.com 1
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