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7 4 V H C April 2007 3 7 74VHC374 4 tm O Octal D-Type Flip-Flop with 3-STATE Outputs c t a l D Features General Description - T y ■ High Speed: tPD = 5.4ns (typ) at VCC = 5V The VHC374 is an advanced high speed CMOS octal p ■ High noise immunity: VNIH = VNIL = 28% VCC (Min.) flip-flop with 3-STATE output fabricated with silicon gate e F CMOS technology. It achieves the high speed operation ■ Power down protection is provided on all inputs li similar to equivalent Bipolar Schottky TTL while main- p ■ Low power dissipation: I = 4µA (Max) @ T = 25°C - CC A taining the CMOS low power dissipation. This 8-bit F ■ Pin and function compatible with 74HC374 D-type flip-flop is controlled by a clock input (CP) and an lo p output enable input (OE). When the OE input is HIGH, w the eight outputs are in a HIGH impedance state. i t h An input protection circuit ensures that 0V to 7V can be 3 applied to the input pins without regard to the supply - S voltage. This device can be used to interface 5V to 3V T systems and two supply systems such as battery back A T up. This circuit prevents device destruction due to mis- E matched supply and input voltages. O u t p u t Ordering Information s Order Package Number Number Package Description 74VHC374M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74VHC374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC374MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Descriptions Pin Names Description D –D Data Inputs 0 7 CP Clock Pulse Input OE 3-STATE Output Enable Input O –O 3-STATE Outputs 0 7 ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3

7 4 Logic Symbol Functional Description V H C IEEE/IEC The VHC374 consists of eight edge-triggered flip-flops 3 with individual D-type inputs and 3-STATE true outputs. 7 4 The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the O c state of their individual D inputs that meet the setup and t a hold time requirements on the LOW-to-HIGH Clock (CP) l transition. With the Output Enable (OE) LOW, the con- D - tents of the eight flip-flops are available at the outputs. T y When the OE is HIGH, the outputs go to the high imped- p ance state. Operation of the OE input does not affect the e state of the flip-flops. F l i p - F l o p w i t h 3 Truth Table - S T Inputs Outputs A T D CP OE O E n n O H L H u t L L L p u X X H Z t s H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = LOW-to-HIGH Transition Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 1. ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 2

7 4 Absolute Maximum Ratings V H Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be C operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 3 7 In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. 4 The absolute maximum ratings are stress ratings only. O c Symbol Parameter Rating t a l VCC Supply Voltage –0.5V to +7.0V D - V DC Input Voltage –0.5V to +7.0V T IN y V DC Output Voltage –0.5V to V + 0.5V p OUT CC e I Input Diode Current –20mA F IK l i I Output Diode Current ±20mA p OK - F IOUT DC Output Current ±25mA lo I DC V /GND Current ±75mA p CC CC w T Storage Temperature –65°C to +150°C STG i t h T Lead Temperature (Soldering, 10 seconds) 260°C L 3 - S T A Recommended Operating Conditions(1) T E The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended O operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not u recommend exceeding them or designing to absolute maximum ratings. t p u Symbol Parameter Rating t s V Supply Voltage 2.0V to +5.5V CC V Input Voltage 0V to +5.5V IN V Output Voltage 0V to V OUT CC T Operating Temperature –40°C to +85°C OPR t , t Input Rise and Fall Time, r f V = 3.3V ± 0.3V 0ns/V ∼ 100ns/V CC V = 5.0V ± 0.5V 0ns/V ∼ 20ns/V CC Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 3

7 4 DC Electrical Characteristics V H C TA = 3 7 25°C –40°C to +85°C 4 Symbol Parameter V (V) Conditions Min. Typ. Max. Min. Max. Units O CC c VIH HIGH Level 2.0 1.50 1.50 V ta Input Voltage 3.0–5.5 0.7 x VCC 0.7 x VCC l D VIL LOW Level Input 2.0 0.50 0.50 V -T Voltage y 3.0–5.5 0.3 x VCC 0.3 x VCC p e VOH HIGH Level 2.0 VIN = VIH IOH = –50µA 1.9 2.0 1.9 V F Output 3.0 or VIL 2.9 3.0 2.9 li Voltage p 4.5 4.4 4.5 4.4 -F 3.0 I = –4mA 2.58 2.48 lo OH p 4.5 IOH = –8mA 3.94 3.80 w VOL LOW Level 2.0 VIN = VIH IOL = 50µA 0.0 0.1 0.1 V ith Output Voltage 3.0 or VIL 0.0 0.1 0.1 3 - 4.5 0.0 0.1 0.1 S T 3.0 I = 4mA 0.36 0.44 A OL T 4.5 I = 8mA 0.36 0.44 E OL I 3-STATE Output 5.5 V = V or V ; ±0.25 ±2.5 µA O OZ IN IH IL Off-State V = V or GND u OUT CC t Current p u IIN Input Leakage 0–5.5 VIN = 5.5V or GND ±0.1 ±1.0 µA ts Current I Quiescent 5.5 V = V or GND 4.0 40.0 µA CC IN CC Supply Current Noise Characteristics T = 25°C A Symbol Parameter V (V) Conditions Typ. Limits Units CC V (2) Quiet Output Maximum 5.0 C = 50pF 0.6 0.9 V OLP L Dynamic V OL V (2) Quiet Output Minimum 5.0 C = 50pF –0.6 –0.9 V OLV L Dynamic V OL V (2) Minimum HIGH Level 5.0 C = 50pF 3.5 V IHD L Dynamic Input Voltage V (2) Maximum LOW Level 5.0 C = 50pF 1.5 V ILD L Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 4

7 4 AC Electrical Characteristics V H C TA = –40°C 3 T = 25°C to +85°C 7 A 4 Symbol Parameter VCC (V) Conditions Min. Typ. Max. Min. Max. Units O c tPLH, tPHL Propagation Delay 3.3 ± 0.3 CL = 15pF 8.1 12.7 1.0 15.0 ns ta Time (CP to On) C = 50pF 10.6 16.2 1.0 18.5 l L D 5.0 ± 0.5 CL = 15pF 5.4 8.1 1.0 9.5 ns -T y C = 50pF 6.9 10.1 1.0 11.5 p L e tPZL, tPZH 3-STATE Output 3.3 ± 0.3 RL = 1kΩ CL = 15pF 7.1 11.0 1.0 13.0 ns F Enable Time CL = 50pF 9.6 14.5 1.0 16.5 lip - 5.0 ± 0.5 C = 15pF 5.1 7.6 1.0 9.0 ns F L l o C = 50pF 6.6 9.6 1.0 11.0 p L t , t 3-STATE Output 3.3 ± 0.3 R = 1kΩ C = 50pF 10.2 14.0 1.0 16.0 ns w PLZ PHZ L L i Disable Time 5.0 ± 0.5 C = 50pF 6.1 8.8 1.0 10.0 th L 3 t , Output to Output 3.3 ± 0.3 (3) C = 50pF 1.5 1.5 ns - OSLH L S tOSHL Skew 5.0 ± 0.5 C = 50pF 1.0 1.0 T L A f Maximum Clock 3.3 ± 0.3 C = 15pF 80 130 70 MHz T MAX L E Frequency C = 50pF 55 85 50 O L u 5.0 ± 0.5 CL = 15pF 130 185 110 tp C = 50pF 85 120 75 u L t s C Input Capacitance V = Open 4 10 10 pF IN CC C Output Capacitance V = 5.0V 6 pF OUT CC C Power Dissipation (4) 32 pF PD Capacitance Notes: 3. Parameter guaranteed by design. t = |t – t |; t = |t – t | OSLH PLH max PLH min OSHL PHL max PHL min 4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating PD current consumption without load. Average operating current can be obtained by the equation: I (opr.) = C • V • f + I / 8 (per F/F). The total C when n pcs. of the Octal D Flip-Flop operates CC PD CC IN CC PD can be calculated by the equation: C (total) = 20 + 12n. PD AC Operating Requirements T = 25°C T = –40°C to +85°C A A Symbol Parameter V (V) Min. Typ. Max. Min. Max. Units CC t (H), t (L) Minimum Pulse Width 3.3 ± 0.3 5.0 5.5 ns W W (CP) 5.0 ± 0.5 5.0 5.0 t Minimum Set-Up Time 3.3 ± 0.3 4.5 4.5 ns S 5.0 ± 0.5 3.0 3.0 t Minimum Hold Time 3.3 ± 0.3 2.0 2.0 ns H 5.0 ± 0.5 2.0 2.0 ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 5

7 4 Physical Dimensions V H Dimensions are in inches (millimeters) unless otherwise noted. C 3 7 4 O c t a l D - T y p e F l i p - F l o p w i t h 3 - S T A T E O u t p u t s Figure 2. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 6

7 4 Physical Dimensions (Continued) V H Dimensions are in millimeters unless otherwise noted. C 3 7 4 O c t a l D - T y p e F l i p - F l o p w i t h 3 - S T A T E O u t p u t s Figure 3. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 7

7 4 Physical Dimensions (Continued) V H Dimensions are in millimeters unless otherwise noted. C 3 7 4 O c t a l D - T y p e F l i p - F l o p w i t h 3 - S T A T E O u t p u t s Figure 4. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 8

7 4 V H C 3 7 4 TRADEMARKS O The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an c exhaustive list of all such trademarks. t a ACEx® HiSeC(cid:165) Programmable Active Droop(cid:165) TinyLogic® l D Across the board. Around the world.(cid:165) i-Lo(cid:165) QFET® TINYOPTO(cid:165) - ActiveArray(cid:165) ImpliedDisconnect(cid:165) QS(cid:165) TinyPower(cid:165) T y Bottomless(cid:165) IntelliMAX(cid:165) QT Optoelectronics(cid:165) TinyWire(cid:165) p Build it Now(cid:165) ISOPLANAR(cid:165) Quiet Series(cid:165) TruTranslation(cid:165) e CoolFET(cid:165) MICROCOUPLER(cid:165) RapidConfigure(cid:165) (cid:80)SerDes(cid:165) F CROSSVOLT(cid:165) MicroPak(cid:165) RapidConnect(cid:165) UHC® lip CTL™ MICROWIRE(cid:165) ScalarPump(cid:165) UniFET(cid:165) - F Current Transfer Logic™ MSX(cid:165) SMART START(cid:165) VCX(cid:165) l DOME(cid:165) MSXPro(cid:165) SPM® Wire(cid:165) op EEc2CoSMPOASR(cid:165)K® OOCCXX(cid:165)Pro(cid:165) SSuTpEeArLFTEHT™(cid:165) wi EnSigna(cid:165) OPTOLOGIC® SuperSOT(cid:165)-3 th FACT Quiet Series™ OPTOPLANAR® SuperSOT(cid:165)-6 3 FFAACSTT®® PPAOCPM(cid:165)AN(cid:165) SSuynpceFrSEOT™T(cid:165) -8 -ST FASTr(cid:165) Power220® TCM(cid:165) A FPS(cid:165) Power247® The Power Franchise® T FRFET® PowerEdge(cid:165) ™ E GlobalOptoisolator(cid:165) PowerSaver(cid:165) TinyBoost(cid:165) O GTO(cid:165) PowerTrench® TinyBuck(cid:165) ut p u DISCLAIMER ts FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support, which, (a) are intended for surgical implant into the body or device, or system whose failure to perform can be (b) support or sustain life, and (c) whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness. provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I24 ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC374 Rev. 1.3 9

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative © Semiconductor Components Industries, LLC www.onsemi.com www.onsemi.com 1

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: 74VHC374SJX 74VHC374MX 74VHC374MTC 74VHC374M 74VHC374MTCX