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74VHC125MX产品简介:
ICGOO电子元器件商城为您提供74VHC125MX由Fairchild Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74VHC125MX价格参考。Fairchild Semiconductor74VHC125MX封装/规格:逻辑 - 缓冲器,驱动器,接收器,收发器, Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-SOIC。您可以下载74VHC125MX参考资料、Datasheet数据手册功能说明书,资料中有74VHC125MX 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC BUFF TRI-ST QD N-INV 14SOIC缓冲器和线路驱动器 Quad Buffer |
产品分类 | |
品牌 | Fairchild Semiconductor |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,缓冲器和线路驱动器,Fairchild Semiconductor 74VHC125MX74VHC |
数据手册 | |
产品型号 | 74VHC125MX |
PCN组件/产地 | |
产品种类 | 缓冲器和线路驱动器 |
传播延迟时间 | 11.5 ns at 3.3 V, 7.5 ns at 5 V |
低电平输出电流 | 8 mA |
供应商器件封装 | 14-SOIC |
元件数 | 4 |
其它名称 | 74VHC125MXCT |
包装 | 剪切带 (CT) |
单位重量 | 241 mg |
商标 | Fairchild Semiconductor |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Reel |
封装/外壳 | 14-SOIC(0.154",3.90mm 宽) |
封装/箱体 | SOIC-14 |
工作温度 | -40°C ~ 85°C |
工厂包装数量 | 2500 |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
极性 | Non-Inverting |
标准包装 | 1 |
每元件位数 | 1 |
每芯片的通道数量 | 4 |
电压-电源 | 2 V ~ 5.5 V |
电流-输出高,低 | 8mA,8mA |
电源电压-最大 | 5.5 V |
电源电压-最小 | 2 V |
系列 | 74VHC125 |
输入线路数量 | 4 |
输出类型 | 3-State |
输出线路数量 | 3 |
逻辑类型 | CMOS |
逻辑系列 | VHC |
零件号别名 | 74VHC125MX_NL |
高电平输出电流 | - 8 mA |
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
7 4 V H December 2007 C 1 2 74VHC125 5 — Quad Buffer with 3-STATE Outputs Q u a d Features General Description B ■ High Speed: t = 3.8ns (Typ.) at V = 5V The VHC125 contains four independent non-inverting u PD CC f f ■ Lower power dissipation: I = 4 µA (Max.) at buffers with 3-STATE outputs. It is an advanced high- e CC r TA = 25°C speed CMOS device fabricated with silicon gate CMOS w ■ High noise immunity: VNIH = VNIL = 28% VCC (Min.) tlaerc hton oelqougiyv aalnedn ta Bcihpioelvaers S tchheo httikgyh -TsTpLe ewdh oilpee mraatiionnta isnimingi- ith ■ Power down protection is provided on all inputs the CMOS low power dissipation. 3 ■ Low noise: VOLP = 0.8V (Max.) -S An input protection circuit insures that 0V to 7V can be T ■ Pin and function compatible with 74HC125 A applied to the input pins without regard to the supply T voltage. This device can be used to interface 5V to 3V E systems and two supply systems such as battery O backup. This circuit prevents device destruction due to u t mismatched supply and input voltages. p u ts Ordering Information Package Order Number Number Package Description 74VHC125M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC125 Rev. 1.4.0
7 4 Connection Diagram Logic Symbol V H C IEEE/IEC 1 2 5 — Q u a d B u f f e r w i t h 3 Pin Description - S Function Table T Pin Names Description A T A , B Inputs Inputs Output E n n O On Outputs An Bn On u t L L L p u L H H ts H X Z H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = Immaterial ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC125 Rev. 1.4.0 2
7 4 Absolute Maximum Ratings V H Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be C operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 1 2 In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. 5 The absolute maximum ratings are stress ratings only. — Q Symbol Parameter Rating u V Supply Voltage –0.5V to +7.0V a CC d V DC Input Voltage –0.5V to +7.0V B IN u V DC Output Voltage –0.5V to V + 0.5V f OUT CC f e I Input Diode Current –20mA r IK w IOK Output Diode Current ±20mA it h IOUT DC Output Current ±25mA 3 ICC DC VCC/GND Current ±50mA -S T T Storage Temperature –65°C to +150°C A STG T T Lead Temperature (Soldering, 10 seconds) 260°C E L O u t Recommended Operating Conditions(1) pu t The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended s operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Rating V Supply Voltage 2.0V to +5.5V CC V Input Voltage 0V to +5.5V IN V Output Voltage 0V to V OUT CC T Operating Temperature –40°C to +85°C OPR t , t Input Rise and Fall Time, r f V = 3.3V ± 0.3V 0ns/V ∼ 100ns/V CC V = 5.0V ± 0.5V 0ns/V ∼ 20ns/V CC Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC125 Rev. 1.4.0 3
7 4 DC Electrical Characteristics V H C TA = 1 2 25°C –40°C to +85°C 5 — Symbol Parameter V (V) Conditions Min. Typ. Max. Min. Max. Units CC Q V HIGH Level Input 2.0 1.50 1.50 V IH u Voltage 3.0–5.5 0.7 x V 0.7 x V a CC CC d VIL LOW Level Input 2.0 0.50 0.50 V B Voltage 3.0–5.5 0.3 x V 0.3 x V u CC CC f f V HIGH Level 2.0 V = V I = –50µA 1.9 2.0 1.9 V e OH IN IH OH r Output Voltage 3.0 or VIL 2.9 3.0 2.9 w i 4.5 4.4 4.5 4.4 th 3.0 I = –4mA 2.58 2.48 3 OH - S 4.5 IOH = –8mA 3.94 3.80 T A VOL LOW Level 2.0 VIN = VIH IOL = 50µA 0.0 0.1 0.1 V T Output Voltage or V E 3.0 IL 0.0 0.1 0.1 O 4.5 0.0 0.1 0.1 u 3.0 I = 4mA 0.36 0.44 tp OL u 4.5 IOL = 8mA 0.36 0.44 ts I 3-STATE Output 5.5 V = V or V , ±0.25 ±2.5 µA OZ IN IH IL Off-State Current VOUT = VCC or GND I Input Leakage 0–5.5 V = 5.5V or GND ±0.1 ±1.0 µA IN IN Current I Quiescent 5.5 V = V or GND 4.0 40.0 µA CC IN CC Supply Current Noise Characteristics T = 25°C A Symbol Parameter V (V) Conditions Typ. Limits Units CC V (2) Quiet Output Maximum 5.0 C = 50pF 0.5 0.8 V OLP L Dynamic V OL V (2) Quiet Output Minimum 5.0 C = 50pF –0.5 –0.8 V OLV L Dynamic V OL V (2) Minimum HIGH Level 5.0 C = 50pF 3.5 V IHD L Dynamic Input Voltage V (2) Maximum HIGH Level 5.0 C = 50pF 1.5 V ILD L Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC125 Rev. 1.4.0 4
7 4 AC Electrical Characteristics V H C TA = –40°C 1 T = 25°C to +85°C 2 A 5 Symbol Parameter V (V) Conditions Min. Typ. Max. Min. Max. Units — CC t , t Propagation Delay 3.3 ± 0.3 C = 15pF 5.6 8.0 1.0 9.5 ns Q PLH PHL L u Time C = 50pF 8.1 11.5 1.0 13.0 a L d 5.0 ± 0.5 CL = 15pF 3.8 5.5 1.0 6.5 ns B CL = 50pF 5.3 7.5 1.0 8.5 uff tPZL, tPZH 3-STATE Output 3.3 ± 0.3 RL = 1kΩ CL = 15pF 5.4 8.0 1.0 9.5 ns er Enable Time C = 50pF 7.9 11.5 1.0 13.0 w L i t 5.0 ± 0.5 C = 15pF 3.6 5.1 1.0 6.0 ns h L 3 C = 50pF 5.1 7.1 1.0 8.0 - L S tPLZ, tPHZ 3-STATE Output 3.3 ± 0.3 RL = 1kΩ CL = 50pF 9.5 13.2 1.0 15.0 ns TA Disable Time 5.0 ± 0.5 CL = 50pF 6.1 8.8 1.0 10.0 TE t , t Output to Output 3.3 ± 0.3 (3) C = 50pF 1.5 1.5 ns O OSLH OSHL L u Skew 5.0 ± 0.5 C = 50pF 1.0 1.0 t L p C Input Capacitance V = Open 4 10 10 pF u IN CC t s C Output Capacitance V = 5.0V 6 pF OUT CC C Power Dissipation (4) 14 pF PD Capacitance Notes: 3. Parameter guaranteed by design. t = |t – t |; t = |t – t |. OSLH PLHmax PLHmin OSHL PHLmax PHLmin 4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating PD current consumption without load. Average operating current can be obtained by the equation: I (Opr.) = C • V • f + I / 4 (per bit). CC PD CC IN CC ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC125 Rev. 1.4.0 5
0.65 (cid:24)(cid:17)(cid:19)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) A 0.43TYP 14 8 B 6.4 (cid:23)(cid:17)(cid:23)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) 6.10 3.2 1.65 1 7 0.2 C B A PIN1IDENT TOPVIEW ALLLEADTIPS 0.45 RECOMMENDEDLANDPATTERN 1.2MAX SEEDETAILA +0.15 0.90 -0.10 0.20 (cid:19)(cid:17)(cid:20)(cid:19)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) 0.09 ALLLEADTIPS 0.30 0.19 C 0.1 C 0.65 0.13 A B C (cid:20)(cid:21)(cid:17)(cid:19)(cid:19)(cid:131)(cid:3)(cid:55)(cid:50)(cid:51)(cid:3)(cid:9)(cid:3)(cid:37)(cid:50)(cid:55)(cid:55)(cid:50)(cid:48) FRONTVIEW 0.09MIN NOTES: GAGEPLANE A.CONFORMSTOJEDECREGISTRATIONMO-153, VARIATIONAB,REFNOTE6 B.DIMENSIONSAREINMILLIMETERS. 0.25 0.09MIN C.DIMENSIONSAREEXCLUSIVEOFBURRS, (cid:19)(cid:131)(cid:16)(cid:3)(cid:27)(cid:131) (cid:19)(cid:17)(cid:25)(cid:147)(cid:19)(cid:17)(cid:20) MOLDFLASH,ANDTIEBAREXTRUSIONS SEATINGPLANE 1.00 D.DIMENSIONINGANDTOLERANCESPERANSI DETAILA Y14.5M,2009. E.LANDPATTERNSTANDARD:SOP65P640X110-14M. F.DRAWINGFILENAME:MKT-MTC14rev7.
8.75 A 8.50 7.62 14 0.65 8 14 8 B 4.00 6.00 5.60 3.80 1.70 1 7 PIN #1 1.27 0.51 1 7 IDENT. 1.27 0.35 (0.33) 0.25 M C B A LAND PATTERN RECOMMENDATION TOP VIEW 1.75 MAX A C 0.25 0.19 1.50 0.10 C 0.25 1.25 0.10 SIDE VIEW FRONT VIEW NOTES: A. CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C B. ALL DIMENSIONS ARE IN MILLIMETERS 0.50 0.25 x 45 C. DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS R0.10 GAGE D. LAND PATTERN STANDARD: PLANE SOIC127P600X145-14M R0.10 E. CONFORMS TO ASME Y14.5M, 2009 0.36 D. DRAWING FILENAME: MKT-M14Arev14 8° 0° 0.90 0.50 SEATING PLANE (1.04) DETAIL A SCALE 16 : 1
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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: 74VHC125M 74VHC125MX 74VHC125MTC 74VHC125MTCX 74VHC125SJX 74VHC125SJ