Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

7 4 L V X February 2008 3 2 — L 74LVX32 o w Low Voltage Quad 2-Input OR Gate V o l t a g Features General Description e Q ■ Input voltage level translation from 5V to 3V The LVX32 contains four 2-input OR gates. The inputs u ■ Ideal for low power/low noise 3.3V applications tolerate voltages up to 7V allowing the interface of 5V a d systems to 3V systems. ■ Guaranteed simultaneous switching noise level and 2 dynamic threshold performance -I n p u t Ordering Information O R Order Package G Number Number Package Description a t e 74LVX32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX32MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Logic Symbol IEEE/IEC Pin Description Pin Names Description A , B Inputs n n O Outputs n ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX32 Rev. 1.4.0

7 4 Absolute Maximum Ratings L V Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be X 3 operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 2 In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. — The absolute maximum ratings are stress ratings only. L o Symbol Parameter Rating w V V Supply Voltage –0.5V to +7.0V CC o I DC Input Diode Current, V = –0.5V –20mA lt IK I a g VI DC Input Voltage –0.5V to 7V e I DC Output Diode Current Q OK u V = –0.5V –20mA a O d VO = VCC + 0.5V +20mA 2 - VO DC Output Voltage –0.5V to VCC + 0.5V In p IO DC Output Source or Sink Current ±25mA u t I or I DC V or Ground Current ±50mA O CC GND CC R T Storage Temperature –65°C to +150°C STG G P Power Dissipation 180mW a t e Recommended Operating Conditions(1) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Rating V Supply Voltage 2.0V to 3.6V CC V Input Voltage 0V to 5.5V I V Output Voltage 0V to V O CC T Operating Temperature –40°C to +85°C A ∆t / ∆V Input Rise and Fall Time 0ns/V to 100ns/V Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX32 Rev. 1.4.0 2

7 4 DC Electrical Characteristics L V X T = –40°C to 3 A 2 T = +25°C +85°C A — Symbol Parameter V Conditions Min. Typ. Max. Min. Max. Units CC L o VIH HIGH Level Input 2.0 1.5 1.5 V w Voltage 3.0 2.0 2.0 V o 3.6 2.4 2.4 lt a g V LOW Level Input 2.0 0.5 0.5 V IL e Voltage 3.0 0.8 0.8 Q u 3.6 0.8 0.8 a d V HIGH Level Output 2.0 V = V or V , 1.9 2.0 1.9 V OH IN IL IH 2 Voltage IOH = –50µA -In 3.0 V = V or V , 2.9 3.0 2.9 p IN IL IH u I = –50µA t OH O VIN = VIL or VIH, 2.58 2.48 R IOH = –4mA G VOL LOW Level Output 2.0 VIN = VIL or VIH, 0.0 0.1 0.1 V at e Voltage I = 50µA OL 3.0 V = V or V , 0.0 0.1 0.1 IN IL IH I = 50µA OL V = V or V , 0.36 0.44 IN IL IH I = 4mA OL IIN Input Leakage 3.6 VIN = 5.5V or GND ±0.1 ±1.0 µA Current I Quiescent Supply 3.6 V = V or GND 2.0 20.0 µA CC IN CC Current Noise Characteristics(2) T = 25°C A Symbol Parameter V (V) C (pF) Typ. Limit Units CC L V Quiet Output Maximum Dynamic V 3.3 50 0.3 0.5 V OLP OL V Quiet Output Minimum Dynamic V 3.3 50 –0.3 –0.5 V OLV OL V Minimum HIGH Level Dynamic Input Voltage 3.3 50 2.0 V IHD V Maximum LOW Level Dynamic Input Voltage 3.3 50 0.8 V ILD Note: 2. Input t = t = 3ns r f ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX32 Rev. 1.4.0 3

7 4 AC Electrical Characteristics L V X T = –40°C to 3 A 2 T = +25°C +85°C A — Symbol Parameter V (V) C (pF) Min. Typ. Max. Min. Max. Units CC L L o tPLH, tPHL Propagation Delay Time 2.7 15 5.8 10.7 1.0 12.5 ns w 50 8.3 14.2 1.0 16.0 V o 3.3 ± 0.3 15 4.4 6.6 1.0 7.5 lt a g 50 6.9 10.1 1.0 11.5 e t , t Output to Output Skew(3) 2.7 50 1.5 1.5 ns Q OSLH OSHL u 3.3 1.5 1.5 a d Note: 2 3. Parameter guaranteed by design t = |t –t |, t = |t –t | -I OSLH PLHm PLHn OSHL PHLm PHLn n p u t Capacitance O R T = –40°C to G A T = +25°C +85°C a A t e Symbol Parameter Min. Typ. Max. Min. Max. Units C Input Capacitance 4 10 10 pF IN C Power Dissipation Capacitance(4) 14 pF PD Note: 4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current PD consumption without load. C ×V ×f ×I Average operating current can be obtained by the eqation: I = -----P----D-------------C----C------------I-N------------C----C-- CC(opr.) 4(per,Gate) ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX32 Rev. 1.4.0 4

0.65 (cid:24)(cid:17)(cid:19)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) A 0.43TYP 14 8 B 6.4 (cid:23)(cid:17)(cid:23)(cid:19)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) 6.10 3.2 1.65 1 7 0.2 C B A PIN1IDENT TOPVIEW ALLLEADTIPS 0.45 RECOMMENDEDLANDPATTERN 1.2MAX SEEDETAILA +0.15 0.90 -0.10 0.20 (cid:19)(cid:17)(cid:20)(cid:19)(cid:147)(cid:19)(cid:17)(cid:19)(cid:24) 0.09 ALLLEADTIPS 0.30 0.19 C 0.1 C 0.65 0.13 A B C (cid:20)(cid:21)(cid:17)(cid:19)(cid:19)(cid:131)(cid:3)(cid:55)(cid:50)(cid:51)(cid:3)(cid:9)(cid:3)(cid:37)(cid:50)(cid:55)(cid:55)(cid:50)(cid:48) FRONTVIEW 0.09MIN NOTES: GAGEPLANE A.CONFORMSTOJEDECREGISTRATIONMO-153, VARIATIONAB,REFNOTE6 B.DIMENSIONSAREINMILLIMETERS. 0.25 0.09MIN C.DIMENSIONSAREEXCLUSIVEOFBURRS, (cid:19)(cid:131)(cid:16)(cid:3)(cid:27)(cid:131) (cid:19)(cid:17)(cid:25)(cid:147)(cid:19)(cid:17)(cid:20) MOLDFLASH,ANDTIEBAREXTRUSIONS SEATINGPLANE 1.00 D.DIMENSIONINGANDTOLERANCESPERANSI DETAILA Y14.5M,2009. E.LANDPATTERNSTANDARD:SOP65P640X110-14M. F.DRAWINGFILENAME:MKT-MTC14rev7.

8.75 A 8.50 7.62 14 0.65 8 14 8 B 4.00 6.00 5.60 3.80 1.70 1 7 PIN #1 1.27 0.51 1 7 IDENT. 1.27 0.35 (0.33) 0.25 M C B A LAND PATTERN RECOMMENDATION TOP VIEW 1.75 MAX A C 0.25 0.19 1.50 0.10 C 0.25 1.25 0.10 SIDE VIEW FRONT VIEW NOTES: A. CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C B. ALL DIMENSIONS ARE IN MILLIMETERS 0.50 0.25 x 45 C. DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS R0.10 GAGE D. LAND PATTERN STANDARD: PLANE SOIC127P600X145-14M R0.10 E. CONFORMS TO ASME Y14.5M, 2009 0.36 D. DRAWING FILENAME: MKT-M14Arev14 8° 0° 0.90 0.50 SEATING PLANE (1.04) DETAIL A SCALE 16 : 1

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