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74LVCV2G66GD,125产品简介:

ICGOO电子元器件商城为您提供74LVCV2G66GD,125由NXP Semiconductors设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74LVCV2G66GD,125价格参考。NXP Semiconductors74LVCV2G66GD,125封装/规格:接口 - 模拟开关,多路复用器,多路分解器, 2 Circuit IC Switch 1:1 10 Ohm 8-XSON (2x3)。您可以下载74LVCV2G66GD,125参考资料、Datasheet数据手册功能说明书,资料中有74LVCV2G66GD,125 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC SWITCH DUAL SPST 8XSON

产品分类

接口 - 模拟开关,多路复用器,多路分解器

品牌

NXP Semiconductors

数据手册

产品图片

产品型号

74LVCV2G66GD,125

rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

74LVCV

供应商器件封装

8-XSON,SOT996-2 (2x3)

其它名称

568-9380-1

功能

开关

包装

剪切带 (CT)

安装类型

表面贴装

导通电阻

10 欧姆

封装/外壳

8-XFDFN

工作温度

-40°C ~ 125°C

标准包装

1

特色产品

http://www.digikey.com/product-highlights/cn/zh/nxp-semiconductors-micropak/1262

电压-电源,单/双 (±)

2.3 V ~ 5.5 V

电压源

单电源

电流-电源

40µA

电路

2 x SPST - NO

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PDF Datasheet 数据手册内容提取

74LVCV2G66 Overvoltage tolerant bilateral switch Rev. 8 — 5 November 2018 Product data sheet 1. General description The 74LVCV2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVCV2G66 provides two single pole single throw analog or digital switches. Each switch includes an overvoltage tolerant input/output terminal (pin nZ), an output/input terminal (pin nY) and low-power active HIGH enable input (pin nE). The overvoltage tolerant switch terminals allow the switching of signals in excess of V . The CC low-power enable input eliminates the necessity of using current limiting resistors in portable applications when using control logic signals much lower than V . These inputs are also CC overvoltage tolerant. 2. Features and benefits • Wide supply voltage range from 2.3 V to 5.5 V • Ultra low-power operation • Very low ON resistance: • 8.0 Ω (typical) at V = 2.7 V CC • 7.5 Ω (typical) at V = 3.3 V CC • 7.3 Ω (typical) at V = 5.0 V. CC • 5 V tolerant input for interfacing with 5 V logic • High noise immunity • Switch handling capability of 32 mA • CMOS low-power consumption • Latch-up performance exceeds 250 mA • Incorporates overvoltage tolerant analog switch technology • Switch accepts voltages up to 5.5 V independent of V CC • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVCV2G66DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm 74LVCV2G66GT -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; SOT833-1 8 terminals; body 1 x 1.95 x 0.5 mm 74LVCV2G66GM -40 °C to +125 °C XQFN8 plastic, extremely thin quad flat package; no leads; SOT902-2 8 terminals; body 1.6 x 1.6 x 0.5 mm

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 4. Marking Table 2. Marking codes Type number Marking code[1] 74LVCV2G66DC Y66 74LVCV2G66GT Y66 74LVCV2G66GM Y66 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1Y 1Z 1 1E # 1 X1 2Z 2Y 1 # 1 2E X1 001aag497 001aah808 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Z Y E VCC 001aaa532 Fig. 3. Logic diagram (one switch) 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 2 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 6. Pinning information 6.1. Pinning 74LVCV2G666 1Z 1 8 VCC 1Y 2 7 1E 74LVCV2G66 2E 3 6 2Y 1Z 1 8 VCC 1Y 2 7 1E GND 4 5 2Z 2E 3 6 2Y GND 4 5 2Z aaa-018593 001aai213 Transparent top view Fig. 4. Pin configuration SOT765-1 (VSSOP8) Fig. 5. Pin configuration SOT833-1 (XSON8) 74LVCV2G66 terminal 1 index area C C V 1E 1 8 7 1Z 2Y 2 6 1Y 2Z 3 5 2E 4 D N aaa-018594 G Transparent top view Fig. 6. Pin configuration SOT902-2 (XQFN8) 6.2. Pin description Table 3. Pin description Symbol Pin Description SOT765-1 and SOT833-1 SOT902-2 1Z 1 7 independent input or output (overvoltage tolerant) 1Y 2 6 independent input or output 2E 3 5 enable input (active HIGH) GND 4 4 ground (0 V) 2Z 5 3 independent input or output (overvoltage tolerant) 2Y 6 2 independent input or output 1E 7 1 enable input (active HIGH) V 8 8 supply voltage CC 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 3 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Input nE Switch L OFF-state H ON-state 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V supply voltage -0.5 +6.5 V CC V input voltage [1] -0.5 +6.5 V I I input clamping current V < -0.5 V or V > 6.5 V -50 - mA IK I I I switch clamping current V < -0.5 V or V > 6.5 V - ±50 mA SK I I V switch voltage enable and disable mode -0.5 +6.5 V SW I switch current V > -0.5 V or V < 6.5 V - ±50 mA SW SW SW I supply current - 100 mA CC I ground current -100 - mA GND T storage temperature -65 +150 °C stg P total power dissipation T = -40 °C to +125 °C [2] - 250 mW tot amb [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For VSSOP8 package: above 110 °C, the value of Ptot derates linearly with 8 mW/K. For XSON8 and XQFN8 packages: above 118 °C, the value of Ptot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit V supply voltage 2.3 - 5.5 V CC V input voltage 0 - 5.5 V I V switch voltage enable and disable mode [1] 0 - 5.5 V SW T ambient temperature -40 - +125 °C amb Δt/ΔV input transition rise and fall rate V = 2.3 V to 2.7 V [2] - - 20 ns/V CC V = 2.7 V to 5.5 V [2] - - 10 ns/V CC [1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current flows from terminal nY. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 4 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max V HIGH-level V = 2.3 V to 2.7 V 0.6V - - 0.6V - V IH CC CC CC input voltage V = 3.0 V to 3.6 V 2.0 - - 2.0 - V CC V = 4.5 V to 5.5 V 0.55V - - 0.55V - V CC CC CC V LOW-level input V = 2.3 V to 2.7 V - - 0.1V - 0.1V V IL CC CC CC voltage V = 3.0 V to 3.6 V - - 0.5 - 0.5 V CC V = 4.5 V to 5.5 V - - 0.15V - 0.15V V CC CC CC I input leakage pin nE; V = 5.5 V or GND; [2] - ±0.1 ±1 - ±1 μA I I current V = 0 V to 5.5 V CC I OFF-state V = 2.3 V to 5.5 V; see Fig. 7 [2][3] - ±0.1 ±0.4 - ±1 μA S(OFF) CC leakage current I ON-state V = 2.3 V to 5.5 V; see Fig. 8 [2][3] - ±0.1 ±2 - ±4 μA S(ON) CC leakage current I supply current V = 5.5 V or GND; [2] - 0.1 4 - 4 μA CC I V = GND or V ; SW CC V = 2.3 V to 5.5 V CC ΔI additional pin nE; V = V - 0.6 V; [2] - 0.1 5 - 5 0 μA CC I CC supply current V = GND or V ; SW CC V = 3.0 V to 5.5 V CC C input - 2.5 - - - pF I capacitance C OFF-state - 8.0 - - - pF S(OFF) capacitance C ON-state - 16 - - - pF S(ON) capacitance [1] All typical values are measured at Tamb = 25 °C. [2] These typical values are measured at VCC = 3.3 V. [3] For overvoltage signals (VSW > VCC), the condition VY < VZ must be observed. 10.1. Test circuits VCC VCC nE nE VIL VIH nZ nY nZ nY IS IS VI GND VO VI GND VO 001aag488 001aag489 V = GND and V = GND or 5.5 V. V = 5.5 V or GND and V = open circuit. I O I O Fig. 7. Test circuit for measuring OFF-state leakage Fig. 8. Test circuit for measuring ON-state leakage current current 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 5 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 10.2. ON resistance Table 8. Resistance R ON At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Fig. 10 and Fig. 11. Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max R ON resistance V = GND to V ; V = V ; see Fig. 9 ON(peak) SW CC I IH (peak) I = 8 mA; V = 2.3 V to 2.7 V - 13 30 - 30 Ω SW CC I = 12 mA; V = 2.7 V - 10 25 - 25 Ω SW CC I = 24 mA; V = 3.0 V to 3.6 V - 8.3 20 - 20 Ω SW CC I = 32 mA; V = 4.5 V to 5.5 V - 7.4 15 - 15 Ω SW CC R ON resistance (rail) V = GND; V = V ; see Fig. 9 ON(rail) SW I IH I = 8 mA; V = 2.3 V to 2.7 V - 8.5 20 - 20 Ω SW CC I = 12 mA; V = 2.7 V - 8.0 18 - 18 Ω SW CC I = 24 mA; V = 3.0 V to 3.6 V - 7.5 15 - 15 Ω SW CC I = 32 mA; V = 4.5 V to 5.5 V - 7.3 10 - 10 Ω SW CC V = V ; V = V SW CC I IH I = 8 mA; V = 2.3 V to 2.7 V - 8.5 20 - 20 Ω SW CC I = 12 mA; V = 2.7 V - 7.2 18 - 18 Ω SW CC I = 24 mA; V = 3.0 V to 3.6 V - 6.5 15 - 15 Ω SW CC I = 32 mA; V = 4.5 V to 5.5 V - 5.7 10 - 10 Ω SW CC R ON resistance V = GND to V ; V = V [2] ON(flat) SW CC I IH (flatness) I = 8 mA; V = 2.5 V - 17 - - - Ω SW CC I = 12 mA; V = 2.7 V - 10 - - - Ω SW CC I = 24 mA; V = 3.3 V - 5 - - - Ω SW CC I = 32 mA; V = 5.0 V - 3 - - - Ω SW CC [1] All typical values are measured at Tamb = 25 °C and nominal VCC. [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 6 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 10.3. ON resistance test circuit and graphs 001aaa536 16 RON (Ω) VCC = 2.5 V 2.7 V 12 3.3 V 5.0 V VSW 8 VCC nE VIH 4 nY nZ VI GND ISW 0 0 2 4 6 VI (V) 001aag490 V = GND to 5.5 V; T = 25 °C. I amb V = GND to 5.5 V; R = V / I . I ON SW SW Fig. 10. Typical ON resistance as a function of input Fig. 9. Test circuit for measuring ON resistance voltage 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 7 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 001aaa537 001aaa538 16 16 RON Tamb = +85 °C RON (Ω) +25 °C (Ω) -40 °C Tamb = +85 °C 12 +125 °C 12 +25 °C -40 °C +125 °C 8 8 4 4 0 0 0 2 4 6 0 2 4 6 VI (V) VI (V) a. V = 2.5 V b. V = 2.7 V CC CC 16 001aaa539 16 001aaa540 RON RON (Ω) (Ω) 12 Tamb = +85 °C 12 +25 °C Tamb = +85 °C -40 °C +25 °C +125 °C -40 °C 8 8 +125 °C 4 4 0 0 0 2 4 6 0 2 4 6 VI (V) VI (V) c. V = 3.3 V d. V = 5.0 V CC CC Fig. 11. ON resistance as a function of input voltage at various supply voltages 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 8 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit, see Fig. 14. Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max t propagation delay nY to nZ or nZ to nY; see Fig. 12 [2][3] pd V = 2.3 V to 2.7 V - 0.4 1.2 - 2.0 ns CC V = 2.7 V - 0.4 1.0 - 1.5 ns CC V = 3.0 V to 3.6 V - 0.3 0.8 - 1.5 ns CC V = 4.5 V to 5.5 V - 0.2 0.6 - 1.0 ns CC t enable time nE to nY or nZ; see Fig. 13 [4] en V = 2.3 V to 2.7 V 1.0 4.7 12 1.0 15 ns CC V = 2.7 V 1.0 4.4 8.5 1.0 11 ns CC V = 3.0 V to 3.6 V 1.0 3.8 7.5 1.0 9.5 ns CC V = 4.5 V to 5.5 V 1.0 2.7 5.0 1.0 6.5 ns CC t disable time nE to nY or nZ; see Fig. 13 [5] dis V = 2.3 V to 2.7 V 1.0 6.0 16 1.0 20 ns CC V = 2.7 V 1.0 7.9 15 1.0 19 ns CC V = 3.0 V to 3.6 V 1.0 6.5 13.5 1.0 17 ns CC V = 4.5 V to 5.5 V 1.0 4.4 9.0 1.0 11.5 ns CC C power dissipation C = 50 pF; f = 10 MHz; V = GND to 5.5 V[6] PD L i I capacitance V = 2.5 V - 9.7 - - - pF CC V = 3.3 V - 10.3 - - - pF CC V = 5.0 V - 11.3 - - - pF CC [1] Typical values are measured at Tamb = 25 °C and nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when driven by an ideal voltage source (zero output impedance). [4] ten is the same as tPZH and tPZL. [5] tdis is the same as tPLZ and tPHZ. [6] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD x VCC2 × fi x N + Σ{(CL + CS(ON)) x VCC2 x fo} where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS(ON) = maximum ON-state switch capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ{(CL + CS(ON)) x VCC2 x fo} = sum of the outputs. 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 9 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 11.1. Waveforms and test circuit VI nY or nZ input VM VM GND tPLH tPHL VOH nZ or nY VM VM output VOL 001aaa541 Measurement points are given in Table 10. Logic levels: V and V are typical output voltage levels that occur with the output load. OL OH Fig. 12. Input (nY or nZ) to output (nZ or nY) propagation delays VI nE input VM GND tPLZ tPZL VCC output nY or nZ LOW-to-OFF VM OFF-to-LOW VX VOL tPHZ tPZH output VOH VY nY or nZ HIGH-to-OFF VM OFF-to-HIGH GND switch switch switch enabled disabled enabled 001aaa542 Measurement points are given in Table 10. Logic levels: V and V are typical output voltage levels that occur with the output load. OL OH Fig. 13. Enable and disable times Table 10. Measurement points Supply voltage Input Output V V V V V CC M M X Y 2.3 V to 2.7 V 0.5V 0.5V V + 0.1V V - 0.1V CC CC OL CC OH CC 2.7 V 1.5 V 1.5 V V + 0.3 V V - 0.3 V OL OH 3.0 V to 3.6 V 1.5 V 1.5 V V + 0.3 V V - 0.3 V OL OH 4.5 V to 5.5 V 0.5V 0.5V V + 0.3 V V - 0.3 V CC CC OL OH 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 10 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch VEXT VCC RL VI VO G DUT RT CL RL mna616 Test data is given in Table 11. Definitions test circuit: R = Termination resistance should be equal to output impedance Z of the pulse generator. T o C = Load capacitance including jig and probe capacitance. L R = Load resistance. L V = External voltage for measuring switching times. EXT Fig. 14. Test circuit for measuring switching times Table 11. Test data Supply voltage Input Load V EXT V V t, t C R t t t t t t CC I r f L L PLH, PHL PZH, PHZ PZL, PLZ 2.3 V to 2.7 V V ≤ 2.0 ns 30 pF 500 Ω open GND 2V CC CC 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6.0 V 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6.0 V 4.5 V to 5.5 V V ≤ 2.5 ns 50 pF 500 Ω open GND 2V CC CC 11.2. Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T = 25 °C. amb Symbol Parameter Conditions Min Typ Max Unit THD total harmonic distortion f = 1 kHz; R = 10 kΩ; C = 50 pF; see Fig. 15 i L L V = 2.3 V - 0.42 - % CC V = 3.0 V - 0.36 - % CC V = 4.5 V - 0.47 - % CC f = 10 kHz; R = 10 kΩ; C = 50 pF; see Fig. 15 i L L V = 2.3 V - 0.11 - % CC V = 3.0 V - 0.07 - % CC V = 4.5 V - 0.01 - % CC f -3 dB frequency response R = 600 Ω; C = 50 pF; see Fig. 16 (-3dB) L L V = 2.3 V - 160 - MHz CC V = 3.0 V - 200 - MHz CC V = 4.5 V - 210 - MHz CC R = 50 Ω; C = 5 pF; see Fig. 16 L L V = 2.3 V - 180 - MHz CC V = 3.0 V - 180 - MHz CC V = 4.5 V - 180 - MHz CC 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 11 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch Symbol Parameter Conditions Min Typ Max Unit α isolation (OFF-state) R = 600 Ω; C = 50 pF; f = 1 MHz; see Fig. 17 iso L L i V = 2.3 V - -65 - dB CC V = 3.0 V - -65 - dB CC V = 4.5 V - -62 - dB CC R = 50 Ω; C = 5 pF; f = 1 MHz; see Fig. 17 L L i V = 2.3 V - -37 - dB CC V = 3.0 V - -36 - dB CC V = 4.5 V - -36 - dB CC V crosstalk voltage between digital inputs and switch; R = 600 Ω; C = 50 pF; f = 1 MHz; ct L L i t = t = 2 ns; see Fig. 18 r f V = 2.3 V - 91 - mV CC V = 3.0 V - 119 - mV CC V = 4.5 V - 205 - mV CC Xtalk crosstalk between switches; R = 600 Ω; C = 50 pF; f = 1 MHz; see Fig. 19 L L i V = 2.3 V - -56 - dB CC V = 3.0 V - -55 - dB CC V = 4.5 V - -55 - dB CC between switches; R = 50 Ω; C = 5 pF; f = 1 MHz; see Fig. 19 L L i V = 2.3 V - -29 - dB CC V = 3.0 V - -28 - dB CC V = 4.5 V - -28 - dB CC Q charge injection C = 0.1 nF; V = 0 V; R = 0 Ω; f = 1 MHz; R = 1 MΩ; see Fig. 20 inj L gen gen i L V = 2.5 V - < 0.003 - pC CC V = 3.3 V - 0.003 - pC CC V = 4.5 V - 0.0035 - pC CC V = 5.5 V - 0.0035 - pC CC 11.3. Test circuits VCC 0.5VCC nE VIH RL 10 µF nY/nZ nZ/nY VO fi 600 Ω CL D 001aag492 Test conditions: V = 2.3 V: V = 2 V (p-p). CC i V = 3 V: V = 2.5 V (p-p). CC i V = 4.5 V: V = 4 V (p-p). CC i Fig. 15. Test circuit for measuring total harmonic distortion 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 12 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch VCC 0.5VCC nE VIH RL 0.1 µF nY/nZ nZ/nY VO fi 50 Ω CL dB 001aag491 To obtain 0 dBm level at the output, adjust f voltage. Increase f frequency until dB meter reads -3 dB. i i Fig. 16. Test circuit for measuring the frequency response when switch is in ON-state 0.5VCC VCC 0.5VCC nE RL VIL RL 0.1 µF nY/nZ nZ/nY VO fi 50 Ω CL dB 001aag493 To obtain 0 dBm level at the input, adjust f voltage. i Fig. 17. Test circuit for measuring isolation (OFF-state) VCC nE nY/nZ nZ/nY VO G liongpiuct 50 Ω 600 Ω RL CL 0.5VCC 0.5VCC 001aag494 Fig. 18. Test circuit for measuring crosstalk voltage (between digital inputs and switch) 0.5VCC 1E VIH RL 0.1 µF Ri 1Y or 1Z 1Z or 1Y 600 Ω CHANNEL fi 50 Ω ON C50L pF VO1 0.5VCC 2E VIL RL 2Y or 2Z 2Z or 2Y CHANNEL R60i 0 Ω OFF C50L pF VO2 001aag496 20 log (V / V ) or 20 log (V / V ). 10 O2 O1 10 O1 O2 Fig. 19. Test circuit for measuring crosstalk between switches 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 13 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch VCC nE Rgen nY/nZ nZ/nY VO G liongpiuct Vgen R1 LM Ω C0.L1 nF 001aag495 a. Test circuit logic off on off input (nE) VO ΔVO mna675 b. Input and output pulse definitions Q = ΔV x C . inj O L ΔV = output voltage variation. O R = generator resistance. gen V = generator voltage. gen Fig. 20. Test circuit for measuring charge injection 12. Application information The 74LVCV2G66 is used to reduce component count and footprint in low-power portable applications. Typical ‘66’ devices do not have low-power enable inputs causing a high ΔI . To reduce power CC consumption in portable (battery) applications, a current limiting resistor is used. (see Fig. 21a). The low-power enable inputs of the 74LVCV2G66 have much lower ΔI , eliminating the necessity CC of the current limiting resistor (see Fig. 21b). 5 V 5 V 1 MΩ VCC VCC nE nE 3 V 3 V nY nZ nY nZ '66' device 74LVCV2G66 (a) (b) 001aaa550 Fig. 21. Application example 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 14 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 13. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 D E A X c y HE v A Z 8 5 Q A2 A pin 1 index A1 (A3) θ Lp 1 4 detail X L e w bp 0 5 mm scale Dimensions (mm are the original dimensions) A Unit max. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) θ max 0.15 0.85 0.27 0.23 2.1 2.4 3.2 0.40 0.21 0.4 8° mm nom 1 0.12 0.5 0.4 0.2 0.08 0.1 min 0.00 0.60 0.17 0.08 1.9 2.2 3.0 0.15 0.19 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. sot765-1_po Outline References European Issue date version IEC JEDEC JEITA projection 07-06-02 SOT765-1 MO-187 16-05-31 Fig. 22. Package outline SOT765-1 (VSSOP8) 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 15 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm SOT833-1 b 1 2 3 4 4× L1 L (2) e 8 7 6 5 e1 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT mA(a1x) mAa1x b D E e e1 L L1 0.25 2.0 1.05 0.35 0.40 mm 0.5 0.04 0.6 0.5 0.17 1.9 0.95 0.27 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 07-11-14 SOT833-1 - - - MO-252 - - - 07-12-07 Fig. 23. Package outline SOT833-1 (XSON8) 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 16 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch XQFN8: plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm SOT902-2 X D B A terminal 1 index area E A A1 detail X e C v C A B b w C y1C y 4 3 5 e1 terminal 1 index area 2 6 k L 1 7 8 metal area L2 not for soldering L k L3 L1 0 1 2 mm scale Dimensions Unit(1) A A1 b D E e e1 k L L1 L2 L3 v w y y1 max 0.5 0.05 0.25 1.65 1.65 0.35 0.15 0.25 0.35 mm nom 0.20 1.60 1.60 0.55 0.5 0.30 0.10 0.20 0.30 0.1 0.05 0.05 0.05 min 0.00 0.15 1.55 1.55 0.2 0.25 0.05 0.15 0.25 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. sot902-2_po Outline References European Issue date version IEC JEDEC JEITA projection 16-07-14 SOT902-2 - - - MO-255 - - - 16-11-08 Fig. 24. Package outline SOT902-2 (XQFN8) 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 17 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch 14. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test 15. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVCV2G66 v.8 20181105 Product data sheet - 74LVCV2G66 v.7 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. • Type numbers 74LVCV2G66GD (SOT996-2/XSON8) removed. 74LVCV2G66 v.7 20161215 Product data sheet - 74LVCV2G66 v.6 Modifications: • Table 7: The maximum limits for leakage current and supply current have changed. • •Type number 74LVCV2G66DP (SOT505-2) removed. 74LVCV2G66 v.6 20150722 Product data sheet - 74LVCV2G66 v.5 Modifications: • Added type numbers 74LVCV2G66GT and.74LVCV2G66GM 74LVCV2G66 v.5 20130329 Product data sheet - 74LVCV2G66 v.4 Modifications: • For type number 74LVCV2G66GD XSON8U has changed to XSON8. 74LVCV2G66 v.4 20111122 Product data sheet - 74LVCV2G66 v.3 Modifications: • Legal pages updated. 74LVCV2G66 v.3 20100616 Product data sheet - 74LVCV2G66 v.2 74LVCV2G66 v.2 20080703 Product data sheet - 74LVCV2G66 v.1 74LVCV2G66 v.1 20040402 Product data sheet - - 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 18 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch injury, death or severe property or environmental damage. Nexperia and its 16. Legal information suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the Data sheet status product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status Product Definition Applications — Applications that are described herein for any of these [1][2] status [3] products are for illustrative purposes only. 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This between the translated and English versions. document supersedes and replaces all information supplied prior to the publication hereof. Trademarks Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical Notice: All referenced brands, product names, service names and systems or equipment, nor in applications where failure or malfunction trademarks are the property of their respective owners. of an Nexperia product can reasonably be expected to result in personal 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 19 / 20

Nexperia 74LVCV2G66 Overvoltage tolerant bilateral switch Contents 1. General description......................................................1 2. Features and benefits..................................................1 3. Ordering information....................................................1 4. Marking..........................................................................2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description.............................................................3 7. Functional description.................................................4 8. Limiting values.............................................................4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 10.1. Test circuits................................................................5 10.2. ON resistance............................................................6 10.3. ON resistance test circuit and graphs........................7 11. Dynamic characteristics.............................................9 11.1. Waveforms and test circuit.......................................10 11.2. Additional dynamic characteristics...........................11 11.3. Test circuits..............................................................12 12. Application information...........................................14 13. Package outline........................................................15 14. Abbreviations............................................................18 15. Revision history........................................................18 16. Legal information......................................................19 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 5 November 2018 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 8 — 5 November 2018 20 / 20