74LVC373A Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 3 — 22 November 2012 Product data sheet 1. General description The 74LVC373A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable input (pin LE) and an output enable input (pin OE) are common to all internal latches. When pin LE is HIGH, data at the D-inputs (pins D0 to D7) enters the latches. In this condition, the latches are transparent, that is, a latch output will change each time its corresponding D-input changes. When pin LE is LOW, the latches store the information that was present at the D-inputs one set-up time preceding the HIGH-to-LOW transition of pin LE. When pin OE is LOW, the contents of the eight latches are available at the Q-outputs (pins Q0 to Q7). When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of input pin OE does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications. The 74LVC373A is functionally identical to the 74LVC573A, but has a different pin arrangement. 2. Features and benefits  5 V tolerant inputs/outputs for interfacing with 5 V logic  Wide supply voltage range from 1.2 V to 3.6 V  CMOS low power consumption  Direct interface with TTL levels  High-impedance outputs when V = 0 V CC  Complies with JEDEC standard: JESD8-7A (1.65Vto1.95V) JESD8-5A (2.3Vto2.7V) JESD8-C/JESD36 (2.7Vto3.6V)  ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-B exceeds 200V CDM JESD22-C101E exceeds 1000V  Specified from 40 C to +85 C and 40 C to +125 C

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 3. Ordering information Table 1. Ordering info rmation Type number Package Temperature range Name Description Version 74LVC373AD 40Cto+125C SO20 plastic small outline package; 20leads; bodywidth7.5 SOT163-1 mm 74LVC373ADB 40Cto+125C SSOP20 plastic shrink small outline package; 20leads; SOT339-1 bodywidth 5.3 mm 74LVC373APW 40Cto+125C TSSOP20 plastic thin shrink small outline package; 20leads; SOT360-1 body width 4.4 mm 74LVC373ABQ 40Cto+125C DHVQFN20 plastic dual in-line compatible thermal enhanced very SOT764-1 thin quad flat package; no leads; 20terminals; body 2.5  4.5  0.85 mm 4. Functional diagram 1 EN 18 D7 Q7 19 11 C1 17 D6 Q6 16 3 2 14 D5 Q5 15 1D 4 5 13 D4 Q4 12 7 6 8 D3 Q3 9 8 9 7 D2 Q2 6 13 12 4 D1 Q1 5 14 15 3 D0 Q0 2 17 16 LE OE 18 19 mna881 11 1 mna880 Fig 1. Logic symbol Fig 2. IEC logic symbol 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 2 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 3 D0 Q0 2 4 D1 Q1 5 7 D2 Q2 6 8 D3 Q3 9 LATCH 3-STATE 13 D4 1 to 8 OUTPUTS Q4 12 LE 14 D5 Q5 15 17 D6 Q6 16 18 D7 Q7 19 LE LE 11 LE 1 OE D Q mna882 LE mna189 Fig 3. Functional diagram Fig 4. Logic diagram for one latch D0 D1 D2 D3 D4 D5 D6 D7 D Q D Q D Q D Q D Q D Q D Q D Q LE LE LE LE LE LE LE LE LE LE LE LE LE LE LE LE LE OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mna883 Fig 5. Logic diagram 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 3 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 5. Pinning information 5.1 Pinning terminal 1 E CC index area O V 1 20 Q0 2 19 Q7 D0 3 18 D7 OE 1 20 VCC D1 4 17 D6 Q0 2 19 Q7 D0 3 18 D7 Q1 5 16 Q6 373A D1 4 17 D6 Q2 6 15 Q5 Q1 5 16 Q6 D2 7 14 D5 373A Q2 6 15 Q5 D3 8 GND(1) 13 D4 D2 7 14 D5 Q3 9 12 Q4 D3 8 13 D4 0 1 1 1 Q3 9 12 Q4 D E GND 10 11 LE N L 001aad089 G 001aad090 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 6. Pin configuration for SO20 and (T)SSOP20 Fig 7. Pin configuration for DHVQFN20 5.2 Pin description Table 2. Pin descripti on Symbol Pin Description OE 1 output enable input (active LOW) LE 11 latch enable input (active HIGH) D[0:7] 3, 4, 7, 8, 13, 14, 17, 18 data input Q[0:7] 2, 5, 6, 9, 12, 15, 16, 19 latch output GND 10 ground (0 V) V 20 supply voltage CC 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 4 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 6. Functional description Table 3. Functional ta ble[1] Operating modes Input Internal latch Output OE LE Dn Qn Enable and read register L H L L L (transparent mode) L H H H H Latch and read register L L l L L L L h H H Latch register and disable H L l L Z outputs H L h H Z [1] H = HIGH voltage level h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition L = LOW voltage level l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition Z = High-impedance OFF-state 7. Limiting values Table 4. Limiting valu es In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V supply voltage 0.5 +6.5 V CC I input clamping current V < 0 50 - mA IK I V input voltage [1] 0.5 +6.5 V I I output clamping current V > V or V < 0 - 50 mA OK O CC O V output voltage HIGH or LOW-state [2] 0.5 V + 0.5 V O CC 3-state [2] 0.5 +6.5 V I output current V = 0 V to V - 50 mA O O CC I supply current - 100 mA CC I ground current 100 - mA GND T storage temperature 65 +150 C stg P total power dissipation T = 40 C to +125 C [3] - 500 mW tot amb [1] The minimum input voltage ratings may be exceeded if the input current ratings are observed. [2] The output voltage ratings may be exceeded if the output current ratings are observed. [3] For SO20 packages: above 70C the value of Ptot derates linearly with 8mW/K. For (T)SSOP20 packages: above 60C the value of Ptot derates linearly with 5.5mW/K. For DHVQFN20 packages: above 60C the value of Ptot derates linearly with 4.5mW/K. 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 5 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 8. Recommended operating conditions Table 5. Recommend ed operating conditions Symbol Parameter Conditions Min Typ Max Unit V supply voltage 1.65 - 3.6 V CC functional 1.2 - - V V input voltage 0 - 5.5 V I V output voltage HIGH or LOW-state 0 - V V O CC 3-state 0 - 5.5 V T ambient temperature in free air 40 - +125 C amb t/V input transition rise and fall rate V = 1.65 V to 2.7 V 0 - 20 ns/V CC V = 2.7 V to 3.6 V 0 - 10 ns/V CC 9. Static characteristics Table 6. Static charac teristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max V HIGH-level V = 1.2 V 1.08 - - 1.08 - V IH CC input voltage V = 1.65 V to 1.95 V 0.65  V - - 0.65  V - V CC CC CC V = 2.3 V to 2.7 V 1.7 - - 1.7 - V CC V = 2.7 V to 3.6 V 2.0 - - 2.0 - V CC V LOW-level V = 1.2 V - - 0.12 - 0.12 V IL CC input voltage V = 1.65 V to 1.95 V - - 0.35  V - 0.35  V V CC CC CC V = 2.3 V to 2.7 V - - 0.7 - 0.7 V CC V = 2.7 V to 3.6 V - - 0.8 - 0.8 V CC V HIGH-level V =V orV OH I IH IL output I =100A; V 0.2 - - V 0.3 - V O CC CC voltage V =1.65Vto3.6V CC I =4mA; V = 1.65 V 1.2 - - 1.05 - V O CC I =8mA; V = 2.3V 1.8 - - 1.65 - V O CC I =12mA; V = 2.7 V 2.2 - - 2.05 - V O CC I =18mA; V = 3.0 V 2.4 - - 2.25 - V O CC I =24mA; V = 3.0 V 2.2 - - 2.0 - V O CC V LOW-level V =V orV OL I IH IL output I =100A; - - 0.2 - 0.3 V O voltage V =1.65Vto3.6 V CC I =4mA; V = 1.65 V - - 0.45 - 0.65 V O CC I =8mA; V = 2.3V - - 0.6 - 0.8 V O CC I =12mA; V = 2.7 V - - 0.4 - 0.6 V O CC I =24mA; V = 3.0 V - - 0.55 - 0.8 V O CC I input leakage V = 3.6 V; V =5.5VorGND - 0.1 5 - 20 A I CC I current 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 6 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Table 6. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max I OFF-state V =V orV ; V =3.6 V; - 0.1 5 - 20 A OZ I IH IL CC output V =5.5VorGND; O current I power-off V = 0 V; V orV = 5.5V - 0.1 10 - 20 A OFF CC I O leakage supply I supply V = 3.6 V; V =V orGND; - 0.1 10 - 40 A CC CC I CC current I =0A O I additional per input pin; V =2.7Vto3.6 - 5 500 - 5000 A CC CC supply V; V =V 0.6V; I =0A I CC O current C input V =0 V to 3.6V; - 5.0 - - - pF I CC capacitance V =GNDtoV I CC [1] All typical values are measured at VCC=3.3V (unless stated otherwise) and Tamb=25C. 10. Dynamic characteristics Table 7. Dynamic cha racteristics Voltages are referenced to GND (ground=0V). For test circuit see Figure12. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max t propagation delay Dn to Qn; see Figure8 [2] pd V = 1.2 V - 14 - - - ns CC V = 1.65V to 1.95 V 1.5 6.5 15.8 1.5 18.2 ns CC V = 2.3V to 2.7 V 1.0 3.4 8.2 1.0 9.4 ns CC V = 2.7V 1.5 3.4 7.8 1.5 10.0 ns CC V = 3.0V to3.6V 1.5 2.9 6.8 1.5 8.5 ns CC LEtoQn; see Figure9 [2] V = 1.2 V - 16 - - - ns CC V = 1.65V to 1.95 V 2.2 7.3 16.8 2.2 19.3 ns CC V = 2.3V to 2.7 V 1.5 3.9 8.6 1.5 10.0 ns CC V = 2.7V 1.5 3.5 8.2 1.5 10.5 ns CC V = 3.0V to3.6V 1.5 3.3 7.2 1.5 9.0 ns CC t enable time OEto Qn; see Figure10 [2] en V = 1.2 V - 17 - - - ns CC V = 1.65 V to 1.95 V 1.5 6.8 17.6 1.5 20.3 ns CC V = 2.3 V to 2.7 V 1.5 3.8 9.7 1.5 11.2 ns CC V = 2.7 V 1.5 3.8 8.7 1.5 11.0 ns CC V = 3.0 V to 3.6 V 1.5 3.1 7.7 1.5 10.0 ns CC 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 7 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground=0V). For test circuit see Figure12. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max t disable time OEto Qn; see Figure10 [2] dis V = 1.2 V - 8.0 - - - ns CC V = 1.65 V to 1.95 V 2.3 4.3 10.3 2.3 11.9 ns CC V = 2.3 V to 2.7 V 1.0 2.4 5.8 1.0 6.8 ns CC V = 2.7 V 1.5 3.2 7.1 1.5 9.0 ns CC V = 3.0 V to 3.6 V 1.5 3.0 6.1 1.5 8.0 ns CC t pulse width LE HIGH; see Figure9 W V = 1.65 V to 1.95 V 5.0 - - 5.0 - ns CC V = 2.3 V to 2.7 V 4.0 - - 4.0 - ns CC V = 2.7 V 3.0 - - 3.0 - ns CC V = 3.0 V to 3.6 V 3.0 1.5 - 3.0 - ns CC t set-up time DntoLE; see Figure11 su V = 1.65 V to 1.95 V 4.0 - - 4.0 - ns CC V = 2.3 V to 2.7 V 3.0 - - 3.0 - ns CC V = 2.7 V 2.0 - - 2.0 - ns CC V = 3.0 V to 3.6 V 2.0 0.0 - 2.0 - ns CC t hold time DntoLE; see Figure11 h V = 1.65 V to 1.95 V 3.0 - - 3.0 - ns CC V = 2.3 V to 2.7 V 2.0 - - 2.0 - ns CC V = 2.7 V 1.5 - - 1.5 - ns CC V = 3.0 V to 3.6 V 1.5 0.3 - 1.5 - ns CC t output skew time V =3.0V to3.6 V [3] - - 1.0 - 1.5 ns sk(0) CC C power dissipation per latch; V = GND to V [4] PD I CC capacitance V = 1.65 V to 1.95 V - 16.6 - - pF CC V = 2.3 V to 2.7 V - 19.2 - - pF CC V = 3.0 V to 3.6 V - 21.6 - - pF CC [1] Typical values are measured at Tamb=25C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively. [2] t is the same as t and t . pd PLH PHL t is the same as t and t . en PZL PZH t is the same as t and t . dis PLZ PHZ [3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. [4] CPDis used to determine the dynamic power dissipation (PDinW). PD=CPDVCC2fiN+(CLVCC2fo)where: f = input frequency in MHz; f =output frequency in MHz i o C =output load capacitance inpF L V =supply voltage in Volts CC N= number of inputs switching (CLVCC2fo)=sum of the outputs 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 8 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 11. AC waveforms VI Dn input VM GND tPHL tPLH VOH Qn output VM VOL mna884 Measurement points are given in Table8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Input (Dn) to output (Qn) propagation delays VI LE input VM GND tW tPHL tPLH VOH Qn output VM VOL mna885 Measurement points are given in Table8. V and V are typical output voltage levels that occur with the output load. OL OH Fig 9. Latch Enable input (LE) pulse width, the latch enable input to output (Qn) propagation delays 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 9 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state VI OE input VM GND tPLZ tPZL VCC Qn output LOW-to-OFF V M OFF-to-LOW VOL VX tPHZ tPZH Qn output VOH VY HIGH-to-OFF VM OFF-to-HIGH GND output output output enabled disabled enabled mna886 Measurement points are given in Table8. V and V are typical output voltage levels that occur with the output load. OL OH Fig 10. 3-state enable and disable times VI Dn input VM GND th th tsu tsu VI LE input VM GND mna887 Measurement points are given in Table8. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 11. Data set-up and hold times for the Dn input to the LE input Table 8. Measuremen t points Supply voltage Input Output V V V V V V CC I M M X Y 1.2V V 0.5  V 0.5  V V + 0.15 V V  0.15 V CC CC CC OL OH 1.65Vto1.95V V 0.5  V 0.5  V V + 0.15 V V  0.15 V CC CC CC OL OH 2.3Vto2.7V V 0.5  V 0.5  V V + 0.15 V V  0.15 V CC CC CC OL OH 2.7V 2.7 V 1.5 V 1.5 V V + 0.3 V V  0.3 V OL OH 3.0V to 3.6V 2.7 V 1.5 V 1.5 V V + 0.3 V V  0.3 V OL OH 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 10 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state tW VI 90 % negative pulse VM VM 10 % 0 V tf tr tr tf VI 90 % positive pulse VM VM 10 % 0 V tW VEXT VCC RL VI VO G DUT RT CL RL 001aae331 Test data is given in Table9. Definitions for test circuit: RL = Load resistance. C = Load capacitance including jig and probe capacitance. L RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 12. Test circuit for measuring switching times Table 9. Test data Supply voltage Input Load V EXT V t, t C R t , t t , t t , t I r f L L PLH PHL PLZ PZL PHZ PZH 1.2V V  2 ns 30pF 1 k open 2  V GND CC CC 1.65Vto1.95V V  2 ns 30pF 1 k open 2  V GND CC CC 2.3Vto2.7V V  2 ns 30pF 500 open 2  V GND CC CC 2.7V 2.7V  2.5ns 50pF 500 open 2  V GND CC 3.0Vto3.6V 2.7V  2.5ns 50pF 500 open 2  V GND CC 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 11 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 12. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c y HE v M A Z 20 11 Q A2 A A1 (A 3 ) pin 1 index θ Lp L 1 10 detail X e w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mAax. A1 A2 A3 bp c D(1) E(1) e HE L Lp Q v w y Z(1) θ 0.3 2.45 0.49 0.32 13.0 7.6 10.65 1.1 1.1 0.9 mm 2.65 0.25 1.27 1.4 0.25 0.25 0.1 0.1 2.25 0.36 0.23 12.6 7.4 10.00 0.4 1.0 0.4 8o 0.012 0.096 0.019 0.013 0.51 0.30 0.419 0.043 0.043 0.035 0o inches 0.1 0.01 0.05 0.055 0.01 0.01 0.004 0.004 0.089 0.014 0.009 0.49 0.29 0.394 0.016 0.039 0.016 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT163-1 075E04 MS-013 03-02-19 Fig 13. Package outline SOT163-1 (SO20) 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 12 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 D E A X c y HE v M A Z 20 11 Q A2 A A1 (A 3 ) pin 1 index θ Lp L 1 10 detail X w M e bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax. A1 A2 A3 bp c D(1) E(1) e HE L Lp Q v w y Z(1) θ mm 2 00..2015 11..8605 0.25 00..3285 00..2009 77..40 55..42 0.65 77..96 1.25 10..0633 00..97 0.2 0.13 0.1 00..95 80oo Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT339-1 MO-150 03-02-19 Fig 14. Package outline SOT339-1 (SSOP20) 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 13 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 D E A X c y HE v M A Z 20 11 Q A2 (A 3 ) A pin 1 index A1 θ Lp L 1 10 detail X w M e bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) θ mm 1.1 00..1055 00..9850 0.25 00..3109 00..21 66..64 44..53 0.65 66..62 1 00..7550 00..43 0.2 0.13 0.1 00..52 80oo Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT360-1 MO-153 03-02-19 Fig 15. Package outline SOT360-1 (TSSOP20) 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 14 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1 D B A A A1 E c terminal 1 detail X index area terminal 1 e1 C index area e b v M C A B y1 C y w M C 2 9 L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) A(1) UNIT max. A1 b c D(1) Dh E(1) Eh e e1 L v w y y1 0.05 0.30 4.6 3.15 2.6 1.15 0.5 mm 1 0.2 0.5 3.5 0.1 0.05 0.05 0.1 0.00 0.18 4.4 2.85 2.4 0.85 0.3 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 02-10-17 SOT764-1 - - - MO-241 - - - 03-01-27 Fig 16. Package outline SOT764-1 (DHVQFN20) 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 15 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 13. Abbreviations Table 10. Abbreviation s Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history T able 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC373A v.3 20121122 Product data sheet - 74LVC373A v.2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table4, Table5, Table6, Table7, Table8 and Table9: values added for lower voltage ranges. 74LVC373A v.2 20030519 Product specification - 74LVC373A v.1 74LVC373A v.1 19980729 Product specification - - 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 16 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Draft — The document is a draft version only. The content is still under malfunction of a Nexperia product can reasonably be expected internal review and subject to formal approval, which may result in to result in personal injury, death or severe property or environmental modifications or additions. Nexperia does not give any damage. Nexperia and its suppliers accept no liability for representations or warranties as to the accuracy or completeness of inclusion and/or use of Nexperia products in such equipment or information included herein and shall have no liability for the consequences of applications and therefore such inclusion and/or use is at the customer’s own use of such information. risk. Short data sheet — A short data sheet is an extract from a full data sheet Applications — Applications that are described herein for any of these with the same product type number(s) and title. A short data sheet is intended products are for illustrative purposes only. Nexperia makes no for quick reference only and should not be relied upon to contain detailed and representation or warranty that such applications will be suitable for the full information. For detailed and full information see the relevant full data specified use without further testing or modification. sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the Customers are responsible for the design and operation of their applications full data sheet shall prevail. and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product Product specification — The information and data provided in a Product design. It is customer’s sole responsibility to determine whether the Nexperia data sheet shall define the specification of the product as agreed between product is suitable and fit for the customer’s applications and Nexperia and its customer, unless Nexperia and products planned, as well as for the planned application and use of customer have explicitly agreed otherwise in writing. In no event however, customer’s third party customer(s). Customers should provide appropriate shall an agreement be valid in which the Nexperia product is design and operating safeguards to minimize the risks associated with their deemed to offer functions and qualities beyond those described in the applications and products. Product data sheet. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the 15.3 Disclaimers customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia Limited warranty and liability — Information in this document is believed to products in order to avoid a default of the applications and be accurate and reliable. However, Nexperia does not give any the products or of the application or use by customer’s third party representations or warranties, expressed or implied, as to the accuracy or customer(s). Nexperia does not accept any liability in this respect. completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no Limiting values — Stress above one or more limiting values (as defined in responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC60134) will cause permanent source outside of Nexperia. damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in In no event shall Nexperia be liable for any indirect, incidental, the Recommended operating conditions section (if present) or the punitive, special or consequential damages (including - without limitation - lost Characteristics sections of this document is not warranted. Constant or profits, lost savings, business interruption, costs related to the removal or repeated exposure to limiting values will permanently and irreversibly affect replacement of any products or rework charges) whether or not such the quality and reliability of the device. damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual customer for the products described herein shall be limited in accordance agreement is concluded only the terms and conditions of the respective with the Terms and conditions of commercial sale of Nexperia. agreement shall apply. Nexperia hereby expressly objects to Right to make changes — Nexperia reserves the right to make applying the customer’s general terms and conditions with regard to the changes to information published in this document, including without purchase of Nexperia products by customer. limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 17 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Export control — This document as well as the item(s) described herein Nexperia’s specifications such use shall be solely at customer’s may be subject to export control regulations. Export might require a prior own risk, and (c) customer fully indemnifies Nexperia for any authorization from competent authorities. liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s Non-automotive qualified products — Unless this data sheet expressly standard warranty and Nexperia’s product specifications. states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested Translations — A non-English (translated) version of a document is for in accordance with automotive testing or application requirements. Nexperia reference only. The English version shall prevail in case of any discrepancy accepts no liability for inclusion and/or use of between the translated and English versions. non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in 15.4 Trademarks automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the Notice: All referenced brands, product names, service names and trademarks product for such automotive applications, use and specifications, and (b) are the property of their respective owners. whenever customer uses the product for automotive applications beyond 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 3 — 22 November 2012 18 of 19

74LVC373A Nexperia Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 17. Contents 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Recommended operating conditions. . . . . . . . 6 9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 10 Dynamic characteristics. . . . . . . . . . . . . . . . . . 7 11 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 12 13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16 14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 16 Contact information. . . . . . . . . . . . . . . . . . . . . 18 17 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 © Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 22 November 2012