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74HCT594D,118产品简介:

ICGOO电子元器件商城为您提供74HCT594D,118由NXP Semiconductors设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74HCT594D,118价格参考¥6.78-¥6.78。NXP Semiconductors74HCT594D,118封装/规格:逻辑 - 移位寄存器, 。您可以下载74HCT594D,118参考资料、Datasheet数据手册功能说明书,资料中有74HCT594D,118 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC 8BIT SHIFT REGISTER 16SOIC

产品分类

逻辑 - 移位寄存器

品牌

NXP Semiconductors

数据手册

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产品图片

产品型号

74HCT594D,118

PCN封装

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PCN组件/产地

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rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

74HCT

产品培训模块

http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=24983

供应商器件封装

16-SO

元件数

1

其它名称

568-8180-2
74HCT594D,118-ND
74HCT594D-T
74HCT594D-T-ND
74HCT594D118
935043390118

功能

串行至并行,串行

包装

带卷 (TR)

安装类型

表面贴装

封装/外壳

16-SOIC(0.154",3.90mm 宽)

工作温度

-40°C ~ 125°C

标准包装

2,500

每元件位数

8

电压-电源

4.5 V ~ 5.5 V

输出类型

标准

逻辑类型

移位寄存器

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PDF Datasheet 数据手册内容提取

74HC594; 74HCT594 8-bit shift register with output register Rev. 4 — 25 February 2016 Product data sheet 1. General description The 74HC594; 74HCT594 is an 8-bit serial-in/serial or parallel-out shift register with a storage register. Separate clock and reset inputs are provided on both shift and storage registers. The device features a serial input (DS) and a serial output (Q7S) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the SHCP input, and the data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. A LOW level on one of the two register reset pins (SHR and STR) will clear the corresponding register. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits  Synchronous serial input and output  Complies with JEDEC standard No.7A  8-bit parallel output  Shift and storage registers have independent direct clear and clocks  Independent clocks for shift and storage registers  100 MHz (typical)  Input levels: For 74HC594: CMOS level For 74HCT594: TTL level  Multiple package options  Specified from 40 Cto+85C and from 40 Cto+125C 3. Applications  Serial-to parallel data conversion  Remote control holding register

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 4. Ordering information Table 1. Ordering info rmation Type number Package Temperature Name Description Version range 74HC594D 40 C to +125 C SO16 plastic small outline package; 16leads; SOT109-1 bodywidth3.9mm 74HCT594D 74HC594DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16leads; SOT338-1 bodywidth5.3mm 74HCT594DB 5. Functional diagram (cid:20)(cid:23) (cid:39)(cid:54) (cid:20)(cid:20) (cid:54)(cid:43)(cid:38)(cid:51) (cid:27)(cid:16)(cid:54)(cid:55)(cid:36)(cid:42)(cid:40)(cid:3)(cid:54)(cid:43)(cid:44)(cid:41)(cid:55)(cid:3)(cid:53)(cid:40)(cid:42)(cid:44)(cid:54)(cid:55)(cid:40)(cid:53) (cid:20)(cid:19) (cid:54)(cid:43)(cid:53) (cid:28) (cid:52)(cid:26)(cid:54) (cid:20)(cid:21) (cid:54)(cid:55)(cid:38)(cid:51) (cid:20)(cid:22) (cid:27)(cid:16)(cid:37)(cid:44)(cid:55)(cid:3)(cid:54)(cid:55)(cid:50)(cid:53)(cid:36)(cid:42)(cid:40)(cid:3)(cid:53)(cid:40)(cid:42)(cid:44)(cid:54)(cid:55)(cid:40)(cid:53) (cid:54)(cid:55)(cid:53) (cid:20)(cid:24) (cid:20) (cid:21) (cid:22) (cid:23) (cid:24) (cid:25) (cid:26) (cid:52)(cid:19) (cid:52)(cid:20) (cid:52)(cid:21) (cid:52)(cid:22) (cid:52)(cid:23) (cid:52)(cid:24) (cid:52)(cid:25) (cid:52)(cid:26) (cid:80)(cid:69)(cid:70)(cid:22)(cid:21)(cid:19) Fig 1. Functional diagram (cid:54)(cid:43)(cid:38)(cid:51) (cid:54)(cid:55)(cid:38)(cid:51) (cid:20)(cid:22) (cid:54)(cid:55)(cid:53) (cid:53)(cid:21) (cid:20)(cid:20) (cid:20)(cid:21) (cid:20)(cid:21) (cid:54)(cid:55)(cid:38)(cid:51) (cid:38)(cid:21) (cid:28) (cid:52)(cid:26)(cid:54) (cid:20)(cid:19) (cid:54)(cid:43)(cid:53) (cid:53)(cid:20) (cid:54)(cid:53)(cid:42)(cid:27) (cid:20)(cid:24) (cid:52)(cid:19) (cid:54)(cid:43)(cid:38)(cid:51) (cid:20)(cid:20) (cid:38)(cid:20)(cid:18) (cid:20) (cid:52)(cid:20) (cid:20)(cid:23) (cid:20)(cid:24) (cid:39)(cid:54) (cid:20)(cid:39) (cid:21)(cid:39) (cid:52)(cid:19) (cid:21) (cid:52)(cid:21) (cid:20) (cid:52)(cid:20) (cid:39)(cid:54) (cid:20)(cid:23) (cid:22) (cid:52)(cid:22) (cid:21) (cid:52)(cid:21) (cid:23) (cid:52)(cid:23) (cid:22) (cid:52)(cid:22) (cid:24) (cid:52)(cid:24) (cid:23) (cid:52)(cid:23) (cid:24) (cid:25) (cid:52)(cid:25) (cid:52)(cid:24) (cid:25) (cid:26) (cid:52)(cid:26) (cid:52)(cid:25) (cid:26) (cid:20)(cid:19) (cid:20)(cid:22) (cid:52)(cid:26) (cid:28) (cid:52)(cid:26)(cid:54) (cid:54)(cid:43)(cid:53) (cid:54)(cid:55)(cid:53) (cid:80)(cid:69)(cid:70)(cid:22)(cid:20)(cid:28) (cid:80)(cid:69)(cid:70)(cid:22)(cid:21)(cid:21) Fig 2. Logic symbol Fig 3. IEC logic symbol 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 2 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register (cid:54)(cid:55)(cid:36)(cid:42)(cid:40)(cid:3)(cid:19) (cid:54)(cid:55)(cid:36)(cid:42)(cid:40)(cid:54)(cid:3)(cid:20)(cid:3)(cid:55)(cid:50)(cid:3)(cid:25) (cid:54)(cid:55)(cid:36)(cid:42)(cid:40)(cid:3)(cid:26) (cid:39)(cid:54) (cid:39) (cid:52) (cid:39) (cid:52) (cid:39) (cid:52) (cid:52)(cid:26)(cid:54) (cid:41)(cid:41)(cid:54)(cid:43)(cid:19) (cid:41)(cid:41)(cid:54)(cid:43)(cid:26) (cid:38)(cid:51) (cid:38)(cid:51) (cid:53) (cid:53) (cid:54)(cid:43)(cid:38)(cid:51) (cid:54)(cid:43)(cid:53) (cid:39) (cid:52) (cid:39) (cid:52) (cid:41)(cid:41)(cid:54)(cid:55)(cid:19) (cid:41)(cid:41)(cid:54)(cid:55)(cid:26) (cid:38)(cid:51) (cid:38)(cid:51) (cid:53) (cid:53) (cid:54)(cid:55)(cid:38)(cid:51) (cid:54)(cid:55)(cid:53) (cid:52)(cid:19) (cid:52)(cid:20) (cid:52)(cid:21) (cid:52)(cid:22) (cid:52)(cid:23) (cid:52)(cid:24) (cid:52)(cid:25) (cid:52)(cid:26) (cid:80)(cid:69)(cid:70)(cid:22)(cid:21)(cid:20) Fig 4. Logic diagram (cid:54)(cid:43)(cid:38)(cid:51) (cid:39)(cid:54) (cid:54)(cid:55)(cid:38)(cid:51) (cid:54)(cid:43)(cid:53) (cid:54)(cid:55)(cid:53) (cid:52)(cid:19) (cid:52)(cid:20) (cid:52)(cid:25) (cid:52)(cid:26) (cid:52)(cid:26)(cid:54) (cid:80)(cid:69)(cid:70)(cid:22)(cid:21)(cid:22) Fig 5. Timing diagram 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 3 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 6. Pinning information 6.1 Pinning (cid:26)(cid:23)(cid:43)(cid:38)(cid:24)(cid:28)(cid:23)(cid:3) (cid:26)(cid:23)(cid:43)(cid:38)(cid:55)(cid:24)(cid:28)(cid:23) (cid:52)(cid:20) (cid:20) (cid:20)(cid:25) (cid:57)(cid:38)(cid:38) (cid:26)(cid:23)(cid:43)(cid:38)(cid:24)(cid:28)(cid:23)(cid:3) (cid:52)(cid:21) (cid:21) (cid:20)(cid:24) (cid:52)(cid:19) (cid:26)(cid:23)(cid:43)(cid:38)(cid:55)(cid:24)(cid:28)(cid:23) (cid:52)(cid:22) (cid:22) (cid:20)(cid:23) (cid:39)(cid:54) (cid:52)(cid:20) (cid:20) (cid:20)(cid:25) (cid:57)(cid:38)(cid:38) (cid:52)(cid:23) (cid:23) (cid:20)(cid:22) (cid:54)(cid:55)(cid:53) (cid:52)(cid:21) (cid:21) (cid:20)(cid:24) (cid:52)(cid:19) (cid:52)(cid:22) (cid:22) (cid:20)(cid:23) (cid:39)(cid:54) (cid:52)(cid:24) (cid:24) (cid:20)(cid:21) (cid:54)(cid:55)(cid:38)(cid:51) (cid:52)(cid:23) (cid:23) (cid:20)(cid:22) (cid:54)(cid:55)(cid:53) (cid:52)(cid:25) (cid:25) (cid:20)(cid:20) (cid:54)(cid:43)(cid:38)(cid:51) (cid:52)(cid:24) (cid:24) (cid:20)(cid:21) (cid:54)(cid:55)(cid:38)(cid:51) (cid:52)(cid:25) (cid:25) (cid:20)(cid:20) (cid:54)(cid:43)(cid:38)(cid:51) (cid:52)(cid:26) (cid:26) (cid:20)(cid:19) (cid:54)(cid:43)(cid:53) (cid:52)(cid:26) (cid:26) (cid:20)(cid:19) (cid:54)(cid:43)(cid:53) (cid:42)(cid:49)(cid:39) (cid:27) (cid:28) (cid:52)(cid:26)(cid:54) (cid:42)(cid:49)(cid:39) (cid:27) (cid:28) (cid:52)(cid:26)(cid:54) (cid:19)(cid:19)(cid:20)(cid:68)(cid:68)(cid:73)(cid:25)(cid:20)(cid:20) (cid:19)(cid:19)(cid:20)(cid:68)(cid:68)(cid:73)(cid:25)(cid:20)(cid:22) Fig 6. Pin configuration SO16 Fig 7. Pin configuration SSOP16 6.2 Pin description Table 2. Pin descripti on Symbol Pin Description Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 15, 1, 2, 3, 4, 5, 6, 7 parallel data output GND 8 ground (0V) Q7S 9 serial data output SHR 10 shift register reset (active LOW) SHCP 11 shift register clock input STCP 12 storage register clock input STR 13 storage register reset (active LOW) DS 14 serial data input V 16 supply voltage CC 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 4 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 7. Functional description Table 3. Function tab le[1] Function Input SHR STR SHCP STCP DS Clear shift register L X X X X Clear storage register X L X X X Load DS into shift register stage 0, advance previous stage data to the next stage H X  X H or L Transfer shift register data to storage register and outputs Qn X H X  X Shift register one count pulse ahead of storage register H H   X [1] H=HIGH voltage level; L=LOW voltage level; =LOW-to-HIGH transition; X=don’t care. 8. Limiting values Table 4. Limiting valu es In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V supply voltage 0.5 +7.0 V CC I input clamping current V < 0.5V or V >V +0.5 V [1] - 20 mA IK I I CC I output clamping current V < 0.5 V or V > V + 0.5V [1] - 20 mA OK O O CC I output current V = 0.5 V to V + 0.5 V O O CC Serial data output Q7S - 25 mA Parallel data output - 35 mA I supply current Serial data output Q7S - 50 mA CC Parallel data output - 70 mA I ground current Serial data output Q7S - 50 mA GND Parallel data output - 70 mA T storage temperature 65 +150 C stg P total power dissipation T = 40 C to +125C [2] - 500 mW tot amb [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO16 packages: above 70C the value of Ptotderates linearly with 8mW/K. For SSOP16 packages: above 60C the value of Ptotderates linearly with 5.5mW/K. 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 5 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 9. Recommended operating conditions Table 5. Recommend ed operating conditions Voltages are referenced to GND (ground = 0V) Symbol Parameter Conditions 74HC594 74HCT594 Unit Min Typ Max Min Typ Max V supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V CC V input voltage 0 - V 0 - V V I CC CC V output voltage 0 - V 0 - V V O CC CC T ambient temperature 40 - +125 40 - +125 C amb t/V input transition rise and fall rate V = 2.0 V - - 625 - - - ns/V CC V = 4.5 V - 1.67 139 - 1.67 139 ns/V CC V = 6.0 V - - 83 - - - ns/V CC 10. Static characteristics Table 6. Static charac teristics type 74HC594 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit T = 25 C amb V HIGH-level input voltage V = 2.0 V 1.5 1.2 - V IH CC V = 4.5 V 3.15 2.4 - V CC V = 6.0 V 4.2 3.2 - V CC V LOW-level input voltage V = 2.0 V - 0.8 0.5 V IL CC V = 4.5 V - 2.1 1.35 V CC V = 6.0 V - 2.8 1.8 V CC V HIGH-level output voltage V = V or V OH I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V 3.98 4.32 - V O CC I = 5.2mA; V = 6.0V 5.48 5.81 - V O CC Parallel data outputs I = 6.0mA; V = 4.5V 3.98 4.32 - V O CC I = 7.8mA; V = 6.0V 5.48 5.81 - V O CC V LOW-level output voltage V = V or V OL I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V - 0.15 0.26 V O CC I = 5.2mA; V = 6.0V - 0.16 0.26 V O CC Parallel data outputs I = 6.0mA; V = 4.5V - 0.15 0.26 V O CC I = 7.8mA; V = 6.0V - 0.16 0.26 V O CC I input leakage current V =V orGND; V =6.0V - - 0.1 A I I CC CC I supply current V = V or GND; I = 0A; - - 8.0 A CC I CC O V =6.0V CC C input capacitance - 3.5 - pF i 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 6 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register Table 6. Static characteristics type 74HC594 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit T = 40 C to +85 C amb V HIGH-level input voltage V = 2.0 V 1.5 - - V IH CC V = 4.5 V 3.15 - - V CC V = 6.0 V 4.2 - - V CC V LOW-level input voltage V = 2.0 V - - 0.5 V IL CC V = 4.5 V - - 1.35 V CC V = 6.0 V - - 1.8 V CC V HIGH-level output voltage V = V or V OH I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V 3.84 - - V O CC I = 5.2mA; V = 6.0V 5.34 - - V O CC Parallel data outputs I = 6.0mA; V = 4.5V 3.84 - - V O CC I = 7.8 mA; V = 6.0V 5.34 - - V O CC V LOW-level output voltage V = V or V OL I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V - - 0.33 V O CC I = 5.2mA; V = 6.0V - - 0.33 V O CC Parallel data outputs I = 6.0mA; V = 4.5V - - 0.33 V O CC I = 7.8mA; V = 6.0V - - 0.33 V O CC I input leakage current V =V orGND; V =6.0V - - 1.0 A I I CC CC I supply current V = V or GND; I = 0A; - - 80 A CC I CC O V =6.0V CC T = 40 C to +125 C amb V HIGH-level input voltage V = 2.0 V 1.5 - - V IH CC V = 4.5 V 3.15 - - V CC V = 6.0 V 4.2 - - V CC V LOW-level input voltage V = 2.0 V - - 0.5 V IL CC V = 4.5 V - - 1.35 V CC V = 6.0 V - - 1.8 V CC V HIGH-level output voltage V = V or V OH I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V 3.7 - - V O CC I = 5.2mA; V = 6.0V 5.2 - - V O CC Parallel data outputs I = 6.0mA; V = 4.5V 3.7 - - V O CC I = 7.8mA; V = 6.0V 5.2 - - V O CC 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 7 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register Table 6. Static characteristics type 74HC594 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit V LOW-level output voltage V = V or V OL I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V - - 0.4 V O CC I = 5.2mA; V = 6.0V - - 0.4 V O CC Parallel data outputs I = 6.0mA; V = 4.5V - - 0.4 V O CC I = 7.8mA; V = 6.0V - - 0.4 V O CC I input leakage current V =V orGND; V =6.0V - - 1.0 A I I CC CC I supply current V = V or GND; I = 0A; - - 160 A CC I CC O V =6.0V CC Table 7. Static charac teristics type 74HCT594 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit T = 25 C amb V HIGH-level input voltage V = 4.5 V to 5.5 V 2.0 1.6 - V IH CC V LOW-level input voltage V = 4.5 V to 5.5 V - 1.2 0.8 V IL CC V HIGH-level output voltage V = V or V OH I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V 3.98 4.32 - V O CC Parallel data outputs I = 6.0mA; V = 4.5V 3.98 4.32 - V O CC V LOW-level output voltage V = V or V OL I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V - 0.15 0.26 V O CC Parallel data outputs I = 6.0mA; V = 4.5V - 0.16 0.26 V O CC I input leakage current V =V orGND; V =5.5V - - 0.1 A I I CC CC I supply current V = V or GND; I = 0A; - - 8.0 A CC I CC O V =5.5V CC I additional supply current per input pin; V =V  2.1V and CC I CC other inputs at V orGND; CC I =0A; V =4.5Vto5.5V O CC pins SHR, SHCP, STCP, STR - 150 540 A pin DS - 25 90 A C input capacitance - 3.5 - pF i 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 8 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register Table 7. Static characteristics type 74HCT594 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit T = 40 C to +85 C amb V HIGH-level input voltage V = 4.5 V to 5.5 V 2.0 - - V IH CC V LOW-level input voltage V = 4.5 V to 5.5 V - - 0.8 V IL CC V HIGH-level output voltage V = V or V OH I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V 3.84 - - V O CC Parallel data outputs I = 6.0mA; V = 4.5V 3.84 - - V O CC V LOW-level output voltage V = V or V OL I IH IL Serial data output I = 4.0mA; V = 4.5V - - 0.33 V O CC Parallel data outputs I = 6.0mA; V = 4.5V - - 0.33 V O CC I input leakage current V =V orGND; V =5.5V - - 1.0 A I I CC CC I supply current V = V or GND; I = 0A; - - 80 A CC I CC O V =5.5V CC I additional supply current per input pin; V =V  2.1V and CC I CC other inputs at V orGND; CC I =0A; V =4.5Vto5.5V O CC pins SHR, SHCP, STCP, STR - - 675 A pin DS - - 112.5 A T = 40 C to +125 C amb V HIGH-level input voltage V = 4.5 V to 5.5 V 2.0 - - V IH CC V LOW-level input voltage V = 4.5 V to 5.5 V - - 0.8 V IL CC V HIGH-level output voltage V = V or V OH I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V 3.7 - - V O CC Parallel data outputs I = 6.0mA; V = 4.5V 3.7 - - V O CC V LOW-level output voltage V = V or V OL I IH IL Serial data output Q7S I = 4.0mA; V = 4.5V - - 0.4 V O CC Parallel data outputs I = 6.0mA; V = 4.5V - - 0.4 V O CC I input leakage current V =V orGND; V =5.5V - - 1.0 A I I CC CC I supply current V = V or GND; I = 0A; - - 160 A CC I CC O V =5.5V CC I additional supply current per input pin; V =V  2.1V and CC I CC other inputs at V orGND; CC I =0A; V =4.5Vto5.5V O CC pins SHR, SHCP, STCP, STR - - 735 A pin DS - - 122.5 A 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 9 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 11. Dynamic characteristics Table 8. Dynamic cha racteristics type 74HC594 GND = 0 V; t = t = 6ns; C = 50pF; see Figure14. r f L Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max t propagation SHCP to Q7S; seeFigure8 [1] pd delay V = 2.0 V - 44 150 - 185 - 225 ns CC V = 4.5 V - 16 30 - 37 - 45 ns CC V = 5.0 V; C =15pF - 13 - - - - - ns CC L V = 6.0 V - 14 26 - 31 - 38 ns CC STCP to Qn; seeFigure9 V = 2.0 V - 44 150 - 185 - 225 ns CC V = 4.5 V - 16 30 - 37 - 45 ns CC V = 5.0 V; C = 15pF - 13 - - - - - ns CC L V = 6.0 V - 14 26 - 31 - 38 ns CC t HIGH to SHR to Q7S; see Figure12 PHL LOW V = 2.0 V - 39 150 - 185 - 225 ns CC propagation delay VCC = 4.5 V - 14 30 - 37 - 45 ns V = 5.0 V; C =15pF - 11 - - - - - ns CC L V = 6.0 V - 12 26 - 31 - 38 ns CC STR to Qn; seeFigure13 V = 2.0 V - 39 125 - 155 - 185 ns CC V = 4.5 V - 14 25 - 31 - 37 ns CC V = 5.0 V; C =15pF - 11 - - - - - ns CC L V = 6.0 V - 12 21 - 26 - 31 ns CC t HIGH to Q7S; see Figure8 THL LOW output V = 2.0 V - 19 75 - 95 - 110 ns CC transition time VCC = 4.5 V - 7 15 - 19 - 22 ns V = 6.0 V - 6 13 - 16 - 19 ns CC Qn V = 2.0 V - 14 60 - 75 - 90 ns CC V = 4.5 V - 5 12 - 15 - 18 ns CC V = 6.0 V - 4 10 - 13 - 15 ns CC t LOW to Q7S; see Figure8 TLH HIGH V = 2.0 V - 19 75 - 95 - 110 ns CC output transition VCC = 4.5 V - 7 15 - 19 - 22 ns time V = 6.0 V - 6 13 - 16 - 19 ns CC Qn V = 2.0 V - 14 60 - 75 - 90 ns CC V = 4.5 V - 5 12 - 15 - 18 ns CC V = 6.0 V - 4 10 - 13 - 15 ns CC 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 10 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register Table 8. Dynamic characteristics type 74HC594 …continued GND = 0 V; t = t = 6ns; C = 50pF; see Figure14. r f L Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max t pulse width SHCP(HIGH or LOW); W seeFigure8 V = 2.0 V 80 10 - 100 - 120 - ns CC V = 4.5 V 16 4 - 20 - 24 - ns CC V = 6.0 V 14 3 - 17 - 20 - ns CC STCP (HIGH or LOW); seeFigure9 V = 2.0 V 80 10 - 100 - 120 - ns CC V = 4.5 V 16 4 - 20 - 24 - ns CC V = 6.0 V 14 3 - 17 - 20 - ns CC SHR and STR (HIGH or LOW); see Figure12 and Figure13 V = 2.0 V 80 14 - 100 - 120 - ns CC V = 4.5 V 16 5 - 20 - 24 - ns CC V = 6.0 V 14 4 - 17 - 20 - ns CC t set-up time DStoSHCP; see Figure10 su V = 2.0 V 100 10 - 125 - 150 - ns CC V = 4.5 V 20 4 - 25 - 30 - ns CC V = 6.0 V 17 3 - 21 - 26 - ns CC SHRtoSTCP; seeFigure11 V = 2.0 V 100 14 - 125 - 150 - ns CC V = 4.5 V 20 5 - 25 - 30 - ns CC V = 6.0 V 17 4 - 21 - 26 - ns CC SHCPtoSTCP; seeFigure9 V = 2.0 V 100 17 - 125 - 150 - ns CC V = 4.5 V 20 6 - 25 - 30 - ns CC V = 6.0 V 17 5 - 21 - 26 - ns CC t hold time DStoSHCP; see Figure10 h V = 2.0 V 25 8 - 30 - 35 - ns CC V = 4.5 V 5 3 - 6 - 7 - ns CC V = 6.0 V 4 2 - 5 - 6 - ns CC t recovery SHRtoSHCP and rec time STRtoSTCP; see Figure12 and Figure13 V = 2.0 V 50 14 - 65 - 75 - ns CC V = 4.5 V 10 5 - 13 - 15 - ns CC V = 6.0 V 9 4 - 11 - 13 - ns CC 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 11 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register Table 8. Dynamic characteristics type 74HC594 …continued GND = 0 V; t = t = 6ns; C = 50pF; see Figure14. r f L Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max f maximum SHCPor STCP; max frequency seeFigure8 and Figure9 V = 2.0 V 6.0 30 - 4.8 - 4.0 - MHz CC V = 4.5 V 30 92 - 24 - 20 - MHz CC V = 5.0 V; C = 15pF - 100 - - - - - MHz CC L V = 6.0 V 35 109 - 28 - 24 - MHz CC C power V = GND to V ; [2] - 84 - - - - - pF PD I CC dissipation V =5V; f =1MHz CC i capacitance [1] t is the same as t and t . pd PHL PLH [2] CPD is used to determine the dynamic power dissipation (PD in W): PD=CPDVCC2fiN+(CLVCC2fo) where: f =input frequency in MHz; i f =output frequency in MHz; o C =output load capacitance in pF; L V =supply voltage in V; CC N=number of inputs switching; (CLVCC2fo)=sum of outputs. Table 9. Dynamic cha racteristics type 74HCT594 GND = 0 V; V = 4.5 V; t = t = 6ns; C = 50pF; see Figure14. CC r f L Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max t propagation SHCP to Q7S; see Figure8 [1] - 18 32 - 40 - 48 ns pd delay V = 5.0 V; C = 15pF - 15 - - - - - ns CC L STCP to Qn; see Figure9 - 18 32 - 40 - 48 ns V = 5.0 V; C = 15pF - 15 - - - - - ns CC L t HIGH to SHR to Q7S; see Figure12 - 17 30 - 38 - 45 ns PHL LOW V = 5.0 V; C = 15pF - 14 - - - - - ns CC L propagation delay STR to Qn; see Figure13 - 17 30 - 38 - 45 ns V = 5.0 V; C = 15pF - 14 - - - - - ns CC L t HIGH to Q7S; seeFigure8 THL LOW output V = 4.5 V - 7 15 - 19 - 22 ns CC transition time Qn V = 4.5 V - 5 12 - 15 - 18 ns CC t LOW to Q7S; seeFigure8 TLH HIGH output V = 4.5 V - 7 15 - 19 - 22 ns CC transition time Qn V = 4.5 V - 5 12 - 15 - 18 ns CC 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 12 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register Table 9. Dynamic characteristics type 74HCT594 …continued GND = 0 V; V = 4.5 V; t = t = 6ns; C = 50pF; see Figure14. CC r f L Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max t pulse width SHCP (HIGH or LOW); 16 4 - 20 - 24 - ns W seeFigure8 STCP (HIGH or LOW); 16 4 - 20 - 24 - ns seeFigure9 SHR and STR (HIGH or 16 6 - 20 - 24 - ns LOW); see Figure12 and Figure13 t set-up time DStoSHCP; see Figure10 20 4 - 25 - 30 - ns su SHRtoSTCP; 20 6 - 25 - 30 - ns seeFigure11 SHCPtoSTCP; 20 7 - 25 - 30 - ns seeFigure9 t hold time DStoSHCP; see Figure10 5 3 - 6 - 7 - ns h t recovery SHRtoSHCP and 10 5 - 13 - 15 - ns rec time STRtoSTCP; see Figure12 and Figure13 f maximum SHCPor STCP; 30 92 - 24 - 20 - MHz max frequency seeFigure8 and Figure9 V = 5.0 V; C = 15pF - 100 - - - - - MHz CC L C power V = GND to V  1.5V; [2] - 89 - - - - - pF PD I CC dissipation V =5V; f =1MHz CC i capacitance [1] t is the same as t and t . pd PHL PLH [2] CPD is used to determine the dynamic power dissipation (PD in W): PD=CPDVCC2fiN+(CLVCC2fo) where: f =input frequency in MHz; i f =output frequency in MHz; o C =output load capacitance in pF; L V =supply voltage in V; CC N=number of inputs switching; (CLVCC2fo)=sum of outputs. 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 13 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 12. Waveforms (cid:20)(cid:18)(cid:73)(cid:80)(cid:68)(cid:91) (cid:54)(cid:43)(cid:38)(cid:51)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:58) (cid:87)(cid:51)(cid:47)(cid:43) (cid:87)(cid:51)(cid:43)(cid:47) (cid:52)(cid:26)(cid:54)(cid:3)(cid:82)(cid:88)(cid:87)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:55)(cid:47)(cid:43) (cid:87)(cid:55)(cid:43)(cid:47) (cid:19)(cid:19)(cid:20)(cid:68)(cid:68)(cid:72)(cid:22)(cid:23)(cid:20) Measurement points are given in Table10. t and t are the same as t . PLH PHL pd tTLH = LOW to HIGH output transition time; tTHL = HIGH to LOW output transition time. Fig 8. The shift clock (SHCP) to output (Q7S) propagation delays, the shift clock pulse width, the maximum shift clock frequency, and output transition times (cid:54)(cid:43)(cid:38)(cid:51)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:86)(cid:88) (cid:20)(cid:18)(cid:73)(cid:80)(cid:68)(cid:91) (cid:54)(cid:55)(cid:38)(cid:51)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:58) (cid:87)(cid:51)(cid:47)(cid:43) (cid:87)(cid:51)(cid:43)(cid:47) (cid:52)(cid:81)(cid:3)(cid:82)(cid:88)(cid:87)(cid:83)(cid:88)(cid:87)(cid:86) (cid:57)(cid:48) (cid:80)(cid:79)(cid:68)(cid:24)(cid:20)(cid:21) Measurement points are given in Table10. tPLH and tPHL are the same as tpd. Fig 9. The storage clock (STCP) to output (Qn), propagation delays, the storage clock pulse width, the maximum storage clock pulse frequency and the shift clock to storage clock set-up time 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 14 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register (cid:54)(cid:43)(cid:38)(cid:51)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:86)(cid:88) (cid:87)(cid:86)(cid:88) (cid:87)(cid:75) (cid:87)(cid:75) (cid:39)(cid:54)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:52)(cid:26)(cid:3)(cid:82)(cid:88)(cid:87)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:19)(cid:19)(cid:20)(cid:68)(cid:68)(cid:72)(cid:22)(cid:23)(cid:21) Measurement points are given in Table10. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 10. The data set-up time and hold times for DS input to SHCP (cid:54)(cid:43)(cid:53)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:86)(cid:88) (cid:54)(cid:55)(cid:38)(cid:51)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:52)(cid:81)(cid:3)(cid:82)(cid:88)(cid:87)(cid:83)(cid:88)(cid:87)(cid:86) (cid:57)(cid:48) (cid:80)(cid:69)(cid:70)(cid:22)(cid:21)(cid:25) Measurement points are given in Table10. Fig 11. The set-up time shift reset (SHR) to storage clock (STCP) 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 15 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register (cid:54)(cid:43)(cid:53)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:58) (cid:87)(cid:85)(cid:72)(cid:70) (cid:54)(cid:43)(cid:38)(cid:51)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:51)(cid:43)(cid:47) (cid:52)(cid:26)(cid:54)(cid:3)(cid:82)(cid:88)(cid:87)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:80)(cid:69)(cid:70)(cid:22)(cid:21)(cid:23) Measurement points are given in Table10. tPLH and tPHL are the same as tpd. Fig 12. The shift reset (SHR) pulse width, the shift reset to output (Q7S) propagation delay and the shift reset to shift clock (SHCP) recovery time (cid:54)(cid:55)(cid:53)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:58) (cid:87)(cid:85)(cid:72)(cid:70) (cid:54)(cid:55)(cid:38)(cid:51)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:51)(cid:43)(cid:47) (cid:52)(cid:81)(cid:3)(cid:82)(cid:88)(cid:87)(cid:83)(cid:88)(cid:87)(cid:86) (cid:57)(cid:48) (cid:80)(cid:69)(cid:70)(cid:22)(cid:21)(cid:24) Measurement points are given in Table10. t and t are the same as t . PLH PHL pd Fig 13. The storage reset (STR) pulse width, the storage reset to output (Qn) propagation delay and the storage reset to storage clock (STCP) recovery time Table 10. Measuremen t points Type Input Output V V M M 74HC594 0.5V 0.5V CC CC 74HCT594 1.3V 1.3 V 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 16 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register (cid:87)(cid:58) (cid:57)(cid:44) (cid:28)(cid:19)(cid:3)(cid:8) (cid:81)(cid:72)(cid:74)(cid:68)(cid:87)(cid:76)(cid:89)(cid:72)(cid:3) (cid:83)(cid:88)(cid:79)(cid:86)(cid:72) (cid:57)(cid:48) (cid:57)(cid:48) (cid:20)(cid:19)(cid:3)(cid:8) (cid:19)(cid:3)(cid:57) (cid:87)(cid:73) (cid:87)(cid:85) (cid:87)(cid:85) (cid:87)(cid:73) (cid:57)(cid:44) (cid:28)(cid:19)(cid:3)(cid:8) (cid:83)(cid:82)(cid:86)(cid:76)(cid:87)(cid:76)(cid:89)(cid:72)(cid:3) (cid:83)(cid:88)(cid:79)(cid:86)(cid:72) (cid:57)(cid:48) (cid:57)(cid:48) (cid:20)(cid:19)(cid:3)(cid:8) (cid:19)(cid:3)(cid:57) (cid:87)(cid:58) (cid:57)(cid:38)(cid:38) (cid:57)(cid:38)(cid:38) (cid:57)(cid:44) (cid:57)(cid:50) (cid:3)(cid:53)(cid:47) (cid:54)(cid:20) (cid:42) (cid:39)(cid:56)(cid:55) (cid:82)(cid:83)(cid:72)(cid:81) (cid:53)(cid:55) (cid:38)(cid:47) (cid:19)(cid:19)(cid:20)(cid:68)(cid:68)(cid:71)(cid:28)(cid:27)(cid:22) Test data is given in Table11. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistance S1 = Test selection switch Fig 14. Test circuit for measuring switching times Table 11. Test data Type Input Load S1 position V t, t C R t , t t , t t , t I r f L L PHL PLH PZH PHZ PZL PLZ 74HC594 V 6ns 15pF, 50 pF 1k open GND V CC CC 74HCT594 3V 6ns 15pF, 50 pF 1k open GND V CC 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 17 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 13. Package outline (cid:54)(cid:50)(cid:20)(cid:25)(cid:29)(cid:3)(cid:83)(cid:79)(cid:68)(cid:86)(cid:87)(cid:76)(cid:70)(cid:3)(cid:86)(cid:80)(cid:68)(cid:79)(cid:79)(cid:3)(cid:82)(cid:88)(cid:87)(cid:79)(cid:76)(cid:81)(cid:72)(cid:3)(cid:83)(cid:68)(cid:70)(cid:78)(cid:68)(cid:74)(cid:72)(cid:30)(cid:3)(cid:20)(cid:25)(cid:3)(cid:79)(cid:72)(cid:68)(cid:71)(cid:86)(cid:30)(cid:3)(cid:69)(cid:82)(cid:71)(cid:92)(cid:3)(cid:90)(cid:76)(cid:71)(cid:87)(cid:75)(cid:3)(cid:22)(cid:17)(cid:28)(cid:3)(cid:80)(cid:80)(cid:3) (cid:54)(cid:50)(cid:55)(cid:20)(cid:19)(cid:28)(cid:16)(cid:20)(cid:3) (cid:39)(cid:3) (cid:40)(cid:3) (cid:36)(cid:3) (cid:59)(cid:3) (cid:70)(cid:3) (cid:92)(cid:3) (cid:43)(cid:3)(cid:40)(cid:3) (cid:89)(cid:3)(cid:48)(cid:3) (cid:36)(cid:3) (cid:61)(cid:3) (cid:20)(cid:25)(cid:3) (cid:28)(cid:3) (cid:52)(cid:3) (cid:36)(cid:3)(cid:21)(cid:3)(cid:36)(cid:3)(cid:20)(cid:3) (cid:11)(cid:36)(cid:3)(cid:22)(cid:3)(cid:3)(cid:12)(cid:3) (cid:36)(cid:3) (cid:83)(cid:76)(cid:81)(cid:3)(cid:20)(cid:3)(cid:76)(cid:81)(cid:71)(cid:72)(cid:91)(cid:3) (cid:537)(cid:3) (cid:47)(cid:3)(cid:83)(cid:3) (cid:20)(cid:3) (cid:27)(cid:3) (cid:47)(cid:3) (cid:72)(cid:3) (cid:90)(cid:3)(cid:48)(cid:3) (cid:71)(cid:72)(cid:87)(cid:68)(cid:76)(cid:79)(cid:3)(cid:59)(cid:3) (cid:69)(cid:3)(cid:83)(cid:3) (cid:19)(cid:3) (cid:21)(cid:17)(cid:24)(cid:3) (cid:24)(cid:3)(cid:80)(cid:80)(cid:3) (cid:86)(cid:70)(cid:68)(cid:79)(cid:72)(cid:3) (cid:39)(cid:44)(cid:48)(cid:40)(cid:49)(cid:54)(cid:44)(cid:50)(cid:49)(cid:54)(cid:3)(cid:11)(cid:76)(cid:81)(cid:70)(cid:75)(cid:3)(cid:71)(cid:76)(cid:80)(cid:72)(cid:81)(cid:86)(cid:76)(cid:82)(cid:81)(cid:86)(cid:3)(cid:68)(cid:85)(cid:72)(cid:3)(cid:71)(cid:72)(cid:85)(cid:76)(cid:89)(cid:72)(cid:71)(cid:3)(cid:73)(cid:85)(cid:82)(cid:80)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:82)(cid:85)(cid:76)(cid:74)(cid:76)(cid:81)(cid:68)(cid:79)(cid:3)(cid:80)(cid:80)(cid:3)(cid:71)(cid:76)(cid:80)(cid:72)(cid:81)(cid:86)(cid:76)(cid:82)(cid:81)(cid:86)(cid:12)(cid:3) (cid:56)(cid:49)(cid:44)(cid:55)(cid:3) (cid:80)(cid:36)(cid:68)(cid:91)(cid:3)(cid:17)(cid:3) (cid:36)(cid:3)(cid:20)(cid:3) (cid:36)(cid:3)(cid:21)(cid:3) (cid:36)(cid:3)(cid:22)(cid:3) (cid:69)(cid:3)(cid:83)(cid:3) (cid:70)(cid:3) (cid:39)(cid:3)(cid:11)(cid:20)(cid:12)(cid:3) (cid:40)(cid:3)(cid:11)(cid:20)(cid:12)(cid:3) (cid:72)(cid:3) (cid:43)(cid:3)(cid:40)(cid:3) (cid:47)(cid:3) (cid:47)(cid:3)(cid:83)(cid:3) (cid:52)(cid:3) (cid:89)(cid:3) (cid:90)(cid:3) (cid:92)(cid:3) (cid:61)(cid:3)(cid:11)(cid:20)(cid:12)(cid:3) (cid:537)(cid:3) (cid:80)(cid:80)(cid:3) (cid:20)(cid:17)(cid:26)(cid:24)(cid:3) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3) (cid:20)(cid:17)(cid:23)(cid:24)(cid:3) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:23)(cid:28)(cid:3) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3) (cid:20)(cid:19)(cid:17)(cid:19)(cid:3) (cid:23)(cid:17)(cid:19)(cid:3) (cid:20)(cid:17)(cid:21)(cid:26)(cid:3) (cid:25)(cid:17)(cid:21)(cid:3) (cid:20)(cid:17)(cid:19)(cid:3)(cid:24)(cid:3) (cid:20)(cid:17)(cid:19)(cid:3) (cid:19)(cid:17)(cid:26)(cid:3) (cid:19)(cid:17)(cid:21)(cid:3)(cid:24)(cid:3) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:20)(cid:3) (cid:19)(cid:17)(cid:26)(cid:3) (cid:19)(cid:17)(cid:20)(cid:19)(cid:3) (cid:20)(cid:17)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:22)(cid:25)(cid:3) (cid:19)(cid:17)(cid:20)(cid:28)(cid:3) (cid:28)(cid:17)(cid:27)(cid:3) (cid:22)(cid:17)(cid:27)(cid:3) (cid:24)(cid:17)(cid:27)(cid:3) (cid:19)(cid:17)(cid:23)(cid:3) (cid:19)(cid:17)(cid:25)(cid:3) (cid:19)(cid:17)(cid:22)(cid:3) (cid:27)(cid:3)(cid:82)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:19)(cid:3) (cid:19)(cid:17)(cid:19)(cid:24)(cid:26)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:28)(cid:3)(cid:19)(cid:17)(cid:19)(cid:20)(cid:19)(cid:19)(cid:3) (cid:19)(cid:17)(cid:22)(cid:28)(cid:3) (cid:19)(cid:17)(cid:20)(cid:25)(cid:3) (cid:19)(cid:17)(cid:21)(cid:23)(cid:23)(cid:3) (cid:19)(cid:17)(cid:19)(cid:22)(cid:28)(cid:3) (cid:19)(cid:17)(cid:19)(cid:21)(cid:27)(cid:3) (cid:19)(cid:17)(cid:19)(cid:21)(cid:27)(cid:3) (cid:19)(cid:3)(cid:82)(cid:3) (cid:76)(cid:81)(cid:70)(cid:75)(cid:72)(cid:86)(cid:3) (cid:19)(cid:17)(cid:19)(cid:25)(cid:28)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:3) (cid:19)(cid:17)(cid:19)(cid:24)(cid:3) (cid:19)(cid:17)(cid:19)(cid:23)(cid:20)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:3) (cid:19)(cid:17)(cid:19)(cid:19)(cid:23)(cid:3) (cid:19)(cid:17)(cid:19)(cid:19)(cid:23)(cid:3) (cid:19)(cid:17)(cid:19)(cid:23)(cid:28)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:23)(cid:3)(cid:19)(cid:17)(cid:19)(cid:19)(cid:26)(cid:24)(cid:3) (cid:19)(cid:17)(cid:22)(cid:27)(cid:3) (cid:19)(cid:17)(cid:20)(cid:24)(cid:3) (cid:19)(cid:17)(cid:21)(cid:21)(cid:27)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:25)(cid:3) (cid:19)(cid:17)(cid:19)(cid:21)(cid:19)(cid:3) (cid:19)(cid:17)(cid:19)(cid:20)(cid:21)(cid:3) (cid:49)(cid:82)(cid:87)(cid:72)(cid:3) (cid:20)(cid:17)(cid:3)(cid:51)(cid:79)(cid:68)(cid:86)(cid:87)(cid:76)(cid:70)(cid:3)(cid:82)(cid:85)(cid:3)(cid:80)(cid:72)(cid:87)(cid:68)(cid:79)(cid:3)(cid:83)(cid:85)(cid:82)(cid:87)(cid:85)(cid:88)(cid:86)(cid:76)(cid:82)(cid:81)(cid:86)(cid:3)(cid:82)(cid:73)(cid:3)(cid:19)(cid:17)(cid:20)(cid:24)(cid:3)(cid:80)(cid:80)(cid:3)(cid:11)(cid:19)(cid:17)(cid:19)(cid:19)(cid:25)(cid:3)(cid:76)(cid:81)(cid:70)(cid:75)(cid:12)(cid:3)(cid:80)(cid:68)(cid:91)(cid:76)(cid:80)(cid:88)(cid:80)(cid:3)(cid:83)(cid:72)(cid:85)(cid:3)(cid:86)(cid:76)(cid:71)(cid:72)(cid:3)(cid:68)(cid:85)(cid:72)(cid:3)(cid:81)(cid:82)(cid:87)(cid:3)(cid:76)(cid:81)(cid:70)(cid:79)(cid:88)(cid:71)(cid:72)(cid:71)(cid:17)(cid:3)(cid:3) (cid:50)(cid:56)(cid:55)(cid:47)(cid:44)(cid:49)(cid:40)(cid:3) (cid:3)(cid:53)(cid:40)(cid:41)(cid:40)(cid:53)(cid:40)(cid:49)(cid:38)(cid:40)(cid:54)(cid:3) (cid:40)(cid:56)(cid:53)(cid:50)(cid:51)(cid:40)(cid:36)(cid:49)(cid:3) (cid:44)(cid:54)(cid:54)(cid:56)(cid:40)(cid:3)(cid:39)(cid:36)(cid:55)(cid:40)(cid:3) (cid:57)(cid:40)(cid:53)(cid:54)(cid:44)(cid:50)(cid:49)(cid:3) (cid:3)(cid:44)(cid:40)(cid:38)(cid:3) (cid:3)(cid:45)(cid:40)(cid:39)(cid:40)(cid:38)(cid:3) (cid:3)(cid:45)(cid:40)(cid:44)(cid:55)(cid:36)(cid:3) (cid:51)(cid:53)(cid:50)(cid:45)(cid:40)(cid:38)(cid:55)(cid:44)(cid:50)(cid:49)(cid:3) (cid:28)(cid:28)(cid:16)(cid:20)(cid:21)(cid:16)(cid:21)(cid:26)(cid:3) (cid:3)(cid:54)(cid:50)(cid:55)(cid:20)(cid:19)(cid:28)(cid:16)(cid:20)(cid:3) (cid:3)(cid:19)(cid:26)(cid:25)(cid:40)(cid:19)(cid:26)(cid:3) (cid:3)(cid:48)(cid:54)(cid:16)(cid:19)(cid:20)(cid:21)(cid:3) (cid:19)(cid:22)(cid:16)(cid:19)(cid:21)(cid:16)(cid:20)(cid:28)(cid:3) Fig 15. Package outline SOT109-1 (SO16) 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 18 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register (cid:54)(cid:54)(cid:50)(cid:51)(cid:20)(cid:25)(cid:29)(cid:3)(cid:83)(cid:79)(cid:68)(cid:86)(cid:87)(cid:76)(cid:70)(cid:3)(cid:86)(cid:75)(cid:85)(cid:76)(cid:81)(cid:78)(cid:3)(cid:86)(cid:80)(cid:68)(cid:79)(cid:79)(cid:3)(cid:82)(cid:88)(cid:87)(cid:79)(cid:76)(cid:81)(cid:72)(cid:3)(cid:83)(cid:68)(cid:70)(cid:78)(cid:68)(cid:74)(cid:72)(cid:30)(cid:3)(cid:20)(cid:25)(cid:3)(cid:79)(cid:72)(cid:68)(cid:71)(cid:86)(cid:30)(cid:3)(cid:69)(cid:82)(cid:71)(cid:92)(cid:3)(cid:90)(cid:76)(cid:71)(cid:87)(cid:75)(cid:3)(cid:24)(cid:17)(cid:22)(cid:3)(cid:80)(cid:80)(cid:3) (cid:54)(cid:50)(cid:55)(cid:22)(cid:22)(cid:27)(cid:16)(cid:20)(cid:3) (cid:39)(cid:3) (cid:40)(cid:3) (cid:36)(cid:3) (cid:59)(cid:3) (cid:70)(cid:3) (cid:92)(cid:3) (cid:43)(cid:40)(cid:3)(cid:3) (cid:89)(cid:3)(cid:48)(cid:3) (cid:36)(cid:3) (cid:61)(cid:3) (cid:20)(cid:25)(cid:3) (cid:28)(cid:3) (cid:52)(cid:3) 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(cid:80)(cid:36)(cid:68)(cid:91)(cid:3)(cid:17)(cid:3) (cid:36)(cid:3)(cid:20)(cid:3) (cid:36)(cid:3)(cid:21)(cid:3) (cid:36)(cid:3)(cid:22)(cid:3) (cid:69)(cid:3)(cid:83)(cid:3) (cid:70)(cid:3) (cid:39)(cid:3)(cid:11)(cid:20)(cid:12)(cid:3) (cid:40)(cid:3)(cid:11)(cid:20)(cid:12)(cid:3) (cid:72)(cid:3) (cid:43)(cid:3)(cid:40)(cid:3) (cid:47)(cid:3) (cid:47)(cid:3)(cid:83)(cid:3) (cid:52)(cid:3) (cid:89)(cid:3) (cid:90)(cid:3) (cid:92)(cid:3) (cid:61)(cid:3)(cid:11)(cid:20)(cid:12)(cid:3) (cid:537)(cid:3) (cid:19)(cid:17)(cid:21)(cid:20)(cid:3) (cid:20)(cid:17)(cid:27)(cid:19)(cid:3) (cid:19)(cid:17)(cid:22)(cid:27)(cid:3) (cid:19)(cid:17)(cid:21)(cid:19)(cid:3) (cid:25)(cid:17)(cid:23)(cid:3) (cid:24)(cid:17)(cid:23)(cid:3) (cid:26)(cid:17)(cid:28)(cid:3) (cid:20)(cid:17)(cid:19)(cid:22)(cid:3) (cid:19)(cid:17)(cid:28)(cid:3) (cid:20)(cid:17)(cid:19)(cid:19)(cid:3) (cid:27)(cid:3)(cid:82)(cid:3) (cid:80)(cid:80)(cid:3) (cid:21)(cid:3) (cid:19)(cid:17)(cid:19)(cid:24)(cid:3) (cid:20)(cid:17)(cid:25)(cid:24)(cid:3) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:19)(cid:28)(cid:3) (cid:25)(cid:17)(cid:19)(cid:3) (cid:24)(cid:17)(cid:21)(cid:3) (cid:19)(cid:17)(cid:25)(cid:24)(cid:3) (cid:26)(cid:17)(cid:25)(cid:3) (cid:20)(cid:17)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:25)(cid:22)(cid:3) (cid:19)(cid:17)(cid:26)(cid:3) (cid:19)(cid:17)(cid:21)(cid:3) (cid:19)(cid:17)(cid:20)(cid:22)(cid:3) (cid:19)(cid:17)(cid:20)(cid:3) (cid:19)(cid:17)(cid:24)(cid:24)(cid:3) (cid:19)(cid:3)(cid:82)(cid:3) (cid:49)(cid:82)(cid:87)(cid:72)(cid:3) (cid:20)(cid:17)(cid:3)(cid:51)(cid:79)(cid:68)(cid:86)(cid:87)(cid:76)(cid:70)(cid:3)(cid:82)(cid:85)(cid:3)(cid:80)(cid:72)(cid:87)(cid:68)(cid:79)(cid:3)(cid:83)(cid:85)(cid:82)(cid:87)(cid:85)(cid:88)(cid:86)(cid:76)(cid:82)(cid:81)(cid:86)(cid:3)(cid:82)(cid:73)(cid:3)(cid:19)(cid:17)(cid:21)(cid:24)(cid:3)(cid:80)(cid:80)(cid:3)(cid:80)(cid:68)(cid:91)(cid:76)(cid:80)(cid:88)(cid:80)(cid:3)(cid:83)(cid:72)(cid:85)(cid:3)(cid:86)(cid:76)(cid:71)(cid:72)(cid:3)(cid:68)(cid:85)(cid:72)(cid:3)(cid:81)(cid:82)(cid:87)(cid:3)(cid:76)(cid:81)(cid:70)(cid:79)(cid:88)(cid:71)(cid:72)(cid:71)(cid:17)(cid:3)(cid:3) (cid:50)(cid:56)(cid:55)(cid:47)(cid:44)(cid:49)(cid:40)(cid:3) (cid:3)(cid:53)(cid:40)(cid:41)(cid:40)(cid:53)(cid:40)(cid:49)(cid:38)(cid:40)(cid:54)(cid:3) (cid:40)(cid:56)(cid:53)(cid:50)(cid:51)(cid:40)(cid:36)(cid:49)(cid:3) (cid:44)(cid:54)(cid:54)(cid:56)(cid:40)(cid:3)(cid:39)(cid:36)(cid:55)(cid:40)(cid:3) (cid:57)(cid:40)(cid:53)(cid:54)(cid:44)(cid:50)(cid:49)(cid:3) (cid:3)(cid:44)(cid:40)(cid:38)(cid:3) (cid:3)(cid:45)(cid:40)(cid:39)(cid:40)(cid:38)(cid:3) (cid:3)(cid:45)(cid:40)(cid:44)(cid:55)(cid:36)(cid:3) (cid:51)(cid:53)(cid:50)(cid:45)(cid:40)(cid:38)(cid:55)(cid:44)(cid:50)(cid:49)(cid:3) (cid:28)(cid:28)(cid:16)(cid:20)(cid:21)(cid:16)(cid:21)(cid:26)(cid:3) (cid:3)(cid:54)(cid:50)(cid:55)(cid:22)(cid:22)(cid:27)(cid:16)(cid:20)(cid:3) (cid:3)(cid:48)(cid:50)(cid:16)(cid:20)(cid:24)(cid:19)(cid:3) (cid:19)(cid:22)(cid:16)(cid:19)(cid:21)(cid:16)(cid:20)(cid:28)(cid:3) Fig 16. Package outline SOT338-1 (SSOP16) 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 19 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 14. Abbreviations Table 12. Abbreviation s Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-Power Schottky Transistor-Transistor Logic MM Machine Model TTL Transistor-Transistor Logic 15. Revision history T able 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT594 v.4 20160225 Product data sheet - 74HC_HCT594 v.3 Modifications: • Type numbers 74HC594N and 74HCT594N (SOT38-4) removed. 74HC_HCT594 v.3 20061220 Product data sheet - 74HC_HCT594_CNV v.2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 1 “Ordering information” updated. 74HC_HCT594_CNV v.2 19970908 Product specification - 74HC_HCT594_CNV v.1 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 20 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nexperia.com. 16.2 Definitions Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Draft — The document is a draft version only. The content is still under malfunction of a Nexperia product can reasonably be expected internal review and subject to formal approval, which may result in to result in personal injury, death or severe property or environmental modifications or additions. Nexperia does not give any damage. Nexperia and its suppliers accept no liability for representations or warranties as to the accuracy or completeness of inclusion and/or use of Nexperia products in such equipment or information included herein and shall have no liability for the consequences of applications and therefore such inclusion and/or use is at the customer’s own use of such information. risk. Short data sheet — A short data sheet is an extract from a full data sheet Applications — Applications that are described herein for any of these with the same product type number(s) and title. A short data sheet is intended products are for illustrative purposes only. Nexperia makes no for quick reference only and should not be relied upon to contain detailed and representation or warranty that such applications will be suitable for the full information. For detailed and full information see the relevant full data specified use without further testing or modification. sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the Customers are responsible for the design and operation of their applications full data sheet shall prevail. and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product Product specification — The information and data provided in a Product design. It is customer’s sole responsibility to determine whether the Nexperia data sheet shall define the specification of the product as agreed between product is suitable and fit for the customer’s applications and Nexperia and its customer, unless Nexperia and products planned, as well as for the planned application and use of customer have explicitly agreed otherwise in writing. In no event however, customer’s third party customer(s). Customers should provide appropriate shall an agreement be valid in which the Nexperia product is design and operating safeguards to minimize the risks associated with their deemed to offer functions and qualities beyond those described in the applications and products. Product data sheet. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the 16.3 Disclaimers customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia Limited warranty and liability — Information in this document is believed to products in order to avoid a default of the applications and be accurate and reliable. However, Nexperia does not give any the products or of the application or use by customer’s third party representations or warranties, expressed or implied, as to the accuracy or customer(s). Nexperia does not accept any liability in this respect. completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no Limiting values — Stress above one or more limiting values (as defined in responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC60134) will cause permanent source outside of Nexperia. damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in In no event shall Nexperia be liable for any indirect, incidental, the Recommended operating conditions section (if present) or the punitive, special or consequential damages (including - without limitation - lost Characteristics sections of this document is not warranted. Constant or profits, lost savings, business interruption, costs related to the removal or repeated exposure to limiting values will permanently and irreversibly affect replacement of any products or rework charges) whether or not such the quality and reliability of the device. damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards sale, as published at http://www.nexperia.com/profile/terms, unless otherwise customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual with the Terms and conditions of commercial sale of Nexperia. agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to Right to make changes — Nexperia reserves the right to make applying the customer’s general terms and conditions with regard to the changes to information published in this document, including without purchase of Nexperia products by customer. limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 21 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register Export control — This document as well as the item(s) described herein Nexperia’s specifications such use shall be solely at customer’s may be subject to export control regulations. Export might require a prior own risk, and (c) customer fully indemnifies Nexperia for any authorization from competent authorities. liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s Non-automotive qualified products — Unless this data sheet expressly standard warranty and Nexperia’s product specifications. states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested Translations — A non-English (translated) version of a document is for in accordance with automotive testing or application requirements. Nexperia reference only. The English version shall prevail in case of any discrepancy accepts no liability for inclusion and/or use of between the translated and English versions. non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in 16.4 Trademarks automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the Notice: All referenced brands, product names, service names and trademarks product for such automotive applications, use and specifications, and (b) are the property of their respective owners. whenever customer uses the product for automotive applications beyond 17. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74HC_HCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 — 25 February 2016 22 of 23

74HC594; 74HCT594 Nexperia 8-bit shift register with output register 18. Contents 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 Recommended operating conditions. . . . . . . . 6 10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 11 Dynamic characteristics. . . . . . . . . . . . . . . . . 10 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 13 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 18 14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20 15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 21 16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22 17 Contact information. . . . . . . . . . . . . . . . . . . . . 22 18 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 © Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 25 February 2016