INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: •The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications •The IC06 74HC/HCT/HCU/HCMOS Logic Package Information •The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT251 8-input multiplexer; 3-state Product specification December 1990 File under Integrated Circuits, IC06

Philips Semiconductors Product specification 8-input multiplexer; 3-state 74HC/HCT251 FEATURES The 74HC/HCT251 are the logic implementations of single-pole 8-position switches with the state of three • True and complement outputs select inputs (S ,S ,S )controlling the switch positions. 0 1 2 • Both outputs are 3-state for further multiplexer Assertion (Y) and negation (Y)outputs are both provided. expansion The output enable input (OE)is active LOW. The logic • Multifunction capability function provided at the output, when activated, is: • Permits multiplexing from n-lines to one line Y=OE.(I .S .S .S +I .S .S .S + 0 0 1 2 1 0 1 2 • Output capability: standard +I2.S0.S1.S2+I3.S0.S1.S2+ +I .S .S .S +I .S .S .S + • I category: MSI 4 0 1 2 5 0 1 2 CC +I .S .S .S +I .S .S .S ) 6 0 1 2 7 0 1 2 Both outputs are in the high impedance OFF-state (Z) GENERAL DESCRIPTION when the output enable input is HIGH, allowing multiplexer The 74HC/HCT251 are high-speed Si-gate CMOS devices expansion by tying the outputs. and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; T = 25(cid:176) C; t = t = 6 ns amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t propagation delay C = 15 pF; V = 5 V PHL PLH L CC I to Y 15 19 ns n I toY 17 19 ns n S to Y 20 20 ns n S toY 21 21 ns n C input capacitance 3.5 3.5 pF I C power dissipation capacitance per package notes 1and 2 44 46 pF PD Notes 1. C is used to determine the dynamic power dissipation (P inm W): PD D P = C · V 2· f +(cid:229) (C · V 2· f )where: D PD CC i L CC o f = input frequency in MHz i f = output frequency in MHz o (cid:229) (C · V 2· f )= sum of outputs L CC o C =output load capacitance in pF L V =supply voltage in V CC 2. For HC the condition is V = GND to V I CC For HCT the condition is V = GND to V - 1.5 V I CC ORDERING INFORMATION See“74HC/HCT/HCU/HCMOS Logic Package Information”. December1990 2

Philips Semiconductors Product specification 8-input multiplexer; 3-state 74HC/HCT251 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 4, 3, 2, 1, 15, 14, 13, 12 I to I multiplexer inputs 0 7 5 Y multiplexer output 6 Y complementary multiplexer output 7 OE 3-state output enable input (active LOW) 8 GND ground (0 V) 11, 10, 9 S ,S ,S select inputs 0 1 2 16 V positive supply voltage CC Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. December1990 3

Philips Semiconductors Product specification 8-input multiplexer; 3-state 74HC/HCT251 FUNCTION TABLE INPUTS OUTPUTS OE S S S I I I I I I I I Y Y 2 1 0 0 1 2 3 4 5 6 7 H X X X X X X X X X X X Z Z L L L L L X X X X X X X H L L L L L H X X X X X X X L H L L L H X L X X X X X X H L L L L H X H X X X X X X L H L L H L X X L X X X X X H L L L H L X X H X X X X X L H L L H H X X X L X X X X H L L L H H X X X H X X X X L H L H L L X X X X L X X X H L L H L L X X X X H X X X L H L H L H X X X X X L X X H L L H L H X X X X X H X X L H L H H L X X X X X X L X H L L H H L X X X X X X H X L H L H H H X X X X X X X L H L L H H H X X X X X X X H L H Note 1. H = HIGH voltage level L= LOW voltage level X= don’t care Z=high impedance OFF-state Fig.4 Functional diagram. Fig.5 Logic diagram. December1990 4

Philips Semiconductors Product specification 8-input multiplexer; 3-state 74HC/HCT251 DC CHARACTERISTICS FOR 74HC For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard I category: MSI CC AC CHARACTERISTICS FOR 74HC GND = 0 V; t = t = 6 ns; C = 50 pF r f L T ((cid:176) C) TEST CONDITIONS amb 74HC SYMBOL PARAMETER UNIT WAVEFORMS V +25 - 40to+85 - 40to+125 CC (V) min. typ. max. min. max. min. max. t / t propagation delay 50 170 215 255 ns 2.0 Fig.6 PHL PLH I to Y 18 34 43 51 4.5 n 14 29 37 43 6.0 t / t propagation delay 55 175 220 265 ns 2.0 Fig.7 PHL PLH I toY 20 35 44 53 4.5 n 16 30 37 45 6.0 t / t propagation delay 66 205 255 310 ns 2.0 Fig.6 PHL PLH S to Y 24 41 51 62 4.5 n 19 35 43 53 6.0 t / t propagation delay 69 205 255 310 ns 2.0 Fig.7 PHL PLH S toY 25 41 51 62 4.5 n 20 35 43 53 6.0 t / t 3-state output enable time 36 140 175 210 ns 2.0 Fig.7 PZH PZL OEto Y,Y 13 28 35 42 4.5 10 24 30 36 6.0 t / t 3-state output disable time 39 140 170 210 ns 2.0 Fig.7 PHZ PLZ OEto Y,Y 14 28 35 42 4.5 11 24 30 36 6.0 t / t output transition time 19 75 95 110 ns 2.0 Figs 6 and 7 THL TLH 7 15 19 22 4.5 6 13 16 19 6.0 December1990 5

Philips Semiconductors Product specification 8-input multiplexer; 3-state 74HC/HCT251 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see“74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard I category: MSI CC Note to HCT types The value of additional quiescent supply current (D I )for aunitload of 1 is given in the family specifications. CC To determineD I per input, multiply this value by the unit load coefficient shown in the table below. CC INPUT UNIT LOAD COEFFICIENT I 1.00 n S 1.50 0 S ,S 1.50 1 2 OE 1.50 AC CHARACTERISTICS FOR HCT GND = 0 V; t = t = 6 ns; C = 50 pF r f L T ((cid:176) C) TEST CONDITIONS amb 74HCT SYMBOL PARAMETER UNIT WAVEFORMS V +25 - 40to+85 - 40to+125 CC (V) min. typ. max. min. max. min. max. t / t propagation delay 22 35 44 53 ns 4.5 Fig.6 PHL PLH I to Y n t / t propagation delay 22 35 44 53 ns 4.5 Fig.7 PHL PLH I toY n t / t propagation delay 24 44 55 66 ns 4.5 Fig.6 PHL PLH S to Y n t / t propagation delay 25 44 55 66 ns 4.5 Fig.7 PHL PLH S toY n t / t 3-state output enable time 13 28 35 42 ns 4.5 Fig.7 PZH PZL OEto Y,Y t / t 3-state output disable time 14 28 35 42 ns 4.5 Fig.7 PHZ PLZ OEto Y,Y t / t output transition time 7 15 19 22 ns 4.5 Figs 6 and 7 THL TLH December1990 6

Philips Semiconductors Product specification 8-input multiplexer; 3-state 74HC/HCT251 AC WAVEFORMS (1) HC : VM=50%; VI= GND to VCC. HCT:VM= 1.3V; VI= GND to 3 V. Fig.6 Waveforms showing the multiplexer input (I )and select input (S )to output (Y)propagation delaysand n n the output transition times. (1) HC : VM=50%; VI= GND to VCC. HCT:VM= 1.3V; VI= GND to 3 V. Fig.7 Waveforms showing the multiplexer input (I )and select input (S )to output (Y)propagation delays and n n the output transition times. (1) HC : VM=50%; VI= GND to VCC. HCT:VM= 1.3V; VI= GND to 3 V. Fig.8 Waveforms showing the 3-state enable and disable times. PACKAGE OUTLINES See“74HC/HCT/HCU/HCMOS Logic Package Outlines”. December1990 7