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ICGOO电子元器件商城为您提供74AHC594D,118由NXP Semiconductors设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74AHC594D,118价格参考¥1.98-¥1.98。NXP Semiconductors74AHC594D,118封装/规格:逻辑 - 移位寄存器, Shift 移位寄存器 1 Element 8 Bit 16-SO。您可以下载74AHC594D,118参考资料、Datasheet数据手册功能说明书,资料中有74AHC594D,118 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC SHIFT REGISTER 8BIT 16-SOIC计数器移位寄存器 5V 8-BIT SHIFT REG

产品分类

逻辑 - 移位寄存器

品牌

NXP Semiconductors

产品手册

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产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

逻辑集成电路,计数器移位寄存器,NXP Semiconductors 74AHC594D,11874AHC

数据手册

点击此处下载产品Datasheet

产品型号

74AHC594D,118

PCN封装

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PCN组件/产地

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产品培训模块

http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=24983

产品种类

计数器移位寄存器

传播延迟时间

12.1 ns, 8.8 ns

供应商器件封装

16-SO

元件数

1

其它名称

568-8802-6

功能

Shift Register

包装

Digi-Reel®

商标

NXP Semiconductors

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

16-SOIC(0.154",3.90mm 宽)

封装/箱体

SO

工作温度

-40°C ~ 125°C

工厂包装数量

2500

最大工作温度

+ 125 C

最小工作温度

- 40 C

标准包装

1

每元件位数

8

电压-电源

2 V ~ 5.5 V

电源电压-最大

5.5 V

电路数量

1

计数顺序

Serial to Serial/Parallel

输入线路数量

1

输出类型

推挽式

输出线路数量

9

逻辑类型

CMOS

逻辑系列

AHC

零件号别名

74AHC594D-T

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PDF Datasheet 数据手册内容提取

74AHC594; 74AHCT594 8-bit shift register with output register Rev. 3 — 25 June 2020 Product data sheet 1. General description The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided on both the shift and storage registers. A serial output (Q7S) is provided for cascading purposes. Both the shift and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register will always be one count pulse ahead of the storage register. 2. Features and benefits • Wide supply voltage range from 2.0 V to 5.5 V • Balanced propagation delays • All inputs have Schmitt-trigger action • Overvoltage tolerant inputs to 5.5 V • High noise immunity • CMOS low power dissipation • 8-bit serial-in, parallel-out shift register with storage • Independent direct overriding clears on shift and storage registers • Independent clocks for shift and storage registers • Latch-up performance exceeds 100 mA per JESD 78 Class II Level A • Input levels: • For 74AHC594: CMOS level • For 74AHCT594: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101E exceeds 1000 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Applications • Serial-to parallel data conversion • Remote control holding register

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC594D -40 °C to +125 °C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm 74AHCT594D 74AHC594DB -40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; SOT338-1 body width 5.3 mm 74AHCT594DB 74AHC594PW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm 74AHCT594PW 74AHC594BQ -40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package; no leads; 16 terminals; 74AHCT594BQ body 2.5 × 3.5 × 0.85 mm 5. Functional diagram 14 DS 11 SHCP 8-STAGE SHIFT REGISTER 10 SHR 9 Q7S 12 STCP 13 8-BIT STORAGE REGISTER STR 15 1 2 3 4 5 6 7 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mbc320 Fig. 1. Functional diagram SHCP STCP 13 STR R2 11 12 12 STCP C2 9 Q7S 10 SHR R1 SRG8 15 Q0 SHCP 11 C1/ 1 Q1 14 15 DS 1D 2D Q0 2 Q2 1 Q1 DS 14 3 Q3 2 Q2 4 Q4 3 Q3 5 Q5 4 Q4 5 6 Q6 Q5 6 7 Q7 Q6 7 10 13 Q7 9 Q7S SHR STR mbc319 mbc322 Fig. 2. Logic symbol Fig. 3. IEC logic symbol 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 2 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register STAGE 0 STAGES 1 TO 6 STAGE 7 DS D Q D Q D Q Q7S FFSH0 FFSH7 CP CP R R SHCP SHR D Q D Q FFST0 FFST7 CP CP R R STCP STR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mbc321 Fig. 4. Logic diagram 6. Pinning information 6.1. Pinning 74AHC594 74AHCT594 Q1 1 16 VCC Q2 2 15 Q0 Q3 3 14 DS Q4 4 13 STR Q5 5 12 STCP Q6 6 11 SHCP Q7 7 10 SHR GND 8 9 Q7S 001aae343 Fig. 5. Pin configuration SOT109-1 (SO16) 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 3 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register 74AHC594 74AHCT594 C terminal 1 1 C Q V index area 1 16 Q2 2 15 Q0 Q3 3 14 DS 74AHC594 74AHCT594 Q4 4 13 STR Q5 5 12 STCP Q1 1 16 VCC Q6 6 GND(1) 11 SHCP Q2 2 15 Q0 Q7 7 10 SHR Q3 3 14 DS 8 9 Q4 4 13 STR D S Q5 5 12 STCP GN Q7 001aae345 Q6 6 11 SHCP Transparent top view Q7 7 10 SHR (1) This is not a ground pin. There is no electrical or GND 8 9 Q7S mechanical requirement to solder the pad. In case 001aae344 soldered, the solder land should remain floating or connected to GND Fig. 6. Pin configuration SOT338-1 (SSOP16) and SOT403-1 (TSSOP16) Fig. 7. Pin configuration SOT763-1 (DHVQFN16) 6.2. Pin description Table 2. Pin description Symbol Pin Description Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 15, 1, 2, 3, 4, 5, 6, 7 parallel data output GND 8 ground (0 V) Q7S 9 serial data output SHR 10 shift register reset input (active LOW) SHCP 11 shift register clock input STCP 12 storage register clock input STR 13 storage register reset input (active LOW) DS 14 serial data input V 16 supply voltage CC 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 4 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register 7. Functional description Table 3. Function table H = HIGH voltage state; L = LOW voltage state; ↑ = LOW to HIGH transition; X = don’t care; NC = no change. Input Output Function SHCP STCP SHR STR DS Q7S Qn X X L X X L NC a LOW-state on SHR only affects the shift register X X X L X NC L a LOW-state on STR only affects the storage register X ↑ L H X L L empty shift register loaded into storage register ↑ X H X H Q6S NC logic HIGH level shifted into shift register stage 0. Contents of all shift register stages shifted through, e.g. previous state of stage 6 (internal Q6S) appears on the serial output (Q7S). X ↑ H H X NC QnS contents of shift register stages (internal QnS) are transferred to the storage register and parallel output stages ↑ ↑ H H X Q6S QnS contents of shift register shifted through; previous contents of the shift register is transferred to the storage register and the parallel output stages SHCP DS STCP SHR STR Q0 Q1 Q6 Q7 Q7S mbc323 Fig. 8. Timing diagram 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 5 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V supply voltage -0.5 +7.0 V CC V input voltage -0.5 +7.0 V I I input clamping current V < -0.5 V [1] -20 - mA IK I I output clamping current V < -0.5 V or V > V + 0.5 V [1] -20 +20 mA OK O O CC I output current V = -0.5 V to (V + 0.5 V) -25 +25 mA O O CC I supply current - +75 mA CC I ground current -75 - mA GND T storage temperature -65 +150 °C stg P total power dissipation T = -40 °C to +125 °C [2] - 500 mW tot amb [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C. For SOT338-1 (SSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C. 9. Recommended operating conditions Table 5. Operating conditions Symbol Parameter Conditions 74AHC594 74AHCT594 Unit Min Typ Max Min Typ Max V supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V CC V input voltage 0 - 5.5 0 - 5.5 V I V output voltage 0 - V 0 - V V O CC CC T ambient temperature -40 +25 +125 -40 +25 +125 °C amb Δt/ΔV input transition rise and fall rate V = 3.0 V to 3.6 V - - 100 - - - ns/V CC V = 4.5 V to 5.5 V - - 20 - - 20 ns/V CC 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 6 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ Max Min Max Min Max 74AHC594 V HIGH-level V = 2.0 V 1.5 - - 1.5 - 1.5 - V IH CC input voltage V = 3.0 V 2.1 - - 2.1 - 2.1 - V CC V = 5.5 V 3.85 - - 3.85 - 3.85 - V CC V LOW-level V = 2.0 V - - 0.5 - 0.5 - 0.5 V IL CC input voltage V = 3.0 V - - 0.9 - 0.9 - 0.9 V CC V = 5.5 V - - 1.65 - 1.65 - 1.65 V CC V HIGH-level V = V or V OH I IH IL output voltage I = -50 μA; V = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V O CC I = -50 μA; V = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V O CC I = -50 μA; V = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V O CC I = -4.0 mA; V = 3.0 V 2.58 - - 2.48 - 2.40 - V O CC I = -8.0 mA; V = 4.5 V 3.94 - - 3.80 - 3.70 - V O CC V LOW-level V = V or V OL I IH IL output voltage I = 50 μA; V = 2.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50 μA; V = 3.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50 μA; V = 4.5 V - 0 0.1 - 0.1 - 0.1 V O CC I = 4 mA; V = 3.0 V - - 0.36 - 0.44 - 0.55 V O CC I = 8 mA; V = 4.5 V - - 0.36 - 0.44 - 0.55 V O CC I input leakage V = 5.5 V or GND; - - 0.1 - 1.0 - 2.0 μA I I current V = 0 V to 5.5 V CC I supply current V = V or GND; I = 0 A; - - 4.0 - 40 - 80 μA CC I CC O V = 5.5 V CC C input V = V or GND - 3 10 - 10 - 10 pF I I CC capacitance 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 7 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ Max Min Max Min Max 74AHCT594 V HIGH-level V = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V IH CC input voltage V LOW-level V = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V IL CC input voltage V HIGH-level V = V or V OH I IH IL output voltage I = -50 μA; V = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V O CC I = -8.0 mA; V = 4.5 V 3.94 - - 3.80 - 3.70 - V O CC V LOW-level V = V or V OL I IH IL output voltage I = 50 μA; V = 4.5 V - 0 0.1 - 0.1 - 0.1 V O CC I = 8 mA; V = 4.5 V - - 0.36 - 0.44 - 0.55 V O CC I input leakage V = 5.5 V or GND; - - 0.1 - 1.0 - 2.0 μA I I current V = 0 V to 5.5 V CC I supply current V = V or GND; I = 0 A; - - 4.0 - 40 - 80 μA CC I CC O V = 5.5 V CC ΔI additional per input pin; V = V - 2.1 V; - - 1.35 - 1.5 - 1.5 mA CC I CC supply current other pins at V or GND; CC I = 0 A; V = 4.5 V to 5.5 V O CC C input V = V or GND - 3 10 - 10 - 10 pF I I CC capacitance 11. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 15. Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ[1] Max Min Max Min Max 74AHC594 t LOW to HIGH SHCP to Q7S; see Fig. 9 PLH propagation V = 3.0 V to 3.6 V CC delay C = 15 pF - 5.2 8.5 2.2 9.7 2.2 10.6 ns L C = 50 pF - 7.4 11.5 3.0 13.2 3.0 14.3 ns L V = 4.5 V to 5.5 V CC C = 15 pF - 3.8 6.3 1.7 7.2 1.7 7.8 ns L C = 50 pF - 4.8 8.0 2.4 9.1 2.4 10.0 ns L STCP to Qn; see Fig. 10 V = 3.0 V to 3.6 V CC C = 15 pF - 5.1 8.3 2.3 9.5 2.3 10.6 ns L C = 50 pF - 7.3 11.9 3.3 13.6 3.3 14.7 ns L V = 4.5 V to 5.5 V CC C = 15 pF - 3.5 5.7 1.8 6.5 1.8 7.1 ns L C = 50 pF - 4.8 7.8 2.6 9.0 2.6 9.8 ns L 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 8 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ[1] Max Min Max Min Max t HIGH to LOW SHCP to Q7S; see Fig. 9 PHL propagation V = 3.0 V to 3.6 V CC delay C = 15 pF - 5.5 8.9 2.3 10.2 2.3 11.0 ns L C = 50 pF - 7.4 12.1 3.0 13.9 3.0 15.1 ns L V = 4.5 V to 5.5 V CC C = 15 pF - 4.1 6.7 1.9 7.6 1.9 8.2 ns L C = 50 pF - 5.4 8.8 2.5 10.1 2.5 11.0 ns L STCP to Qn; see Fig. 10 V = 3.0 V to 3.6 V CC C = 15 pF - 5.5 9.1 2.4 10.4 2.4 11.3 ns L C = 50 pF - 7.3 12.0 3.2 13.8 3.2 15.0 ns L V = 4.5 V to 5.5 V CC C = 15 pF - 3.7 6.0 1.9 6.9 1.9 7.5 ns L C = 50 pF - 5.2 8.5 2.6 9.7 2.6 10.5 ns L SHR to Q7S; see Fig. 13 V = 3.0 V to 3.6 V CC C = 15 pF - 5.7 9.5 2.3 10.8 2.3 11.7 ns L C = 50 pF - 7.5 12.2 3.6 14.0 3.6 15.2 ns L V = 4.5 V to 5.5 V CC C = 15 pF - 4.1 6.7 2.0 7.6 2.0 8.2 ns L C = 50 pF - 5.4 8.8 2.8 10.1 2.8 11.0 ns L STR to Qn; see Fig. 12 V = 3.0 V to 3.6 V CC C = 15 pF - 5.8 9.6 2.8 11.0 2.8 12.0 ns L C = 50 pF - 7.7 12.5 3.8 14.4 3.8 15.6 ns L V = 4.5 V to 5.5 V CC C = 15 pF - 4.1 7.2 2.2 8.2 2.2 8.9 ns L C = 50 pF - 5.4 9.4 3.0 10.7 3.0 11.6 ns L f maximum SHCP or STCP; max frequency see Fig. 9 and Fig. 10 V = 3.0 V to 3.6 V 80 125 - 70 - 65 - MHz CC V = 4.5 V to 5.5 V 90 170 - 80 - 70 - MHz CC t pulse width SHCP and STCP HIGH or W LOW; see Fig. 9 and Fig. 10 V = 3.0 V to 3.6 V 6.0 - - 6.5 - 7.0 - ns CC V = 4.5 V to 5.5 V 5.5 - - 6.0 - 6.5 - ns CC SHR and STR HIGH or LOW; see Fig. 13 and Fig. 12 V = 3.0 V to 3.6 V 5.0 - - 5.0 - 5.5 - ns CC V = 4.5 V to 5.5 V 5.0 - - 5.2 - 5.7 - ns CC 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 9 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ[1] Max Min Max Min Max t set-up time DS to SHCP; see Fig. 11 su V = 3.0 V to 3.6 V 3.5 - - 3.5 - 4.0 - ns CC V = 4.5 V to 5.5 V 3.0 - - 3.0 - 3.5 - ns CC SHR to STCP; see Fig. 14 V = 3.0 V to 3.6 V 8.0 - - 9.0 - 9.5 - ns CC V = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.5 - ns CC SHCP to STCP; see Fig. 10 V = 3.0 V to 3.6 V 8.0 - - 8.5 - 9.0 - ns CC V = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.5 - ns CC t hold time DS to SHCP; see Fig. 11 h V = 3.0 V to 3.6 V 1.5 - - 1.5 - 2.0 - ns CC V = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.5 - ns CC t recovery time SHR to SHCP; see Fig. 13 rec V = 3.0 V to 3.6 V 4.2 - - 4.8 - 5.3 - ns CC V = 4.5 V to 5.5 V 2.9 - - 3.3 - 3.8 - ns CC STR to STCP; see Fig. 12 V = 3.0 V to 3.6 V 4.6 - - 5.3 - 5.8 - ns CC V = 4.5 V to 5.5 V 3.2 - - 3.7 - 4.3 - ns CC C power f = 1 MHz; V = GND to V [2] - 55 - - - - - pF PD i I CC dissipation capacitance 74AHCT594; V = 4.5 V to 5.5 V CC t LOW to HIGH SHCP to Q7S; see Fig. 9 PLH propagation C = 15 pF - 3.8 6.3 1.7 7.2 1.7 7.8 ns L delay C = 50 pF - 4.8 8.0 2.2 9.1 2.2 9.9 ns L STCP to Qn; see Fig. 10 C = 15 pF - 3.5 5.7 1.8 6.5 1.8 7.1 ns L C = 50 pF - 4.6 7.7 2.6 8.8 2.6 9.6 ns L t HIGH to LOW SHCP to Q7S; see Fig. 9 PHL propagation C = 15 pF - 4.1 6.7 1.8 7.6 1.8 8.3 ns L delay C = 50 pF - 5.4 8.8 2.4 10.1 2.4 11.0 ns L STCP to Qn; see Fig. 10 C = 15 pF - 3.7 6.1 1.9 6.9 1.9 7.2 ns L C = 50 pF - 5.2 8.5 2.6 9.7 2.6 10.5 ns L SHR to Q7S; see Fig. 13 C = 15 pF - 4.3 7.0 2.4 8.0 2.4 8.7 ns L C = 50 pF - 5.4 8.8 2.7 10.1 2.7 11.0 ns L STR to Qn; see Fig. 12 C = 15 pF - 4.5 7.4 2.3 8.4 2.3 9.2 ns L C = 50 pF - 5.7 9.4 3.1 10.7 3.1 11.7 ns L f maximum SHCP or STCP; 90 160 - 80 - 70 - MHz max frequency see Fig. 9 and Fig. 10 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 10 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ[1] Max Min Max Min Max t pulse width SHCP and STCP HIGH or 5.5 - - 6.0 - 6.5 - ns W LOW; see Fig. 9 and Fig. 10 SHR and STR HIGH or LOW; 5.2 - - 5.5 - 6.0 - ns see Fig. 13 and Fig. 12 t set-up time DS to SHCP; see Fig. 11 3.0 - - 3.0 - 3.5 - ns su SHR to STCP; see Fig. 14 5.0 - - 5.0 - 5.5 - ns SHCP to STCP; see Fig. 10 5.0 - - 5.0 - 5.5 - ns t hold time DS to SHCP; see Fig. 11 2.0 - - 2.0 - 2.5 - ns h t recovery time SHR to SHCP; see Fig. 13 2.9 - - 3.3 - 3.8 - ns rec STR to STCP; see Fig. 12 3.4 - - 3.8 - 4.3 - ns C power f = 1 MHz; V = GND to V [2] - 55 - - - - - pF PD i I CC dissipation capacitance [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL x VCC 2 x fo) = sum of the outputs. 11.1. Waveforms 1/fmax SHCP input VM tW tPLH tPHL Q7S output VM tTLH tTHL 001aae341 Measurement points are given in Table 8. Fig. 9. Shift register clock pulse width, maximum frequency and input to output propagation delays 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 11 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register SHCP input VM tsu 1/fmax STCP input VM tW tPLH tPHL Qn outputs VM mla512 Measurement points are given in Table 8. Fig. 10. Shift register clock to storage register clock set-up time and storage clock pulse width, maximum frequency and input to output propagation delays SHCP input VM tsu tsu th th DS input VM Q7 output VM 001aae342 Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig. 11. Shift register clock to data input set-up and hold times STR input VM tW trec STCP input VM tPHL Qn outputs VM mbc325 Measurement points are given in Table 8. Fig. 12. Storage register reset pulse width, input to output propagation delay and recovery time 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 12 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register SHR input VM tW trec SHCP input VM tPHL Q7S output VM mbc324 Measurement points are given in Table 8. Fig. 13. Shift register reset pulse width, input to output propagation delay and recovery time SHR input VM tsu STCP input VM Qn outputs VM mbc326 Measurement points are given in Table 8. Fig. 14. Shift register reset to storage register clock set-up time Table 8. Measurement points Type Input Output V V M M 74AHC594 0.5 x V 0.5 x V CC CC 74AHCT594 1.5 V 0.5 x V CC 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 13 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register VI tW 90 % negative pulse VM VM 10 % GND tf tr tr tf VI 90 % positive pulse VM VM 10 % GND tW VCC VI VO G DUT RT CL 001aah768 For test data see Table 9. Definitions for test circuit: R = Termination resistance should be equal to output impedance Z of the pulse generator. T o C = Load capacitance including jig and probe capacitance. L Fig. 15. Test circuit for measuring switching times Table 9. Test data Type Input Load Test V t, t C I r f L 74AHC594 V ≤ 3.0 ns 15 pF, 50 pF t , t CC PLH PHL 74AHCT594 3.0 V ≤ 3.0 ns 15 pF, 50 pF t , t PLH PHL 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 14 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y H E v M A Z 16 9 Q A 2 A 1 (A 3 ) A pin 1 index θ L p 1 8 L e w M detail X b p 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mAax . A 1 A 2 A 3 b p c D (1) E (1) e H E L L p Q v w y Z (1) θ 0.25 1.45 0.49 0.25 10.0 4.0 6.2 1.0 0.7 0.7 mm 1.75 0.25 1.27 1.05 0.2 5 0.25 0.1 0.10 1.25 0.36 0.19 9.8 3.8 5.8 0.4 0.6 0.3 8 o 0.010 0.057 0.019 0.0100 0.39 0.16 0.244 0.039 0.028 0.028 0 o inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004 0.004 0.049 0.014 0.0075 0.38 0.15 0.228 0.016 0.020 0.012 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT109-1 076E07 MS-012 03-02-19 Fig. 16. Package outline SOT109-1 (SO16) 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 15 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y H E v M A Z 16 9 Q A 2 A 1 (A 3 ) A pin 1 index θ L p L 1 8 detail X w M e b p 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax . A 1 A 2 A 3 b p c D (1) E (1) e H E L L p Q v w y Z (1) θ 0.21 1.80 0.38 0.20 6.4 5.4 7.9 1.03 0.9 1.00 8 o mm 2 0.05 1.65 0.25 0.25 0.09 6.0 5.2 0.65 7.6 1.25 0.63 0.7 0.2 0.13 0.1 0.55 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT338-1 MO-150 03-02-19 Fig. 17. Package outline SOT338-1 (SSOP16) 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 16 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y H E v M A Z 16 9 Q A 2 (A 3 ) A pin 1 index A 1 θ L p L 1 8 detail X w M e b p 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax . A 1 A 2 A 3 b p c D (1) E (2) e H E L L p Q v w y Z (1) θ 0.15 0.95 0.30 0.2 5.1 4.5 6.6 0.75 0.4 0.40 8 o mm 1.1 0.05 0.80 0.25 0.19 0.1 4.9 4.3 0.65 6.2 1 0.50 0.3 0.2 0.13 0.1 0.06 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT403-1 MO-153 03-02-18 Fig. 18. Package outline SOT403-1 (TSSOP16) 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 17 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm SOT763-1 D B A A A1 E c terminal 1 detail X index area terminal 1 e1 C index area e b v M C A B y1 C y w M C 2 7 L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) A(1) UNIT max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 0.05 0.30 3.6 2.15 2.6 1.15 0.5 mm 1 0.2 0.5 2.5 0.1 0.05 0.05 0.1 0.00 0.18 3.4 1.85 2.4 0.85 0.3 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 02-10-17 SOT763-1 - - - MO-241 - - - 03-01-27 Fig. 19. Package outline SOT763-1 (DHVQFN16) 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 18 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT594 v.3 20200625 Product data sheet - 74AHC_AHCT594 v.2 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. • Section 2 updated. • Table 4: Derating values for P total power dissipation updated. tot 74AHC_AHCT594 v.2 20080609 Product data sheet - 74AHC_AHCT594 v.1 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 6: the conditions for input leakage current have been changed. 74AHC_AHCT594 v.1 20060704 Product data sheet - - 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 19 / 21

Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register injury, death or severe property or environmental damage. Nexperia and its 15. Legal information suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the Data sheet status product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status Product Definition Applications — Applications that are described herein for any of these [1][2] status [3] products are for illustrative purposes only. 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Nexperia 74AHC594; 74AHCT594 8-bit shift register with output register Contents 1. General description......................................................1 2. Features and benefits..................................................1 3. Applications..................................................................1 4. Ordering information....................................................2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description.............................................................4 7. Functional description.................................................5 8. Limiting values.............................................................6 9. Recommended operating conditions..........................6 10. Static characteristics..................................................7 11. Dynamic characteristics.............................................8 11.1. Waveforms...............................................................11 12. Package outline........................................................15 13. Abbreviations............................................................19 14. Revision history........................................................19 15. Legal information......................................................20 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 25 June 2020 74AHC_AHCT594 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 — 25 June 2020 21 / 21