74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state Rev. 4 — 2 January 2019 Product data sheet 1. General description The 74AHC2G125 and 74AHCT2G125 are high-speed Si-gate CMOS devices. They provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH at nOE causes the output to assume a high-impedance OFF-state. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits • Symmetrical output impedance • High noise immunity • Low power dissipation • Balanced propagation delays • Multiple package options • ESD protection: • HBM JESD22-A114E: exceeds 2000 V • MM JESD22-A115-A: exceeds 200 V • CDM JESD22-C101C: exceeds 1000 V • Specified from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC2G125DP -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; SOT505-2 8 leads; body width 3 mm; lead length 0.5 mm 74AHCT2G125DP 74AHC2G125DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; SOT765-1 8 leads; body width 2.3 mm 74AHCT2G125DC 4. Marking Table 2. Marking codes Type number Marking[1] 74AHC2G125DP A25 74AHCT2G125DP C25 74AHC2G125DC A25 74AHCT2G125DC C25 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state 5. Functional diagram 2 1A 1Y 6 2 1 1OE 6 1 1 EN1 5 2A 2Y 3 nA nY 5 3 7 2OE 7 2 EN2 nOE mce185 mce186 mna227 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one buffer) 6. Pinning information 6.1. Pinning 74AHC2G125 74AHCT2G125 1OE 1 8 VCC 1A 2 7 2OE 2Y 3 6 1Y GND 4 5 2A 001aaj260 Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 6.2. Pin description Table 3. Pin description Symbol Pin Description 1OE, 2OE 1, 7 output enable input (active LOW) 1A, 2A 2, 5 data input GND 4 ground (0 V) 1Y, 2Y 6, 3 data output V 8 supply voltage CC 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Control Input Output nOE nA nY L L L L H H H X Z 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 2 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V supply voltage -0.5 +7.0 V CC V input voltage -0.5 +7.0 V I I input clamping current V < -0.5 V [1] -20 - mA IK I I output clamping current V < -0.5 V or V > V + 0.5 V [1] - ±20 mA OK O O CC I output current -0.5 V < V < V + 0.5 V - ±25 mA O O CC I supply current - 75 mA CC I ground current -75 - mA GND T storage temperature -65 +150 °C stg P total power dissipation T = -40 °C to +125 °C [2] - 250 mW tot amb [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K. For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC2G125 74AHCT2G125 Unit Min Typ Max Min Typ Max V supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V CC V input voltage 0 - 5.5 0 - 5.5 V I V output voltage 0 - V 0 - V V O CC CC T ambient temperature -40 +25 +125 -40 +25 +125 °C amb Δt/ΔV input transition rise and V = 3.3 V ± 0.3 V - - 100 - - - ns/V CC fall rate V = 5.0 V ± 0.5 V - - 20 - - 20 ns/V CC 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ Max Min Max Min Max 74AHC2G125 V HIGH-level V = 2.0 V 1.5 - - 1.5 - 1.5 - V IH CC input voltage V = 3.0 V 2.1 - - 2.1 - 2.1 - V CC V = 5.5 V 3.85 - - 3.85 - 3.85 - V CC V LOW-level V = 2.0 V - - 0.5 - 0.5 - 0.5 V IL CC input voltage V = 3.0 V - - 0.9 - 0.9 - 0.9 V CC V = 5.5 V - - 1.65 - 1.65 - 1.65 V CC 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 3 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ Max Min Max Min Max V HIGH-level V = V or V OH I IH IL output voltage I = -50 μA; V = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V O CC I = -50 μA; V = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V O CC I = -50 μA; V = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V O CC I = -4.0 mA; V = 3.0 V 2.58 - - 2.48 - 2.40 - V O CC I = -8.0 mA; V = 4.5 V 3.94 - - 3.8 - 3.70 - V O CC V LOW-level V = V or V OL I IH IL output voltage I = 50 μA; V = 2.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50 μA; V = 3.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50 μA; V = 4.5 V - 0 0.1 - 0.1 - 0.1 V O CC I = 4.0 mA; V = 3.0 V - - 0.36 - 0.44 - 0.55 V O CC I = 8.0 mA; V = 4.5 V - - 0.36 - 0.44 - 0.55 V O CC I OFF-state V = V or GND; V = 5.5 V - - 0.25 - 2.5 - 10 μA OZ I CC CC output current I input leakage V = 5.5 V or GND; - - 0.1 - 1.0 - 2.0 μA I I current V = 0 V to 5.5 V CC I supply current V = V or GND; I = 0 A; - - 1.0 - 10 - 40 μA CC I CC O V = 5.5 V CC C input - 1.5 10 - 10 - 10 pF I capacitance 74AHCT2G125 V HIGH-level V = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V IH CC input voltage V LOW-level V = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V IL CC input voltage V HIGH-level V = V or V ; V = 4.5 V OH I IH IL CC output voltage I = -50 μA 4.4 4.5 - 4.4 - 4.4 - V O I = -8.0 mA 3.94 - - 3.8 - 3.70 - V O V LOW-level V = V or V ; V = 4.5 V OL I IH IL CC output voltage I = 50 μA - 0 0.1 - 0.1 - 0.1 V O I = 8.0 mA - - 0.36 - 0.44 - 0.55 V O I OFF-state V = V or GND; V = 5.5 V - - 0.25 - 2.5 - 10 μA OZ I CC CC output current I input leakage V = 5.5 V or GND; - - 0.1 - 1.0 - 2.0 μA I I current V = 0 V to 5.5 V CC I supply current V = V or GND; I = 0 A; - - 1.0 - 10 - 40 μA CC I CC O V = 5.5 V CC ΔI additional per input pin; V = 3.4 V; - - 1.35 - 1.5 - 1.5 mA CC I supply current other inputs at V or GND; CC I = 0 A; V = 5.5 V O CC C input - 1.5 10 - 10 - 10 pF I capacitance 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 4 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see Fig. 7. Symbol Parameter Conditions 25 °C -40 °C to -40 °C to Unit +85 °C +125 °C Min Typ [1] Max Min Max Min Max 74AHC2G125 t propagation nA to nY; see Fig. 5 [2] pd delay V = 3.0 V to 3.6 V; C = 15 pF - 4.7 8.0 1.0 9.5 1.0 11.5 ns CC L V = 3.0 V to 3.6 V; C = 50 pF - 6.6 11.5 1.0 13.0 1.0 14.5 ns CC L V = 4.5 V to 5.5 V; C = 15 pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns CC L V = 4.5 V to 5.5 V; C = 50 pF - 4.8 7.5 1.0 8.5 1.0 9.5 ns CC L t enable time nOE to nY; see Fig. 6 [2] en V = 3.0 V to 3.6 V; C = 15 pF - 5.0 8.0 1.0 9.5 1.0 11.5 ns CC L V = 3.0 V to 3.6 V; C = 50 pF - 6.9 11.5 1.0 13.0 1.0 14.5 ns CC L V = 4.5 V to 5.5 V; C = 15 pF - 3.6 5.1 1.0 6.0 1.0 6.5 ns CC L V = 4.5 V to 5.5 V; C = 50 pF - 4.9 7.5 1.0 8.5 1.0 9.5 ns CC L t disable time nOE to nY; see Fig. 6 [2] dis V = 3.0 V to 3.6 V; C = 15 pF - 6.0 9.7 1.0 11.5 1.0 12.5 ns CC L V = 3.0 V to 3.6 V; C = 50 pF - 8.3 13.2 1.0 15.0 1.0 16.5 ns CC L V = 4.5 V to 5.5 V; C = 15 pF - 4.1 6.8 1.0 8.0 1.0 8.5 ns CC L V = 4.5 V to 5.5 V; C = 50 pF - 5.7 8.8 1.0 10.0 1.0 11.0 ns CC L C power per buffer; C = 50 pF; f = 1 MHz;[3] - 9 - - - - - pF PD L i dissipation V = GND to V I CC capacitance 74AHCT2G125 t propagation nA to nY; see Fig. 5 [2] pd delay V = 4.5 V to 5.5 V; C = 15 pF - 3.4 5.5 1.0 6.5 1.0 6.5 ns CC L V = 4.5 V to 5.5 V; C = 50 pF - 4.8 7.5 1.0 8.5 1.0 8.5 ns CC L t enable time nOE to nY; see Fig. 6 [2] en V = 4.5 V to 5.5 V; C = 15 pF - 3.9 5.1 1.0 6.0 1.0 6.0 ns CC L V = 4.5 V to 5.5 V; C = 50 pF - 5.1 7.5 1.0 8.5 1.0 8.5 ns CC L t disable time nOE to nY; see Fig. 6 [2] dis V = 4.5 V to 5.5 V; C = 15 pF - 4.5 6.8 1.0 8.0 1.0 8.0 ns CC L V = 4.5 V to 5.5 V; C = 50 pF - 6.1 8.8 1.0 10.0 1.0 10.0 ns CC L C power per buffer; C = 50 pF; f = 1 MHz;[3] - 11 - - - - - pF PD L i dissipation V = GND to V I CC capacitance [1] Typical values are measured at Tamb = 25 °C and VCC = 3.3 V and 5.0 V respectively. [2] tpd is the same as tPLH and tPHL; ten is the same as tPZL and tPZH; tdis is the same as tPLZ and tPHZ. [3] CPD is used to determine the dynamic power dissipation PD (μW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 5 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state 11.1. Waveforms and test circuit VI nA input VM GND tPHL tPLH VOH nY output VM VOL mna230 Measurement points are given in Table 9. Logic levels: V and V are typical output voltage levels that occur with the output load. OL OH Fig. 5. Input (nA) to output (nY) propagation delays VI nOE input VM GND tPLZ tPZL VCC output LOW-to-OFF VM OFF-to-LOW VOL VX tPHZ tPZH VOH VY output HIGH-to-OFF VM OFF-to-HIGH GND outputs outputs outputs enabled disabled enabled mna362 Measurement points are given in Table 9. Logic levels: V and V are typical output voltage levels that occur with the output load. OL OH Fig. 6. Enable and disable times Table 9. Measurement points Type Input Output V V V V M M X Y 74AHC2G125 0.5V 0.5V V + 0.3 V V - 0.3 V CC CC OL OH 74AHCT2G125 1.5 V 0.5V V + 0.3 V V - 0.3 V CC OL OH 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 6 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state tW VI 90 % negative pulse VM VM 10 % 0 V tf tr tr tf VI 90 % positive pulse VM VM 10 % 0 V tW VCC VCC VI VO RL S1 G DUT open RT CL 001aad983 Test data is given in Table 10. Definitions test circuit: R = Termination resistance should be equal to output impedance Z of the pulse generator. T o C = Load capacitance including jig and probe capacitance. L R = Load resistance. L S1 = Test selection switch. Fig. 7. Test circuit for measuring switching times Table 10. Test data Type Input Load S1 position V t, t C R t , t t , t t , t I r f L L PHL PLH PZH PHZ PZL PLZ 74AHC2G125 V ≤ 3 ns 15 pF, 50 pF 1 kΩ open GND V CC CC 74AHCT2G125 3 V ≤ 3 ns 15 pF, 50 pF 1 kΩ open GND V CC 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 7 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 D E A X c y HE v M A Z 8 5 A A2 A1 (A3) pin 1 index θ Lp L 1 4 detail X e w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax . A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ 0.15 0.95 0.38 0.18 3.1 3.1 4.1 0.47 0.70 8° mm 1.1 0.25 0.65 0.5 0.2 0.13 0.1 0.00 0.75 0.22 0.08 2.9 2.9 3.9 0.33 0.35 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION SOT505-2 - - - 02-01-16 Fig. 8. Package outline SOT505-2 (TSSOP8) 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 8 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 D E A X c y HE v A Z 8 5 Q A2 A pin 1 index A1 (A3) θ Lp 1 4 detail X L e w bp 0 5 mm scale Dimensions (mm are the original dimensions) A Unit max. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) θ max 0.15 0.85 0.27 0.23 2.1 2.4 3.2 0.40 0.21 0.4 8° mm nom 1 0.12 0.5 0.4 0.2 0.08 0.1 min 0.00 0.60 0.17 0.08 1.9 2.2 3.0 0.15 0.19 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. sot765-1_po Outline References European Issue date version IEC JEDEC JEITA projection 07-06-02 SOT765-1 MO-187 16-05-31 Fig. 9. Package outline SOT765-1 (VSSOP8) 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 9 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state 13. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT2G125 v.4 20190102 Product data sheet - 74AHC_AHCT2G125 v.3 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. • Type numbers 74AHC2G125GD and 74AHCT2G125GD (SOT996-2) removed. • Package outline drawing SOT765-1 (VSSOP8) updated. 74AHC_AHCT2G125 v.3 20130506 Product data sheet - 74AHC_AHCT2G125 v.2 Modifications: • For type number 74AHC2G125GD and 74AHCT2G125GD XSON8U has changed to XSON8. 74AHC_AHCT2G125 v.2 20081222 Product data sheet - 74AHC_AHCT2G125 v.1 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74AHC2G125GD and 74AHCT2G125GD (XSON8U package). 74AHC_AHCT2G125 v.1 20040113 Product specification - - 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 10 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state injury, death or severe property or environmental damage. Nexperia and its 15. Legal information suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the Data sheet status product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status Product Definition Applications — Applications that are described herein for any of these [1][2] status [3] products are for illustrative purposes only. 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This between the translated and English versions. document supersedes and replaces all information supplied prior to the publication hereof. Trademarks Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical Notice: All referenced brands, product names, service names and systems or equipment, nor in applications where failure or malfunction trademarks are the property of their respective owners. of an Nexperia product can reasonably be expected to result in personal 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 11 / 12

Nexperia 74AHC2G125; 74AHCT2G125 Dual buffer/line driver; 3-state Contents 1. General description......................................................1 2. Features and benefits..................................................1 3. Ordering information....................................................1 4. Marking..........................................................................1 5. Functional diagram.......................................................2 6. Pinning information......................................................2 6.1. Pinning.........................................................................2 6.2. Pin description.............................................................2 7. Functional description.................................................2 8. Limiting values.............................................................3 9. Recommended operating conditions..........................3 10. Static characteristics..................................................3 11. Dynamic characteristics.............................................5 11.1. Waveforms and test circuit........................................6 12. Package outline..........................................................8 13. Abbreviations............................................................10 14. Revision history........................................................10 15. Legal information......................................................11 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 2 January 2019 74AHC_AHCT2G125 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 2 January 2019 12 / 12