74AHC1G00; 74AHCT1G00 2-input NAND gate Rev. 7 — 5 November 2014 Product data sheet 1. General description 74AHC1G00 and 74AHCT1G00 are high-speed Si-gate CMOS devices. They provide a 2-input NAND function. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits  Symmetrical output impedance  High noise immunity  Low power dissipation  Balanced propagation delays  SOT353-1 and SOT753 package options  ESD protection: HBM JESD22-A114E: exceeds 2000V MM JESD22-A115-A: exceeds 200 V CDMJESD22-C101C: exceeds 1000V  Specified from 40 Cto+125 C 3. Ordering information Table 1. Ordering info rmation Type number Package Temperature range Name Description Version 74AHC1G00GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; SOT353-1 5leads; body width1.25mm 74AHCT1G00GW 74AHC1G00GV 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 74AHCT1G00GV

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 4. Marking Table 2. Marking cod es Type number Marking[1] 74AHC1G00GW AA 74AHC1G00GV A00 74AHCT1G00GW CA 74AHCT1G00GV C00 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram (cid:37) (cid:20) (cid:37) (cid:20) (cid:60) (cid:23) (cid:9) (cid:23) (cid:60) (cid:21) (cid:36) (cid:21) (cid:36) (cid:80)(cid:81)(cid:68)(cid:19)(cid:28)(cid:26) (cid:80)(cid:81)(cid:68)(cid:19)(cid:28)(cid:27) (cid:80)(cid:81)(cid:68)(cid:19)(cid:28)(cid:28) Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning (cid:26)(cid:23)(cid:36)(cid:43)(cid:38)(cid:20)(cid:42)(cid:19)(cid:19)(cid:3) (cid:26)(cid:23)(cid:36)(cid:43)(cid:38)(cid:55)(cid:20)(cid:42)(cid:19)(cid:19) (cid:37) (cid:20) (cid:24) (cid:57)(cid:38)(cid:38) (cid:36) (cid:21) (cid:42)(cid:49)(cid:39) (cid:22) (cid:23) (cid:60) (cid:19)(cid:19)(cid:20)(cid:68)(cid:68)(cid:73)(cid:19)(cid:28)(cid:21) Fig 4. Pin configuration 6.2 Pin description Table 3. Pin descripti on Symbol Pin Description B 1 data input A 2 data input GND 3 ground (0 V) Y 4 data output V 5 supply voltage CC 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 2 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 7. Functional description Table 4. Function tab le H = HIGH voltage level; L = LOW voltage level Inputs Output A B Y L L H L H H H L H H H L 8. Limiting values Table 5. Limiting valu es In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V supply voltage 0.5 +7.0 V CC V input voltage 0.5 +7.0 V I I input clamping current V < 0.5 V 20 - mA IK I I output clamping current V < 0.5V or V >V +0.5V [1] - 20 mA OK O O CC I output current 0.5 V < V <V +0.5V - 25 mA O O CC I supply current - 75 mA CC I ground current 75 - mA GND T storage temperature 65 +150 C stg P total power dissipation T = 40Cto+125 C [2] - 250 mW tot amb [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For both TSSOP5 and SC-74A packages: above 87.5C the value of Ptotderates linearly with 4.0mW/K. 9. Recommended operating conditions Table 6. Recommend ed operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC1G00 74AHCT1G00 Unit Min Typ Max Min Typ Max V supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V CC V input voltage 0 - 5.5 0 - 5.5 V I V output voltage 0 - V 0 - V V O CC CC T ambient temperature 40 +25 +125 40 +25 +125 C amb t/V input transition rise V = 3.3 V  0.3 V - - 100 - - - ns/V CC and fall rate V = 5.0 V  0.5 V - - 20 - - 20 ns/V CC 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 3 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 10. Static characteristics Table 7. Static charac teristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40C to+85 C 40C to+125 C Unit Min Typ Max Min Max Min Max For type 74AHC1G00 V HIGH-level V = 2.0 V 1.5 - - 1.5 - 1.5 - V IH CC input voltage V = 3.0 V 2.1 - - 2.1 - 2.1 - V CC V = 5.5 V 3.85 - - 3.85 - 3.85 - V CC V LOW-level V = 2.0 V - - 0.5 - 0.5 - 0.5 V IL CC input voltage V = 3.0 V - - 0.9 - 0.9 - 0.9 V CC V = 5.5 V - - 1.65 - 1.65 - 1.65 V CC V HIGH-level V = V or V OH I IH IL output voltage I = 50A; V =2.0 V 1.9 2.0 - 1.9 - 1.9 - V O CC I = 50A; V =3.0 V 2.9 3.0 - 2.9 - 2.9 - V O CC I = 50A; V =4.5 V 4.4 4.5 - 4.4 - 4.4 - V O CC I = 4.0mA; V =3.0 V 2.58 - - 2.48 - 2.40 - V O CC I = 8.0mA; V =4.5 V 3.94 - - 3.8 - 3.70 - V O CC V LOW-level V = V or V OL I IH IL output voltage I = 50A; V =2.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50A; V =3.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50A; V =4.5 V - 0 0.1 - 0.1 - 0.1 V O CC I = 4.0mA; V =3.0 V - - 0.36 - 0.44 - 0.55 V O CC I = 8.0mA; V =4.5 V - - 0.36 - 0.44 - 0.55 V O CC I input leakage V =5.5VorGND; - - 0.1 - 1.0 - 2.0 A I I current V =0Vto5.5V CC I supply current V =V orGND; I = 0 A; - - 1.0 - 10 - 40 A CC I CC O V =5.5 V CC C input - 1.5 10 - 10 - 10 pF I capacitance For type 74AHCT1G00 V HIGH-level V = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V IH CC input voltage V LOW-level V = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V IL CC input voltage V HIGH-level V = V or V ; V =4.5 V OH I IH IL CC output voltage I = 50A 4.4 4.5 - 4.4 - 4.4 - V O I = 8.0mA 3.94 - - 3.8 - 3.70 - V O V LOW-level V = V or V ; V =4.5 V OL I IH IL CC output voltage I = 50A - 0 0.1 - 0.1 - 0.1 V O I = 8.0mA - - 0.36 - 0.44 - 0.55 V O I input leakage V =5.5VorGND; - - 0.1 - 1.0 - 2.0 A I I current V =0Vto5.5V CC 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 4 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40C to+85 C 40C to+125 C Unit Min Typ Max Min Max Min Max I supply current V =V orGND; I = 0 A; - - 1.0 - 10 - 40 A CC I CC O V =5.5 V CC I additional per input pin; V =3.4V; - - 1.35 - 1.5 - 1.5 mA CC I supply current otherinputs at V orGND; CC I =0 A; V = 5.5 V O CC C input - 1.5 10 - 10 - 10 pF I capacitance 11. Dynamic characteristics Table 8. Dynamic cha racteristics GND = 0 V; t = t =  3.0 ns. For test circuit see Figure6. r f Symbol Parameter Conditions 25 C 40C to+85 C 40C to+125 C Unit Min Typ Max Min Max Min Max For type 74AHC1G00 t propagation A and B toY; seeFigure5 [1] pd delay V = 3.0 V to 3.6 V [2] CC C =15 pF - 4.5 7.9 1.0 9.5 1.0 10.5 ns L C =50 pF - 6.5 11.4 1.0 13.0 1.0 14.5 ns L V = 4.5 V to 5.5 V [3] CC C =15 pF - 3.5 5.5 1.0 6.5 1.0 7.0 ns L C =50 pF - 4.9 7.5 1.0 8.5 1.0 9.5 ns L C power per buffer; [4] - 17 - - - - - pF PD dissipation C =50pF;f=1 MHz; L capacitance V =GNDtoV I CC For type 74AHCT1G00 t propagation A and B toY; seeFigure5 [1] pd delay V = 4.5 V to 5.5 V [3] CC C =15 pF - 3.6 6.2 1.0 7.1 1.0 8.0 ns L C =50 pF - 5.0 7.9 1.0 9.0 1.0 10.0 ns L C power per buffer; [4] - 18 - - - - - pF PD dissipation V =GNDtoV I CC capacitance [1] t is the same as t and t . pd PLH PHL [2] Typical values are measured at V = 3.3 V. CC [3] Typical values are measured at V = 5.0 V. CC [4] CPDis used to determine the dynamic power dissipation PD(W). PD=CPDVCC2fi+(CLVCC2fo)where: f =input frequency in MHz; i f =output frequency in MHz; o C =output load capacitance in pF; L V =supply voltage in Volts. CC 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 5 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 12. Waveforms (cid:36)(cid:15)(cid:3)(cid:37)(cid:3)(cid:76)(cid:81)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:87)(cid:51)(cid:43)(cid:47) (cid:87)(cid:51)(cid:47)(cid:43) (cid:60)(cid:3)(cid:82)(cid:88)(cid:87)(cid:83)(cid:88)(cid:87) (cid:57)(cid:48) (cid:80)(cid:81)(cid:68)(cid:20)(cid:19)(cid:25) Measurement points are given in Table9. Fig 5. The inputs (AandB) to output (Y) propagation delays Table 9. Measuremen t point Type Input Output V V V I M M 74AHC1G00 GND to V 0.5  V 0.5  V CC CC CC 74AHCT1G00 GND to 3.0 V 1.5 V 0.5  V CC (cid:57)(cid:38)(cid:38) (cid:57)(cid:44) (cid:57)(cid:50) (cid:51)(cid:56)(cid:47)(cid:54)(cid:40)(cid:3) (cid:39)(cid:56)(cid:55) (cid:42)(cid:40)(cid:49)(cid:40)(cid:53)(cid:36)(cid:55)(cid:50)(cid:53) (cid:53)(cid:55) (cid:38)(cid:47) (cid:80)(cid:81)(cid:68)(cid:20)(cid:19)(cid:20) Test data is given in Table8. Definitions for test circuit: CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Test circuit for measuring switching times 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 6 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 13. Package outline (cid:55)(cid:54)(cid:54)(cid:50)(cid:51)(cid:24)(cid:29)(cid:3)(cid:83)(cid:79)(cid:68)(cid:86)(cid:87)(cid:76)(cid:70)(cid:3)(cid:87)(cid:75)(cid:76)(cid:81)(cid:3)(cid:86)(cid:75)(cid:85)(cid:76)(cid:81)(cid:78)(cid:3)(cid:86)(cid:80)(cid:68)(cid:79)(cid:79)(cid:3)(cid:82)(cid:88)(cid:87)(cid:79)(cid:76)(cid:81)(cid:72)(cid:3)(cid:83)(cid:68)(cid:70)(cid:78)(cid:68)(cid:74)(cid:72)(cid:30)(cid:3)(cid:24)(cid:3)(cid:79)(cid:72)(cid:68)(cid:71)(cid:86)(cid:30)(cid:3)(cid:69)(cid:82)(cid:71)(cid:92)(cid:3)(cid:90)(cid:76)(cid:71)(cid:87)(cid:75)(cid:3)(cid:20)(cid:17)(cid:21)(cid:24)(cid:3)(cid:80)(cid:80)(cid:3) (cid:54)(cid:50)(cid:55)(cid:22)(cid:24)(cid:22)(cid:16)(cid:20)(cid:3) (cid:39)(cid:3) (cid:40)(cid:3) (cid:36)(cid:3) (cid:59)(cid:3) (cid:70)(cid:3) (cid:92)(cid:3) (cid:43)(cid:40)(cid:3) (cid:89)(cid:3)(cid:48)(cid:3) (cid:36)(cid:3) (cid:61)(cid:3) (cid:24)(cid:3) (cid:23)(cid:3) (cid:36)(cid:21)(cid:3) (cid:36)(cid:3) (cid:36)(cid:20)(cid:3) (cid:11)(cid:36)(cid:22)(cid:12)(cid:3) (cid:537)(cid:3) (cid:20)(cid:3) (cid:22)(cid:3) (cid:47)(cid:83)(cid:3) (cid:47)(cid:3) (cid:72)(cid:3) (cid:90)(cid:3)(cid:48)(cid:3) (cid:69)(cid:83)(cid:3) (cid:72)(cid:20)(cid:3) (cid:71)(cid:72)(cid:87)(cid:68)(cid:76)(cid:79)(cid:3)(cid:59)(cid:3) (cid:19)(cid:3) (cid:20)(cid:17)(cid:24)(cid:3) (cid:22)(cid:3)(cid:80)(cid:80)(cid:3) (cid:86)(cid:70)(cid:68)(cid:79)(cid:72)(cid:3) (cid:39)(cid:44)(cid:48)(cid:40)(cid:49)(cid:54)(cid:44)(cid:50)(cid:49)(cid:54)(cid:3)(cid:11)(cid:80)(cid:80)(cid:3)(cid:68)(cid:85)(cid:72)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:82)(cid:85)(cid:76)(cid:74)(cid:76)(cid:81)(cid:68)(cid:79)(cid:3)(cid:71)(cid:76)(cid:80)(cid:72)(cid:81)(cid:86)(cid:76)(cid:82)(cid:81)(cid:86)(cid:12)(cid:3) (cid:56)(cid:49)(cid:44)(cid:55)(cid:3) (cid:80)(cid:36)(cid:68)(cid:91)(cid:3)(cid:17)(cid:3) (cid:36)(cid:20)(cid:3) (cid:36)(cid:21)(cid:3) (cid:36)(cid:22)(cid:3) (cid:69)(cid:83)(cid:3) (cid:70)(cid:3) (cid:39)(cid:11)(cid:20)(cid:12)(cid:3) (cid:40)(cid:11)(cid:20)(cid:12)(cid:3) (cid:72)(cid:3) (cid:72)(cid:20)(cid:3) (cid:43)(cid:40)(cid:3) (cid:47)(cid:3) (cid:47)(cid:83)(cid:3) (cid:89)(cid:3) (cid:90)(cid:3) (cid:92)(cid:3) (cid:61)(cid:11)(cid:20)(cid:12)(cid:3) (cid:537)(cid:3) (cid:19)(cid:17)(cid:20)(cid:3) (cid:20)(cid:17)(cid:19)(cid:3) (cid:19)(cid:17)(cid:22)(cid:19)(cid:3) (cid:19)(cid:17)(cid:21)(cid:24)(cid:3) (cid:21)(cid:17)(cid:21)(cid:24)(cid:3) (cid:20)(cid:17)(cid:22)(cid:24)(cid:3) (cid:21)(cid:17)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:23)(cid:25)(cid:3) (cid:19)(cid:17)(cid:25)(cid:19)(cid:3) (cid:26)(cid:131)(cid:3) (cid:80)(cid:80)(cid:3) (cid:20)(cid:17)(cid:20)(cid:3) (cid:19)(cid:17)(cid:20)(cid:24)(cid:3) (cid:19)(cid:17)(cid:25)(cid:24)(cid:3) (cid:20)(cid:17)(cid:22)(cid:3) (cid:19)(cid:17)(cid:23)(cid:21)(cid:24)(cid:3) (cid:19)(cid:17)(cid:22)(cid:3) (cid:19)(cid:17)(cid:20)(cid:3) (cid:19)(cid:17)(cid:20)(cid:3) (cid:19)(cid:3) (cid:19)(cid:17)(cid:27)(cid:3) (cid:19)(cid:17)(cid:20)(cid:24)(cid:3) (cid:19)(cid:17)(cid:19)(cid:27)(cid:3) (cid:20)(cid:17)(cid:27)(cid:24)(cid:3) (cid:20)(cid:17)(cid:20)(cid:24)(cid:3) (cid:21)(cid:17)(cid:19)(cid:3) (cid:19)(cid:17)(cid:21)(cid:20)(cid:3) (cid:19)(cid:17)(cid:20)(cid:24)(cid:3) (cid:19)(cid:131)(cid:3) (cid:49)(cid:82)(cid:87)(cid:72)(cid:3) (cid:20)(cid:17)(cid:3)(cid:51)(cid:79)(cid:68)(cid:86)(cid:87)(cid:76)(cid:70)(cid:3)(cid:82)(cid:85)(cid:3)(cid:80)(cid:72)(cid:87)(cid:68)(cid:79)(cid:3)(cid:83)(cid:85)(cid:82)(cid:87)(cid:85)(cid:88)(cid:86)(cid:76)(cid:82)(cid:81)(cid:86)(cid:3)(cid:82)(cid:73)(cid:3)(cid:19)(cid:17)(cid:20)(cid:24)(cid:3)(cid:80)(cid:80)(cid:3)(cid:80)(cid:68)(cid:91)(cid:76)(cid:80)(cid:88)(cid:80)(cid:3)(cid:83)(cid:72)(cid:85)(cid:3)(cid:86)(cid:76)(cid:71)(cid:72)(cid:3)(cid:68)(cid:85)(cid:72)(cid:3)(cid:81)(cid:82)(cid:87)(cid:3)(cid:76)(cid:81)(cid:70)(cid:79)(cid:88)(cid:71)(cid:72)(cid:71)(cid:17)(cid:3) (cid:50)(cid:56)(cid:55)(cid:47)(cid:44)(cid:49)(cid:40)(cid:3) (cid:3)(cid:53)(cid:40)(cid:41)(cid:40)(cid:53)(cid:40)(cid:49)(cid:38)(cid:40)(cid:54)(cid:3) (cid:40)(cid:56)(cid:53)(cid:50)(cid:51)(cid:40)(cid:36)(cid:49)(cid:3) (cid:44)(cid:54)(cid:54)(cid:56)(cid:40)(cid:3)(cid:39)(cid:36)(cid:55)(cid:40)(cid:3) (cid:57)(cid:40)(cid:53)(cid:54)(cid:44)(cid:50)(cid:49)(cid:3) (cid:3)(cid:44)(cid:40)(cid:38)(cid:3) (cid:3)(cid:45)(cid:40)(cid:39)(cid:40)(cid:38)(cid:3) (cid:3)(cid:45)(cid:40)(cid:44)(cid:55)(cid:36)(cid:3) (cid:51)(cid:53)(cid:50)(cid:45)(cid:40)(cid:38)(cid:55)(cid:44)(cid:50)(cid:49)(cid:3) (cid:19)(cid:19)(cid:16)(cid:19)(cid:28)(cid:16)(cid:19)(cid:20)(cid:3) (cid:3)(cid:54)(cid:50)(cid:55)(cid:22)(cid:24)(cid:22)(cid:16)(cid:20)(cid:3) (cid:48)(cid:50)(cid:16)(cid:3)(cid:21)(cid:19)(cid:22)(cid:3) (cid:54)(cid:38)(cid:16)(cid:27)(cid:27)(cid:36)(cid:3) (cid:19)(cid:22)(cid:16)(cid:19)(cid:21)(cid:16)(cid:20)(cid:28)(cid:3) Fig 7. Package outline SOT353-1 (TSSOP5) 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 7 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate (cid:51)(cid:79)(cid:68)(cid:86)(cid:87)(cid:76)(cid:70)(cid:3)(cid:86)(cid:88)(cid:85)(cid:73)(cid:68)(cid:70)(cid:72)(cid:16)(cid:80)(cid:82)(cid:88)(cid:81)(cid:87)(cid:72)(cid:71)(cid:3)(cid:83)(cid:68)(cid:70)(cid:78)(cid:68)(cid:74)(cid:72)(cid:30)(cid:3)(cid:24)(cid:3)(cid:79)(cid:72)(cid:68)(cid:71)(cid:86) (cid:54)(cid:50)(cid:55)(cid:26)(cid:24)(cid:22) (cid:39) (cid:37) (cid:40) (cid:36) (cid:59) (cid:92) (cid:43)(cid:40) (cid:89) (cid:48) (cid:36) (cid:24) (cid:23) (cid:52) (cid:36) (cid:36)(cid:20) (cid:70) (cid:20) (cid:21) (cid:22) (cid:47)(cid:83) (cid:71)(cid:72)(cid:87)(cid:68)(cid:76)(cid:79)(cid:3)(cid:59) (cid:72) (cid:69)(cid:83) (cid:90) (cid:48) (cid:37) (cid:19) (cid:20) (cid:21)(cid:3)(cid:80)(cid:80) (cid:86)(cid:70)(cid:68)(cid:79)(cid:72) (cid:39)(cid:44)(cid:48)(cid:40)(cid:49)(cid:54)(cid:44)(cid:50)(cid:49)(cid:54)(cid:3)(cid:11)(cid:80)(cid:80)(cid:3)(cid:68)(cid:85)(cid:72)(cid:3)(cid:87)(cid:75)(cid:72)(cid:3)(cid:82)(cid:85)(cid:76)(cid:74)(cid:76)(cid:81)(cid:68)(cid:79)(cid:3)(cid:71)(cid:76)(cid:80)(cid:72)(cid:81)(cid:86)(cid:76)(cid:82)(cid:81)(cid:86)(cid:12) (cid:56)(cid:49)(cid:44)(cid:55) (cid:36) (cid:36)(cid:20) (cid:69)(cid:83) (cid:70) (cid:39) (cid:40) (cid:72) (cid:43)(cid:40) (cid:47)(cid:83) (cid:52) (cid:89) (cid:90) (cid:92) (cid:20)(cid:17)(cid:20)(cid:3) (cid:19)(cid:17)(cid:20)(cid:19)(cid:19)(cid:3) (cid:19)(cid:17)(cid:23)(cid:19)(cid:3) (cid:19)(cid:17)(cid:21)(cid:25)(cid:3) (cid:22)(cid:17)(cid:20)(cid:3) (cid:20)(cid:17)(cid:26)(cid:3) (cid:22)(cid:17)(cid:19)(cid:3) (cid:19)(cid:17)(cid:25)(cid:3) (cid:19)(cid:17)(cid:22)(cid:22)(cid:3) (cid:80)(cid:80) (cid:19)(cid:17)(cid:28)(cid:24) (cid:19)(cid:17)(cid:21) (cid:19)(cid:17)(cid:21) (cid:19)(cid:17)(cid:20) (cid:19)(cid:17)(cid:28) (cid:19)(cid:17)(cid:19)(cid:20)(cid:22) (cid:19)(cid:17)(cid:21)(cid:24) (cid:19)(cid:17)(cid:20)(cid:19) (cid:21)(cid:17)(cid:26) (cid:20)(cid:17)(cid:22) (cid:21)(cid:17)(cid:24) (cid:19)(cid:17)(cid:21) (cid:19)(cid:17)(cid:21)(cid:22) (cid:50)(cid:56)(cid:55)(cid:47)(cid:44)(cid:49)(cid:40)(cid:3) (cid:3)(cid:53)(cid:40)(cid:41)(cid:40)(cid:53)(cid:40)(cid:49)(cid:38)(cid:40)(cid:54) (cid:40)(cid:56)(cid:53)(cid:50)(cid:51)(cid:40)(cid:36)(cid:49)(cid:3) (cid:44)(cid:54)(cid:54)(cid:56)(cid:40)(cid:3)(cid:39)(cid:36)(cid:55)(cid:40) (cid:57)(cid:40)(cid:53)(cid:54)(cid:44)(cid:50)(cid:49) (cid:3)(cid:44)(cid:40)(cid:38) (cid:3)(cid:45)(cid:40)(cid:39)(cid:40)(cid:38) (cid:3)(cid:45)(cid:40)(cid:44)(cid:55)(cid:36) (cid:51)(cid:53)(cid:50)(cid:45)(cid:40)(cid:38)(cid:55)(cid:44)(cid:50)(cid:49) (cid:19)(cid:21)(cid:16)(cid:19)(cid:23)(cid:16)(cid:20)(cid:25)(cid:3) (cid:3)(cid:54)(cid:50)(cid:55)(cid:26)(cid:24)(cid:22) (cid:3) (cid:54)(cid:38)(cid:16)(cid:26)(cid:23)(cid:36) (cid:19)(cid:25)(cid:16)(cid:19)(cid:22)(cid:16)(cid:20)(cid:25) Fig 8. Package outline SOT753 (SC-74A) 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 8 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 14. Abbreviations Table 10. Abbreviation s Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history T able 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT1G00 v.7 20141105 Product data sheet - 74AHC_AHCT1G00 v.6 Modifications: • Section4: table note added. 74AHC_AHCT1G00 v.6 20070530 Product data sheet - 74AHC_AHCT1G00 v.5 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Package SOT353 changed to SOT353-1 in Section3 and Section13. • Quick reference data and Soldering sections removed. 74AHC_AHCT1G00 v.5 20020527 Product specification - 74AHC_AHCT1G00 v.4 74AHC_AHCT1G00 v.4 20020227 Product specification - 74AHC_AHCT1G00 v.3 74AHC_AHCT1G00 v.3 20010131 Product specification - 74AHC_AHCT1G00 v.2 74AHC_AHCT1G00 v.2 19990127 Product specification - 74AHC_AHCT1G00_N v.1 74AHC_AHCT1G00_N v.1 19981125 Preliminary specification - - 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 9 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nexperia.com. 16.2 Definitions Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Draft — The document is a draft version only. The content is still under malfunction of a Nexperia product can reasonably be expected internal review and subject to formal approval, which may result in to result in personal injury, death or severe property or environmental modifications or additions. Nexperia does not give any damage. Nexperia and its suppliers accept no liability for representations or warranties as to the accuracy or completeness of inclusion and/or use of Nexperia products in such equipment or information included herein and shall have no liability for the consequences of applications and therefore such inclusion and/or use is at the customer’s own use of such information. risk. Short data sheet — A short data sheet is an extract from a full data sheet Applications — Applications that are described herein for any of these with the same product type number(s) and title. A short data sheet is intended products are for illustrative purposes only. Nexperia makes no for quick reference only and should not be relied upon to contain detailed and representation or warranty that such applications will be suitable for the full information. For detailed and full information see the relevant full data specified use without further testing or modification. sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the Customers are responsible for the design and operation of their applications full data sheet shall prevail. and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product Product specification — The information and data provided in a Product design. It is customer’s sole responsibility to determine whether the Nexperia data sheet shall define the specification of the product as agreed between product is suitable and fit for the customer’s applications and Nexperia and its customer, unless Nexperia and products planned, as well as for the planned application and use of customer have explicitly agreed otherwise in writing. In no event however, customer’s third party customer(s). Customers should provide appropriate shall an agreement be valid in which the Nexperia product is design and operating safeguards to minimize the risks associated with their deemed to offer functions and qualities beyond those described in the applications and products. Product data sheet. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the 16.3 Disclaimers customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia Limited warranty and liability — Information in this document is believed to products in order to avoid a default of the applications and be accurate and reliable. However, Nexperia does not give any the products or of the application or use by customer’s third party representations or warranties, expressed or implied, as to the accuracy or customer(s). Nexperia does not accept any liability in this respect. completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no Limiting values — Stress above one or more limiting values (as defined in responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC60134) will cause permanent source outside of Nexperia. damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in In no event shall Nexperia be liable for any indirect, incidental, the Recommended operating conditions section (if present) or the punitive, special or consequential damages (including - without limitation - lost Characteristics sections of this document is not warranted. Constant or profits, lost savings, business interruption, costs related to the removal or repeated exposure to limiting values will permanently and irreversibly affect replacement of any products or rework charges) whether or not such the quality and reliability of the device. damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards sale, as published at http://www.nexperia.com/profile/terms, unless otherwise customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual with the Terms and conditions of commercial sale of Nexperia. agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to Right to make changes — Nexperia reserves the right to make applying the customer’s general terms and conditions with regard to the changes to information published in this document, including without purchase of Nexperia products by customer. limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 10 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate Export control — This document as well as the item(s) described herein Nexperia’s specifications such use shall be solely at customer’s may be subject to export control regulations. Export might require a prior own risk, and (c) customer fully indemnifies Nexperia for any authorization from competent authorities. liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s Non-automotive qualified products — Unless this data sheet expressly standard warranty and Nexperia’s product specifications. states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested Translations — A non-English (translated) version of a document is for in accordance with automotive testing or application requirements. Nexperia reference only. The English version shall prevail in case of any discrepancy accepts no liability for inclusion and/or use of between the translated and English versions. non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in 16.4 Trademarks automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the Notice: All referenced brands, product names, service names and trademarks product for such automotive applications, use and specifications, and (b) are the property of their respective owners. whenever customer uses the product for automotive applications beyond 17. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74AHC_AHCT1G00 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 — 5 November 2014 11 of 12

74AHC1G00; 74AHCT1G00 Nexperia 2-input NAND gate 18. Contents 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1 4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 9 Recommended operating conditions. . . . . . . . 3 10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 11 Dynamic characteristics. . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline. . . . . . . . . . . . . . . . . . . . . . . . . 7 14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9 15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10 16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 17 Contact information. . . . . . . . . . . . . . . . . . . . . 11 18 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 © Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 05 November 2014