74AHC08; 74AHCT08 Quad 2-input AND gate Rev. 03 — 14 November 2007 Product data sheet 1. General description The 74AHC08; 74AHCT08 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC08; 74AHCT08 provides the quad 2-input AND function. 2. Features n Balanced propagation delays n All inputs have a Schmitt-trigger action n Inputs accepts voltages higher thanV CC n For 74AHC08 only: operates with CMOS input levels n For 74AHCT08 only: operates with TTL input levels n ESD protection: u HBM JESD22-A114E exceeds 2000V u MM JESD22-A115-A exceeds 200V u CDM JESD22-C101C exceeds 1000V n Multiple package options n Specified from-40 (cid:176)C to +85 (cid:176)C and from -40 (cid:176)C to +125 (cid:176)C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC08D -40 (cid:176)Cto+125 (cid:176)C SO14 plastic small outline package; 14leads; SOT108-1 bodywidth3.9mm 74AHCT08D 74AHC08PW -40 (cid:176)Cto+125 (cid:176)C TSSOP14 plastic thin shrink small outline package; 14leads; SOT402-1 body width 4.4mm 74AHCT08PW 74AHC08BQ -40 (cid:176)Cto+125 (cid:176)C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package; no leads; 14 terminals; 74AHCT08BQ body2.5· 3· 0.85mm

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 4. Functional diagram 1 & 3 2 1 1A 1Y 3 2 1B 4 & 6 4 2A 2Y 6 5 5 2B A 9 3A Y 3Y 8 9 10 3B & 8 B 10 12 4A mna221 4Y 11 13 4B 12 & mna222 11 13 mna223 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) 5. Pinning information 5.1 Pinning C terminal 1 A C 1A 1 14 VCC index area 1 V 1 14 1B 2 13 4B 1B 2 13 4B 1Y 3 12 4A 1Y 3 12 4A 2A 4 08 11 4Y 2A 4 08 11 4Y 2B 5 GND(1) 10 3B 2B 5 10 3B 2Y 6 9 3A 2Y 6 9 3A 7 8 D Y GND 7 8 3Y GN 3 001aac946 001aac945 Transparent top view (1) The die substrate is attached to this pad using conductivedieattachmaterial.Itcannotbeusedas a supply pin or input. Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 2 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A 1 data input 1B 2 data input 1Y 3 data output 2A 4 data input 2B 5 data input 2Y 6 data output GND 7 ground (0V) 3Y 8 data output 3A 9 data input 3B 10 data input 4Y 11 data output 4A 12 data input 4B 13 data input V 14 supply voltage CC 6. Functional description Table 3. Function selection[1] Input Output nA nB nY L X L X L L H H H [1] H=HIGH voltage level; L=LOW voltage level; X=don’t care 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).Voltages are referenced to GND (ground = 0V). Symbol Parameter Conditions Min Max Unit V supply voltage -0.5 +7.0 V CC V input voltage -0.5 +7.0 V I I input clamping current V <-0.5V [1] -20 - mA IK I I output clamping current V <-0.5V orV >V +0.5V [1] - –20 mA OK O O CC I output current V =-0.5V to (V +0.5V) - –25 mA O O CC I supply current - 75 mA CC I ground current -75 - mA GND T storage temperature -65 +150 (cid:176)C stg 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 3 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134).Voltages are referenced to GND (ground = 0V). Symbol Parameter Conditions Min Max Unit P total power dissipation T =-40 (cid:176)C to +125 (cid:176)C tot amb SO14 package [2] - 500 mW TSSOP14 package [3] - 500 mW DHVQFN14 package [4] - 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] P derates linearly with 8mW/K above 70(cid:176)C. tot [3] P derates linearly with 5.5mW/K above 60(cid:176)C. tot [4] P derates linearly with 4.5mW/K above 60(cid:176)C. tot 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC08 74AHCT08 Unit Min Typ Max Min Typ Max V supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V CC V input voltage 0 - 5.5 0 - 5.5 V I V output voltage 0 - V 0 - V V O CC CC T ambient temperature -40 +25 +125 -40 +25 +125 (cid:176)C amb Dt/DV input transition rise V = 3.3 V– 0.3 V - - 100 - - - ns/V CC and fall rate V = 5.0 V– 0.5 V - - 20 - - 20 ns/V CC 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25(cid:176)C -40 (cid:176)C to+85 (cid:176)C - 40(cid:176)C to+125 (cid:176)C Unit Min Typ Max Min Max Min Max For type 74AHC08 V HIGH-level V = 2.0 V 1.5 - - 1.5 - 1.5 - V IH CC input voltage V = 3.0 V 2.1 - - 2.1 - 2.1 - V CC V = 5.5 V 3.85 - - 3.85 - 3.85 - V CC V LOW-level V = 2.0 V - - 0.5 - 0.5 - 0.5 V IL CC input voltage V = 3.0 V - - 0.9 - 0.9 - 0.9 V CC V = 5.5 V - - 1.65 - 1.65 - 1.65 V CC V HIGH-level V = V or V OH I IH IL output voltage I =-50 mA; V =2.0 V 1.9 2.0 - 1.9 - 1.9 - V O CC I =-50 mA; V =3.0 V 2.9 3.0 - 2.9 - 2.9 - V O CC I =-50 mA; V =4.5 V 4.4 4.5 - 4.4 - 4.4 - V O CC I =-4.0mA; V =3.0 V 2.58 - - 2.48 - 2.4 - V O CC I =-8.0mA; V =4.5 V 3.94 - - 3.8 - 3.7 - V O CC 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 4 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate Table 6. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25(cid:176)C -40 (cid:176)C to+85 (cid:176)C - 40(cid:176)C to+125 (cid:176)C Unit Min Typ Max Min Max Min Max V LOW-level V = V or V OL I IH IL output voltage I = 50mA; V =2.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50mA; V =3.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 50mA; V =4.5 V - 0 0.1 - 0.1 - 0.1 V O CC I = 4.0mA; V =3.0 V - - 0.36 - 0.44 - 0.55 V O CC I = 8.0mA; V =4.5 V - - 0.36 - 0.44 - 0.55 V O CC I input leakage V =5.5VorGND;V =0V - - 0.1 - 1.0 - 2.0 mA I I CC current to 5.5V I supply current V =V orGND; I = 0 A; - - 2.0 - 20 - 40 mA CC I CC O V =5.5V CC C input - 3.0 10 - 10 - 10 pF I capacitance For type 74AHCT08 V HIGH-level V = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V IH CC input voltage V LOW-level V = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V IL CC input voltage V HIGH-level V = V or V ; V =4.5 V OH I IH IL CC output voltage I =-50 mA 4.4 4.5 - 4.4 - 4.4 - V O I =-8.0mA 3.94 - - 3.8 - 3.7 - V O V LOW-level V = V or V ; V =4.5 V OL I IH IL CC output voltage I = 50mA - 0 0.1 - 0.1 - 0.1 V O I = 8.0mA - - 0.36 - 0.44 - 0.55 V O I input leakage V =5.5VorGND;V =0V - - 0.1 - 1.0 - 2.0 mA I I CC current to 5.5V I supply current V =V orGND; I = 0 A; - - 2.0 - 20 - 40 mA CC I CC O V =5.5V CC DI additional per input pin; - - 1.35 - 1.5 - 1.5 mA CC supply current V =V - 2.1V; I =0 A; I CC O otherpinsatV or GND; CC V =4.5Vto5.5V CC C input - 3.0 10 - 10 - 10 pF I capacitance 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 5 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; For test circuit seeFigure7. Symbol Parameter Conditions 25(cid:176)C -40 (cid:176)C to+85 (cid:176)C -40 (cid:176)C to+125 (cid:176)C Unit Min Typ[1] Max Min Max Min Max For type 74AHC08 t propagation nA, nBtonY; seeFigure6 [2] pd delay V = 3.0 V to 3.6 V CC C =15pF - 4.0 8.8 1.0 10.5 1.0 11.0 ns L C =50pF - 5.6 12.3 1.0 14 1.0 15.5 ns L V = 4.5 V to 5.5 V CC C =15pF - 3.0 5.9 1.0 7.0 1.0 7.5 ns L C =50pF 4.2 7.9 1.0 9.0 1.0 10.0 ns L C power C =50pF; f = 1 MHz; [3] - 10.0 - - - - - pF PD L i dissipation V =GNDtoV I CC capacitance For type 74AHCT08 t propagation nA, nBtonY; seeFigure6 [2] pd delay V = 4.5 V to 5.5 V CC C =15pF - 3.2 6.9 1.0 8.0 1.0 9.0 ns L C =50pF - 4.2 7.9 1.0 9.0 1.0 10.0 ns L C power C =50pF; f = 1 MHz; [3] - 12.0 - - - - - pF PD L i dissipation V =GNDtoV I CC capacitance [1] Typical values are measured at nominal supply voltage (V = 3.3V and V = 5.0V). CC CC [2] t is the same as t and t . pd PLH PHL [3] C is used to determine the dynamic power dissipation (P inm W). PD D P =C · V 2· f · N+S(C · V 2· f )where: D PD CC i L CC o f = input frequency in MHz, f =output frequency in MHz i o C =output load capacitance inpF L V =supply voltage in Volts CC N= number of inputs switching S (C · V 2· f )=sum of the outputs. L CC o 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 6 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 11. Waveforms VI nA, nB input VM GND tPHL tPLH VOH nY output VM VOL mna224 Measurement points are given inTable8. V and V are typical voltage output levels that occur with the output load. OL OH Fig 6. The input (nA, nB) to output (nY) propagation delays Table 8. Measurement points Type Input Output V V M M 74AHC08 0.5V 0.5V CC CC 74AHCT08 1.5V 0.5V CC 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 7 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate tW VI 90 % negative pulse VM VM 10 % 0 V tf tr tr tf VI 90 % positive pulse VM VM 10 % 0 V tW VCC VCC PULSE VI VO RL S1 DUT open GENERATOR RT CL 001aad983 Test data is given inTable9. Definitions test circuit: R = Termination resistance should be equal to output impedance Z of the pulse generator. T o C = Load capacitance including jig and probe capacitance. L R = Load resistance. L S1 = Test selection switch. Fig 7. Load circuit for switching times Table 9. Test data Type Input Load S1 position V t, t C R t , t t , t t , t I r f L L PHL PLH PZH PHZ PZL PLZ 74AHC08 V £ 3.0 ns 15 pF, 50 pF 1kW open GND V CC CC 74AHCT08 3.0 V £ 3.0 ns 15 pF, 50 pF 1kW open GND V CC 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 8 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 12. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 14 8 Q A2 A1 (A 3 ) A pin 1 index q Lp 1 7 L e w M detail X bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mAax. A1 A2 A3 bp c D(1) E(1) e HE L Lp Q v w y Z(1) q 0.25 1.45 0.49 0.25 8.75 4.0 6.2 1.0 0.7 0.7 mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1 0.10 1.25 0.36 0.19 8.55 3.8 5.8 0.4 0.6 0.3 8o 0.010 0.057 0.019 0.0100 0.35 0.16 0.244 0.039 0.028 0.028 0o inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004 0.004 0.049 0.014 0.0075 0.34 0.15 0.228 0.016 0.024 0.012 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT108-1 076E06 MS-012 03-02-19 Fig 8. Package outline SOT108-1 (SO14) 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 9 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 D E A X c y HE v M A Z 14 8 Q A2 (A 3 ) A pin 1 index A1 q Lp L 1 7 detail X w M e bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) q mm 1.1 00..1055 00..9850 0.25 00..3109 00..21 54..19 44..53 0.65 66..62 1 00..7550 00..43 0.2 0.13 0.1 00..7328 80oo Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT402-1 MO-153 03-02-18 Fig 9. Package outline SOT402-1 (TSSOP14) 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 10 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm SOT762-1 D B A A A1 E c terminal 1 detail X index area terminal 1 e1 C index area e b v M C A B y1 C y w M C 2 6 L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) A(1) UNIT max. A1 b c D(1) Dh E(1) Eh e e1 L v w y y1 0.05 0.30 3.1 1.65 2.6 1.15 0.5 mm 1 0.2 0.5 2 0.1 0.05 0.05 0.1 0.00 0.18 2.9 1.35 2.4 0.85 0.3 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 02-10-17 SOT762-1 - - - MO-241 - - - 03-01-27 Fig 10. Package outline SOT762-1 (DHVQFN14) 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 11 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor LSTTL Low-power Schottky Transistor-Transistor Logic ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model CDM Charged Device Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT08_3 20071114 Product data sheet - 74AHC_AHCT08_2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section3: DHVQFN14 package added. • Section7: derating values added for DHVQFN14 package. • Section12: outline drawing added for DHVQFN14 package. 74AHC_AHCT08_2 19990924 Product specification - 74AHC_AHCT08_1 74AHC_AHCT08_1 19981218 Product specification - - 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 12 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] Theproductstatusofdevice(s)describedinthisdocumentmayhavechangedsincethisdocumentwaspublishedandmaydifferincaseofmultipledevices.Thelatestproductstatus information is available on the Internet at URLhttp://www.nexperia.com. 15.2 Definitions malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia accepts no liability for inclusion and/or use of Draft —The document is a draft version only. The content is still under Nexperia products in such equipment or applications and internal review and subject to formal approval, which may result in therefore such inclusion and/or use is at the customer’s own risk. modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of Applications —Applications that are described herein for any of these informationincludedhereinandshallhavenoliabilityfortheconsequencesof products are for illustrative purposes only. Nexperia makes no use of such information. representation or warranty that such applications will be suitable for the specified use without further testing or modification. Short data sheet —A short data sheet is an extract from a full data sheet withthesameproducttypenumber(s)andtitle.Ashortdatasheetisintended Limiting values —Stress above one or more limiting values (as defined in forquickreferenceonlyandshouldnotbereliedupontocontaindetailedand theAbsoluteMaximumRatingsSystemofIEC60134)maycausepermanent full information. For detailed and full information see the relevant full data damagetothedevice.Limitingvaluesarestressratingsonlyandoperationof sheet, which is available on request via the local Nexperia sales the device at these or any other conditions above those given in the office. In case of any inconsistency or conflict with the short data sheet, the Characteristics sections of this document is not implied. Exposure to limiting full data sheet shall prevail. values for extended periods may affect device reliability. Terms and conditions of sale —Nexperia products are sold 15.3 Disclaimers subjecttothegeneraltermsandconditionsofcommercialsale,aspublished athttp://www.nexperia.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless General —Information in this document is believed to be accurate and explicitly otherwise agreed to in writing by Nexperia. In case of reliable.However,Nexperiadoesnotgiveanyrepresentationsor any inconsistency or conflict between information in this document and such warranties,expressedorimplied,astotheaccuracyorcompletenessofsuch terms and conditions, the latter will prevail. information and shall have no liability for the consequences of use of such No offer to sell or license —Nothing in this document may be interpreted information. or construed as an offer to sell products that is open for acceptance or the Right to make changes —Nexperiareservestherighttomake grant,conveyanceorimplicationofanylicenseunderanycopyrights,patents changes to information published in this document, including without or other industrial or intellectual property rights. limitation specifications and product descriptions, at any time and without notice.Thisdocumentsupersedesandreplacesallinformationsuppliedprior to the publication hereof. 15.4 Trademarks Suitability for use —Nexperia products are not designed, Notice:Allreferencedbrands,productnames,servicenamesandtrademarks authorized or warranted to be suitable for use in medical, military, aircraft, are the property of their respective owners. space or life support equipment, nor in applications where failure or 16. Contact information For additional information, please visit:http://www.nexperia.com For sales office addresses, send an email to:salesaddresses@nexperia.com 74AHC_AHCT08_3 © Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 — 14 November 2007 13 of 14

74AHC08; 74AHCT08 Nexperia Quad 2-input AND gate 17. Contents 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Recommended operating conditions. . . . . . . . 4 9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12 14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 16 Contact information. . . . . . . . . . . . . . . . . . . . . 13 17 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 © Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 14 November 2007