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ICGOO电子元器件商城为您提供74AC244SJ由Fairchild Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74AC244SJ价格参考¥0.75-¥1.00。Fairchild Semiconductor74AC244SJ封装/规格:逻辑 - 缓冲器,驱动器,接收器,收发器, Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-SOP。您可以下载74AC244SJ参考资料、Datasheet数据手册功能说明书,资料中有74AC244SJ 详细功能的应用电路图电压和使用方法及教程。
参数 | 数值 |
产品目录 | 集成电路 (IC)半导体 |
描述 | IC BUFF/DVR TRI-ST DUAL 20SOP缓冲器和线路驱动器 Octal Buf/Line Drv |
产品分类 | |
品牌 | Fairchild Semiconductor |
产品手册 | |
产品图片 | |
rohs | 符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求 |
产品系列 | 逻辑集成电路,缓冲器和线路驱动器,Fairchild Semiconductor 74AC244SJ74AC |
数据手册 | |
产品型号 | 74AC244SJ |
产品种类 | 缓冲器和线路驱动器 |
传播延迟时间 | 9 ns at 3.3 V, 7 ns at 5 V |
低电平输出电流 | 24 mA |
供应商器件封装 | 20-SOIC |
元件数 | 2 |
包装 | 管件 |
单位重量 | 481.500 mg |
商标 | Fairchild Semiconductor |
安装类型 | 表面贴装 |
安装风格 | SMD/SMT |
封装 | Tube |
封装/外壳 | 20-SOIC(0.209",5.30mm 宽) |
封装/箱体 | SOP-20 |
工作温度 | -40°C ~ 85°C |
工厂包装数量 | 38 |
最大工作温度 | + 85 C |
最小工作温度 | - 40 C |
极性 | Non-Inverting |
标准包装 | 38 |
每元件位数 | 4 |
每芯片的通道数量 | 8 |
电压-电源 | 2 V ~ 6 V |
电流-输出高,低 | 24mA,24mA |
电源电压-最大 | 6 V |
电源电压-最小 | 2 V |
系列 | 74AC244 |
输入线路数量 | 8 |
输出类型 | 3-State |
输出线路数量 | 3 |
逻辑类型 | 缓冲器/线路驱动器,非反相 |
逻辑系列 | AC |
高电平输出电流 | - 24 mA |
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
7 4 A C January 2008 2 4 4 , 7 4 A 74AC244, 74ACT244 C T Octal Buffer/Line Driver with 3-STATE Outputs 2 4 4 — Features General Description O ■ I and I reduced by 50% The AC/ACT244 is an octal buffer and line driver c CC OZ t ■ 3-STATE outputs drive bus lines or buffer memory designed to be employed as a memory address driver, al address registers clock driver and bus-oriented transmitter/receiver which B provides improved PC board density. u ■ Outputs source/sink 24mA f f e ■ ACT244 has TTL-compatible inputs r / L i n e Ordering Information D r i v Package e r Order Number Number Package Description w 74AC244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide it h 74AC244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 3 - S 74AC244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm T Wide A T 74AC244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide E O 74ACT244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide u 74ACT244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide tp u 74ACT244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide t s 74ACT244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0
7 4 Connection Diagram Logic Symbol A C 2 IEEE/IEC 4 4 , 7 4 A C T 2 4 4 — O c t a l B u f f e r / L i n e Pin Description D r i Pin v e Names Description r w OE1, OE2 3-STATE Output Enable Inputs Truth Tables it h I0–I7 Inputs Inputs Outputs 3 - O –O Outputs S 0 7 OE I (Pins 12, 14, 16, 18) T 1 n A L L L T E L H H O u H X Z t p u t s Inputs Outputs OE I (Pins 3, 5, 7, 9) 2 n L L L L H H H X Z X = Immaterial Z = High Impedance ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 2
7 4 Absolute Maximum Ratings A C Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be 2 4 operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 4 In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. , 7 The absolute maximum ratings are stress ratings only. 4 A Symbol Parameter Rating C T V Supply Voltage −0.5V to +7.0V 2 CC 4 4 IIK DC Input Diode Current — V = −0.5V −20mA I O VI = VCC + 0.5 +20mA c t V DC Input Voltage −0.5V to V + 0.5V a I CC l B I DC Output Diode Current OK u VO = −0.5V −20mA ffe VO = VCC + 0.5V +20mA r/L V DC Output Voltage −0.5V to V + 0.5V in O CC e IO DC Output Source or Sink Current ±50mA D ICC or IGND DC VCC or Ground Current per Output Pin ±50mA riv TSTG Storage Temperature −65°C to +150°C er T Junction Temperature 140°C w J i t h 3 - S Recommended Operating Conditions T A The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended T operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not E recommend exceeding them or designing to absolute maximum ratings. O u Symbol Parameter Rating tp u VCC Supply Voltage ts AC 2.0V to 6.0V ACT 4.5V to 5.5V V Input Voltage 0V to V I CC V Output Voltage 0V to V O CC T Operating Temperature −40°C to +85°C A ∆V / ∆t Minimum Input Edge Rate, AC Devices: 125mV/ns V from 30% to 70% of V ,V @ 3.3V, 4.5V, 5.5V IN CC CC ∆V / ∆t Minimum Input Edge Rate, ACT Devices: 125mV/ns V from 0.8V to 2.0V, V @ 4.5V, 5.5V IN CC ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 3
7 4 DC Electrical Characteristics for AC A C 2 TA = −55°C to TA = −40°C 4 TA = +25°C +125°C to +85°C 4, 7 Symbol Parameter V (V) Conditions Typ. Guaranteed Limits Units 4 CC A V Minimum HIGH Level 3.0 V = 0.1V or 1.5 2.1 2.1 2.1 V C IH OUT Input Voltage 4.5 VCC − 0.1V 2.25 3.15 3.15 3.15 T2 4 5.5 2.75 3.85 3.85 3.85 4 V Maximum LOW Level 3.0 V = 0.1V or 1.5 0.9 0.9 0.9 V — IL OUT Input Voltage 4.5 VCC − 0.1V 2.25 1.35 1.35 1.35 O c 5.5 2.75 1.65 1.65 1.65 ta l VOH Minimum HIGH Level 3.0 IOUT = −50µA 2.99 2.9 2.9 2.9 V B Output Voltage u 4.5 4.49 4.4 4.4 4.4 f f e 5.5 5.49 5.4 5.4 5.4 r / 3.0 VIN = VIL or VIH, 2.56 2.4 2.46 Lin I = 12mA e OH D 4.5 V = V or V , 3.86 3.7 3.76 IN IL IH r i I = 24mA v OH e 5.5 VIN = VIL or VIH, 4.86 4.7 4.76 r w I = 24mA(1) i OH t h V Maximum LOW Level 3.0 I = 50µA 0.002 0.1 0.1 0.1 V OL OUT 3 Output Voltage - 4.5 0.001 0.1 0.1 0.1 S T 5.5 0.001 0.1 0.1 0.1 A T 3.0 V = V or V , 0.36 0.50 0.44 E IN IL IH I = 12mA O OL u 4.5 V = V or V , 0.36 0.50 0.44 t IN IL IH p I = 24mA u OL t s 5.5 V = V or V , 0.36 0.50 0.44 IN IL IH I = 24mA(1) OL I (2) Maximum Input 5.5 V = V , GND ±0.1 ±1.0 ±1.0 µA IN I CC Leakage Current I Maximum 3-STATE 5.5 V (OE) = V , V ; ±0.25 ±5.0 ±2.5 µA OZ I IL IH Leakage Current V = V , V ; I CC GND V = V , GND O CC I Minimum Dynamic 5.5 V = 1.65V Max. 50 75 mA OLD OLD I Output Current(3) 5.5 V = 3.85V Min. −50 −75 mA OHD OHD I (2) Maximum Quiescent 5.5 V = V or GND 4.0 80.0 40.0 µA CC IN CC Supply Current Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V . IN CC CC 3. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 4
7 4 DC Electrical Characteristics for ACT A C 2 TA = −55°C TA =−40°C 4 TA = +25°C to +125°C to +85°C 4, 7 Symbol Parameter V (V) Conditions Typ. Guaranteed Limits Units 4 CC A V Minimum HIGH Level 4.5 V = 0.1V or 1.5 2.0 2.0 2.0 V C IH OUT Input Voltage V − 0.1V T 5.5 CC 1.5 2.0 2.0 2.0 2 4 V Maximum LOW Level 4.5 V = 0.1V or 1.5 0.8 0.8 0.8 V 4 IL OUT Input Voltage V − 0.1V — 5.5 CC 1.5 0.8 0.8 0.8 V Minimum HIGH Level 4.5 I = −50µA 4.49 4.4 4.4 4.4 V O OH OUT c Output Voltage 5.5 5.49 5.4 5.4 5.4 ta l 4.5 V = V or V , 3.86 3.70 3.76 B IN IL IH u IOH = 24mA f f 5.5 VIN = VIL or VIH, 4.86 4.70 4.76 er / I = 24mA(4) L OH i n V Maximum LOW Level 4.5 I = 50µA 0.001 0.1 0.1 0.1 V e OL OUT Output Voltage D 5.5 0.001 0.1 0.1 0.1 r i 4.5 V = V or V , 0.36 0.50 0.44 v IN IL IH e IOL = 24mA r w 5.5 V = V or V , 0.36 0.50 0.44 i IN IL IH t h IOL = 24mA(4) 3 I Maximum Input 5.5 V = V , GND ±0.1 ±1.0 ±1.0 µA -S IN I CC Leakage Current T A I Maximum 3-STATE 5.5 V = V , V ; ±0.25 ±5.0 ±2.5 µA T OZ I IL IH E Leakage Current VO = VCC, GND O I Maximum I /Input 5.5 V = V − 2.1V 0.6 1.6 1.5 mA u CCT CC I CC t I Minimum Dynamic 5.5 V = 1.65V Max. 50 75 mA p OLD OLD u IOHD Output Current(5) 5.5 VOHD = 3.85V Min. −50 −75 mA ts I Maximum Quiescent 5.5 V = V or GND 4.0 80.0 40.0 µA CC IN CC Supply Current Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 5
7 4 AC Electrical Characteristics for AC A C 2 TA = −55°C TA = −40°C 4 TA = +25°C, to +125°C, to +85°C, 4, C = 50pF C = 50pF C = 50pF 7 L L L 4 A Symbol Parameter VCC (V)(6) Min. Typ. Max. Min. Max. Min. Max. Units C T tPLH Propagation Delay, 3.3 2.0 6.5 9.0 1.0 12.5 1.5 10.0 ns 2 Data to Output 4 5.0 1.5 5.0 7.0 1.0 9.5 1.0 7.5 4 — t Propagation Delay, 3.3 2.0 6.5 9.0 1.0 12.0 2.0 10.0 ns PHL Data to Output O 5.0 1.5 5.0 7.0 1.0 9.0 1.0 7.5 c t tPZH Output Enable Time 3.3 2.0 6.0 10.5 1.0 11.5 1.5 11.0 ns a l 5.0 1.5 5.0 7.0 1.0 9.0 1.5 8.0 B u t Output Enable Time 3.3 2.5 7.5 10.0 1.0 13.0 2.0 11.0 ns f PZL f e 5.0 1.5 5.5 8.0 1.0 10.5 1.5 8.5 r / L t Output Disable Time 3.3 3.0 7.0 10.0 1.0 12.5 1.5 10.5 ns i PHZ n e 5.0 2.5 6.5 9.0 1.0 10.5 1.0 9.5 D t Output Disable Time 3.3 2.5 7.5 10.5 1.0 13.0 2.5 11.5 ns r PLZ i v 5.0 2.0 6.5 9.0 1.0 11.0 2.0 9.5 e r w Note: i 6. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V. th 3 - S AC Electrical Characteristics for ACT T A T T = −55°C T = −40°C E A A T = +25°C, to +125°C, to +85°C, O A u CL = 50pF CL = 50pF CL = 50pF tp Symbol Parameter V (V)(7) Min. Typ. Max. Min. Max. Min. Max. Units u CC t s t Propagation Delay, 5.0 2.0 6.5 9.0 1.0 10.0 1.5 10.0 ns PLH Data to Output t Propagation Delay, 5.0 2.0 7.0 9.0 1.0 10.0 1.5 10.0 ns PHL Data to Output t Output Enable Time 5.0 1.5 6.0 8.5 1.0 9.5 1.0 9.5 ns PZH t Output Enable Time 5.0 2.0 7.0 9.5 1.0 11.0 1.5 10.5 ns PZL t Output Disable Time 5.0 2.0 7.0 9.5 1.0 11.0 1.5 10.5 ns PHZ t Output Disable Time 5.0 2.5 7.5 10.0 1.0 11.5 2.0 10.5 ns PLZ Note: 7. Voltage range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Parameter Conditions Typ Units C Input Capacitance V = OPEN 4.5 pF IN CC C Power Dissipation Capacitance V = 5.0V 45.0 pF PD CC ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 6
7 4 Physical Dimensions A C 2 4 13.00 4 12.60 , A 7 4 11.43 A C 20 11 T B 2 4 4 — 9.50 O 10.65 7.60 c t 10.00 7.40 a l B 2.25 u f f e r / L 1 10 0.65 in PINONE 0.51 1.27 1.27 e INDICATOR 0.35 D 0.25 M C B A r i LANDPATTERNRECOMMENDATION v e r w 2.65MAX SEEDETAILA i t h 3 0.33 - S C 0.20 T A 0.30 0.10 C T 0.75 0.10 SEATINGPLANE E 0.25X45° O NOTES:UNLESSOTHERWISESPECIFIED u t (R0.10) p A) THISPACKAGECONFORMSTOJEDEC u GAGEPLANE t (R0.10) MS-013,VARIATIONAC,ISSUEE s B) ALLDIMENSIONSAREINMILLIMETERS. 8° 0.25 0° C) DIMENSIONSDONOTINCLUDEMOLD FLASHORBURRS. 1.27 D) CONFORMSTOASMEY14.5M-1994 0.40 SEATINGPLANE E) LANDPATTERNSTANDARD:SOIC127P1030X265-20L (1.40) DETAILA F) DRAWINGFILENAME:MKT-M20BREV3 SCALE:2:1 Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 7
7 4 Physical Dimensions (Continued) A C 2 4 4 , 7 4 A C T 2 4 4 — O c t a l B u f f e r / L i n e D r i v e r w i t h 3 - S T A T E O u t p u t s Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 8
7 4 Physical Dimensions (Continued) A C 2 4 4 , 7 4 A C T 2 4 4 — O c t a l B u f f e r / L i n e D r i v e r w i t h 3 - S T A T E O u t p u t s Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 9
7 4 Physical Dimensions (Continued) A C 2 4 26.92 4 , 7 24.89 4 A C T 2 4 PIN#1 7.11 4 — 6.09 O c t a l B u f f e 3.43 r / L (0.97) 1.78 3.17 7.87 in 7°TYP 5.33 MAX e 1.14 D 7°TYP r i v e r w i t h 3 3.55 2.54 - S 0.36 3.17 7.62 T A 0.38 MIN 10.92 MAX T 0.56 E 0.20 O 0.35 u t .001[.025] C p u t NOTES: s Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 10
7 4 Physical Dimensions (Continued) A C 2 4 4 , 7 4 A C T 2 4 4 — O c t a l B u f f e r / L i n e D r i v e r w i t h 3 - S T A T E O u t p u t s Figure 5. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 11
7 4 A C 2 4 4 , 7 4 TRADEMARKS A Thefollowingincludesregisteredandunregisteredtrademarksandservicemarks,ownedbyFairchildSemiconductorand/oritsglobal C subsidiaries,andisnotintendedtobeanexhaustivelistofallsuchtrademarks. T 2 ACEx® FPS™ PDP-SPM™ SyncFET™ 44 BuilditNow™ FRFET® Power220® ® — CorePLUS™ GlobalPowerResourceSM Power247® ThePowerFranchise® CROSSVOLT™ GreenFPS™ POWEREDGE® O CTL™ GreenFPS™e-Series™ Power-SPM™ c CurrentTransferLogic™ GTO™ PowerTrench® TinyBoost™ ta EEZcoSSWPIATRCKH®™* iI-nLtoe™lliMAX™ PQrFoEgTra®mmableActiveDroop™ TTiinnyyBLougcikc™® l Bu ™ ISOPLANAR™ QS™ TINYOPTO™ f MegaBuck™ QTOptoelectronics™ TinyPower™ fe FFaaiirrcc®hhiilldd®Semiconductor® MMMIiiccCrrRooPFOEaCkTO™™UPLER™ QRSMaupiAeidtRCSToeSnrifeTigsAu™RreT™™ TTµSiinneyyrWPDWeirseM™™™ r/Line FACTQuietSeries™ MillerDrive™ SPM® UHC® D FACT® Motion-SPM™ STEALTH™ UltraFRFET™ r FAST® OPTOLOGIC® SuperFET™ UniFET™ iv FFalassthvCWorritee™r®* OPT®OPLANAR® SSuuppeerrSSOOTT™™--36 VCX™ er w SuperSOT™-8 i *EZSWITCH™andFlashWriter®aretrademarksofSystemGeneralCorporation,usedunderlicensebyFairchildSemiconductor. th 3 - S DISCLAIMER T FAIRCHILDSEMICONDUCTORRESERVESTHERIGHTTOMAKECHANGESWITHOUTFURTHERNOTICETOANYPRODUCTS A HEREINTOIMPROVERELIABILITY,FUNCTION,ORDESIGN.FAIRCHILDDOESNOTASSUMEANYLIABILITYARISINGOUTOFTHE T E APPLICATIONORUSEOFANYPRODUCTORCIRCUITDESCRIBEDHEREIN;NEITHERDOESITCONVEYANYLICENSEUNDERITS PATENTRIGHTS,NORTHERIGHTSOFOTHERS.THESESPECIFICATIONSDONOTEXPANDTHETERMSOFFAIRCHILD’S O WORLDWIDETERMSANDCONDITIONS,SPECIFICALLYTHEWARRANTYTHEREIN,WHICHCOVERSTHESEPRODUCTS. u t p u LIFESUPPORTPOLICY ts FAIRCHILD’SPRODUCTSARENOTAUTHORIZEDFORUSEASCRITICALCOMPONENTSINLIFESUPPORTDEVICESOR SYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION. Asusedherein: 1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support, which, (a) are intended for surgical implant intothebodyor device, or system whose failure to perform can be (b) support or sustain life, and (c) whose failure to perform reasonablyexpectedtocausethefailureofthelifesupport when properly used in accordance with instructions for use deviceorsystem,ortoaffectitssafetyoreffectiveness. provided in the labeling, can be reasonably expected to resultinasignificantinjuryoftheuser. PRODUCTSTATUSDEFINITIONS DefinitionofTerms DatasheetIdentification ProductStatus Definition Thisdatasheetcontainsthedesignspecificationsforproduct AdvanceInformation FormativeorInDesign development.Specificationsmaychangeinanymannerwithoutnotice. Thisdatasheetcontainspreliminarydata;supplementarydatawillbe Preliminary FirstProduction publishedatalaterdate.FairchildSemiconductorreservestherightto makechangesatanytimewithoutnoticetoimprovedesign. Thisdatasheetcontainsfinalspecifications.FairchildSemiconductor NoIdentificationNeeded FullProduction reservestherighttomakechangesatanytimewithoutnoticetoimprove thedesign. Thisdatasheetcontainsspecificationsonaproductthathasbeen Obsolete NotInProduction discontinuedbyFairchildSemiconductor.Thedatasheetisprintedfor referenceinformationonly. Rev.I32 ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC244, 74ACT244 Rev. 1.4.0 12
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