24AA32A/24LC32A 2 32K I C™ Serial EEPROM Device Selection Table Description: Part VCC Max. Clock Temp. The Microchip Technology Inc. 24AA32A/24LC32A Number Range Frequency Ranges (24XX32A*) is a 32 Kbit Electrically Erasable PROM. 24AA32A 1.7-5.5 400 kHz(1) I The device is organized as a single block of 4K x 8-bit memory with a 2-wire serial interface. Low-voltage 24LC32A 2.5-5.5 400 kHz I, E design permits operation down to 1.7V, with standby Note 1: 100 kHz for VCC <2.5V. and active currents of only 1 A and 1 mA, respectively. It has been developed for advanced, low- Features: power applications such as personal communications or data acquisition. The 24XX32A also has a page write • Single Supply with Operation down to 1.7V for capability for up to 32 bytes of data. Functional address 24AA32A Devices, 2.5V for 24LC32A Devices lines allow up to eight devices on the same bus, for up • Low-Power CMOS Technology: to 256 Kbits address space. The 24XX32A is available - Active current 1 mA, typical in the standard 8-pin PDIP, surface mount SOIC, SOIJ, TSSOP, DFN, TDFN and MSOP packages. The - Standby current 1 A, typical 24XX32A is also available in the 5-lead SOT-23 and • 2-Wire Serial Interface, I2C™ Compatible Chip Scale packages. • Schmitt Trigger Inputs for Noise Suppression • Output Slope Control to Eliminate Ground Bounce Block Diagram • 100 kHz and 400 kHz Clock Compatibility A0 A1A2 WP HV Generator • Page Write Time 5 ms max. • Self-Timed Erase/Write Cycle • 32-Byte Page Write Buffer I/O Memory EEPROM • Hardware Write-Protect Control Control XDEC Array Logic Logic • ESD Protection > 4,000V Page Latches • More than 1 Million Erase/Write Cycles • Data Retention > 200 Years I/O SCL • Factory Programming Available YDEC • Packages Include 8-lead PDIP, SOIC, SOIJ, SDA TSSOP, X-Rotated TSSOP, MSOP, DFN, TDFN, 5-lead SOT-23 and Chip Scale Vcc • Pb-Free and RoHS Compliant VSS Sense Amp. • Temperature Ranges: R/W Control - Industrial (I): -40°C to +85°C - Automotive (E): -40°C to +125°C Package Types PDIP/MSOP/SOIC/SOIJ/TSSOP SOT-23 DFN/TDFN CS (Chip Scale)(1) X-Rotated TSSOP A0 1 8 VCC (X/ST) SCL 1 5 WP A0 1 8 VCC A1 2 7 WP VCC 1 2 VSS AA12 23 76 WSCPL VWACPC0 123 876 SSVCDSSLA SVDSAS 23 4 VCC VAS2S 43 65 SSCDLA WSPCL 4 3 5 SDA VSS 4 5 SDA A1 4 5 A2 (Top Down View, Balls Not Visible) Note 1: Available in I-temp, “AA” only. *24XX32A is used in this document as a generic part number for the 24AA32A/24LC32A devices.  2002-2012 Microchip Technology Inc. DS21713M-page 1

24AA32A/24LC32A 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC.............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS.........................................................................................................-0.3V to VCC +1.0V Storage temperature...............................................................................................................................-65°C to +150°C Ambient temperature with power applied................................................................................................-40°C to +125°C ESD protection on all pins 4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C, VCC = +1.7V to +5.5V DC CHARACTERISTICS Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V Param. Symbol Characteristic Min. Typ. Max. Units Conditions No. D1 — A0, A1, A2, WP, SCL — — — — — and SDA pins D2 VIH High-level input voltage 0.7 VCC — — V — D3 VIL Low-level input voltage — — 0.3 VCC V VCC 2.5V 0.2 VCC V VCC < 2.5V D4 VHYS Hysteresis of Schmitt 0.05 VCC — — V VCC  2.5V (Note 1) Trigger inputs (SDA, SCL pins) D5 VOL Low-level output voltage — — 0.40 V IOL = 3.0 mA, VCC = 4.5V IOL = 2.1 mA, Vcc = 2.5V D6 ILI Input leakage current — — ±1 A VIN = VSS or VCC D7 ILO Output leakage current — — ±1 A VOUT = VSS or VCC D8 CIN, Pin capacitance — — 10 pF VCC = 5.0V (Note 1) COUT (all inputs/outputs) TA = 25°C, FCLK = 1 MHz D9 ICC write Operating current — 0.1 3 mA VCC = 5.5V, SCL = 400 kHz D10 ICC read — 0.05 400 A D11 ICCS Standby current — 0.01 1 A Industrial — — 5 A Automotive SDA = SCL = VCC = 5.5V A0, A1, A2, WP = VSS Note 1: This parameter is periodically sampled and not 100% tested. 2: Typical measurements taken at room temperature. DS21713M-page 2  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A TABLE 1-2: AC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C, VCC = +1.7V to +5.5V AC CHARACTERISTICS Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V Param. Symbol Characteristic Min. Max. Units Conditions No. 1 FCLK Clock Frequency — 400 kHz 2.5V  VCC  5.5V — 100 1.7V  VCC  2.5V (24AA32A) 2 THIGH Clock High Time 600 — ns 2.5V  VCC  5.5V 4000 — 1.7V  VCC  2.5V (24AA32A) 3 TLOW Clock Low Time 1300 — ns 2.5V  VCC  5.5V 4700 — 1.7V  VCC  2.5V (24AA32A) 4 TR SDA and SCL Rise Time — 300 ns 2.5V  VCC  5.5V (Note 1) — 1000 1.7V  VCC  2.5V (24AA32A) 5 TF SDA and SCL Fall Time — 300 ns (Note 1) 6 THD:STA Start Condition Hold Time 600 — ns 2.5V  VCC  5.5V 4000 — 1.7V  VCC  2.5V (24AA32A) 7 TSU:STA Start Condition Setup Time 600 — ns 2.5V  VCC  5.5V 4700 — 1.7V  VCC  2.5V (24AA32A) 8 THD:DAT Data Input Hold Time 0 — ns (Note 2) 9 TSU:DAT Data Input Setup Time 100 — ns 2.5V  VCC  5.5V 250 — 1.7V  VCC  2.5V (24AA32A) 10 TSU:STO Stop Condition Setup Time 600 — ns 2.5V  VCC  5.5V 4000 — 1.7V  VCC  2.5V (24AA32A) 11 TSU:WP WP Setup Time 600 — ns 2.5V VCC  5.5V 4000 — 1.7V VCC < 2.5V (24AA32A) 12 THD:WP WP Hold Time 1300 — ns 2.5V VCC  5.5V 4700 — 1.7V VCC < 2.5V (24AA32A) 13 TAA Output Valid from Clock — 900 ns 2.5V  VCC  5.5V (Note 2) — 3500 1.7V  VCC  2.5V (24AA32A) 14 TBUF Bus free time: Time the bus 1300 — ns 2.5V  VCC  5.5V must be free before a new 4700 — 1.7V  VCC  2.5V (24AA32A) transmission can start 15 TOF Output Fall Time from VIH 20+0.1CB 250 ns 2.5V  VCC  5.5V Minimum to VIL Maximum — 250 1.7V  VCC  2.5V (24AA32A) 16 TSP Input Filter Spike Suppression — 50 ns (Notes 1 and 3) (SDA and SCL pins) 17 TWC Write Cycle Time (byte or — 5 ms — page) 18 — Endurance 1M — cycles Page mode, 25°C, VCC  5.5V (Note 4) Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained on Microchip’s web site at www.microchip.com.  2002-2012 Microchip Technology Inc. DS21713M-page 3

24AA32A/24LC32A FIGURE 1-1: BUS TIMING DATA 5 4 2 D4 SCL 7 3 8 9 10 SDA 6 IN 16 13 14 SDA OUT (protected) WP 11 12 (unprotected) FIGURE 1-2: BUS TIMING START/STOP D4 SCL 6 7 10 SDA Start Stop DS21713M-page 4  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Rotated Name PDIP SOIC SOIJ TSSOP DFN(1) TDFN(1) MSOP SOT-23 CS Description TSSOP A0 1 1 1 1 3 1 1 1 — — Chip Address Input A1 2 2 2 2 4 2 2 2 — — Chip Address Input A2 3 3 3 3 5 3 3 3 — — Chip Address Input VSS 4 4 4 4 6 4 4 4 2 2 Ground SDA 5 5 5 5 7 5 5 5 3 5 Serial Address/Data I/O SCL 6 6 6 6 8 6 6 6 1 4 Serial Clock WP 7 7 7 7 1 7 7 7 5 3 Write-Protect Input VCC 8 8 8 8 2 8 8 8 4 1 +1.7V to 5.5V Power Supply Note1: The exposed pad on the DFN/TDFN packages can be connected to VSS or left floating. 2.1 A0, A1, A2 Chip Address Inputs 2.3 Serial Clock (SCL) The A0, A1 and A2 inputs are used by the 24XX32A for The SCL input is used to synchronize the data transfer multiple device operation. The levels on these inputs to and from the device. are compared with the corresponding bits in the slave address. The chip is selected if the comparison is true. 2.4 Write-Protect (WP) Up to eight devices may be connected to the same bus This pin must be connected to either VSS or VCC. If tied by using different Chip Select bit combinations. These to VSS, write operations are enabled. If tied to VCC, inputs must be connected to either VCC or VSS. write operations are inhibited but read operations are In most applications, the chip address inputs A0, A1 not affected. and A2 are hard-wired to logic ‘0’ or logic ‘1’. For applications in which these pins are controlled by a microcontroller or other programmable device, the chip address pins must be driven to logic ‘0’ or logic ‘1’ before normal device operation can proceed. Address pins are not available in the SOT-23 and chip scale packages. 2.2 Serial Data (SDA) SDA is a bidirectional pin used to transfer addresses and data into and out of the device. It is an open-drain terminal, therefore, the SDA bus requires a pull-up resistor to VCC (typical 10 k for 100 kHz, 2 kfor 400 kHz) For normal data transfer, SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating Start and Stop conditions.  2002-2012 Microchip Technology Inc. DS21713M-page 5

24AA32A/24LC32A 3.0 FUNCTIONAL DESCRIPTION 4.4 Data Valid (D) The 24XX32A supports a bidirectional, 2-wire bus and The state of the data line represents valid data when, data transmission protocol. A device that sends data after a Start condition, the data line is stable for the onto the bus is defined as transmitter, while a device duration of the high period of the clock signal. receiving data is defined as a receiver. The bus has to The data on the line must be changed during the low be controlled by a master device which generates the period of the clock signal. There is one clock pulse per Serial Clock (SCL), controls the bus access and gener- bit of data. ates the Start and Stop conditions, while the 24XX32A Each data transfer is initiated with a Start condition and works as slave. Both master and slave can operate as terminated with a Stop condition. The number of data transmitter or receiver, but the master device bytes transferred between Start and Stop conditions is determines which mode is activated. determined by the master device and is, theoretically, unlimited (although only the last thirty-two bytes will be 4.0 BUS CHARACTERISTICS stored when doing a write operation). When an over- write does occur, it will replace data in a first-in first-out The following bus protocol has been defined: (FIFO) fashion. • Data transfer may be initiated only when the bus is not busy. 4.5 Acknowledge • During data transfer, the data line must remain stable whenever the clock line is high. Changes in Each receiving device, when addressed, is obliged to the data line while the clock line is high will be generate an Acknowledge after the reception of each interpreted as a Start or Stop condition. byte. The master device must generate an extra clock pulse which is associated with this Acknowledge bit. Accordingly, the following bus conditions have been defined (Figure 4-1). Note: The 24XX32A does not generate any Acknowledge bits if an internal 4.1 Bus Not Busy (A) programming cycle is in progress. The device that acknowledges, has to pull down the Both data and clock lines remain high. SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high 4.2 Start Data Transfer (B) period of the Acknowledge related clock pulse. Of A high-to-low transition of the SDA line while the clock course, setup and hold times must be taken into (SCL) is high determines a Start condition. All account. During reads, a master must signal an end of commands must be preceded by a Start condition. data to the slave by not generating an Acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (24XX32A) will leave the data 4.3 Stop Data Transfer (C) line high to enable the master to generate the Stop A low-to-high transition of the SDA line while the clock condition. (SCL) is high determines a Stop condition. All operations must be ended with a Stop condition. FIGURE 4-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS (A) (B) (D) (D) (C) (A) SCL SDA Start Address or Data Stop Condition Acknowledge Allowed Condition Valid to Change DS21713M-page 6  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A 5.0 DEVICE ADDRESSING an Acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24XX32A will select a read A control byte is the first byte received following the or write operation. Start condition from the master device (Figure 5-1). The control byte consists of a four-bit control code. For FIGURE 5-1: CONTROL BYTE FORMAT the 24XX32A, this is set as ‘1010’ binary for read and write operations. The next three bits of the control byte Read/Write Bit are the Chip Select bits (A2, A1, A0). The Chip Select bits allow the use of up to eight 24XX32A devices on Chip Select the same bus and are used to select which device is Control Code Bits accessed. The Chip Select bits in the control byte must correspond to the logic levels on the corresponding A2, S 1 0 1 0 A2 A1 A0 R/W ACK A1 and A0 pins for the device to respond. These bits are in effect the three Most Significant bits of the word Slave Address address. For the SOT-23 and chip scale packages, the address Start Bit Acknowledge Bit pins are not available. During device addressing, the A1, A2, and A0 Chip Selects bits (Figure 5-2) should be set to ‘0’. 5.1 Contiguous Addressing Across The last bit of the control byte defines the operation to Multiple Devices be performed. When set to a ‘1’, a read operation is The Chip Select bits A2, A1 and A0 can be used to selected. When set to a zero, a write operation is expand the contiguous address space for up to 256K selected. The next two bytes received define the bits by adding up to eight 24XX32A devices on the address of the first data byte (Figure 5-2). Because same bus. In this case, software can use A0 of the con- only A11 to A0 are used, the upper four address bits are trol byte as address bit A12; A1 as address bit A13; and “don’t care” bits. The upper address bits are transferred A2 as address bit A14. It is not possible to sequentially first, followed by the Less Significant bits. read across device boundaries. Following the Start condition, the 24XX32A monitors The SOT-23 and chip scale packages do not support the SDA bus checking the device type identifier being multiple device addressing on the same bus. transmitted and, upon receiving a ‘1010’ code and appropriate device select bits, the slave device outputs FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS Control Byte Address High Byte Address Low Byte A A A A A A A A A 1 0 1 0 2 1 0 R/W x x x x 11 10 9 8 7 • • • • • • 0 Control Chip Code Select x = “don’t care” bit Bits  2002-2012 Microchip Technology Inc. DS21713M-page 7

24AA32A/24LC32A 6.0 WRITE OPERATIONS 6.2 Page Write The write control byte, word address and the first data 6.1 Byte Write byte are transmitted to the 24XX32A in the same way as in a byte write. However, instead of generating a Following the Start condition from the master, the Stop condition, the master transmits up to 31 additional control code (4 bits), the Chip Select (3 bits), and the bytes which are temporarily stored in the on-chip page R/W bit (which is a logic low) are clocked onto the bus buffer and will be written into memory once the master by the master transmitter. This indicates to the has transmitted a Stop condition. Upon receipt of each addressed slave receiver that the address high byte word, the five lower Address Pointer bits are internally will follow once it has generated an Acknowledge bit incremented by ‘1’. If the master should transmit more during the ninth clock cycle. Therefore, the next byte than 32 bytes prior to generating the Stop condition, the transmitted by the master is the high-order byte of the address counter will roll over and the previously word address and will be written into the Address received data will be overwritten. As with the byte write Pointer of the 24XX32A. The next byte is the Least operation, once the Stop condition is received, an Significant Address Byte. After receiving another internal write cycle will begin (Figure 6-2). If an attempt Acknowledge signal from the 24XX32A, the master is made to write to the array with the WP pin held high, device will transmit the data word to be written into the the device will acknowledge the command, but no write addressed memory location. The 24XX32A acknowl- cycle will occur, no data will be written, and the device edges again and the master generates a Stop will immediately accept a new command. condition. This initiates the internal write cycle and, during this time, the 24XX32A will not generate Note: Page write operations are limited to writing Acknowledge signals (Figure 6-1). If an attempt is bytes within a single physical page, made to write to the array with the WP pin held high, regardless of the number of bytes the device will acknowledge the command, but no actually being written. Physical page write cycle will occur. No data will be written and the boundaries start at addresses that are device will immediately accept a new command. After integer multiples of the page buffer size (or a byte Write command, the internal address counter ‘page size’) and end at addresses that are will point to the address location following the one that integer multiples of [page size – 1]. If a was just written. Page Write command attempts to write across a physical page boundary, the result is that the data wraps around to the Note: When doing a write of less than 32 bytes beginning of the current page (overwriting the data in the rest of the page is refreshed data previously stored there), instead of along with the data bytes being written. being written to the next page as might be This will force the entire page to endure a expected. It is therefore necessary for the write cycle, for this reason endurance is application software to prevent page write specified per page. operations that would attempt to cross a page boundary. 6.3 Write Protection The WP pin allows the user to write-protect the entire array (000-FFF) when the pin is tied to VCC. If tied to VSS the write protection is disabled. The WP pin is sampled at the Stop bit for every Write command (Figure 4-1). Toggling the WP pin after the Stop bit will have no effect on the execution of the write cycle. DS21713M-page 8  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A FIGURE 6-1: BYTE WRITE S Bus Activity T S Master A Control Address Address T R Byte High Byte Low Byte Data O T P SDA Line S1010A2A1A0 0 xxx x P A A A A Bus Activity C C C C K K K K x = “don’t care” bit FIGURE 6-2: PAGE WRITE S T S Bus Activity A Control Address Address T Master R Byte High Byte Low Byte Data Byte 0 Data Byte 31 O T P SDA Line S1010A2A1A00 xxxx P A A A A A Bus Activity C C C C C K K K K K x = “don’t care” bit  2002-2012 Microchip Technology Inc. DS21713M-page 9

24AA32A/24LC32A 7.0 ACKNOWLEDGE POLLING FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device Send initiates the internally-timed write cycle. ACK polling Write Command can then be initiated immediately. This involves the master sending a Start condition followed by the control byte for a Write command (R/W = 0). If the device is still Send Stop Condition to busy with the write cycle, then no ACK will be returned. Initiate Write Cycle If no ACK is returned, the Start bit and control byte must be re-sent. If the cycle is complete, the device will return the ACK and the master can then proceed with the next Read or Write command. See Figure 7-1 for Send Start flow diagram of this operation. Send Control Byte with R/W = 0 Did Device No Acknowledge (ACK = 0)? Yes Next Operation DS21713M-page 10  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A 8.0 READ OPERATION 8.3 Sequential Read Read operations are initiated in the same way as write Sequential reads are initiated in the same way as a operations, with the exception that the R/W bit of the random read, except that once the 24XX32A transmits control byte is set to ‘1’. There are three basic types of the first data byte, the master issues an acknowledge read operations: current address read, random read as opposed to the Stop condition used in a random and sequential read. read. This acknowledge directs the 24XX32A to transmit the next sequentially addressed 8-bit word 8.1 Current Address Read (Figure 8-3). Following the final byte transmitted to the master, the master will NOT generate an acknowledge, The 24XX32A contains an address counter that main- but will generate a Stop condition. To provide sequen- tains the address of the last word accessed, internally tial reads, the 24XX32A contains an internal Address incremented by ‘1’. Therefore, if the previous read Pointer which is incremented by ‘1’ upon completion of access was to address ‘n’ (n is any legal address), the each operation. This Address Pointer allows the entire next current address read operation would access data memory contents to be serially read during one from address n + 1. operation. The internal Address Pointer will automati- Upon receipt of the control byte with R/W bit set to ‘1’, cally roll over from address FFF to address 000 if the the 24XX32A issues an acknowledge and transmits the master acknowledges the byte received from the array 8-bit data word. The master will not acknowledge the address FFF. transfer, but does generate a Stop condition and the 24XX32A discontinues transmission (Figure 8-1). 8.2 Random Read Random read operations allow the master to access any memory location in a random manner. To perform this type of read operation, the word address must first be set. This is accomplished by sending the word address to the 24XX32A as part of a write operation (R/W bit set to ‘0’). Once the word address is sent, the master generates a Start condition following the acknowledge. This terminates the write operation, but not before the internal Address Pointer is set. The master issues the control byte again, but with the R/W bit set to a ‘1’. The 24XX32A will then issue an acknowledge and transmit the 8-bit data word. The master will not acknowledge the transfer, but does generate a Stop condition which causes the 24XX32A to discontinue transmission (Figure 8-2). After a random Read command, the internal address counter will point to the address location following the one that was just read. FIGURE 8-1: CURRENT ADDRESS READ S Bus Activity T Control S Master A Byte Data (n) T R O T P SDA Line S P A N Bus Activity C O K A C K  2002-2012 Microchip Technology Inc. DS21713M-page 11

24AA32A/24LC32A FIGURE 8-2: RANDOM READ S S Bus Activity T T S Master A Control Address Address A Control Data T R Byte High Byte Low Byte R Byte Byte O T T P SDA Line S1010AAA0 xxx x S1010AAA1 P 2 1 0 21 0 A A A A N Bus Activity C C C C O K K K K A x = “don’t care” bit C K FIGURE 8-3: SEQUENTIAL READ S Bus Activity Control T Master Byte Data n Data n + 1 Data n + 2 Data n + x O P SDA Line P A A A A N C C C C O Bus Activity K K K K A C K DS21713M-page 12  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP (300 mil) Example: XXXXXXXX 24LC32A T/XXXNNN I/P e 3 13F YYWW 0527 8-Lead SOIC (3.90 mm) Example: XXXXXXXT 24LC32AI XXXXYYWW SN e 3 0527 NNN 13F 8-Lead SOIC (5.28 mm) Example: XXXXXXXX 24LC32A T/XXXXXX I/SMe3 YYWWNNN 052713F 8-Lead TSSOP Example: XXXX 4LA TYWW I527 NNN 13F 8-Lead 2x3 DFN Example: XXX 264 YWW 527 NN 13 8-Lead MSOP Example: XXXXXT 4L32AI YWWNNN 52713F  2002-2012 Microchip Technology Inc. DS21713M-page 13

24AA32A/24LC32A 8-Lead 2x3 TDFN Example: XXX A64 YWW 527 NN I3 5-Lead SOT-23 Example: XXNN M6NN 5-Lead Chip Scale Example: 67 XW 1st Line Marking Codes Part Number TSSOP TSSOP MSOP DFN TDFN SOT-23 X-Rotated I Temp. E Temp. I Temp. E Temp. I Temp. E Temp. 24AA32A 4AA 4AAX 4A32AT 261 — A61 — B6NN — 24LC32A 4LA 4LAX 4L32AT 264 265 A64 A65 M6NN N6NN Note: T = Temperature grade (I, E). DS21713M-page 14  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A Legend: XX...X Part number or part number code T Temperature (I, E) Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) e3 Pb-free JEDEC designator for Matte Tin (Sn) Note: For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Note: Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion. *Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.  2002-2012 Microchip Technology Inc. DS21713M-page 15

24AA32A/24LC32A (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:8)(cid:17)(cid:18)(cid:3)(cid:4)(cid:13)(cid:18)(cid:5)(cid:8)(cid:19)(cid:9)(cid:20)(cid:8)(cid:21)(cid:8)(cid:22)(cid:23)(cid:23)(cid:8)(cid:24)(cid:13)(cid:10)(cid:8)(cid:25)(cid:26)(cid:7)(cid:27)(cid:8)(cid:28)(cid:9)(cid:15)(cid:17)(cid:9)(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) N NOTE1 E1 1 2 3 D E A A2 L A1 c e eB b1 b 6(cid:15)(cid:7)&! (cid:19)7,8.(cid:22) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:2)9(cid:7)’(cid:7)&! (cid:6)(cid:19)7 7:(cid:6) (cid:6)(cid:25); 7"’)(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)(cid:31)(cid:7)(cid:15)! 7 < (cid:31)(cid:7)&(cid:8)(cid:11) (cid:14) (cid:20)(cid:30)(cid:4)(cid:4)(cid:2)1(cid:22), (cid:13)(cid:10)(cid:12)(cid:2)&(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)&(cid:7)(cid:15)(cid:17)(cid:2)(cid:31)(cid:16)(cid:28)(cid:15)(cid:14) (cid:25) = = (cid:20)(cid:3)(cid:30)(cid:4) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:25)(cid:3) (cid:20)(cid:30)(cid:30)(cid:29) (cid:20)(cid:30)-(cid:4) (cid:20)(cid:30)(cid:24)(cid:29) 1(cid:28)!(cid:14)(cid:2)&(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)&(cid:7)(cid:15)(cid:17)(cid:2)(cid:31)(cid:16)(cid:28)(cid:15)(cid:14) (cid:25)(cid:30) (cid:20)(cid:4)(cid:30)(cid:29) = = (cid:22)(cid:11)(cid:10)"(cid:16)#(cid:14)(cid:9)(cid:2)&(cid:10)(cid:2)(cid:22)(cid:11)(cid:10)"(cid:16)#(cid:14)(cid:9)(cid:2)>(cid:7)#&(cid:11) . (cid:20)(cid:3)(cid:24)(cid:4) (cid:20)-(cid:30)(cid:4) (cid:20)-(cid:3)(cid:29) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)>(cid:7)#&(cid:11) .(cid:30) (cid:20)(cid:3)(cid:23)(cid:4) (cid:20)(cid:3)(cid:29)(cid:4) (cid:20)(cid:3)<(cid:4) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) (cid:21) (cid:20)-(cid:23)< (cid:20)-?(cid:29) (cid:20)(cid:23)(cid:4)(cid:4) (cid:13)(cid:7)(cid:12)(cid:2)&(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)&(cid:7)(cid:15)(cid:17)(cid:2)(cid:31)(cid:16)(cid:28)(cid:15)(cid:14) 9 (cid:20)(cid:30)(cid:30)(cid:29) (cid:20)(cid:30)-(cid:4) (cid:20)(cid:30)(cid:29)(cid:4) 9(cid:14)(cid:28)#(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:8) (cid:20)(cid:4)(cid:4)< (cid:20)(cid:4)(cid:30)(cid:4) (cid:20)(cid:4)(cid:30)(cid:29) 6(cid:12)(cid:12)(cid:14)(cid:9)(cid:2)9(cid:14)(cid:28)#(cid:2)>(cid:7)#&(cid:11) )(cid:30) (cid:20)(cid:4)(cid:23)(cid:4) (cid:20)(cid:4)?(cid:4) (cid:20)(cid:4)(cid:5)(cid:4) 9(cid:10)*(cid:14)(cid:9)(cid:2)9(cid:14)(cid:28)#(cid:2)>(cid:7)#&(cid:11) ) (cid:20)(cid:4)(cid:30)(cid:23) (cid:20)(cid:4)(cid:30)< (cid:20)(cid:4)(cid:3)(cid:3) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)(cid:26)(cid:10)*(cid:2)(cid:22)(cid:12)(cid:28)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:2)+ (cid:14)1 = = (cid:20)(cid:23)-(cid:4) (cid:30)(cid:26)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:31)(cid:7)(cid:15)(cid:2)(cid:30)(cid:2) (cid:7)!"(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)#(cid:14)$(cid:2)%(cid:14)(cid:28)&"(cid:9)(cid:14)(cid:2)’(cid:28)(cid:18)(cid:2) (cid:28)(cid:9)(cid:18)((cid:2))"&(cid:2)’"!&(cid:2))(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)*(cid:7)&(cid:11)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)&(cid:8)(cid:11)(cid:14)#(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) +(cid:2)(cid:22)(cid:7)(cid:17)(cid:15)(cid:7)%(cid:7)(cid:8)(cid:28)(cid:15)&(cid:2),(cid:11)(cid:28)(cid:9)(cid:28)(cid:8)&(cid:14)(cid:9)(cid:7)!&(cid:7)(cid:8)(cid:20) -(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)!(cid:2)(cid:21)(cid:2)(cid:28)(cid:15)#(cid:2).(cid:30)(cid:2)#(cid:10)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)"#(cid:14)(cid:2)’(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:20)(cid:2)(cid:6)(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:2)!(cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:14)$(cid:8)(cid:14)(cid:14)#(cid:2)(cid:20)(cid:4)(cid:30)(cid:4)/(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)!(cid:7)#(cid:14)(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)#(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6).(cid:2)0(cid:30)(cid:23)(cid:20)(cid:29)(cid:6)(cid:20) 1(cid:22),2(cid:2)1(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)&(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)$(cid:28)(cid:8)&(cid:2) (cid:28)(cid:16)"(cid:14)(cid:2)!(cid:11)(cid:10)*(cid:15)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17),(cid:4)(cid:23)(cid:27)(cid:4)(cid:30)<1 DS21713M-page 16  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2002-2012 Microchip Technology Inc. DS21713M-page 17

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 18  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8) (cid:24)(cid:6)(cid:10)(cid:10)(cid:8)!(cid:16)(cid:12)(cid:10)(cid:13)(cid:18)(cid:5)(cid:8)(cid:19) (cid:30)(cid:20)(cid:8)(cid:21)(cid:8)(cid:30)(cid:6)""(cid:26)#$(cid:8)(cid:22)%&(cid:23)(cid:8)(cid:24)(cid:24)(cid:8)(cid:25)(cid:26)(cid:7)(cid:27)(cid:8)(cid:28) !(cid:17)’(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)  2002-2012 Microchip Technology Inc. DS21713M-page 19

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 20  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2002-2012 Microchip Technology Inc. DS21713M-page 21

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 22  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)()(cid:13)(cid:18)(cid:8) )"(cid:13)(cid:18)*(cid:8) (cid:24)(cid:6)(cid:10)(cid:10)(cid:8)!(cid:16)(cid:12)(cid:10)(cid:13)(cid:18)(cid:5)(cid:8)(cid:19) ((cid:20)(cid:8)(cid:21)(cid:8)+%+(cid:8)(cid:24)(cid:24)(cid:8)(cid:25)(cid:26)(cid:7)(cid:27)(cid:8)(cid:28)( !(cid:9)(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D N E E1 NOTE1 1 2 b e c φ A A2 A1 L1 L 6(cid:15)(cid:7)&! (cid:6)(cid:19)99(cid:19)(cid:6).(cid:13).(cid:26)(cid:22) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:2)9(cid:7)’(cid:7)&! (cid:6)(cid:19)7 7:(cid:6) (cid:6)(cid:25); 7"’)(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)(cid:31)(cid:7)(cid:15)! 7 < (cid:31)(cid:7)&(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)?(cid:29)(cid:2)1(cid:22), : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)8(cid:14)(cid:7)(cid:17)(cid:11)& (cid:25) = = (cid:30)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:25)(cid:3) (cid:4)(cid:20)<(cid:4) (cid:30)(cid:20)(cid:4)(cid:4) (cid:30)(cid:20)(cid:4)(cid:29) (cid:22)&(cid:28)(cid:15)#(cid:10)%%(cid:2) (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:29) = (cid:4)(cid:20)(cid:30)(cid:29) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)>(cid:7)#&(cid:11) . ?(cid:20)(cid:23)(cid:4)(cid:2)1(cid:22), (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)>(cid:7)#&(cid:11) .(cid:30) (cid:23)(cid:20)-(cid:4) (cid:23)(cid:20)(cid:23)(cid:4) (cid:23)(cid:20)(cid:29)(cid:4) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) (cid:21) (cid:3)(cid:20)(cid:24)(cid:4) -(cid:20)(cid:4)(cid:4) -(cid:20)(cid:30)(cid:4) 3(cid:10)(cid:10)&(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) 9 (cid:4)(cid:20)(cid:23)(cid:29) (cid:4)(cid:20)?(cid:4) (cid:4)(cid:20)(cid:5)(cid:29) 3(cid:10)(cid:10)&(cid:12)(cid:9)(cid:7)(cid:15)& 9(cid:30) (cid:30)(cid:20)(cid:4)(cid:4)(cid:2)(cid:26).3 3(cid:10)(cid:10)&(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)R = <R 9(cid:14)(cid:28)#(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:8) (cid:4)(cid:20)(cid:4)(cid:24) = (cid:4)(cid:20)(cid:3)(cid:4) 9(cid:14)(cid:28)#(cid:2)>(cid:7)#&(cid:11) ) (cid:4)(cid:20)(cid:30)(cid:24) = (cid:4)(cid:20)-(cid:4) (cid:30)(cid:26)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:31)(cid:7)(cid:15)(cid:2)(cid:30)(cid:2) (cid:7)!"(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)#(cid:14)$(cid:2)%(cid:14)(cid:28)&"(cid:9)(cid:14)(cid:2)’(cid:28)(cid:18)(cid:2) (cid:28)(cid:9)(cid:18)((cid:2))"&(cid:2)’"!&(cid:2))(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)*(cid:7)&(cid:11)(cid:7)(cid:15)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)&(cid:8)(cid:11)(cid:14)#(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)!(cid:2)(cid:21)(cid:2)(cid:28)(cid:15)#(cid:2).(cid:30)(cid:2)#(cid:10)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)"#(cid:14)(cid:2)’(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:20)(cid:2)(cid:6)(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:2)!(cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:14)$(cid:8)(cid:14)(cid:14)#(cid:2)(cid:4)(cid:20)(cid:30)(cid:29)(cid:2)’’(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)!(cid:7)#(cid:14)(cid:20) -(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)#(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6).(cid:2)0(cid:30)(cid:23)(cid:20)(cid:29)(cid:6)(cid:20) 1(cid:22),2 1(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)&(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)$(cid:28)(cid:8)&(cid:2) (cid:28)(cid:16)"(cid:14)(cid:2)!(cid:11)(cid:10)*(cid:15)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:26).32 (cid:26)(cid:14)%(cid:14)(cid:9)(cid:14)(cid:15)(cid:8)(cid:14)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)((cid:2)"!"(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)((cid:2)%(cid:10)(cid:9)(cid:2)(cid:7)(cid:15)%(cid:10)(cid:9)’(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:12)"(cid:9)(cid:12)(cid:10)!(cid:14)!(cid:2)(cid:10)(cid:15)(cid:16)(cid:18)(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17),(cid:4)(cid:23)(cid:27)(cid:4)<?1  2002-2012 Microchip Technology Inc. DS21713M-page 23

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 24  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:8),(cid:10)(cid:6)(cid:12)$(cid:8)(cid:30)(cid:26)(cid:8)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:6)(cid:14)*(cid:6)-(cid:5)(cid:8)(cid:19).’(cid:20)(cid:8)(cid:21)(cid:8)/0(cid:22)0(cid:23)%&(cid:8)(cid:24)(cid:24)(cid:8)(cid:25)(cid:26)(cid:7)(cid:27)(cid:8)(cid:28)(cid:15),(cid:30)(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D e b N N L K E E2 EXPOSEDPAD NOTE1 NOTE1 1 2 2 1 D2 TOPVIEW BOTTOMVIEW A NOTE2 A3 A1 6(cid:15)(cid:7)&! (cid:6)(cid:19)99(cid:19)(cid:6).(cid:13).(cid:26)(cid:22) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:2)9(cid:7)’(cid:7)&! (cid:6)(cid:19)7 7:(cid:6) (cid:6)(cid:25); 7"’)(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)(cid:31)(cid:7)(cid:15)! 7 < (cid:31)(cid:7)&(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)(cid:29)(cid:4)(cid:2)1(cid:22), : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)8(cid:14)(cid:7)(cid:17)(cid:11)& (cid:25) (cid:4)(cid:20)<(cid:4) (cid:4)(cid:20)(cid:24)(cid:4) (cid:30)(cid:20)(cid:4)(cid:4) (cid:22)&(cid:28)(cid:15)#(cid:10)%%(cid:2) (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) (cid:4)(cid:20)(cid:4)(cid:3) (cid:4)(cid:20)(cid:4)(cid:29) ,(cid:10)(cid:15)&(cid:28)(cid:8)&(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:25)- (cid:4)(cid:20)(cid:3)(cid:4)(cid:2)(cid:26).3 : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) (cid:21) (cid:3)(cid:20)(cid:4)(cid:4)(cid:2)1(cid:22), : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)>(cid:7)#&(cid:11) . -(cid:20)(cid:4)(cid:4)(cid:2)1(cid:22), .$(cid:12)(cid:10)!(cid:14)#(cid:2)(cid:31)(cid:28)#(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) (cid:21)(cid:3) (cid:30)(cid:20)-(cid:4) = (cid:30)(cid:20)(cid:29)(cid:29) .$(cid:12)(cid:10)!(cid:14)#(cid:2)(cid:31)(cid:28)#(cid:2)>(cid:7)#&(cid:11) .(cid:3) (cid:30)(cid:20)(cid:29)(cid:4) = (cid:30)(cid:20)(cid:5)(cid:29) ,(cid:10)(cid:15)&(cid:28)(cid:8)&(cid:2)>(cid:7)#&(cid:11) ) (cid:4)(cid:20)(cid:3)(cid:4) (cid:4)(cid:20)(cid:3)(cid:29) (cid:4)(cid:20)-(cid:4) ,(cid:10)(cid:15)&(cid:28)(cid:8)&(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) 9 (cid:4)(cid:20)-(cid:4) (cid:4)(cid:20)(cid:23)(cid:4) (cid:4)(cid:20)(cid:29)(cid:4) ,(cid:10)(cid:15)&(cid:28)(cid:8)&(cid:27)&(cid:10)(cid:27).$(cid:12)(cid:10)!(cid:14)#(cid:2)(cid:31)(cid:28)# U (cid:4)(cid:20)(cid:3)(cid:4) = = (cid:30)(cid:26)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:31)(cid:7)(cid:15)(cid:2)(cid:30)(cid:2) (cid:7)!"(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)#(cid:14)$(cid:2)%(cid:14)(cid:28)&"(cid:9)(cid:14)(cid:2)’(cid:28)(cid:18)(cid:2) (cid:28)(cid:9)(cid:18)((cid:2))"&(cid:2)’"!&(cid:2))(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)*(cid:7)&(cid:11)(cid:7)(cid:15)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)&(cid:8)(cid:11)(cid:14)#(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) (cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)’(cid:28)(cid:18)(cid:2)(cid:11)(cid:28) (cid:14)(cid:2)(cid:10)(cid:15)(cid:14)(cid:2)(cid:10)(cid:9)(cid:2)’(cid:10)(cid:9)(cid:14)(cid:2)(cid:14)$(cid:12)(cid:10)!(cid:14)#(cid:2)&(cid:7)(cid:14)(cid:2))(cid:28)(cid:9)!(cid:2)(cid:28)&(cid:2)(cid:14)(cid:15)#!(cid:20) -(cid:20) (cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)(cid:7)!(cid:2)!(cid:28)*(cid:2)!(cid:7)(cid:15)(cid:17)"(cid:16)(cid:28)&(cid:14)#(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)#(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6).(cid:2)0(cid:30)(cid:23)(cid:20)(cid:29)(cid:6)(cid:20) 1(cid:22),2 1(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)&(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)$(cid:28)(cid:8)&(cid:2) (cid:28)(cid:16)"(cid:14)(cid:2)!(cid:11)(cid:10)*(cid:15)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:26).32 (cid:26)(cid:14)%(cid:14)(cid:9)(cid:14)(cid:15)(cid:8)(cid:14)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)((cid:2)"!"(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)((cid:2)%(cid:10)(cid:9)(cid:2)(cid:7)(cid:15)%(cid:10)(cid:9)’(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:12)"(cid:9)(cid:12)(cid:10)!(cid:14)!(cid:2)(cid:10)(cid:15)(cid:16)(cid:18)(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17),(cid:4)(cid:23)(cid:27)(cid:30)(cid:3)-,  2002-2012 Microchip Technology Inc. DS21713M-page 25

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 26  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2002-2012 Microchip Technology Inc. DS21713M-page 27

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 28  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)(cid:15)(cid:16)(cid:6)(cid:10)(cid:8),(cid:10)(cid:6)(cid:12)$(cid:8)(cid:30)(cid:26)(cid:8)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:6)(cid:14)*(cid:6)-(cid:5)(cid:8)(cid:19).(cid:30)(cid:20)(cid:8)(cid:21)(cid:8)/0(cid:22)0(cid:23)%12(cid:8)(cid:24)(cid:24)(cid:8)(cid:25)(cid:26)(cid:7)(cid:27)(cid:8)(cid:28)((cid:15),(cid:30)(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)  2002-2012 Microchip Technology Inc. DS21713M-page 29

24AA32A/24LC32A Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 30  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A Note: For the mostcurrent package drawings,please seetheMicrochip Packaging Specification located at http://www.microchip.com/packaging  2002-2012 Microchip Technology Inc. DS21713M-page 31

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 32  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A 2(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8) (cid:24)(cid:6)(cid:10)(cid:10)(cid:8)!(cid:16)(cid:12)(cid:10)(cid:13)(cid:18)(cid:5)(cid:8)("(cid:6)(cid:18)(cid:11)(cid:13)(cid:11)(cid:12)(cid:26)"(cid:8)(cid:19)!((cid:20)(cid:8)(cid:28) !((cid:3)/(cid:22)(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) b N E E1 1 2 3 e e1 D A A2 c φ A1 L L1 6(cid:15)(cid:7)&! (cid:6)(cid:19)99(cid:19)(cid:6).(cid:13).(cid:26)(cid:22) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:2)9(cid:7)’(cid:7)&! (cid:6)(cid:19)7 7:(cid:6) (cid:6)(cid:25); 7"’)(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)(cid:31)(cid:7)(cid:15)! 7 (cid:29) 9(cid:14)(cid:28)#(cid:2)(cid:31)(cid:7)&(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)(cid:24)(cid:29)(cid:2)1(cid:22), :"&!(cid:7)#(cid:14)(cid:2)9(cid:14)(cid:28)#(cid:2)(cid:31)(cid:7)&(cid:8)(cid:11) (cid:14)(cid:30) (cid:30)(cid:20)(cid:24)(cid:4)(cid:2)1(cid:22), : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)8(cid:14)(cid:7)(cid:17)(cid:11)& (cid:25) (cid:4)(cid:20)(cid:24)(cid:4) = (cid:30)(cid:20)(cid:23)(cid:29) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:25)(cid:3) (cid:4)(cid:20)<(cid:24) = (cid:30)(cid:20)-(cid:4) (cid:22)&(cid:28)(cid:15)#(cid:10)%% (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:4) = (cid:4)(cid:20)(cid:30)(cid:29) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)>(cid:7)#&(cid:11) . (cid:3)(cid:20)(cid:3)(cid:4) = -(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)>(cid:7)#&(cid:11) .(cid:30) (cid:30)(cid:20)-(cid:4) = (cid:30)(cid:20)<(cid:4) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) (cid:21) (cid:3)(cid:20)(cid:5)(cid:4) = -(cid:20)(cid:30)(cid:4) 3(cid:10)(cid:10)&(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) 9 (cid:4)(cid:20)(cid:30)(cid:4) = (cid:4)(cid:20)?(cid:4) 3(cid:10)(cid:10)&(cid:12)(cid:9)(cid:7)(cid:15)& 9(cid:30) (cid:4)(cid:20)-(cid:29) = (cid:4)(cid:20)<(cid:4) 3(cid:10)(cid:10)&(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)R = -(cid:4)R 9(cid:14)(cid:28)#(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:8) (cid:4)(cid:20)(cid:4)< = (cid:4)(cid:20)(cid:3)? 9(cid:14)(cid:28)#(cid:2)>(cid:7)#&(cid:11) ) (cid:4)(cid:20)(cid:3)(cid:4) = (cid:4)(cid:20)(cid:29)(cid:30) (cid:30)(cid:26)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)!(cid:2)(cid:21)(cid:2)(cid:28)(cid:15)#(cid:2).(cid:30)(cid:2)#(cid:10)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)"#(cid:14)(cid:2)’(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:20)(cid:2)(cid:6)(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:2)!(cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:14)$(cid:8)(cid:14)(cid:14)#(cid:2)(cid:4)(cid:20)(cid:30)(cid:3)(cid:5)(cid:2)’’(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)!(cid:7)#(cid:14)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)#(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6).(cid:2)0(cid:30)(cid:23)(cid:20)(cid:29)(cid:6)(cid:20) 1(cid:22),2 1(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)&(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)$(cid:28)(cid:8)&(cid:2) (cid:28)(cid:16)"(cid:14)(cid:2)!(cid:11)(cid:10)*(cid:15)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17),(cid:4)(cid:23)(cid:27)(cid:4)(cid:24)(cid:30)1  2002-2012 Microchip Technology Inc. DS21713M-page 33

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21713M-page 34  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2002-2012 Microchip Technology Inc. DS21713M-page 35

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Please contact your local Microchip representative for specific details. DS21713M-page 36  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2002-2012 Microchip Technology Inc. DS21713M-page 37

24AA32A/24LC32A APPENDIX A: REVISION HISTORY Revision D (12/2003) Corrections to Section 1.0, Electrical Characteristics. Revision E (03/2005) Added DFN package. Revision F (08/2005) Revised Sections 4.3, 7.2 and 7.4. Revision G (07/2006) Replaced 2x3 DFN (MC) Package Revision H (02/2007) Changed 1.8V to 1.7V; Revised Features Section; Replaced Package Drawings; Deleted Rotated TSSOP; Revised Product ID Section. Revision J (02/2009) Added TDFN and SOT-23 packages; Updated Package Drawings; Moved Pin Descriptions to Section 2.0; Renumbered Sections. Revision K (12/2009) Added Chip Scale Package. Revision L (03/2010) Added X-Rotated TSSOP package; Updated Package Drawings. Revision M (02/2012) Corrected CS package drawing aspect ratio; Revised Product ID System. DS21713M-page 38  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at Users of Microchip products can receive assistance www.microchip.com. This web site is used as a means through several channels: to make files and information easily available to • Distributor or Representative customers. Accessible by using your favorite Internet • Local Sales Office browser, the web site contains the following information: • Field Application Engineer (FAE) • Technical Support • Product Support – Data sheets and errata, application notes and sample programs, design • Development Systems Information Line resources, user’s guides and hardware support Customers should contact their distributor, documents, latest software releases and archived representative or field application engineer (FAE) for software support. Local sales offices are also available to help • General Technical Support – Frequently Asked customers. A listing of sales offices and locations is Questions (FAQ), technical support requests, included in the back of this document. online discussion groups, Microchip consultant Technical support is available through the web site program member listing at: http://microchip.com/support • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.  2002-2012 Microchip Technology Inc. DS21713M-page 39

24AA32A/24LC32A READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. TO: Technical Publications Manager Total Pages Sent ________ RE: Reader Response From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: 24AA32A/24LC32A Literature Number: DS21713M Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21713M-page 40  2002-2012 Microchip Technology Inc.

24AA32A/24LC32A PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX Examples: a) 24AA32A-I/P: Industrial Temperature,1.7V, Device Temperature Package PDIP package Range b) 24AA32A-I/SN: Industrial Temperature,1.7V, Device: 24AA32A: 1.7V, 32 Kbit I2C Serial EEPROM SOIC package 24AA32AT: 1.7V, 32 Kbit I2C Serial EEPROM c) 24AA32A-I/SM: Industrial Temperature,1.7V, (Tape and Reel) 24AA32AX: 1.7V, 32 Kbit I2C Serial EEPROM in  SOIJ (5.28 mm) package alternate pinout (ST only) d) 24AA32A-I/ST: Industrial Temperature,1.7V, 24AA32AXT1.7V, 32 Kbit I2C Serial EEPROM in  TSSOP package alternate pinout (ST only) e) 24AA32AT-I/CS16K = Industrial Temperature, 24LC32A: 2.5V, 32 Kbit I2C Serial EEPROM 1.7V, CS package, Tape and Reel 24LC32AT: 2.5V, 32 Kbit I2C Serial EEPROM f) 24LC32A-I/P: Industrial Temperature, 2.5V, (Tape and Reel) PDIP package 24LC32AX: 2.5V, 32 Kbit I2C Serial EEPROM in  g) 24LC32A-E/SN: Automotive Temperature, alternate pinout (ST only) 2.5V SOIC package 24LC32AXT2.5V, 32 Kbit I2C Serial EEPROM in  h) 24LC32A-E/SM: Automotive Temperature, alternate pinout (ST only) 2.5V SOIJ (5.28 mm) package i) 24LC32AT-I/ST: Industrial Temperature, 2.5V, Temperature I = -40°C to +85°C TSSOP package, Tape and Reel Range: E = -40°C to +125°C Package: P = Plastic DIP (300 mil body), 8-lead SN = Plastic SOIC (3.90 mm body), 8-lead SM = Plastic SOIJ (5.28 mm body), 8-lead ST = Plastic TSSOP (4.4 mm body), 8-lead MS = Plastic MSOP (Micro Small Outline), 8-lead MC = Plastic DFN (2x3x0.90 mm body), 8-lead MNY(1) = Plastic TDFN (2x3x0.75mm body), 8-lead OT = Plastic SOT-23, 5-lead (Tape and Reel only) CS16K(2)= Chip Scale (CS), 5-lead (I-temp, “AA” Tape and Reel only) Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish. 2: “16K” indicates 160K technology.  2002-2012 Microchip Technology Inc. DS21713M-page 41

24AA32A/24LC32A NOTES: DS21713M-page 42  2002-2012 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT, devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC, intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002-2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620760154 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2002-2012 Microchip Technology Inc. DS21713M-page 43

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