23A256/23K256 256K SPI Bus Low-Power Serial SRAM Device Selection Table Part Number VCC Range Page Size Temp. Ranges Packages 23K256 2.7-3.6V 32 Byte I, E P, SN, ST 23A256 1.5-1.95V 32 Byte I P, SN, ST Features: Description: • Max. Clock 20 MHz The Microchip Technology Inc. 23X256 are 256 Kbit • Low-Power CMOS Technology: Serial SRAM devices. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible - Read Current: 3 mA at 1 MHz serial bus. The bus signals required are a clock input - Standby Current: 4 A Max. at +85°C (SCK) plus separate data in (SI) and data out (SO) • 32,768 x 8-bit Organization lines. Access to the device is controlled through a Chip • 32-Byte Page Select (CS) input. • HOLD pin Communication to the device can be paused via the • Flexible Operating modes: hold pin (HOLD). While the device is paused, - Byte read and write transitions on its inputs will be ignored, with the - Page mode (32 Byte Page) exception of Chip Select, allowing the host to service higher priority interrupts. - Sequential mode • Sequential Read/Write The 23X256 is available in standard packages including 8-lead PDIP and SOIC, and advanced • High Reliability packaging including 8-lead TSSOP. • Temperature Ranges Supported: - Industrial (I): -40C to +85C Package Types (not to scale) - Automotive (E): -40C to +125C • Pb-Free and RoHS Compliant, Halogen Free Pin Function Table Name Function PDIP/SOIC/TSSOP CS Chip Select Input (P, SN, ST) SO Serial Data Output VSS Ground CS 1 8 VCC SI Serial Data Input SO 2 7 HOLD SCK Serial Clock Input NC 3 6 SCK HOLD Hold Input VCC Supply Voltage VSS 4 5 SI  2008-2011 Microchip Technology Inc. DS22100F-page 1

23A256/23K256 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC.............................................................................................................................................................................4.5V All inputs and outputs w.r.t. VSS.........................................................................................................-0.3V to VCC +0.3V Storage temperature.................................................................................................................................-65°C to 150°C Ambient temperature under bias...............................................................................................................-40°C to 125°C ESD protection on all pins...........................................................................................................................................2kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an extended period of time may affect device reliability. TABLE 1-1: DC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C DC CHARACTERISTICS Automotive (E): TA = -40°C to +125°C Param. Sym. Characteristic Min. Typ(1) Max. Units Test Conditions No. D001 VCC Supply voltage 1.5 — 1.95 V 23A256 (I-Temp) D001 VCC Supply voltage 2.7 — 3.6 V 23K256 (I,E-Temp) D002 VIH High-level input .7 VCC — VCC +0.3 V voltage D003 VIL Low-level input -0.3 — 0.2xVCC V voltage 0.15xVCC V 23K256 (E-Temp) D004 VOL Low-level output — — 0.2 V IOL = 1mA voltage D005 VOH High-level output VCC -0.5 — — V IOH = -400A voltage D006 ILI Input leakage — — ±0.5 A CS = VCC, VIN = VSS OR VCC current D007 ILO Output leakage — — ±0.5 A CS = VCC, VOUT = VSS OR VCC current D008 ICC Read — — 3 mA FCLK = 1MHz; SO = O — — 6 mA FCLK = 10MHz; SO = O Operating current — — 10 mA FCLK = 20MHz; SO = O D009 ICCS — 0.2 1 A CS = VCC = 1.8V, Inputs tied to VCC Standby current or VSS — 1 4 A CS = VCC = 3.6V, Inputs tied to VCC or VSS — 5 10 A CS = VCC = 3.6V, Inputs tied to VCC or VSS @ 125°C D010 CINT Input capacitance 7 pF VCC = 0V, f = 1 MHz, Ta = 25°C (Note1) D011 VDR RAM data retention — 1.2 — V voltage (2) Note 1: This parameter is periodically sampled and not 100% tested. Typical measurements taken at room temperature (25°C). 2: This is the limit to which VDD can be lowered without losing RAM data. This parameter is periodically sampled and not 100% tested. DS22100F-page 2  2008-2011 Microchip Technology Inc.

23A256/23K256 TABLE 1-2: AC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C AC CHARACTERISTICS Automotive (E): TA = -40°C to +125°C Param. Sym. Characteristic Min. Max. Units Test Conditions No. 1 FCLK Clock frequency — 10 MHz VCC 1.5V (I-Temp) — 16 MHz VCC 1.8V (I-Temp) — 16 MHz VCC 3.0V (E-Temp) — 20 MHz VCC 3.0V (I-Temp) 2 TCSS CS setup time 50 — ns VCC 1.5V (I-Temp) 32 — ns VCC 1.8V (I-Temp) 32 — ns VCC 3.0V (E-Temp) 25 — ns VCC 3.0V (I-Temp) 3 TCSH CS hold time 50 — ns VCC 1.5V (I-Temp) 50 — ns VCC 1.8V (I-Temp) 50 — ns VCC 3.0V (E-Temp) 50 — ns VCC 3.0V (I-Temp) 4 TCSD CS disable time 50 — ns VCC 1.5V (I-Temp) 32 — ns VCC 1.8V (I-Temp) 32 — ns VCC 3.0V (E-Temp) 25 — ns VCC 3.0V (I-Temp) 5 Tsu Data setup time 10 — ns VCC 1.5V (I-Temp) 10 — ns VCC 1.8V (I-Temp) 10 — ns VCC 3.0V (E-Temp) 10 — ns VCC 3.0V (I-Temp) 6 THD Data hold time 10 — ns VCC 1.5V (I-Temp) 10 — ns VCC 1.8V (I-Temp) 10 — ns VCC 3.0V (E-Temp) 10 — ns VCC 3.0V (I-Temp) 7 TR CLK rise time — 2 us Note1 8 TF CLK fall time — 2 us Note1 9 THI Clock high time 50 — ns VCC 1.5V (I-Temp) 32 — ns VCC 1.8V (I-Temp) 32 — ns VCC 3.0V (E-Temp) 25 — ns VCC 3.0V (I-Temp) 10 TLO Clock low time 50 — ns VCC 1.5V (I-Temp) 32 — ns VCC 1.8V (I-Temp) 32 — ns VCC 3.0V (E-Temp) 25 — ns VCC 3.0V (I-Temp) 11 TCLD Clock delay time 50 — ns VCC 1.5V (I-Temp) 32 — ns VCC 1.8V (I-Temp) 32 — ns VCC 3.0V (E-Temp) 25 — ns VCC 3.0V (I-Temp) 12 TV Output valid from clock low — 50 ns VCC 1.5V (I-Temp) — 32 ns VCC 1.8V (I-Temp) — 32 ns VCC 3.0V (E-Temp) — 25 ns VCC 3.0V (I-Temp) 13 THO Output hold time 0 — ns Note1 Note 1: This parameter is periodically sampled and not 100% tested.  2008-2011 Microchip Technology Inc. DS22100F-page 3

23A256/23K256 TABLE 1-2: AC CHARACTERISTICS (CONTINUED) Industrial (I): TA = -40°C to +85°C AC CHARACTERISTICS Automotive (E): TA = -40°C to +125°C Param. Sym. Characteristic Min. Max. Units Test Conditions No. 14 TDIS Output disable time — 20 ns VCC 1.5V (I-Temp) — 20 ns VCC 1.8V (I-Temp) — 20 ns VCC 3.0V (E-Temp) — 20 ns VCC 3.0V (I-Temp) 15 THS HOLD setup time 10 — ns — 16 THH HOLD hold time 10 — ns — 17 THZ HOLD low to output High-Z 10 — ns — 18 THV HOLD high to output valid — 50 ns — Note 1: This parameter is periodically sampled and not 100% tested. TABLE 1-3: AC TEST CONDITIONS AC Waveform: Input pulse level 0.1 VCC to 0.9 VCC Input rise/fall time 5 ns Operating temperature -40°C to +125°C CL = 100 pF — Timing Measurement Reference Level: Input 0.5 VCC Output 0.5 VCC DS22100F-page 4  2008-2011 Microchip Technology Inc.

23A256/23K256 FIGURE 1-1: HOLD TIMING CS 16 16 15 15 SCK 17 17 High-Impedance SO n + 2 n + 1 n n n - 1 Don’t Care 5 SI n + 2 n + 1 n n n - 1 HOLD FIGURE 1-2: SERIAL INPUT TIMING 4 CS 2 11 7 8 3 SCK 5 6 SI MSB in LSB in High-Impedance SO FIGURE 1-3: SERIAL OUTPUT TIMING CS 9 10 3 SCK 12 14 13 SO MSB out LSB out Don’t Care SI  2008-2011 Microchip Technology Inc. DS22100F-page 5

23A256/23K256 2.0 FUNCTIONAL DESCRIPTION 2.3 Read Sequence The device is selected by pulling CS low. The 8-bit 2.1 Principles of Operation READ instruction is transmitted to the 23X256 followed by the 16-bit address, with the first MSB of the address The 23X256 is a 32,768-byte Serial SRAM designed to being a “don’t care” bit. After the correct READ interface directly with the Serial Peripheral Interface instruction and address are sent, the data stored in the (SPI) port of many of today’s popular microcontroller families, including Microchip’s PIC® microcontrollers. It memory at the selected address is shifted out on the SO pin. may also interface with microcontrollers that do not have a built-in SPI port by using discrete I/O lines If operating in Page mode, after the first byte of data is programmed properly in firmware to match the SPI shifted out, the next memory location on the page can protocol. be read out by continuing to provide clock pulses. This allows for 32 consecutive address reads. After the The 23X256 contains an 8-bit instruction register. The 32nd address read the internal address counter wraps device is accessed via the SI pin, with data being back to the byte 0 address in that page. clocked in on the rising edge of SCK. The CS pin must be low and the HOLD pin must be high for the entire If operating in Sequential mode, the data stored in the operation. memory at the next address can be read sequentially by continuing to provide clock pulses. The internal Table2-1 contains a list of the possible instruction Address Pointer is automatically incremented to the bytes and format for device operation. All instructions, next higher address after each byte of data is shifted addresses and data are transferred MSB first, LSB last. out. When the highest address is reached (7FFFh), Data (SI) is sampled on the first rising edge of SCK the address counter rolls over to address 0000h, after CS goes low. If the clock line is shared with other allowing the read cycle to be continued indefinitely. peripheral devices on the SPI bus, the user can assert The read operation is terminated by raising the CS pin the HOLD input and place the 23X256 in ‘HOLD’ mode. (Figure2-1). After releasing the HOLD pin, operation will resume from the point when the HOLD was asserted. 2.4 Write Sequence 2.2 Modes of Operation Prior to any attempt to write data to the 23X256, the device must be selected by bringing CS low. The 23A256/23K256 has three modes of operation that Once the device is selected, the Write command can are selected by setting bits 7 and 6 in the STATUS be started by issuing a WRITE instruction, followed by register. The modes of operation are Byte, Page and the 16-bit address, with the first MSB of the address Burst. being a “don’t care” bit, and then the data to be written. Byte Operation – is selected when bits 7 and 6 in the A write is terminated by the CS being brought high. STATUS register are set to 00. In this mode, the read/ If operating in Page mode, after the initial data byte is write operations are limited to only one byte. The shifted in, additional bytes can be shifted into the Command followed by the 16-bit address is clocked into device. The Address Pointer is automatically the device and the data to/from the device is transferred incremented. This operation can continue for the entire on the next 8 clocks (Figure2-1, Figure2-2). page (32 Bytes) before data will start to be overwritten. Page Operation – is selected when bits 7 and 6 in the If operating in Sequential mode, after the initial data STATUS register are set to 10. The 23A256/23K256 has byte is shifted in, additional bytes can be clocked into 1024 pages of 32 Bytes. In this mode, the read and write the device. The internal Address Pointer is automati- operations are limited to within the addressed page (the cally incremented. When the Address Pointer reaches address is automatically incremented internally). If the the highest address (7FFFh), the address counter rolls data being read or written reaches the page boundary, over to (0000h). This allows the operation to continue then the internal address counter will increment to the indefinitely, however, previous data will be overwritten. start of the page (Figure2-3, Figure2-4). Sequential Operation – is selected when bits 7 and 6 in the STATUS register are set to 01. Sequential opera- tion allows the entire array to be written to and read from. The internal address counter is automatically incremented and page boundaries are ignored. When the internal address counter reaches the end of the array, the address counter will roll over to 0x0000 (Figure2-5, Figure2-6). DS22100F-page 6  2008-2011 Microchip Technology Inc.

23A256/23K256 TABLE 2-1: INSTRUCTION SET Instruction Name Instruction Format Description READ 0000 0011 Read data from memory array beginning at selected address WRITE 0000 0010 Write data to memory array beginning at selected address RDSR 0000 0101 Read STATUS register WRSR 0000 0001 Write STATUS register FIGURE 2-1: BYTE READ SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK Instruction 16-bit Address SI 0 0 0 0 0 0 1 1 15 14 13 12 2 1 0 Data Out High-Impedance SO 7 6 5 4 3 2 1 0 FIGURE 2-2: BYTE WRITE SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK Instruction 16-bit Address Data Byte SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0 High-Impedance SO  2008-2011 Microchip Technology Inc. DS22100F-page 7

23A256/23K256 FIGURE 2-3: PAGE READ SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK Instruction 16-bit Address SI 0 0 0 0 0 0 1 1 15 14 13 12 2 1 0 Page X, Word Y Page X, Word Y High Impedance SO 7 6 5 4 3 2 1 0 CS 32 33 34 35 36 37 38 39 SCK SI Page X, Word Y+1 Page X, Word 31 Page X, Word 0 SO 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 FIGURE 2-4: PAGE WRITE SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK Instruction 16-bit Address Page X, Word Y SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0 Page X, Word Y CS 32 33 34 35 36 37 38 39 SCK Page X, Word Y+1 Page X, Word 31 Page X, Word 0 SI 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 DS22100F-page 8  2008-2011 Microchip Technology Inc.

23A256/23K256 FIGURE 2-5: SEQUENTIAL READ SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK Instruction 16-bit Address SI 0 0 0 0 0 0 1 1 15 14 13 12 2 1 0 Page X, Word Y SO 7 6 5 4 3 2 1 0 CS SCK SI Page X, Word 31 Page X+1, Word 0 Page X+1, Word 1 SO 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CS SCK SI Page X+1, Word 31 Page X+n, Word 1 Page X+n, Word 31 SO 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0  2008-2011 Microchip Technology Inc. DS22100F-page 9

23A256/23K256 FIGURE 2-6: SEQUENTIAL WRITE SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31 SCK Instruction 16-bit Address Data Byte 1 SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0 CS 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 SCK Data Byte 2 Data Byte 3 Data Byte n SI 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 DS22100F-page 10  2008-2011 Microchip Technology Inc.

23A256/23K256 2.5 Read Status Register Instruction The mode bits indicate the operating mode of the (RDSR) SRAM. The possible modes of operation are: 0 0 = Byte mode (default operation) The Read Status Register instruction (RDSR) provides access to the STATUS register. The STATUS register 1 0 = Page mode may be read at any time. The STATUS register is 0 1 = Sequential mode formatted as follows: 1 1 = Reserved TABLE 2-2: STATUS REGISTER Write and read commands are shown in Figure2-7 and Figure2-8. 7 6 5 4 3 2 1 0 The HOLD bit enables the Hold pin functionality. It must W/R W/R – – – – – W/R be set to a ‘0’ before HOLD pin is brought low for HOLD MODE MODE 0 0 0 0 0 HOLD function to work properly. Setting HOLD to ‘1’ disables W/R = writable/readable. feature. Bits 1 through 5 are reserved and should always be set to ‘0’. See Figure2-7 for the RDSR timing sequence. FIGURE 2-7: READ STATUS REGISTER TIMING SEQUENCE (RDSR) CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK Instruction SI 0 0 0 0 0 1 0 1 Data from STATUS Register High-Impedance SO 7 6 5 4 3 2 1 0  2008-2011 Microchip Technology Inc. DS22100F-page 11

23A256/23K256 2.6 Write Status Register Instruction (WRSR) The Write Status Register instruction (WRSR) allows the user to write to the bits in the STATUS register as shown in Table2-2. This allows for setting of the Device operating mode. Several of the bits in the STATUS register must be cleared to ‘0’. See Figure2-8 for the WRSR timing sequence. FIGURE 2-8: WRITE STATUS REGISTER TIMING SEQUENCE (WRSR) CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK Instruction Data to STATUS Register SI 0 0 0 0 0 0 0 1 7 6 5 4 3 2 1 0 High-Impedance SO 2.7 Power-On State The 23X256 powers on in the following state: • The device is in low-power Standby mode (CS=1) • A high-to-low-level transition on CS is required to enter active state DS22100F-page 12  2008-2011 Microchip Technology Inc.

23A256/23K256 3.0 PIN DESCRIPTIONS 3.5 Hold (HOLD) The descriptions of the pins are listed in Table3-1. The HOLD pin is used to suspend transmission to the 23X256 while in the middle of a serial sequence without TABLE 3-1: PIN FUNCTION TABLE having to retransmit the entire sequence again. It must be held high any time this function is not being used. PDIP/SOIC Once the device is selected and a serial sequence is Name Function TSSOP underway, the HOLD pin may be pulled low to pause further serial communication without resetting the CS 1 Chip Select Input serial sequence. The HOLD pin must be brought low SO 2 Serial Data Output while SCK is low, otherwise the HOLD function will not be invoked until the next SCK high-to-low transition. VSS 4 Ground The 23X256 must remain selected during this SI 5 Serial Data Input sequence. The SI, SCK and SO pins are in a high- SCK 6 Serial Clock Input impedance state during the time the device is paused HOLD 7 Hold Input and transitions on these pins will be ignored. To resume serial communication, HOLD must be brought high VCC 8 Supply Voltage while the SCK pin is low, otherwise serial communication will not resume. Lowering the HOLD 3.1 Chip Select (CS) line at any time will tri-state the SO line. A low level on this pin selects the device. A high level Hold functionality is disabled by the STATUS register deselects the device and forces it into Standby mode. bit. When the device is deselected, SO goes to the high- impedance state, allowing multiple parts to share the same SPI bus. After power-up, a low level on CS is required, prior to any sequence being initiated. 3.2 Serial Output (SO) The SO pin is used to transfer data out of the 23X256. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock. 3.3 Serial Input (SI) The SI pin is used to transfer data into the device. It receives instructions, addresses and data. Data is latched on the rising edge of the serial clock. 3.4 Serial Clock (SCK) The SCK is used to synchronize the communication between a master and the 23X256. Instructions, addresses or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin is updated after the falling edge of the clock input.  2008-2011 Microchip Technology Inc. DS22100F-page 13

23A256/23K256 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 8-Lead PDIP Example: XXXXXXXX 23K256 T/XXXNNN I/P e 3 1L7 YYWW 0528 8-Lead SOIC (3.90 mm) Example: XXXXXXXT 23K256I XXXXYYWW SN e 3 0528 NNN 1L7 8-Lead TSSOP Example: XXXX K256 TYWW I837 NNN 1L7 Legend: XX...X Part number or part number code T Temperature (I, E) Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) e3 Pb-free JEDEC designator for Matte Tin (Sn) Note: For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS22100F-page 14  2008-2011 Microchip Technology Inc.

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(cid:25)(cid:3) (cid:20)(cid:30)(cid:30)(cid:29) (cid:20)(cid:30)-(cid:4) (cid:20)(cid:30)(cid:24)(cid:29) 1(cid:28)!(cid:14)(cid:2)&(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)&(cid:7)(cid:15)(cid:17)(cid:2)(cid:31)(cid:16)(cid:28)(cid:15)(cid:14) (cid:25)(cid:30) (cid:20)(cid:4)(cid:30)(cid:29) = = (cid:22)(cid:11)(cid:10)"(cid:16)#(cid:14)(cid:9)(cid:2)&(cid:10)(cid:2)(cid:22)(cid:11)(cid:10)"(cid:16)#(cid:14)(cid:9)(cid:2)>(cid:7)#&(cid:11) . (cid:20)(cid:3)(cid:24)(cid:4) (cid:20)-(cid:30)(cid:4) (cid:20)-(cid:3)(cid:29) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)>(cid:7)#&(cid:11) .(cid:30) (cid:20)(cid:3)(cid:23)(cid:4) (cid:20)(cid:3)(cid:29)(cid:4) (cid:20)(cid:3)<(cid:4) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) (cid:21) (cid:20)-(cid:23)< (cid:20)-?(cid:29) (cid:20)(cid:23)(cid:4)(cid:4) (cid:13)(cid:7)(cid:12)(cid:2)&(cid:10)(cid:2)(cid:22)(cid:14)(cid:28)&(cid:7)(cid:15)(cid:17)(cid:2)(cid:31)(cid:16)(cid:28)(cid:15)(cid:14) 9 (cid:20)(cid:30)(cid:30)(cid:29) (cid:20)(cid:30)-(cid:4) (cid:20)(cid:30)(cid:29)(cid:4) 9(cid:14)(cid:28)#(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:8) (cid:20)(cid:4)(cid:4)< (cid:20)(cid:4)(cid:30)(cid:4) (cid:20)(cid:4)(cid:30)(cid:29) 6(cid:12)(cid:12)(cid:14)(cid:9)(cid:2)9(cid:14)(cid:28)#(cid:2)>(cid:7)#&(cid:11) )(cid:30) (cid:20)(cid:4)(cid:23)(cid:4) (cid:20)(cid:4)?(cid:4) (cid:20)(cid:4)(cid:5)(cid:4) 9(cid:10)*(cid:14)(cid:9)(cid:2)9(cid:14)(cid:28)#(cid:2)>(cid:7)#&(cid:11) ) (cid:20)(cid:4)(cid:30)(cid:23) (cid:20)(cid:4)(cid:30)< (cid:20)(cid:4)(cid:3)(cid:3) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)(cid:26)(cid:10)*(cid:2)(cid:22)(cid:12)(cid:28)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:2)+ (cid:14)1 = = (cid:20)(cid:23)-(cid:4) (cid:30)(cid:26)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:31)(cid:7)(cid:15)(cid:2)(cid:30)(cid:2) (cid:7)!"(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)#(cid:14)$(cid:2)%(cid:14)(cid:28)&"(cid:9)(cid:14)(cid:2)’(cid:28)(cid:18)(cid:2) (cid:28)(cid:9)(cid:18)((cid:2))"&(cid:2)’"!&(cid:2))(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)*(cid:7)&(cid:11)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)&(cid:8)(cid:11)(cid:14)#(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) +(cid:2)(cid:22)(cid:7)(cid:17)(cid:15)(cid:7)%(cid:7)(cid:8)(cid:28)(cid:15)&(cid:2),(cid:11)(cid:28)(cid:9)(cid:28)(cid:8)&(cid:14)(cid:9)(cid:7)!&(cid:7)(cid:8)(cid:20) -(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)!(cid:2)(cid:21)(cid:2)(cid:28)(cid:15)#(cid:2).(cid:30)(cid:2)#(cid:10)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)"#(cid:14)(cid:2)’(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:20)(cid:2)(cid:6)(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:2)!(cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:14)$(cid:8)(cid:14)(cid:14)#(cid:2)(cid:20)(cid:4)(cid:30)(cid:4)/(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)!(cid:7)#(cid:14)(cid:20) (cid:23)(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)#(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6).(cid:2)0(cid:30)(cid:23)(cid:20)(cid:29)(cid:6)(cid:20) 1(cid:22),2(cid:2)1(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)&(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)$(cid:28)(cid:8)&(cid:2) (cid:28)(cid:16)"(cid:14)(cid:2)!(cid:11)(cid:10)*(cid:15)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17),(cid:4)(cid:23)(cid:27)(cid:4)(cid:30)<1  2008-2011 Microchip Technology Inc. DS22100F-page 15

23A256/23K256 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22100F-page 16  2008-2011 Microchip Technology Inc.

23A256/23K256 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2008-2011 Microchip Technology Inc. DS22100F-page 17

23A256/23K256 (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8) (cid:24)(cid:6)(cid:10)(cid:10)(cid:8)!(cid:16)(cid:12)(cid:10)(cid:13)(cid:18)(cid:5)(cid:8)(cid:19) (cid:30)(cid:20)(cid:8)(cid:21)(cid:8)(cid:30)(cid:6)""(cid:26)#$(cid:8)(cid:22)%&(cid:23)(cid:8)(cid:24)(cid:24)(cid:8)(cid:25)(cid:26)(cid:7)(cid:27)(cid:8)(cid:28) !(cid:17)’(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) DS22100F-page 18  2008-2011 Microchip Technology Inc.

23A256/23K256 (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:12)(cid:13)(cid:14)(cid:8)()(cid:13)(cid:18)(cid:8) )"(cid:13)(cid:18)*(cid:8) (cid:24)(cid:6)(cid:10)(cid:10)(cid:8)!(cid:16)(cid:12)(cid:10)(cid:13)(cid:18)(cid:5)(cid:8)(cid:19) ((cid:20)(cid:8)(cid:21)(cid:8)+%+(cid:8)(cid:24)(cid:24)(cid:8)(cid:25)(cid:26)(cid:7)(cid:27)(cid:8)(cid:28)( !(cid:9)(cid:29) (cid:30)(cid:26)(cid:12)(cid:5)(cid:31) 3(cid:10)(cid:9)(cid:2)&(cid:11)(cid:14)(cid:2)’(cid:10)!&(cid:2)(cid:8)"(cid:9)(cid:9)(cid:14)(cid:15)&(cid:2)(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)#(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17)!((cid:2)(cid:12)(cid:16)(cid:14)(cid:28)!(cid:14)(cid:2)!(cid:14)(cid:14)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17)(cid:2)(cid:22)(cid:12)(cid:14)(cid:8)(cid:7)%(cid:7)(cid:8)(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)(cid:28)&(cid:2) (cid:11)&&(cid:12)255***(cid:20)’(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:20)(cid:8)(cid:10)’5(cid:12)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:7)(cid:15)(cid:17) D N E E1 NOTE1 1 2 b e c φ A A2 A1 L1 L 6(cid:15)(cid:7)&! (cid:6)(cid:19)99(cid:19)(cid:6).(cid:13).(cid:26)(cid:22) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:2)9(cid:7)’(cid:7)&! (cid:6)(cid:19)7 7:(cid:6) (cid:6)(cid:25); 7"’)(cid:14)(cid:9)(cid:2)(cid:10)%(cid:2)(cid:31)(cid:7)(cid:15)! 7 < (cid:31)(cid:7)&(cid:8)(cid:11) (cid:14) (cid:4)(cid:20)?(cid:29)(cid:2)1(cid:22), : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)8(cid:14)(cid:7)(cid:17)(cid:11)& (cid:25) = = (cid:30)(cid:20)(cid:3)(cid:4) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:25)(cid:3) (cid:4)(cid:20)<(cid:4) (cid:30)(cid:20)(cid:4)(cid:4) (cid:30)(cid:20)(cid:4)(cid:29) (cid:22)&(cid:28)(cid:15)#(cid:10)%%(cid:2) (cid:25)(cid:30) (cid:4)(cid:20)(cid:4)(cid:29) = (cid:4)(cid:20)(cid:30)(cid:29) : (cid:14)(cid:9)(cid:28)(cid:16)(cid:16)(cid:2)>(cid:7)#&(cid:11) . ?(cid:20)(cid:23)(cid:4)(cid:2)1(cid:22), (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)>(cid:7)#&(cid:11) .(cid:30) (cid:23)(cid:20)-(cid:4) (cid:23)(cid:20)(cid:23)(cid:4) (cid:23)(cid:20)(cid:29)(cid:4) (cid:6)(cid:10)(cid:16)#(cid:14)#(cid:2)(cid:31)(cid:28)(cid:8)4(cid:28)(cid:17)(cid:14)(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) (cid:21) (cid:3)(cid:20)(cid:24)(cid:4) -(cid:20)(cid:4)(cid:4) -(cid:20)(cid:30)(cid:4) 3(cid:10)(cid:10)&(cid:2)9(cid:14)(cid:15)(cid:17)&(cid:11) 9 (cid:4)(cid:20)(cid:23)(cid:29) (cid:4)(cid:20)?(cid:4) (cid:4)(cid:20)(cid:5)(cid:29) 3(cid:10)(cid:10)&(cid:12)(cid:9)(cid:7)(cid:15)& 9(cid:30) (cid:30)(cid:20)(cid:4)(cid:4)(cid:2)(cid:26).3 3(cid:10)(cid:10)&(cid:2)(cid:25)(cid:15)(cid:17)(cid:16)(cid:14) (cid:3) (cid:4)R = <R 9(cid:14)(cid:28)#(cid:2)(cid:13)(cid:11)(cid:7)(cid:8)4(cid:15)(cid:14)!! (cid:8) (cid:4)(cid:20)(cid:4)(cid:24) = (cid:4)(cid:20)(cid:3)(cid:4) 9(cid:14)(cid:28)#(cid:2)>(cid:7)#&(cid:11) ) (cid:4)(cid:20)(cid:30)(cid:24) = (cid:4)(cid:20)-(cid:4) (cid:30)(cid:26)(cid:12)(cid:5)(cid:11)(cid:31) (cid:30)(cid:20) (cid:31)(cid:7)(cid:15)(cid:2)(cid:30)(cid:2) (cid:7)!"(cid:28)(cid:16)(cid:2)(cid:7)(cid:15)#(cid:14)$(cid:2)%(cid:14)(cid:28)&"(cid:9)(cid:14)(cid:2)’(cid:28)(cid:18)(cid:2) (cid:28)(cid:9)(cid:18)((cid:2))"&(cid:2)’"!&(cid:2))(cid:14)(cid:2)(cid:16)(cid:10)(cid:8)(cid:28)&(cid:14)#(cid:2)*(cid:7)&(cid:11)(cid:7)(cid:15)(cid:2)&(cid:11)(cid:14)(cid:2)(cid:11)(cid:28)&(cid:8)(cid:11)(cid:14)#(cid:2)(cid:28)(cid:9)(cid:14)(cid:28)(cid:20) (cid:3)(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)!(cid:2)(cid:21)(cid:2)(cid:28)(cid:15)#(cid:2).(cid:30)(cid:2)#(cid:10)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:7)(cid:15)(cid:8)(cid:16)"#(cid:14)(cid:2)’(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:20)(cid:2)(cid:6)(cid:10)(cid:16)#(cid:2)%(cid:16)(cid:28)!(cid:11)(cid:2)(cid:10)(cid:9)(cid:2)(cid:12)(cid:9)(cid:10)&(cid:9)"!(cid:7)(cid:10)(cid:15)!(cid:2)!(cid:11)(cid:28)(cid:16)(cid:16)(cid:2)(cid:15)(cid:10)&(cid:2)(cid:14)$(cid:8)(cid:14)(cid:14)#(cid:2)(cid:4)(cid:20)(cid:30)(cid:29)(cid:2)’’(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)!(cid:7)#(cid:14)(cid:20) -(cid:20) (cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:7)(cid:15)(cid:17)(cid:2)(cid:28)(cid:15)#(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:7)(cid:15)(cid:17)(cid:2)(cid:12)(cid:14)(cid:9)(cid:2)(cid:25)(cid:22)(cid:6).(cid:2)0(cid:30)(cid:23)(cid:20)(cid:29)(cid:6)(cid:20) 1(cid:22),2 1(cid:28)!(cid:7)(cid:8)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)(cid:20)(cid:2)(cid:13)(cid:11)(cid:14)(cid:10)(cid:9)(cid:14)&(cid:7)(cid:8)(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)(cid:14)$(cid:28)(cid:8)&(cid:2) (cid:28)(cid:16)"(cid:14)(cid:2)!(cid:11)(cid:10)*(cid:15)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)!(cid:20) (cid:26).32 (cid:26)(cid:14)%(cid:14)(cid:9)(cid:14)(cid:15)(cid:8)(cid:14)(cid:2)(cid:21)(cid:7)’(cid:14)(cid:15)!(cid:7)(cid:10)(cid:15)((cid:2)"!"(cid:28)(cid:16)(cid:16)(cid:18)(cid:2)*(cid:7)&(cid:11)(cid:10)"&(cid:2)&(cid:10)(cid:16)(cid:14)(cid:9)(cid:28)(cid:15)(cid:8)(cid:14)((cid:2)%(cid:10)(cid:9)(cid:2)(cid:7)(cid:15)%(cid:10)(cid:9)’(cid:28)&(cid:7)(cid:10)(cid:15)(cid:2)(cid:12)"(cid:9)(cid:12)(cid:10)!(cid:14)!(cid:2)(cid:10)(cid:15)(cid:16)(cid:18)(cid:20) (cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:8)(cid:11)(cid:7)(cid:12)(cid:13)(cid:14)(cid:8)(cid:11)(cid:15)(cid:10)(cid:16)(cid:10)(cid:17)(cid:18)(cid:21)(cid:9)(cid:28)*(cid:7)(cid:15)(cid:17),(cid:4)(cid:23)(cid:27)(cid:4)<?1  2008-2011 Microchip Technology Inc. DS22100F-page 19

23A256/23K256 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22100F-page 20  2008-2011 Microchip Technology Inc.

23A256/23K256 APPENDIX A: REVISION HISTORY Revision A (11/2008) Original Release. Revision B (12/2008) Updates; Table 1-1, add Param. D011. Revision C (01/2009) Revised Section 2.5: Added a paragraph. Revision D (04/2009) Removed Preliminary status; Revised Standby Current; Revised Table 1-1, Param. No. D009; Revised TSSOP Package marking; Revised Product ID. Revision E (08/2010) Revised Table 1-1, Param. No. D009; Revised Package Drawings. Revision F (10/2011) Revised Parameter D003 in Table 1-1: DC Character- istics.  2008-2011 Microchip Technology Inc. DS22100F-page 21

23A256/23K256 NOTES: DS22100F-page 22  2008-2011 Microchip Technology Inc.

23X256 THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at Users of Microchip products can receive assistance www.microchip.com. This web site is used as a means through several channels: to make files and information easily available to • Distributor or Representative customers. Accessible by using your favorite Internet • Local Sales Office browser, the web site contains the following • Field Application Engineer (FAE) information: • Technical Support • Product Support – Data sheets and errata, • Development Systems Information Line application notes and sample programs, design resources, user’s guides and hardware support Customers should contact their distributor, documents, latest software releases and archived representative or field application engineer (FAE) for software support. Local sales offices are also available to help • General Technical Support – Frequently Asked customers. A listing of sales offices and locations is Questions (FAQ), technical support requests, included in the back of this document. online discussion groups, Microchip consultant Technical support is available through the web site program member listing at: http://microchip.com/support • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.  2008-2011 Microchip Technology Inc. DS22100F-page 23

23X256 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480)792-4150. Please list the following information, and use this outline to provide us with your comments about this document. TO: Technical Publications Manager Total Pages Sent ________ RE: Reader Response From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: 23X256 Literature Number: DS22100F Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS22100F-page 24  2008-2011 Microchip Technology Inc.

23A256/23K256 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X – X /XX Examples: Device Tape & Reel Temp Range Package a) 23K256-I/ST = 256 Kbit, 3.6V Serial SRAM, Industrial temp., TSSOP package b) 23A256T-I/SN = 256 Kbit, 1.8V Serial SRAM, Industrial temp., Tape & Reel, SOIC package Device: 23A256 = 256 Kbit, 1.8V, SPI Serial SRAM c) 23K256-E/ST = 256 Kbit, 3.6V Serial SRAM, 23K256 = 256 Kbit, 3.6V, SPI Serial SRAM Automotive temp., TSSOP package Tape & Reel: Blank = Standard packaging (tube) T = Tape & Reel Temperature I = -40C to+85C Range: E -40C to+125C Package: P = Plastic PDIP (300 mil body), 8-lead SN = Plastic SOIC (3.90 mml body), 8-lead ST = TSSOP, 8-lead  2008-2011 Microchip Technology Inc. DS22100F-page 25

23A256/23K256 NOTES: DS22100F-page 26  2008-2011 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC, and may be superseded by updates. It is your responsibility to KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PIC32 logo, rfPIC and UNI/O are registered trademarks of MICROCHIP MAKES NO REPRESENTATIONS OR Microchip Technology Incorporated in the U.S.A. and other WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT, devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC, intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2008-2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-674-7 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2008-2011 Microchip Technology Inc. DS22100F-page 27

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